'H' => print ",pt" or ",pn" branch hint
'I' => honor following macro letter even in Intel mode (implemented only
for some of the macro letters)
- 'J' => print 'l'
+ 'J' unused.
'K' => print 'd' or 'q' if rex prefix is present.
'L' => print 'l' if suffix_always is true
'M' => print 'r' if intel_mnemonic is false.
"XZ" => print 'x', 'y', or 'z' if suffix_always is true or no
register operands and no broadcast.
"XW" => print 's', 'd' depending on the VEX.W bit (for FMA)
- "LQ" => print 'l' ('d' in Intel mode) or 'q' for memory operand
- or suffix_always is true
+ "LQ" => print 'l' ('d' in Intel mode) or 'q' for memory
+ operand or no operand at all in 64bit mode, or if suffix_always
+ is true.
"LB" => print "abs" in 64bit mode and behave as 'B' otherwise
"LS" => print "abs" in 64bit mode and behave as 'S' otherwise
"LV" => print "abs" for 64bit operand and behave as 'S' otherwise
/* c8 */
{ "enterT", { Iw, Ib }, 0 },
{ "leaveT", { XX }, 0 },
- { "Jret{|f}P", { Iw }, 0 },
- { "Jret{|f}P", { XX }, 0 },
+ { "{l|}ret{|f}P", { Iw }, 0 },
+ { "{l|}ret{|f}P", { XX }, 0 },
{ "int3", { XX }, 0 },
{ "int", { Ib }, 0 },
{ X86_64_TABLE (X86_64_CE) },
{ Bad_Opcode },
{ "syscall", { XX }, 0 },
{ "clts", { XX }, 0 },
- { "sysret%LP", { XX }, 0 },
+ { "sysret%LQ", { XX }, 0 },
/* 08 */
{ "invd", { XX }, 0 },
{ PREFIX_TABLE (PREFIX_0F09) },
{
{ "vmmcall", { Skip_MODRM }, 0 },
{ "vmgexit", { Skip_MODRM }, 0 },
+ { Bad_Opcode },
+ { "vmgexit", { Skip_MODRM }, 0 },
},
/* PREFIX_0F01_REG_5_MOD_0 */
/* X86_64_9A */
{
- { "Jcall{T|}", { Ap }, 0 },
+ { "{l|}call{T|}", { Ap }, 0 },
},
/* X86_64_C2 */
/* X86_64_EA */
{
- { "Jjmp{T|}", { Ap }, 0 },
+ { "{l|}jmp{T|}", { Ap }, 0 },
},
/* X86_64_0F01_REG_0 */
},
{
/* MOD_FF_REG_3 */
- { "Jcall^", { indirEp }, 0 },
+ { "{l|}call^", { indirEp }, 0 },
},
{
/* MOD_FF_REG_5 */
- { "Jjmp^", { indirEp }, 0 },
+ { "{l|}jmp^", { indirEp }, 0 },
},
{
/* MOD_0F01_REG_0 */
else if (CONST_STRNEQ (p, "x86-64"))
{
address_mode = mode_64bit;
- priv.orig_sizeflag = AFLAG | DFLAG;
+ priv.orig_sizeflag |= AFLAG | DFLAG;
}
else if (CONST_STRNEQ (p, "i386"))
{
address_mode = mode_32bit;
- priv.orig_sizeflag = AFLAG | DFLAG;
+ priv.orig_sizeflag |= AFLAG | DFLAG;
}
else if (CONST_STRNEQ (p, "i8086"))
{
address_mode = mode_16bit;
- priv.orig_sizeflag = 0;
+ priv.orig_sizeflag &= ~(AFLAG | DFLAG);
}
else if (CONST_STRNEQ (p, "intel"))
{
"fist{l|}",
"fistp{l|}",
"(bad)",
- "fld{t||t|}",
+ "fld{t|}",
"(bad)",
- "fstp{t||t|}",
+ "fstp{t|}",
/* dc */
"fadd{l|}",
"fmul{l|}",
*obufp++ = 'n';
}
break;
- case 'J':
- if (intel_syntax)
- break;
- *obufp++ = 'l';
- break;
case 'K':
USED_REX (REX_W);
if (rex & REX_W)
SAVE_LAST (*p);
break;
}
- if (intel_syntax
+ if ((intel_syntax && need_modrm)
|| (modrm.mod == 3 && !(sizeflag & SUFFIX_ALWAYS)))
break;
if ((rex & REX_W))
USED_REX (REX_W);
*obufp++ = 'q';
}
- else
- *obufp++ = 'l';
+ else if((address_mode == mode_64bit && need_modrm)
+ || (sizeflag & SUFFIX_ALWAYS))
+ *obufp++ = intel_syntax? 'd' : 'l';
}
break;
case 'R':