# S/390 opcodes list. Use s390-mkopc to convert it into the opcode table.
-# Copyright (C) 2000-2019 Free Software Foundation, Inc.
+# Copyright (C) 2000-2023 Free Software Foundation, Inc.
# Contributed by Martin Schwidefsky (schwidefsky@de.ibm.com).
5a a RX_RRRD "add" g5 esa,zarch
6a ad RX_FRRD "add normalized (long)" g5 esa,zarch
17 xr RR_RR "exclusive OR" g5 esa,zarch
f8 zap SS_LLRDRD "zero and add" g5 esa,zarch
a70a ahi RI_RI "add halfword immediate" g5 esa,zarch
-84 brxh RSI_RRP "branch relative on index high" g5 esa,zarch
-85 brxle RSI_RRP "branch relative on index low or equal" g5 esa,zarch
-a705 bras RI_RP "branch relative and save" g5 esa,zarch
-a704 brc RI_UP "branch relative on condition" g5 esa,zarch
-a706 brct RI_RP "branch relative on count" g5 esa,zarch
+84 brxh RSI_RRP "branch relative on index high" g5 esa,zarch condjump
+84 jxh RSI_RRP "branch relative on index high" g5 esa,zarch condjump
+85 brxle RSI_RRP "branch relative on index low or equal" g5 esa,zarch condjump
+85 jxle RSI_RRP "branch relative on index low or equal" g5 esa,zarch condjump
+a705 bras RI_RP "branch relative and save" g5 esa,zarch jumpsr
+a705 jas RI_RP "branch relative and save" g5 esa,zarch jumpsr
+a704 brc RI_UP "branch relative on condition" g5 esa,zarch condjump
+a706 brct RI_RP "branch relative on count" g5 esa,zarch condjump
+a706 jct RI_RP "branch relative on count" g5 esa,zarch condjump
b241 cksm RRE_RR "checksum" g5 esa,zarch
a70e chi RI_RI "compare halfword immediate" g5 esa,zarch
a9 clcle RS_RRRD "compare logical long extended" g5 esa,zarch
4700 nop RX_0RRD "no operation" g5 esa,zarch optparm
4700 b*8 RX_0RRD "conditional branch" g5 esa,zarch
47f0 b RX_0RRD "unconditional branch" g5 esa,zarch
-a704 j*8 RI_0P "conditional jump" g5 esa,zarch
-a7f4 j RI_0P "unconditional jump" g5 esa,zarch
+a704 jc RI_UP "conditional jump" g5 esa,zarch condjump
+a704 jnop RI_0P "nop jump" g5 esa,zarch
+a704 j*8 RI_0P "conditional jump" g5 esa,zarch condjump
+a704 br*8 RI_0P "conditional jump" g5 esa,zarch condjump
+a7f4 j RI_0P "unconditional jump" g5 esa,zarch jump
+a7f4 bru RI_0P "unconditional jump" g5 esa,zarch jump
b34a axbr RRE_FEFE "add extended bfp" g5 esa,zarch
b31a adbr RRE_FF "add long bfp" g5 esa,zarch
ed000000001a adb RXE_FRRD "add long bfp" g5 esa,zarch
ed000000000d deb RXE_FRRD "divide short bfp" g5 esa,zarch
b35b didbr RRF_FUFF "divide to integer long bfp" g5 esa,zarch
b353 diebr RRF_FUFF "divide to integer short bfp" g5 esa,zarch
+# efpc and sfpc have only one operand; retain RR register format for compatibility
b38c efpc RRE_RR "extract fpc" g5 esa,zarch optparm
b342 ltxbr RRE_FEFE "load and test extended bfp" g5 esa,zarch
b312 ltdbr RRE_FF "load and test long bfp" g5 esa,zarch
ed000000001f msdb RXF_FRRDF "multiply and subtract long bfp" g5 esa,zarch
b30f msebr RRF_F0FF "multiply and subtract short bfp" g5 esa,zarch
ed000000000f mseb RXF_FRRDF "multiply and subtract short bfp" g5 esa,zarch
+# efpc and sfpc have only one operand; retain RR register format for compatibility
b384 sfpc RRE_RR "set fpc" g5 esa,zarch optparm
b299 srnm S_RD "set rounding mode" g5 esa,zarch
b316 sqxbr RRE_FEFE "square root extended bfp" g5 esa,zarch
e3000000001b slgf RXE_RRRD "subtract logical 64<32" z900 zarch
e3000000000c msg RXE_RRRD "multiply single 64" z900 zarch
e3000000001c msgf RXE_RRRD "multiply single 64<32" z900 zarch
-ec0000000044 brxhg RIE_RRP "branch relative on index high 64" z900 zarch
-ec0000000045 brxlg RIE_RRP "branch relative on index low or equal 64" z900 zarch
+ec0000000044 brxhg RIE_RRP "branch relative on index high 64" z900 zarch condjump
+ec0000000044 jxhg RIE_RRP "branch relative on index high 64" z900 zarch condjump
+ec0000000045 brxlg RIE_RRP "branch relative on index low or equal 64" z900 zarch condjump
+ec0000000045 jxleg RIE_RRP "branch relative on index low or equal 64" z900 zarch condjump
eb0000000044 bxhg RSE_RRRD "branch on index high 64" z900 zarch
eb0000000045 bxleg RSE_RRRD "branch on index low or equal 64" z900 zarch
eb000000000c srlg RSE_RRRD "shift right single logical 64" z900 zarch
eb0000000080 icmh RSE_RURD "insert characters under mask high" z900 zarch
a702 tmhh RI_RU "test under mask high high" z900 zarch
a703 tmhl RI_RU "test under mask high low" z900 zarch
-c004 brcl RIL_UP "branch relative on condition long" z900 esa,zarch
-c004 jg*8 RIL_0P "conditional jump long" z900 esa,zarch
-c0f4 jg RIL_0P "unconditional jump long" z900 esa,zarch
-c005 brasl RIL_RP "branch relative and save long" z900 esa,zarch
-a707 brctg RI_RP "branch relative on count 64" z900 zarch
+c004 brcl RIL_UP "branch relative on condition long" z900 esa,zarch condjump
+# jlc omitted due to missing jl* (see jl*8) and not added as non-standard jgc
+c004 jgnop RIL_0P "nop jump long" z900 esa,zarch
+c004 jg*8 RIL_0P "conditional jump long" z900 esa,zarch condjump
+# jl*8 omitted due to clash with non-standard j*8 flavors jle and jlh; exists as non-standard jg*8 instead
+c004 br*8l RIL_0P "conditional jump long" z900 esa,zarch condjump
+c0f4 jg RIL_0P "unconditional jump long" z900 esa,zarch jump
+c0f4 brul RIL_0P "unconditional jump long" z900 esa,zarch jump
+c005 brasl RIL_RP "branch relative and save long" z900 esa,zarch jumpsr
+c005 jasl RIL_RP "branch relative and save long" z900 esa,zarch jumpsr
+a707 brctg RI_RP "branch relative on count 64" z900 zarch condjump
+a707 jctg RI_RP "branch relative on count 64" z900 zarch condjump
a709 lghi RI_RI "load halfword immediate 64" z900 zarch
a70b aghi RI_RI "add halfword immediate 64" z900 zarch
a70d mghi RI_RI "multiply halfword immediate 64" z900 zarch
a50d llihl RI_RU "load logical immediate high low" z900 zarch
a50e llilh RI_RU "load logical immediate low high" z900 zarch
a50f llill RI_RU "load logical immediate low low" z900 zarch
+a50f llghi RI_RU "load logical immediate" z900 zarch
b2b1 stfl S_RD "store facility list" z900 esa,zarch
b2b2 lpswe S_RD "load psw extended" z900 zarch
b90d dsgr RRE_RER "divide single 64" z900 zarch
c007 xilf RIL_RU "exclusive or immediate low" z9-109 zarch
c008 iihf RIL_RU "insert immediate high" z9-109 zarch
c009 iilf RIL_RU "insert immediate low" z9-109 zarch
+c009 lfi RIL_RU "insert immediate 32" z9-109 zarch
# z9-109 misc instruction
b983 flogr RRE_RER "find leftmost one" z9-109 zarch
e30000000012 lt RXY_RRRD "load and test 32" z9-109 zarch
b985 llghr RRE_RR "load logical halfword 64" z9-109 zarch
c00e llihf RIL_RU "load logical immediate high" z9-109 zarch
c00f llilf RIL_RU "load logical immediate low" z9-109 zarch
+c00f llgfi RIL_RU "load logical immediate" z9-109 zarch
c00c oihf RIL_RU "or immediate high" z9-109 zarch
c00d oilf RIL_RU "or immediate low" z9-109 zarch
c205 slfi RIL_RU "subtract logical immediate 32" z9-109 zarch
ec00000000f6 crb RRS_RRRDU "compare and branch (32)" z10 zarch
ec00000000e4 cgrb$32 RRS_RRRD0 "compare and branch (64)" z10 zarch
ec00000000e4 cgrb RRS_RRRDU "compare and branch (64)" z10 zarch
-ec0000000076 crj$32 RIE_RRP0 "compare and branch relative (32)" z10 zarch
-ec0000000076 crj RIE_RRPU "compare and branch relative (32)" z10 zarch
-ec0000000064 cgrj$32 RIE_RRP0 "compare and branch relative (64)" z10 zarch
-ec0000000064 cgrj RIE_RRPU "compare and branch relative (64)" z10 zarch
+ec0000000076 crj$32 RIE_RRP0 "compare and branch relative (32)" z10 zarch condjump
+ec0000000076 crj RIE_RRPU "compare and branch relative (32)" z10 zarch condjump
+ec0000000064 cgrj$32 RIE_RRP0 "compare and branch relative (64)" z10 zarch condjump
+ec0000000064 cgrj RIE_RRPU "compare and branch relative (64)" z10 zarch condjump
ec00000000fe cib$12 RIS_R0RDI "compare immediate and branch (32<8)" z10 zarch
ec00000000fe cib RIS_RURDI "compare immediate and branch (32<8)" z10 zarch
ec00000000fc cgib$12 RIS_R0RDI "compare immediate and branch (64<8)" z10 zarch
ec00000000fc cgib RIS_RURDI "compare immediate and branch (64<8)" z10 zarch
-ec000000007e cij$12 RIE_R0PI "compare immediate and branch relative (32<8)" z10 zarch
-ec000000007e cij RIE_RUPI "compare immediate and branch relative (32<8)" z10 zarch
-ec000000007c cgij$12 RIE_R0PI "compare immediate and branch relative (64<8)" z10 zarch
-ec000000007c cgij RIE_RUPI "compare immediate and branch relative (64<8)" z10 zarch
+ec000000007e cij$12 RIE_R0PI "compare immediate and branch relative (32<8)" z10 zarch condjump
+ec000000007e cij RIE_RUPI "compare immediate and branch relative (32<8)" z10 zarch condjump
+ec000000007c cgij$12 RIE_R0PI "compare immediate and branch relative (64<8)" z10 zarch condjump
+ec000000007c cgij RIE_RUPI "compare immediate and branch relative (64<8)" z10 zarch condjump
b9720000 crt$16 RRF_00RR "compare and trap" z10 zarch
b972 crt RRF_U0RR "compare and trap" z10 zarch
b9600000 cgrt$16 RRF_00RR "compare and trap 64" z10 zarch
ec00000000f7 clrb RRS_RRRDU "compare logical and branch (32)" z10 zarch
ec00000000e5 clgrb$32 RRS_RRRD0 "compare logical and branch (64)" z10 zarch
ec00000000e5 clgrb RRS_RRRDU "compare logical and branch (64)" z10 zarch
-ec0000000077 clrj$32 RIE_RRP0 "compare logical and branch relative (32)" z10 zarch
-ec0000000077 clrj RIE_RRPU "compare logical and branch relative (32)" z10 zarch
-ec0000000065 clgrj$32 RIE_RRP0 "compare logical and branch relative (64)" z10 zarch
-ec0000000065 clgrj RIE_RRPU "compare logical and branch relative (64)" z10 zarch
+ec0000000077 clrj$32 RIE_RRP0 "compare logical and branch relative (32)" z10 zarch condjump
+ec0000000077 clrj RIE_RRPU "compare logical and branch relative (32)" z10 zarch condjump
+ec0000000065 clgrj$32 RIE_RRP0 "compare logical and branch relative (64)" z10 zarch condjump
+ec0000000065 clgrj RIE_RRPU "compare logical and branch relative (64)" z10 zarch condjump
ec00000000ff clib$12 RIS_R0RDU "compare logical immediate and branch (32<8)" z10 zarch
ec00000000ff clib RIS_RURDU "compare logical immediate and branch (32<8)" z10 zarch
ec00000000fd clgib$12 RIS_R0RDU "compare logical immediate and branch (64<8)" z10 zarch
c200 msgfi RIL_RI "multiply single immediate (64)" z10 zarch
e30000000036 pfd RXY_URRD "prefetch data" z10 zarch
c602 pfdrl RIL_UP "prefetch data relative long" z10 zarch
-ec0000000054 rnsbg RIE_RRUUU "rotate then and selected bits" z10 zarch
-ec0000000057 rxsbg RIE_RRUUU "rotate then exclusive or selected bits" z10 zarch
-ec0000000056 rosbg RIE_RRUUU "rotate then or selected bits" z10 zarch
-ec0000000055 risbg RIE_RRUUU "rotate then insert selected bits" z10 zarch
+ec0000000054 rnsbg RIE_RRUUU "rotate then and selected bits" z10 zarch optparm
+ec0080000054 rnsbgt RIE_RRUUU4 "rotate then and selected bits and test results" z10 zarch optparm
+ec0000000057 rxsbg RIE_RRUUU "rotate then exclusive or selected bits" z10 zarch optparm
+ec0080000057 rxsbgt RIE_RRUUU4 "rotate then exclusive or selected bits and test results" z10 zarch optparm
+ec0000000056 rosbg RIE_RRUUU "rotate then or selected bits" z10 zarch optparm
+ec0080000056 rosbgt RIE_RRUUU4 "rotate then or selected bits and test results" z10 zarch optparm
+ec0000000055 risbg RIE_RRUUU "rotate then insert selected bits" z10 zarch optparm
+ec0000800055 risbgz RIE_RRUUU2 "rotate then insert selected bits and zero remaining bits" z10 zarch optparm
c40f strl RIL_RP "store relative long (32)" z10 zarch
c40b stgrl RIL_RP "store relative long (64)" z10 zarch
c407 sthrl RIL_RP "store halfword relative long" z10 zarch
b9da alhhlr RRF_R0RR2 "add logical high low" z196 zarch
cc0a alsih RIL_RI "add logical with signed immediate high with cc" z196 zarch
cc0b alsihn RIL_RI "add logical with signed immediate high no cc" z196 zarch
-cc06 brcth RIL_RP "branch relative on count high" z196 zarch
+cc06 brcth RIL_RP "branch relative on count high" z196 zarch condjump
+cc06 jcth RIL_RP "jump on count high" z196 zarch condjump
b9cd chhr RRE_RR "compare high high" z196 zarch
b9dd chlr RRE_RR "compare high low" z196 zarch
e300000000cd chf RXY_RRRD "compare high" z196 zarch
e300000000ca lfh RXY_RRRD "load high" z196 zarch
e300000000c2 llch RXY_RRRD "load logical character high" z196 zarch
e300000000c6 llhh RXY_RRRD "load logical halfword high" z196 zarch
-ec000000005d risbhg RIE_RRUUU "rotate then insert selected bits high" z196 zarch
-ec0000000051 risblg RIE_RRUUU "rotate then insert selected bits low" z196 zarch
+ec000000005d risbhg RIE_RRUUU "rotate then insert selected bits high" z196 zarch optparm
+ec000080005d risbhgz RIE_RRUUU3 "rotate then insert selected bits high and zero remaining bits" z196 zarch optparm
+ec0000000051 risblg RIE_RRUUU "rotate then insert selected bits low" z196 zarch optparm
+ec0000800051 risblgz RIE_RRUUU3 "rotate then insert selected bits low and zero remaining bits" z196 zarch optparm
e300000000c3 stch RXY_RRRD "store character high" z196 zarch
e300000000c7 sthh RXY_RRRD "store halfword high" z196 zarch
e300000000cb stfh RXY_RRRD "store high" z196 zarch
eb0000000023 clt$12 RSY_R0RD "compare logical and trap 32 bit reg-mem" zEC12 zarch
eb000000002b clgt RSY_RURD "compare logical and trap 64 bit reg-mem" zEC12 zarch
eb000000002b clgt$12 RSY_R0RD "compare logical and trap 64 bit reg-mem" zEC12 zarch
-ec0000000059 risbgn RIE_RRUUU "rotate then insert selected bits nocc" zEC12 zarch
+ec0000000059 risbgn RIE_RRUUU "rotate then insert selected bits nocc" zEC12 zarch optparm
+ec0000800059 risbgnz RIE_RRUUU2 "rotate then insert selected bits and zero remaining bits nocc" zEC12 zarch optparm
ed00000000aa cdzt RSL_LRDFU "convert from zoned long" zEC12 zarch
ed00000000ab cxzt RSL_LRDFEU "convert from zoned extended" zEC12 zarch
ed00000000a8 czdt RSL_LRDFU "convert to zoned long" zEC12 zarch
e70000001046 vgmh VRI_V0UU "vector generate mask halfword" z13 zarch vx
e70000002046 vgmf VRI_V0UU "vector generate mask word" z13 zarch vx
e70000003046 vgmg VRI_V0UU "vector generate mask double word" z13 zarch vx
-e70000000006 vl VRX_VRRD "vector memory load" z13 zarch vx
e70000000056 vlr VRX_VV "vector register load" z13 zarch vx
e70000000005 vlrep VRX_VRRDU "vector load and replicate" z13 zarch vx
e70000000005 vlrepb VRX_VRRD "vector load and replicate byte elements" z13 zarch vx
e70000001004 vllezh VRX_VRRD "vector load logical halfword element and zero" z13 zarch vx
e70000002004 vllezf VRX_VRRD "vector load logical word element and zero" z13 zarch vx
e70000003004 vllezg VRX_VRRD "vector load logical double word element and zero" z13 zarch vx
-e70000000036 vlm VRS_VVRD "vector load multiple" z13 zarch vx
e70000000007 vlbb VRX_VRRDU "vector load to block boundary" z13 zarch vx
e70000000022 vlvg VRS_VRRDU "vector load VR element from GR" z13 zarch vx
e70000000022 vlvgb VRS_VRRD "vector load VR byte element from GR" z13 zarch vx
e7000000005f vsegb VRR_VV "vector sign extend byte to double word" z13 zarch vx
e7000000105f vsegh VRR_VV "vector sign extend halfword to double word" z13 zarch vx
e7000000205f vsegf VRR_VV "vector sign extend word to double word" z13 zarch vx
-e7000000000e vst VRX_VRRD "vector store" z13 zarch vx
e70000000008 vsteb VRX_VRRDU "vector store byte element" z13 zarch vx
e70000000009 vsteh VRX_VRRDU "vector store halfword element" z13 zarch vx
e7000000000b vstef VRX_VRRDU "vector store word element" z13 zarch vx
e7000000000a vsteg VRX_VRRDU "vector store double word element" z13 zarch vx
-e7000000003e vstm VRS_VVRD "vector store multiple" z13 zarch vx
e7000000003f vstl VRS_VRRD "vector store with length" z13 zarch vx
e700000000d7 vuph VRR_VV0U "vector unpack high" z13 zarch vx
e700000000d7 vuphb VRR_VV "vector unpack high byte" z13 zarch vx
e3000000002a lzrg RXY_RRRD "load and zero rightmost byte 64->64" z13 zarch
b93c ppno RRE_RR "perform pseudorandom number operation" z13 zarch
+# Aligned vector store hints
+
+e70000000006 vl VRX_VRRDU "vector memory load" z13 zarch optparm,vx
+e70000000036 vlm VRS_VVRDU "vector load multiple" z13 zarch optparm,vx
+e7000000000e vst VRX_VRRDU "vector store" z13 zarch optparm,vx
+e7000000003e vstm VRS_VVRDU "vector store multiple" z13 zarch optparm,vx
+
# arch12 instructions
# Vector Enhancements Facility 1
e30000000047 bic RXY_URRD "branch indirect on condition" arch12 zarch
e3f000000047 bi RXY_0RRD "unconditional indirect branch" arch12 zarch
e30000000047 bi*8 RXY_0RRD "branch indirect on condition" arch12 zarch
-b9ec mgrk RRF_R0RR2 "multiply 64x64reg -> 128" arch12 zarch
-e30000000084 mg RXY_RRRD "multiply 64x64mem -> 128" arch12 zarch
+b9ec mgrk RRF_R0RER "multiply 64x64reg -> 128" arch12 zarch
+e30000000084 mg RXY_RERRD "multiply 64x64mem -> 128" arch12 zarch
e3000000003c mgh RXY_RRRD "multiply halfword 64x16mem -> 64" arch12 zarch
b9fd msrkc RRF_R0RR2 "multiply single 32x32 -> 32" arch12 zarch
b9ed msgrkc RRF_R0RR2 "multiply single 64x64 -> 64" arch12 zarch
b929 kma RRF_R0RR "cipher message with galois counter mode" arch12 zarch
-b93c prno RRE_RR "perform pseudorandom number operation" arch12 zarch
+b93c prno RRE_RR "perform random number operation" arch12 zarch
b9a1 tpei RRE_RR "test pending external interruption" arch12 zarch
b9ac irbm RRE_RR "insert reference bits multiple" arch12 zarch
-# Aligned vector store hints
+# arch13 instructions
-e70000000006 vl VRX_VRRDU "vector memory load" arch12 zarch optparm
-e70000000036 vlm VRS_VVRDU "vector load multiple" arch12 zarch optparm
-e7000000000e vst VRX_VRRDU "vector store" arch12 zarch optparm
-e7000000003e vstm VRS_VVRDU "vector store multiple" arch12 zarch optparm
-# arch13 instructions
+# Miscellaneous Instruction Extensions Facility 2
+
+b9f5 ncrk RRF_R0RR2 "and with complement 32 bit" arch13 zarch
+b9e5 ncgrk RRF_R0RR2 "and with complement 64 bit" arch13 zarch
+e50a mvcrl SSE_RDRD "move right to left" arch13 zarch
+b974 nnrk RRF_R0RR2 "nand 32 bit" arch13 zarch
+b964 nngrk RRF_R0RR2 "nand 64 bit" arch13 zarch
+b976 nork RRF_R0RR2 "nor 32 bit" arch13 zarch
+b976 notr RRF_R0RR4 "not 32 bit" arch13 zarch
+b966 nogrk RRF_R0RR2 "nor 64 bit" arch13 zarch
+b966 notgr RRF_R0RR4 "not 64 bit" arch13 zarch
+b977 nxrk RRF_R0RR2 "not exclusive or 32 bit" arch13 zarch
+b967 nxgrk RRF_R0RR2 "not exclusive or 64 bit" arch13 zarch
+b975 ocrk RRF_R0RR2 "or with complement 32 bit" arch13 zarch
+b965 ocgrk RRF_R0RR2 "or with complement 64 bit" arch13 zarch
+b9e1 popcnt RRF_U0RR "population count arch13" arch13 zarch optparm
+b9f0 selr RRF_RURR "select 32 bit" arch13 zarch
+b9f00000 selr*20 RRF_R0RR3 "select 32 bit" arch13 zarch
+b9e3 selgr RRF_RURR "select 64 bit" arch13 zarch
+b9e30000 selgr*20 RRF_R0RR3 "select 64 bit" arch13 zarch
+b9c0 selfhr RRF_RURR "select high" arch13 zarch
+b9c00000 selfhr*20 RRF_R0RR3 "select high" arch13 zarch
+
+# Vector Enhancements Facility 2
+
+e60000000006 vlbr VRX_VRRDU "vector load byte reversed elements" arch13 zarch
+e60000001006 vlbrh VRX_VRRD "vector load byte reversed halfword elements" arch13 zarch
+e60000002006 vlbrf VRX_VRRD "vector load byte reversed word elements" arch13 zarch
+e60000003006 vlbrg VRX_VRRD "vector load byte reversed doubleword elements" arch13 zarch
+e60000004006 vlbrq VRX_VRRD "vector load byte reversed quadword elements" arch13 zarch
+
+e60000000007 vler VRX_VRRDU "vector load elements reversed" arch13 zarch
+e60000001007 vlerh VRX_VRRD "vector load halfword elements reversed" arch13 zarch
+e60000002007 vlerf VRX_VRRD "vector load word elements reversed" arch13 zarch
+e60000003007 vlerg VRX_VRRD "vector load doubleword elements reversed" arch13 zarch
+
+e60000000004 vllebrz VRX_VRRDU "vector load byte reversed element and zero" arch13 zarch
+e60000001004 vllebrzh VRX_VRRD "vector load byte reversed halfword element and zero" arch13 zarch
+e60000002004 vllebrzf VRX_VRRD "vector load byte reversed word element and zero" arch13 zarch
+e60000003004 ldrv VRX_VRRD "load byte reversed doubleword" arch13 zarch
+e60000003004 vllebrzg VRX_VRRD "vector load byte reversed doubleword element and zero" arch13 zarch
+e60000006004 lerv VRX_VRRD "load byte reversed word" arch13 zarch
+e60000006004 vllebrze VRX_VRRD "vector load byte reversed word element left-aligned and zero" arch13 zarch
+
+e60000000001 vlebrh VRX_VRRDU "vector load byte reversed halfword element" arch13 zarch
+e60000000003 vlebrf VRX_VRRDU "vector load byte reversed word element" arch13 zarch
+e60000000002 vlebrg VRX_VRRDU "vector load byte reversed doubleword element" arch13 zarch
+
+e60000000005 vlbrrep VRX_VRRDU "vector load byte reversed element and replicate" arch13 zarch
+e60000001005 vlbrreph VRX_VRRD "vector load byte reversed halfword element and replicate" arch13 zarch
+e60000002005 vlbrrepf VRX_VRRD "vector load byte reversed word element and replicate" arch13 zarch
+e60000003005 vlbrrepg VRX_VRRD "vector load byte reversed doubleword element and replicate" arch13 zarch
+
+e6000000000e vstbr VRX_VRRDU "vector store byte reversed elements" arch13 zarch
+e6000000100e vstbrh VRX_VRRD "vector store byte reversed halfword elements" arch13 zarch
+e6000000200e vstbrf VRX_VRRD "vector store byte reversed word elements" arch13 zarch
+e6000000300e vstbrg VRX_VRRD "vector store byte reversed doubleword elements" arch13 zarch
+e6000000400e vstbrq VRX_VRRD "vector store byte reversed quadword elements" arch13 zarch
+
+e6000000000f vster VRX_VRRDU "vector store elements reversed" arch13 zarch
+e6000000100f vsterh VRX_VRRD "vector store halfword elements reversed" arch13 zarch
+e6000000200f vsterf VRX_VRRD "vector store word elements reversed" arch13 zarch
+e6000000300f vsterg VRX_VRRD "vector store doubleword elements reversed" arch13 zarch
+
+e60000000009 vstebrh VRX_VRRDU "vector store byte reversed halfword element" arch13 zarch
+e6000000000b vstebrf VRX_VRRDU "vector store byte reversed word element" arch13 zarch
+e6000000000b sterv VRX_VRRD "store byte reversed word" arch13 zarch
+e6000000000a vstebrg VRX_VRRDU "vector store byte reversed doubleword element" arch13 zarch
+e6000000000a stdrv VRX_VRRD "store byte reversed doubleword" arch13 zarch
+
+e70000000086 vsld VRI_VVV0U "vector shift left double by bit" arch13 zarch
+e70000000087 vsrd VRI_VVV0U "vector shift right double by bit" arch13 zarch
+
+e7000000008b vstrs VRR_VVVUU0V "vector string search" arch13 zarch optparm
+
+e7000000008b vstrsb VRR_VVVU0VB "vector string search byte" arch13 zarch optparm
+e7000100008b vstrsh VRR_VVVU0VB "vector string search halfword" arch13 zarch optparm
+e7000200008b vstrsf VRR_VVVU0VB "vector string search word" arch13 zarch optparm
+
+e7000020008b vstrszb VRR_VVV0V "vector string search byte zero" arch13 zarch
+e7000120008b vstrszh VRR_VVV0V "vector string search halfword zero" arch13 zarch
+e7000220008b vstrszf VRR_VVV0V "vector string search word zero" arch13 zarch
+
+e700000000c3 vcfps VRR_VV0UUU "vector fp convert from fixed" arch13 zarch
+e700000020c3 vcefb VRR_VV0UU "vector fp convert from fixed 32 bit" arch13 zarch
+e700000820c3 wcefb VRR_VV0UU8 "vector fp convert from fixed 32 bit" arch13 zarch
+
+e700000000c1 vcfpl VRR_VV0UUU "vector fp convert from logical" arch13 zarch
+e700000020c1 vcelfb VRR_VV0UU "vector fp convert from logical 32 bit" arch13 zarch
+e700000820c1 wcelfb VRR_VV0UU8 "vector fp convert from logical 32 bit" arch13 zarch
+
+e700000000c2 vcsfp VRR_VV0UUU "vector fp convert to fixed" arch13 zarch
+e700000020c2 vcfeb VRR_VV0UU "vector fp convert to fixed 32 bit" arch13 zarch
+e700000820c2 wcfeb VRR_VV0UU8 "vector fp convert to fixed 32 bit" arch13 zarch
+
+e700000000c0 vclfp VRR_VV0UUU "vector fp convert to logical" arch13 zarch
+e700000020c0 vclfeb VRR_VV0UU "vector fp convert to logical 32 bit" arch13 zarch
+e700000820c0 wclfeb VRR_VV0UU8 "vector fp convert to logical 32 bit" arch13 zarch
+
+# Deflate conversion facility
+
+b939 dfltcc RRF_R0RR2 "deflate conversion call" arch13 zarch
+
+# Enhanced-Sort Facility
+
+b938 sortl RRE_RR "sort lists" arch13 zarch
+
+# Vector packed decimal enhancement facility
+
+e60000000050 vcvb VRR_RV0UU "vector convert to binary 32 bit" arch13 zarch optparm
+e60000000052 vcvbg VRR_RV0UU "vector convert to binary 64 bit" arch13 zarch optparm
+
+# Message Security Assist Extension 9
+
+b93a kdsa RRE_RR "compute digital signature authentication" arch13 zarch
+
+
+# arch14 instructions
+
+e60000000074 vschp VRR_VVV0U0U " " arch14 zarch
+e60000002074 vschsp VRR_VVV0U0 " " arch14 zarch
+e60000003074 vschdp VRR_VVV0U0 " " arch14 zarch
+e60000004074 vschxp VRR_VVV0U0 " " arch14 zarch
+e6000000007c vscshp VRR_VVV " " arch14 zarch
+e6000000007d vcsph VRR_VVV0U0 " " arch14 zarch
+e60000000051 vclzdp VRR_VV0U2 " " arch14 zarch
+e60000000070 vpkzr VRI_VVV0UU2 " " arch14 zarch
+e60000000072 vsrpr VRI_VVV0UU2 " " arch14 zarch
+e60000000054 vupkzh VRR_VV0U2 " " arch14 zarch
+e6000000005c vupkzl VRR_VV0U2 " " arch14 zarch
+
+b93b nnpa RRE_00 " " arch14 zarch
+e60000000056 vclfnh VRR_VV0UU2 " " arch14 zarch
+e6000000005e vclfnl VRR_VV0UU2 " " arch14 zarch
+e60000000075 vcrnf VRR_VVV0UU " " arch14 zarch
+e6000000005d vcfn VRR_VV0UU2 " " arch14 zarch
+e60000000055 vcnf VRR_VV0UU2 " " arch14 zarch
+
+b98B rdp RRF_RURR2 " " arch14 zarch optparm
+
+eb0000000071 lpswey SIY_RD " " arch14 zarch
+b200 lbear S_RD " " arch14 zarch
+b201 stbear S_RD " " arch14 zarch
-b9f5 ncrk RRF_R0RR2 " " arch13 zarch
-b9e5 ncgrk RRF_R0RR2 " " arch13 zarch
-e50a mvcrl SSE_RDRD " " arch13 zarch
-b974 nnrk RRF_R0RR2 " " arch13 zarch
-b964 nngrk RRF_R0RR2 " " arch13 zarch
-b976 nork RRF_R0RR2 " " arch13 zarch
-b966 nogrk RRF_R0RR2 " " arch13 zarch
-b977 nxrk RRF_R0RR2 " " arch13 zarch
-b967 nxgrk RRF_R0RR2 " " arch13 zarch
-b975 ocrk RRF_R0RR2 " " arch13 zarch
-b965 ocgrk RRF_R0RR2 " " arch13 zarch
-b9e1 popcnt RRF_U0RR " " arch13 zarch optparm
-b9f0 selr RRF_RURR " " arch13 zarch
-b9f00000 selr*20 RRF_R0RR3 " " arch13 zarch
-b9e3 selgr RRF_RURR " " arch13 zarch
-b9e30000 selgr*20 RRF_R0RR3 " " arch13 zarch
-b9c0 selhhhr RRF_RURR " " arch13 zarch
-b9c00000 selhhhr*20 RRF_R0RR3 " " arch13 zarch
-
-e60000000006 vlbr VRX_VRRDU " " arch13 zarch
-e60000001006 vlbrh VRX_VRRD " " arch13 zarch
-e60000002006 vlbrf VRX_VRRD " " arch13 zarch
-e60000003006 vlbrg VRX_VRRD " " arch13 zarch
-e60000004006 vlbrq VRX_VRRD " " arch13 zarch
-
-e60000000007 vler VRX_VRRDU " " arch13 zarch
-e60000001007 vlerh VRX_VRRD " " arch13 zarch
-e60000002007 vlerf VRX_VRRD " " arch13 zarch
-e60000003007 vlerg VRX_VRRD " " arch13 zarch
-
-e60000000004 vllebrz VRX_VRRDU " " arch13 zarch
-e60000001004 vllebrzh VRX_VRRD " " arch13 zarch
-e60000002004 vllebrzf VRX_VRRD " " arch13 zarch
-e60000003004 ldrv VRX_VRRD " " arch13 zarch
-e60000003004 vllebrzg VRX_VRRD " " arch13 zarch
-e60000006004 lerv VRX_VRRD " " arch13 zarch
-e60000006004 vllebrze VRX_VRRD " " arch13 zarch
-
-e60000000001 vlebrh VRX_VRRDU " " arch13 zarch
-e60000000003 vlebrf VRX_VRRDU " " arch13 zarch
-e60000000002 vlebrg VRX_VRRDU " " arch13 zarch
-
-e60000000005 vlbrrep VRX_VRRDU " " arch13 zarch
-e60000001005 vlbrreph VRX_VRRD " " arch13 zarch
-e60000002005 vlbrrepf VRX_VRRD " " arch13 zarch
-e60000003005 vlbrrepg VRX_VRRD " " arch13 zarch
-
-e6000000000e vstbr VRX_VRRDU " " arch13 zarch
-e6000000100e vstbrh VRX_VRRD " " arch13 zarch
-e6000000200e vstbrf VRX_VRRD " " arch13 zarch
-e6000000300e vstbrg VRX_VRRD " " arch13 zarch
-e6000000400e vstbrq VRX_VRRD " " arch13 zarch
-
-e6000000000f vster VRX_VRRDU " " arch13 zarch
-e6000000100f vsterh VRX_VRRD " " arch13 zarch
-e6000000200f vsterf VRX_VRRD " " arch13 zarch
-e6000000300f vsterg VRX_VRRD " " arch13 zarch
-
-e60000000009 vstebrh VRX_VRRDU " " arch13 zarch
-e6000000000b vstebrf VRX_VRRDU " " arch13 zarch
-e6000000000b sterv VRX_VRRD " " arch13 zarch
-e6000000000a vstebrg VRX_VRRDU " " arch13 zarch
-e6000000000a stdrv VRX_VRRD " " arch13 zarch
-
-e70000000086 vsld VRI_VVV0U " " arch13 zarch
-e70000000087 vsrd VRI_VVV0U " " arch13 zarch
-
-e7000000008b vstrs VRR_VVVUU0V " " arch13 zarch optparm
-
-e7000000008b vstrsb VRR_VVVU0VB " " arch13 zarch optparm
-e7000100008b vstrsh VRR_VVVU0VB " " arch13 zarch optparm
-e7000200008b vstrsf VRR_VVVU0VB " " arch13 zarch optparm
-
-e7000020008b vstrszb VRR_VVVU0VB2 " " arch13 zarch optparm
-e7000120008b vstrszh VRR_VVVU0VB2 " " arch13 zarch optparm
-e7000220008b vstrszf VRR_VVVU0VB2 " " arch13 zarch optparm
-
-e700000000c3 vcfps VRR_VV0UUU " " arch13 zarch
-e700000020c3 vcefb VRR_VV0UU " " arch13 zarch
-e700000820c3 wcefb VRR_VV0UU8 " " arch13 zarch
-
-e700000000c1 vcfpl VRR_VV0UUU " " arch13 zarch
-e700000020c1 vcelfb VRR_VV0UU " " arch13 zarch
-e700000820c1 wcelfb VRR_VV0UU8 " " arch13 zarch
-
-e700000000c2 vcsfp VRR_VV0UUU " " arch13 zarch
-e700000020c2 vcfeb VRR_VV0UU " " arch13 zarch
-e700000820c2 wcfeb VRR_VV0UU8 " " arch13 zarch
-
-e700000000c0 vclfp VRR_VV0UUU " " arch13 zarch
-e700000020c0 vclfeb VRR_VV0UU " " arch13 zarch
-e700000820c0 wclfeb VRR_VV0UU8 " " arch13 zarch
-
-b939 dfltcc RRF_R0RR2 " " arch13 zarch
-
-b938 sortl RRE_RR " " arch13 zarch
-
-e60000000050 vcvb VRR_RV0UU " " arch13 zarch optparm
-e60000000052 vcvbg VRR_RV0UU " " arch13 zarch optparm
-
-b93a kdsa RRE_RR " " arch13 zarch
+b28f qpaci S_RD " " arch14 zarch
projects / thirdparty / binutils-gdb.git / blobdiff