+2001-04-15 J.T. Conklin <jtc@redback.com>
+
+ * Makefile.in (simops.o): Add simops.h to dependency list.
+
+Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+Tue Apr 18 16:26:41 2000 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * interp.c (sim_resume): Deliver SIGILL.
+ (lookup_hash): Do not print SIGILL message.
+
+Tue Feb 22 18:24:56 2000 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * Makefile.in (SIM_EXTRA_CFLAGS): Define SIM_HAVE_ENVIRONMENT.
+ * interp.c (sim_set_trace): Replace sim_trace. Enable tracing.
+
+Tue Feb 8 17:41:12 2000 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * d10v_sim.h (SIG_D10V_BUS): Define.
+
+ * simops.c (address_exception): Delete function.
+ (OP_30000000, OP_6401, OP_6001, OP_6000, OP_32010000, OP_31000000,
+ OP_6601, OP_6201, OP_6200, OP_33010000, OP_34000000, OP_6800,
+ OP_6C1F, OP_6801, OP_6C01, OP_36010000, OP_35000000, OP_6A00,
+ OP_6E1F, OP_6A01, OP_6E01, OP_37010000): Replace call to
+ address_exception with code that sets SIG_D10V_BUS.
+
+ * interp.c (sim_resume): When SIGBUS or SIGSEGV, deliver a bus
+ error to the simulator before resuming execution.
+ (sim_trace): Check stop reason and use that to determine sim_trace
+ return value.
+ (sim_stop_reason): For SIG_D10V_BUS return a SIGBUS / SIGSEGV
+ sigrc.
+
+Tue Jan 18 16:07:42 MST 2000 Diego Novillo <dnovillo@cygnus.com>
+
+ * interp.c (sim_create_inferior): Change internal initial value for
+ DMAP2 to 0x2000.
+
+Mon Jan 3 02:06:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * interp.c (lookup_hash): Stop the update of the PC when there was
+ an illegal instruction exception.
+
+Mon Jan 3 00:14:33 2000 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * simops.c (address_exception): New function.
+ (OP_30000000, OP_6401, OP_6001, OP_6000, OP_32010000, OP_31000000,
+ OP_6601, OP_6201, OP_6200, OP_33010000, OP_34000000, OP_6800,
+ OP_6C1F, OP_6801, OP_6C01, OP_36010000, OP_35000000, OP_6A00,
+ OP_6E1F, OP_6A01, OP_6E01, OP_37010000): For "ld", "ld2w", "st"
+ and "st2w" check that the address is aligned.
+
+1999-12-30 Chandra Chavva <cchavva@cygnus.com>
+
+ * d10v_sim.h (INC_ADDR): Added code to assign
+ proper address for loads with predec operations.
+
+1999-11-25 Nick Clifton <nickc@cygnus.com>
+
+ * simops.c (OP_4E0F): New function: Simulate new bit pattern for
+ cpfg instruction.
+
+Fri Oct 29 18:34:28 1999 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * simops.c (move_to_cr): Don't allow user to set PSW.DM in either
+ DPSW and BPSW.
+
+Thu Oct 28 01:26:18 1999 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * simops.c (OP_5F20): Use SET_HW_PSW when updating PSW.
+ (PSW_HW_MASK): Declare.
+
+ * d10v_sim.h (move_to_cr): Add ``psw_hw_p'' parameter.
+ (SET_CREG, SET_PSW_BIT): Update.
+ (SET_HW_CREG, SET_HW_PSW): Define.
+
+Sun Oct 24 21:38:04 1999 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * interp.c (sim_d10v_translate_dmap_addr): Fix extraction of IOSP
+ for DMAP3.
+
+Sun Oct 24 16:04:16 1999 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * interp.c (sim_d10v_translate_addr): New function.
+ (xfer_mem): Rewrite. Use sim_d10v_translate_addr.
+ (map_memory): Make INLINE.
+
+Sun Oct 24 13:45:19 1999 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * interp.c (sim_d10v_translate_dmap_addr): New function.
+ (dmem_addr): Rewrite. Use sim_d10v_translate_dmap_addr. Change
+ offset parameter to type uint16.
+ * d10v_sim.h (dmem_addr): Update declaration.
+
+Sun Oct 24 13:07:31 1999 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * interp.c (imap_register, set_imap_register, dmap_register,
+ set_imap_register): Use map_memory.
+ (DMAP): Update.
+ (sim_create_inferior): Initialize all DMAP registers. NOTE that
+ DMAP2, in internal memory mode, is set to 0x0000 and NOT
+ 0x2000. This is consistent with the older d10v boards.
+
+Sun Oct 24 11:22:12 1999 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * interp.c (sim_d10v_translate_imap_addr): New function.
+ (imem_addr): Rewrite. Use sim_d10v_translate_imap_addr.
+ (last_from, last_to): Declare.
+
+Sun Oct 24 01:21:56 1999 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * d10v_sim.h (struct d10v_memory): Define. Support very long
+ memories.
+ (struct _state): Replace imem, dmem and umem by mem.
+ (IMAP_BLOCK_SIZE, DMAP_BLOCK_SIZE, SEGMENT_SIZE, IMEM_SEGMENTS,
+ DMEM_SEGMENTS, UMEM_SEGMENTS): Define.
+
+ * interp.c (map_memory): New function.
+ (sim_size, xfer_memory, imem_addr, dmem_addr): Update.
+ (UMEM_SEGMENTS): Moveed to "d10v_sim.h".
+ (IMEM_SIZEDMEM_SIZE): Delete.
+
+Sat Oct 23 20:06:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * interp.c: Include "sim-d10v.h".
+ (imap_register, set_imap_register, dmap_register,
+ set_dmap_register, spi_register, spu_register, set_spi_register,
+ set_spu_register): New functions.
+ (sim_create_inferior): Update.
+ (sim_fetch_register, sim_store_register): Rewrite. Use enums
+ defined in sim-d10v.h.
+
+ * d10v_sim.h (DEBUG_MEMORY): Define.
+ (IMAP0, IMAP1, DMAP, SET_IMAP0, SET_IMAP1, SET_DMAP): Delete.
+
+Sat Oct 23 18:41:18 1999 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * interp.c (sim_open): Allow a debug value to be passed to the -t
+ option.
+ (lookup_hash): Don't exit on an illegal instruction.
+ (do_long, do_2_short, do_parallel): Check for failed instruction
+ lookup.
+
+Mon Oct 18 18:03:24 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
+
+ * simops.c (OP_3220): Fix trace output for illegal accumulator
+ message.
+
+1999-09-14 Nick Clifton <nickc@cygnus.com>
+
+ * simops.c: Disable setting of DM bit in PSW.
+
+Wed Sep 8 19:34:55 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
+
+ * simops.c (op_types): Added new memory indirect type OP_MEMREF3.
+ (trace_input_func): Added support for OP_MEMREF3.
+ (OP_32010000): New instruction ld.
+ (OP_33010000): New instruction ld2w.
+ (OP_5209): New instruction sac.
+ (OP_4209): New instruction sachi.
+ (OP_3220): New instruction slae.
+ (OP_36010000): New instruction st.
+ (OP_37010000): New instruction st2w.
+
+1999-09-09 Stan Shebs <shebs@andros.cygnus.com>
+
+ * interp.c (old_segment_mapping): New global.
+ (xfer_mem): Change the default segment mapping to be the way
+ that Mitsubishi prefers, but use the previous mapping if
+ old_segment_mapping is true.
+ (sim_open): Add an option -oldseg to get the old mapping.
+ (sim_create_inferior): Init mapping registers based on the
+ value of old_segment_mapping.
+
+1999-09-07 Nick Clifton <nickc@cygnus.com>
+
+ * simops.c (OP_6601): Do not write back decremented address if
+ either of the destination registers was the same as the address
+ register.
+ (OP_6201): Do not write back incremented address if either of the
+ destination registers was the same as the address register.
+
+Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+1999-05-08 Felix Lee <flee@cygnus.com>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+1999-04-02 Keith Seitz <keiths@cygnus.com>
+
+ * interp.c (ui_loop_hook_counter): New global (when NEED_UI_LOOP_HOOK
+ defined).
+ (sim_resume): If the counter has expired, call the ui_loop_hook,
+ if defined.
+ (UI_LOOP_POLL_INTERVAL): Define. Used to tweak the frequency of
+ ui_loop_hook calls.
+ * Makefile.in (SIM_EXTRA_CFLAGS): Include NEED_UI_LOOP_HOOK.
+
+Wed Mar 10 19:32:13 1999 Nick Clifton <nickc@cygnus.com>
+
+ * simops.c: If load instruction with auto increment/decrement
+ addressing is used when the destination register is the same as
+ the address register, then ignore the auto increment/decrement.
+
+Wed Mar 10 19:32:13 1999 Martin M. Hunt <hunt@cygnus.com>
+
+ * simops.c (OP_5F00): Ifdef SYS_stat case because
+ not all systems have it defined.
+
+1999-01-26 Jason Molenda (jsm@bugshack.cygnus.com)
+
+ * simops.c (OP_5607): Correct saturation comparison/assignment.
+ (OP_1201, OP_1203, OP_17001200, OP_17001202,
+ OP_2A00, OP_2800, OP_2C00, OP_3200, OP_3201,
+ OP_1001, OP_1003, OP_17001000, OP_17001002): Ditto.
+
+1999-01-26 Jason Molenda (jsm@bugshack.cygnus.com)
+
+ * simops.c (OP_5605): Sign extend MIN32 and MAX32 before saturation
+ comparison.
+ (OP_5607): Ditto.
+ (OP_2A00): Ditto.
+ (OP_2800): Ditto.
+
+1999-01-13 Jason Molenda (jsm@bugshack.cygnus.com)
+
+ * simops.c (OP_1223): Sign extend MIN32 and MAX32 before saturation
+ comparison.
+
+Tue Nov 24 17:04:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * simops.c (sys/syscall.h): Include targ-vals.h instead.
+ (SYS_*): Replace with TARGET_SYS_*.
+
+ * Makefile.in: Add dependency on targ-vals.h.
+ (NL_TARGET): Define as NL_TARGET_d10v.
+
+Wed Sep 30 00:06:32 1998 Andrew Cagney <cagney@amy.cygnus.com>
+
+ * interp.c (xfer_mem): Missing break, instruction memory case
+ flowed into unified memory case.
+
+Wed Sep 30 10:14:18 1998 Nick Clifton <nickc@cygnus.com>
+
+ * simops.c: If load instruction with auto increment/decrement
+ addressing is used when the destination register is the same as
+ the address register, then ignore the auto increment/decrement.
+
+Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+ * config.in: Ditto.
+
+Sun Apr 26 15:20:23 1998 Tom Tromey <tromey@cygnus.com>
+
+ * acconfig.h: New file.
+ * configure.in: Reverted change of Apr 24; use sinclude again.
+
+Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+ * config.in: Ditto.
+
+Fri Apr 24 11:20:06 1998 Tom Tromey <tromey@cygnus.com>
+
+ * configure.in: Don't call sinclude.
+
+Fri Apr 24 11:04:46 1998 Andrew Cagney <cagney@chook.cygnus.com>
+
+ * interp.c (struct hash_entry): OPCODE and MASK are unsigned.
+
+ * d10v_sim.h (remote-sim.h, sim-config.h): Include.
+
+Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+Wed Apr 1 12:59:17 1998 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * simops.c (trace_input_func): Use move_from_cr / CREGS to obtain
+ up-to-date CR value.
+ (OP_OP_1000000, add3): Trace inputs before performing add.
+ (OP_5F00, <*>): Trace input registers before making system call.
+ (OP_5F00, <kill>): Trace R0, R1 not REGn.
+ (OP_5F00, <getpid>): Always return 47.
+
+ * d10v_sim.h (SLOT, SLOT_NR, SLOT_PEND_MASK, SLOT_PEND,
+ SLOT_DISCARD, SLOT_FLUSH): Define. An implementation of write
+ back slots.
+ (struct _state): Add struct slot slot to global state variable.
+ (struct _state): Delete fields SM, EA, DB, DM, IE, RP, MD, FX, ST,
+ F0, F1, C from global State variable.
+ (struct _state): Add struct trace to global State variable.
+ (GPR, SET_GPR): Define. SET_GPR uses SLOT_PEND.
+ (PSW*, SET_PSW*): Define. SET_PSW* uses SET_CREG.
+ (CREG, SET_CREG, SET_*): Define. SET_CREG uses func move_to_cr.
+ (INC_ADDR): Re-implement. Use SET_GPR to update registers.
+ (JMP): Re-implement. Use SET_* to update registers.
+
+ * interp.c: Use new SET_* et.al. macros to fetch / store
+ registers.
+ (get_operands): Squirrel away trace values at start of each
+ operand decode.
+ (do_2_short): Flush pending writes before issuing second
+ instruction.
+ (sim_resume): Flush pending writes at end of instruction cycle.
+ (sim_fetch_register, sim_store_register, sim_create_inferior):
+ After scheduling updates to registers using SET_*, flush updates.
+ (sim_resume): Re-order handling of RPT/repeat and IBA/hbreak so
+ that each sets pc using SET_* and last SET_* eventually winds out.
+
+ * simops.c: Use new SET_* et.al. macros to fetch / store
+ registers.
+ (move_to_cr): Add MASK argument for selective update of CREG bits.
+ Re-implement using new SET_* macros.
+ (trace_output_func, trace_output): Delete. Replace with.
+ (do_trace_output_flush, trace_output_finish, trace_output_40,
+ trace_output_32, trace_output_16, trace_output_void,
+ trace_output_flag): New functions. Handle specific trace cases.
+ (OP_*): Re-write tracing to use new trace_output_* functions.
+ (OP_*): Re-write to use new SET_* et.al. macros.
+ (FUNC, PARM[1-4], RETVAL, RETVAL32): Redo definition.
+ (RETVAL_HIGH, RETVAL_LOW): Delete, use RETVAL32.
+
Wed Apr 1 12:55:18 1998 Andrew Cagney <cagney@b1.cygnus.com>
* configure.in (SIM_AC_OPTION_WARNINGS): Add.
projects / thirdparty / binutils-gdb.git / blobdiff