* config/sh/tm-sh.h (BELIEVE_PCC_PROMOTION): Define, so that

[thirdparty/binutils-gdb.git] / sim / erc32 / ChangeLog

diff --git a/sim/erc32/ChangeLog b/sim/erc32/ChangeLog
index 04a3642818c08679c07935d2ff369d32f046b0be..59a6b4544670c2aeb87bd2a3f7d8f11430320996 100644 (file)
--- a/sim/erc32/ChangeLog
+++ b/sim/erc32/ChangeLog
@@ -1,3 +1,99 @@
+1999-01-25  Hugo Tyson  <hmt@cygnus.co.uk>
+
+       * interf.c (run_sim): Fix a bug in the main loop's handling of
+       annulled delay slot instructions.  There is precedent for this
+       change; the _other_ main loop in sis.c gets it right according to
+       my reading of the code.
+
+       The bug is: if an interrupt happens when the next instruction
+       (at sregs->pc) is annulled, the trap is taken (by execute_trap())
+       with the current values of PC and NPC, so when the trap returns,
+       the annulled instruction is indeed executed.  Another giveaway is
+       that the annul flag is cleared in execute_trap(): the information
+       is demonstrably discarded.
+
+       The solution is: perform annulling before looking for traps, in
+       fact it's neater to do annulling, see if there's an interrupt and
+       if not, do the instruction, then handle traps be they generated by
+       interrupts pending or by the instruction we might just have done.
+       That's what the sis.c one does.
+
+1999-01-20  Hugo Tyson  <hmt@cygnus.co.uk>
+
+       * sis.h: Add asr17 register for support of SparcLITE (at least the
+       Hitachi ones I find before me)
+
+       * exec.c (dispatch_instruction): Case WRY: Allow write of asr17 if
+       sparclite.  Other ASR numbers than 17 or 0 (Y) trap out.
+       Case RDY: Allow read of asr17 if sparclite.  Other ASRs ditto.
+       (execute_trap): Do single-vector-trapping if asr17 bit 0 is set.
+       (init_regs): Initialize y and asr17.
+       NB: In instruction-set space, the Y register is asr0; the
+       instructions have different names for human reasons only.
+
+       * sis.c:
+       * interf.c: Set boolean mode variable dumbio if invoked with
+       argument "-dumbio" and mention it of verbose.
+       * erc32.c: if "dumbio" is set, do not assume that there is a
+       terminal type device attached to stdin/stdout.  Do not set
+       buffering or mess with tcsetattr or do any read operations in
+       order to make UART interrupts; not input data is supported.
+       This is necessary to allow the sim to be used within the eCos
+       testing infrastructure where stdin/stdout are pipes to a TCL
+       program; the sim hangs otherwise.
+
+Thu Jul 23 07:17:03 1998  Mark Alexander  <marka@cygnus.com>
+
+       * exec.c (dispatch_instruction): Add SPARClite 'scan' instruction.
+
+Tue Jul  7 21:12:41 1998  Mark Alexander  <marka@cygnus.com>
+
+       * func.c (bfd_load): Add special handling of a.out executables.
+
+Sat Jun 13 08:33:25 1998  Mark Alexander  <marka@cygnus.com>
+
+       * func.c (bfd_load): Print correct endianness.
+       * interf.c (run_sim): Print debugging information if verbosity level
+       is greater than 2.
+       (sim_open): Repeated -v options now increment verbosity level.
+       (sim_store_register): Handle little-endian case.
+       (flush_window): Print debugging information if verbosity level
+       is greater then 2.
+
+Tue Jun  2 15:20:35 1998  Mark Alexander  <marka@cygnus.com>
+
+       * interf.c (sim_open): Use revamped memory_read, which makes
+       byte-swapping unnecessary.  Add -sparclite-board option for
+       emulating RAM found on typical SPARClite boards.  Print
+       error message for unrecognized option.
+       * erc32.c: Change RAM address and size from constants to variables,
+       to allow emulation of SPARClite board RAM.
+       (fetch_bytes, store_bytes): New helper functions for revamped
+       mememory_read and memory_write.
+       (memory_read, memory_write): Rewrite to store bytes in target
+       byte order instead of storing words in host byte order; this
+       greatly simplifies support of little-endian programs.
+       (get_mem_ptr): Remove unnecessary byte parameter.
+       (sis_memory_write, sis_memory_read): Store words in target
+       byte order instead of host byte order.
+       (byte_swap_words): Remove, no longer needed.
+       * sis.h ((byte_swap_words): Remove declaration, no longer needed.
+       (memory_read): Add new sz parameter.
+       * sis.c (run_sim): Use revamped memory_read, which makes
+       byte-swapping unnecessary.
+       * exec.c (dispatch_instruction): Use revamped memory_read, which
+       makes byte-swapping and double-word fetching unnecessary.
+       * func.c (sparclite_board): Declare new variable.
+       (get_regi): Handle little-endian data.
+       (bfd_load): Recognize little-endian SPARClite as having
+       little-endian data.
+       
+Fri May 22 14:23:16 1998  Mark Alexander  <marka@cygnus.com>
+
+       * erc32.c (port_init): Print messages only if sis_verbose is true.
+       * func.c (bfd_load): Ditto.
+       * interf.c (sim_open): Ditto.
+
 Thu May 14 23:10:48 1998  Mark Alexander  <marka@cygnus.com>
 
        * sis.h (uint64, int64): Define.