sim: unify -Werror build settings

[thirdparty/binutils-gdb.git] / sim / frv / profile-fr400.c

diff --git a/sim/frv/profile-fr400.c b/sim/frv/profile-fr400.c
index 9baddd12121156a8b2aa0be9b4de81e5bb09fc6f..f6752d88c10b423d40ae47652b216326b74e4cc0 100644 (file)
--- a/sim/frv/profile-fr400.c
+++ b/sim/frv/profile-fr400.c
@@ -1,25 +1,26 @@
 /* frv simulator fr400 dependent profiling code.
 
-   Copyright (C) 2001 Free Software Foundation, Inc.
+   Copyright (C) 2001-2021 Free Software Foundation, Inc.
    Contributed by Red Hat
 
 This file is part of the GNU simulators.
 
 This program is free software; you can redistribute it and/or modify
 it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
+the Free Software Foundation; either version 3 of the License, or
+(at your option) any later version.
 
 This program is distributed in the hope that it will be useful,
 but WITHOUT ANY WARRANTY; without even the implied warranty of
 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 GNU General Public License for more details.
 
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+You should have received a copy of the GNU General Public License
+along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+/* This must come before any other includes.  */
+#include "defs.h"
 
-*/
 #define WANT_CPU
 #define WANT_CPU_FRVBF
 
@@ -621,55 +622,6 @@ frvbf_model_fr400_u_gr2spr (SIM_CPU *cpu, const IDESC *idesc,
                                     in_GRj, out_spr);
 }
 
-/* Top up the post-processing time of the given FR by the given number of
-   cycles.  */
-static void
-update_FR_ptime (SIM_CPU *cpu, INT out_FR, int cycles)
-{
-  if (out_FR >= 0)
-    {
-      FRV_PROFILE_STATE *ps = CPU_PROFILE_STATE (cpu);
-      /* If a load is pending on this register, then add the cycles to
-        the post processing time for this register. Otherwise apply it
-        directly to the latency of the register.  */
-      if (! load_pending_for_register (cpu, out_FR, 1, REGTYPE_FR))
-       {
-         int *fr = ps->fr_latency;
-         fr[out_FR] += cycles;
-       }
-      else
-       ps->fr_ptime[out_FR] += cycles;
-    }
-}
-
-static void
-update_FRdouble_ptime (SIM_CPU *cpu, INT out_FR, int cycles)
-{
-  if (out_FR >= 0)
-    {
-      FRV_PROFILE_STATE *ps = CPU_PROFILE_STATE (cpu);
-      /* If a load is pending on this register, then add the cycles to
-        the post processing time for this register. Otherwise apply it
-        directly to the latency of the register.  */
-      if (! load_pending_for_register (cpu, out_FR, 2, REGTYPE_FR))
-       {
-         int *fr = ps->fr_latency;
-         fr[out_FR] += cycles;
-         if (out_FR < 63)
-           fr[out_FR + 1] += cycles;
-       }
-      else
-       {
-         /* On the fr400, loads are available to media insns one cycle early,
-            so knock one cycle off the post processing time to account for
-            this.  */
-         ps->fr_ptime[out_FR] += cycles - 1;
-         if (out_FR < 63)
-           ps->fr_ptime[out_FR + 1] += cycles - 1;
-       }
-    }
-}
-
 int
 frvbf_model_fr400_u_media_1 (SIM_CPU *cpu, const IDESC *idesc,
                             int unit_num, int referenced,