+2006-07-13 Yoshinori Sato <ysato@users.sourceforge.jp>
+
+ * compile.c (OBITOP): Bit address mask low three bit.
+ * compile.c (decode): Fix warning.
+
+2006-06-13 Richard Earnshaw <rearnsha@arm.com>
+
+ * configure: Regenerated.
+
+2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
+
+ * configure: Regenerated.
+
+2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
+
+ * configure: Regenerated.
+
+2005-03-23 Mark Kettenis <kettenis@gnu.org>
+
+ * configure: Regenerate.
+
+2005-01-14 Andrew Cagney <cagney@gnu.org>
+
+ * configure.ac: Sinclude aclocal.m4 before common.m4. Add
+ explicit call to AC_CONFIG_HEADER.
+ * configure: Regenerate.
+
+2005-01-12 Andrew Cagney <cagney@gnu.org>
+
+ * configure.ac: Update to use ../common/common.m4.
+ * configure: Re-generate.
+
+2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+2005-01-07 Andrew Cagney <cagney@gnu.org>
+
+ * configure.ac: Rename configure.in, require autoconf 2.59.
+ * configure: Re-generate.
+
+2004-12-08 Hans-Peter Nilsson <hp@axis.com>
+
+ * configure: Regenerate for ../common/aclocal.m4 update.
+
+2004-06-28 Alexandre Oliva <aoliva@redhat.com>
+
+ 2003-07-23 Richard Sandiford <rsandifo@redhat.com>
+ * compile.c (sim_resume): Make sure that dst.reg refers to the
+ right register byte in mova/sz.l @(dd,RnL),ERn.
+ 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
+ * compile.c (sim_resume): Zero-extend immediate to muls, mulsu,
+ mulxs, divs and divxs.
+
+ * compile.c (sim_load): Update sd->memory_size.
+
+2004-06-10 Michael Snyder <msnyder@redhat.com>
+
+ Patch submitted by Nitin Yewale <NitinY@KPITCummins.com>.
+ * compile.c (sim_resume): Corrected ANDC operation on EXR for H8S.
+
+2004-01-05 Michael Snyder <msnyder@redhat.com>
+
+ * compile.c (sim_load): Don't pass a type to bfd_openr.
+
+2003-12-16 Michael Snyder <msnyder@redhat.com>
+
+ Patch submitted by Anil Paranjape <AnilP1@KPITCummins.com>
+ * sim-main.h (H8300H_MSIZE): Increase from 18 bits to 24 bits.
+
+2003-12-11 Dhananjay Deshpande <dhananjayd@kpitcummins.com>
+
+ * compile.c (set_h8300h): Initialize globals to zero.
+
+2003-10-17 Shrinivas Atre <shrinivasa@KPITCummins.com>
+
+ * compile.c (h8300_normal_mode): New.
+ (SP): Handle normal mode.
+ (bitfrom): Use normal mode flag to return suitable value.
+ (lvalue): Use normal mode flag to return command line location.
+ (decode): Decode instruction correctly for normal mode.
+ (init_pointers): Initialise memory correctly for normal mode.
+ (sim_resume): Handle cases for normal mode using h8300_normal_mode
+ flag.
+ (sim_store_register): Handle 2 byte PC for normal mode.
+ (sim_fetch_register): Handle 2 byte PC for normal mode.
+ (set_h8300h): Set normal mode flag as per architechture.
+ (sim_load): Allocate 64K for normal mode instead of bigger memory.
+
+2003-07-18 Michael Snyder <msnyder@redhat.com>
+
+ * compile.c (decode): Enhancements for mova.
+ Initialize cst, reg, and rdisp inside the loop, for each
+ new instruction. Defer correction of the disp2 values until
+ later, and then adjust them by the size of the first operand,
+ rather than the size of the instruction.
+ (sim_resume): For mova, adjust the size of the second operand
+ according to the type of the first operand (INDEXB vs. INDEXW).
+ In cases where there is only one operand, the other two must
+ both be composed on the fly.
+
+2003-07-22 Michael Snyder <msnyder@redhat.com>
+
+ * compile.c (sim_resume): Revert 6-24 change, it does not
+ work with gdb breakpoints.
+
+2003-07-17 Michael Snyder <msnyder@redhat.com>
+
+ * compile.c (sim_resume): Handle shll reg, reg and shlr reg, reg.
+ (decode): IMM16 is always zero-extended.
+
+2003-06-24 Michael Snyder <msnyder@redhat.com>
+
+ * sim-main.h (SIM_WIFSTOPPED, SIM_WSTOPSIG): Define.
+ * compile.c (sim_resume): Use the above to return stop signal.
+
+2003-06-18 Michael Snyder <msnyder@redhat.com>
+
+ * compile.c: Replace "Hitachi" with "Renesas".
+ (decode): Distinguish AV_H8S from AV_H8H.
+ (sim_resume): H8SX can use any register for TAS.
+ (decode): Add support for VECIND.
+ (sim_resume): Implement rte/l and rts/l.
+ (GETSR): New macro (actually old macro reincarnated).
+ (decode): Add handling for IMM2.
+ (sim_resume): Drop extra block around jmp, jsr, rts.
+ Add handling for trapa and rte.
+ For divxu.b, change 0xffff mask to 0xff.
+ (set_h8300h): Add bfd_mach_h8300sxn machine.
+
+2003-06-18 Corinna Vinschen <vinschen@redhat.com>
+
+ * sim-main.h (enum h8_regnum): Turn around order of MACH, MACL
+ and SBR, VBR.
+
2003-06-05 Michael Snyder <msnyder@redhat.com>
* compile.c (sim_fetch_register): Handle SBR, VBR, MACH, MACL.
projects / thirdparty / binutils-gdb.git / blobdiff