/* interp.c -- Simulator for Motorola 68HC11/68HC12
- Copyright (C) 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
+ Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2007
+ Free Software Foundation, Inc.
Written by Stephane Carrez (stcarrez@nerim.fr)
This file is part of GDB, the GNU debugger.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
+the Free Software Foundation; either version 3 of the License, or
+(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+You should have received a copy of the GNU General Public License
+along with this program. If not, see <http://www.gnu.org/licenses/>. */
#include "sim-main.h"
#include "sim-assert.h"
#include "hw-tree.h"
#include "hw-device.h"
#include "hw-ports.h"
+#include "elf32-m68hc1x.h"
#ifndef MONITOR_BASE
# define MONITOR_BASE (0x0C000)
cpu_restart (cpu);
}
-int
+static int
sim_hw_configure (SIM_DESC sd)
{
const struct bfd_arch_info *arch;
sim_do_commandf (sd, "memory region 0x000@%d,0x8000",
M6811_RAM_LEVEL);
sim_hw_parse (sd, "/m68hc11/reg 0x1000 0x03F");
+ if (cpu->bank_start < cpu->bank_end)
+ {
+ sim_do_commandf (sd, "memory region 0x%lx@%d,0x100000",
+ cpu->bank_virtual, M6811_RAM_LEVEL);
+ sim_hw_parse (sd, "/m68hc11/use_bank 1");
+ }
}
-
+ if (cpu->cpu_start_mode)
+ {
+ sim_hw_parse (sd, "/m68hc11/mode %s", cpu->cpu_start_mode);
+ }
if (hw_tree_find_property (device_tree, "/m68hc11/m68hc11sio/reg") == 0)
{
sim_hw_parse (sd, "/m68hc11/m68hc11sio/reg 0x2b 0x5");
sim_hw_parse (sd, "/m68hc11/m68hc11eepr/reg 0xb000 512");
sim_hw_parse (sd, "/m68hc11 > cpu-reset reset /m68hc11/m68hc11eepr");
}
+ sim_hw_parse (sd, "/m68hc11 > port-a cpu-write-port /m68hc11");
+ sim_hw_parse (sd, "/m68hc11 > port-b cpu-write-port /m68hc11");
+ sim_hw_parse (sd, "/m68hc11 > port-c cpu-write-port /m68hc11");
+ sim_hw_parse (sd, "/m68hc11 > port-d cpu-write-port /m68hc11");
cpu->hw_cpu = sim_hw_parse (sd, "/m68hc11");
}
else
0x8000, M6811_RAM_LEVEL, 0x8000);
sim_do_commandf (sd, "memory region 0x000@%d,0x8000",
M6811_RAM_LEVEL);
-
+ if (cpu->bank_start < cpu->bank_end)
+ {
+ sim_do_commandf (sd, "memory region 0x%lx@%d,0x100000",
+ cpu->bank_virtual, M6811_RAM_LEVEL);
+ sim_hw_parse (sd, "/m68hc12/use_bank 1");
+ }
sim_hw_parse (sd, "/m68hc12/reg 0x0 0x3FF");
}
/* M68hc11 Timer configuration. */
sim_hw_parse (sd, "/m68hc12/m68hc12tim/reg 0x1b 0x5");
sim_hw_parse (sd, "/m68hc12 > cpu-reset reset /m68hc12/m68hc12tim");
+ sim_hw_parse (sd, "/m68hc12 > capture capture /m68hc12/m68hc12tim");
}
/* Create the SPI device. */
sim_hw_parse (sd, "/m68hc12 > cpu-reset reset /m68hc12/m68hc12eepr");
}
+ sim_hw_parse (sd, "/m68hc12 > port-a cpu-write-port /m68hc12");
+ sim_hw_parse (sd, "/m68hc12 > port-b cpu-write-port /m68hc12");
+ sim_hw_parse (sd, "/m68hc12 > port-c cpu-write-port /m68hc12");
+ sim_hw_parse (sd, "/m68hc12 > port-d cpu-write-port /m68hc12");
cpu->hw_cpu = sim_hw_parse (sd, "/m68hc12");
}
+ return 1;
+}
+
+/* Get the memory bank parameters by looking at the global symbols
+ defined by the linker. */
+static int
+sim_get_bank_parameters (SIM_DESC sd, bfd* abfd)
+{
+ sim_cpu *cpu;
+ long symsize;
+ long symbol_count, i;
+ unsigned size;
+ asymbol** asymbols;
+ asymbol** current;
+
+ cpu = STATE_CPU (sd, 0);
+
+ symsize = bfd_get_symtab_upper_bound (abfd);
+ if (symsize < 0)
+ {
+ sim_io_eprintf (sd, "Cannot read symbols of program");
+ return 0;
+ }
+ asymbols = (asymbol **) xmalloc (symsize);
+ symbol_count = bfd_canonicalize_symtab (abfd, asymbols);
+ if (symbol_count < 0)
+ {
+ sim_io_eprintf (sd, "Cannot read symbols of program");
+ return 0;
+ }
+
+ size = 0;
+ for (i = 0, current = asymbols; i < symbol_count; i++, current++)
+ {
+ const char* name = bfd_asymbol_name (*current);
+
+ if (strcmp (name, BFD_M68HC11_BANK_START_NAME) == 0)
+ {
+ cpu->bank_start = bfd_asymbol_value (*current);
+ }
+ else if (strcmp (name, BFD_M68HC11_BANK_SIZE_NAME) == 0)
+ {
+ size = bfd_asymbol_value (*current);
+ }
+ else if (strcmp (name, BFD_M68HC11_BANK_VIRTUAL_NAME) == 0)
+ {
+ cpu->bank_virtual = bfd_asymbol_value (*current);
+ }
+ }
+ free (asymbols);
+
+ cpu->bank_end = cpu->bank_start + size;
+ cpu->bank_shift = 0;
+ for (; size > 1; size >>= 1)
+ cpu->bank_shift++;
+
return 0;
}
static int
-sim_prepare_for_program (SIM_DESC sd, struct _bfd* abfd)
+sim_prepare_for_program (SIM_DESC sd, bfd* abfd)
{
sim_cpu *cpu;
+ int elf_flags = 0;
cpu = STATE_CPU (sd, 0);
- sim_hw_configure (sd);
if (abfd != NULL)
{
+ asection *s;
+
+ if (bfd_get_flavour (abfd) == bfd_target_elf_flavour)
+ elf_flags = elf_elfheader (abfd)->e_flags;
+
cpu->cpu_elf_start = bfd_get_start_address (abfd);
+ /* See if any section sets the reset address */
+ cpu->cpu_use_elf_start = 1;
+ for (s = abfd->sections; s && cpu->cpu_use_elf_start; s = s->next)
+ {
+ if (s->flags & SEC_LOAD)
+ {
+ bfd_size_type size;
+
+ size = bfd_get_section_size (s);
+ if (size > 0)
+ {
+ bfd_vma lma;
+
+ if (STATE_LOAD_AT_LMA_P (sd))
+ lma = bfd_section_lma (abfd, s);
+ else
+ lma = bfd_section_vma (abfd, s);
+
+ if (lma <= 0xFFFE && lma+size >= 0x10000)
+ cpu->cpu_use_elf_start = 0;
+ }
+ }
+ }
+
+ if (elf_flags & E_M68HC12_BANKS)
+ {
+ if (sim_get_bank_parameters (sd, abfd) != 0)
+ sim_io_eprintf (sd, "Memory bank parameters are not initialized\n");
+ }
}
+ if (!sim_hw_configure (sd))
+ return SIM_RC_FAIL;
+
/* reset all state information */
sim_board_reset (sd);
SIM_DESC
sim_open (SIM_OPEN_KIND kind, host_callback *callback,
- struct _bfd *abfd, char **argv)
+ bfd *abfd, char **argv)
{
SIM_DESC sd;
sim_cpu *cpu;
cpu_initialize (sd, cpu);
- cpu->cpu_use_elf_start = 1;
if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
{
free_state (sd);
free_state (sd);
return 0;
}
-
- sim_hw_configure (sd);
+ if (sim_prepare_for_program (sd, abfd) != SIM_RC_OK)
+ {
+ free_state (sd);
+ return 0;
+ }
/* Fudge our descriptor. */
return sd;
}
SIM_RC
-sim_create_inferior (SIM_DESC sd, struct _bfd *abfd,
+sim_create_inferior (SIM_DESC sd, struct bfd *abfd,
char **argv, char **env)
{
return sim_prepare_for_program (sd, abfd);
val = 0;
break;
}
- memory[0] = val >> 8;
- memory[1] = val & 0x0FF;
+ if (size == 1)
+ {
+ memory[0] = val;
+ }
+ else
+ {
+ memory[0] = val >> 8;
+ memory[1] = val & 0x0FF;
+ }
return size;
}