sim: m68hc11: fix gcc-5 build error w/restrict keyword

[thirdparty/binutils-gdb.git] / sim / m68hc11 / m68hc11_sim.c

diff --git a/sim/m68hc11/m68hc11_sim.c b/sim/m68hc11/m68hc11_sim.c
index 54bca2b3fa3ec121adcc21f2ad447829bda2d63f..8a0464871e603f877ece85a414d4ccdca0f81843 100644 (file)
--- a/sim/m68hc11/m68hc11_sim.c
+++ b/sim/m68hc11/m68hc11_sim.c
@@ -1,22 +1,21 @@
 /* m6811_cpu.c -- 68HC11&68HC12 CPU Emulation
-   Copyright 1999, 2000, 2001, 2002, 2003, 2007 Free Software Foundation, Inc.
+   Copyright 1999-2015 Free Software Foundation, Inc.
    Written by Stephane Carrez (stcarrez@nerim.fr)
 
 This file is part of GDB, GAS, and the GNU binutils.
 
-GDB, GAS, and the GNU binutils are free software; you can redistribute
-them and/or modify them under the terms of the GNU General Public
-License as published by the Free Software Foundation; either version
-1, or (at your option) any later version.
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3 of the License, or
+(at your option) any later version.
 
-GDB, GAS, and the GNU binutils are distributed in the hope that they
-will be useful, but WITHOUT ANY WARRANTY; without even the implied
-warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
-the GNU General Public License for more details.
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
 
 You should have received a copy of the GNU General Public License
-along with this file; see the file COPYING.  If not, write to the Free
-Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
 
 #include "sim-main.h"
 #include "sim-assert.h"
@@ -241,7 +240,7 @@ cpu_set_reg (sim_cpu* cpu, uint8 reg, uint16 val)
 /* Returns the address of a 68HC12 indexed operand.
    Pre and post modifications are handled on the source register.  */
 uint16
-cpu_get_indexed_operand_addr (sim_cpu* cpu, int restrict)
+cpu_get_indexed_operand_addr (sim_cpu* cpu, int restricted)
 {
   uint8 reg;
   uint16 sval;
@@ -286,7 +285,7 @@ cpu_get_indexed_operand_addr (sim_cpu* cpu, int restrict)
   /* [n,r] 16-bits offset indexed indirect.  */
   else if ((code & 0x07) == 3)
     {
-      if (restrict)
+      if (restricted)
        {
          return 0;
        }
@@ -298,7 +297,7 @@ cpu_get_indexed_operand_addr (sim_cpu* cpu, int restrict)
     }
   else if ((code & 0x4) == 0)
     {
-      if (restrict)
+      if (restricted)
        {
          return 0;
        }
@@ -346,20 +345,20 @@ cpu_get_indexed_operand_addr (sim_cpu* cpu, int restrict)
 }
 
 uint8
-cpu_get_indexed_operand8 (sim_cpu* cpu, int restrict)
+cpu_get_indexed_operand8 (sim_cpu* cpu, int restricted)
 {
   uint16 addr;
 
-  addr = cpu_get_indexed_operand_addr (cpu, restrict);
+  addr = cpu_get_indexed_operand_addr (cpu, restricted);
   return memory_read8 (cpu, addr);
 }
 
 uint16
-cpu_get_indexed_operand16 (sim_cpu* cpu, int restrict)
+cpu_get_indexed_operand16 (sim_cpu* cpu, int restricted)
 {
   uint16 addr;
 
-  addr = cpu_get_indexed_operand_addr (cpu, restrict);
+  addr = cpu_get_indexed_operand_addr (cpu, restricted);
   return memory_read16 (cpu, addr);
 }