/* sim-main.h -- Simulator for Motorola 68HC11 & 68HC12
- Copyright (C) 1999, 2000, 2001 Free Software Foundation, Inc.
- Written by Stephane Carrez (stcarrez@worldnet.fr)
+ Copyright (C) 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
+ Written by Stephane Carrez (stcarrez@nerim.fr)
This file is part of GDB, the GNU debugger.
#include "opcode/m68hc11.h"
-#include "callback.h"
-#include "remote-sim.h"
+#include "gdb/callback.h"
+#include "gdb/remote-sim.h"
#include "opcode/m68hc11.h"
#include "sim-types.h"
#define B_REGNUM 6
#define PSW_REGNUM 7
#define Z_REGNUM 8
+#define PAGE_REGNUM 9
typedef struct m6811_regs {
unsigned short d;
unsigned short sp;
unsigned short pc;
unsigned char ccr;
+ unsigned short page;
} m6811_regs;
/* 68HC12 instructions. */
M6812_BGND,
M6812_CALL,
+ M6812_CALL_INDIRECT,
M6812_IDIVS,
M6812_EDIV,
M6812_EDIVS,
M6812_WAV
};
-#define CPU_POP 1
-#define CPU_PUSH 2
-
#define M6811_MAX_PORTS (0x03f+1)
#define M6812_MAX_PORTS (0x3ff+1)
#define MAX_PORTS (M6812_MAX_PORTS)
-/* Tentative to keep track of the stack frame.
- The frame is updated each time a call or a return are made.
- We also have to take into account changes of stack pointer
- (either thread switch or longjmp). */
-struct cpu_frame
-{
- struct cpu_frame *up;
- uint16 pc;
- uint16 sp_low;
- uint16 sp_high;
-};
-
-/* Represents a list of frames (or a thread). */
-struct cpu_frame_list
-{
- struct cpu_frame_list *next;
- struct cpu_frame_list *prev;
- struct cpu_frame *frame;
-};
-
struct _sim_cpu;
typedef void (* cpu_interp) (struct _sim_cpu*);
/* CPU interrupts. */
struct interrupts cpu_interrupts;
- struct cpu_frame_list *cpu_frames;
- struct cpu_frame_list *cpu_current_frame;
- int cpu_need_update_frame;
-
/* Pointer to the interpretor routine. */
cpu_interp cpu_interpretor;
uint8 cpu_use_local_config;
uint8 ios[MAX_PORTS];
-
+
+ struct hw *hw_cpu;
+
/* ... base type ... */
sim_cpu_base base;
};
#define cpu_get_sp(PROC) ((PROC)->cpu_regs.sp)
#define cpu_get_a(PROC) ((PROC->cpu_regs.d >> 8) & 0x0FF)
#define cpu_get_b(PROC) ((PROC->cpu_regs.d) & 0x0FF)
+#define cpu_get_page(PROC) (PROC->cpu_regs.page)
/* 68HC12 specific and Motorola internal registers. */
#define cpu_get_tmp3(PROC) (0)
#define cpu_set_d(PROC,VAL) (((PROC)->cpu_regs.d) = (VAL))
#define cpu_set_x(PROC,VAL) (((PROC)->cpu_regs.ix) = (VAL))
#define cpu_set_y(PROC,VAL) (((PROC)->cpu_regs.iy) = (VAL))
+#define cpu_set_page(PROC,VAL) ((PROC->cpu_regs.page) = (VAL))
/* 68HC12 specific and Motorola internal registers. */
#define cpu_set_tmp3(PROC,VAL) (0)
-#define cpu_set_tmp2(PROC,VAL) (0)
+#define cpu_set_tmp2(PROC,VAL) (void) (0)
#if 0
/* This is a function in m68hc11_sim.c to keep track of the frame. */
uint16 addr,
const char *message);
+inline address_word
+phys_to_virt (sim_cpu *cpu, address_word addr)
+{
+ if (addr >= 0x8000 && addr < 0xc000)
+ return ((address_word) (addr) - 0x8000)
+ + (((address_word) cpu->cpu_regs.page) << 14) + 0x01000000;
+ else
+ return (address_word) (addr);
+}
+
inline uint8
memory_read8 (sim_cpu *cpu, uint16 addr)
{
uint8 val;
-
+
if (sim_core_read_buffer (CPU_STATE (cpu), cpu, 0, &val, addr, 1) != 1)
{
cpu_memory_exception (cpu, SIM_SIGSEGV, addr,
memory_read16 (sim_cpu *cpu, uint16 addr)
{
uint8 b[2];
-
+
if (sim_core_read_buffer (CPU_STATE (cpu), cpu, 0, b, addr, 2) != 2)
{
cpu_memory_exception (cpu, SIM_SIGSEGV, addr,
memory_write8 (proc, addr, val);
proc->cpu_regs.sp = addr - 1;
- proc->cpu_need_update_frame |= CPU_PUSH;
}
inline void
memory_write16 (proc, addr, val);
proc->cpu_regs.sp = addr - 1;
- proc->cpu_need_update_frame |= CPU_PUSH;
}
inline uint8
val = memory_read8 (proc, addr + 1);
proc->cpu_regs.sp = addr + 1;
- proc->cpu_need_update_frame |= CPU_POP;
return val;
}
val = memory_read16 (proc, addr + 1);
proc->cpu_regs.sp = addr + 2;
- proc->cpu_need_update_frame |= CPU_POP;
return val;
}
addr --;
memory_write8 (proc, addr, val);
proc->cpu_regs.sp = addr;
- proc->cpu_need_update_frame |= CPU_PUSH;
}
inline void
addr -= 2;
memory_write16 (proc, addr, val);
proc->cpu_regs.sp = addr;
- proc->cpu_need_update_frame |= CPU_PUSH;
}
inline uint8
val = memory_read8 (proc, addr);
proc->cpu_regs.sp = addr + 1;
- proc->cpu_need_update_frame |= CPU_POP;
return val;
}
val = memory_read16 (proc, addr);
proc->cpu_regs.sp = addr + 2;
- proc->cpu_need_update_frame |= CPU_POP;
return val;
}
extern int cpu_initialize (SIM_DESC sd, sim_cpu *cpu);
-extern void cpu_print_frame (SIM_DESC sd, sim_cpu *cpu);
+/* Returns the address of a 68HC12 indexed operand.
+ Pre and post modifications are handled on the source register. */
+extern uint16 cpu_get_indexed_operand_addr (sim_cpu* cpu, int restrict);
+
+extern void cpu_return (sim_cpu *cpu);
extern void cpu_set_sp (sim_cpu *cpu, uint16 val);
-extern uint16 cpu_frame_reg (sim_cpu *cpu, uint16 rn);
extern int cpu_reset (sim_cpu *cpu);
extern int cpu_restart (sim_cpu *cpu);
extern void sim_memory_error (sim_cpu *cpu, SIM_SIGNAL excep,
extern void cpu_interp_m6811 (sim_cpu *cpu);
extern void cpu_interp_m6812 (sim_cpu *cpu);
+extern int m68hc11cpu_set_oscillator (SIM_DESC sd, const char *port,
+ double ton, double toff,
+ signed64 repeat);
+extern int m68hc11cpu_clear_oscillator (SIM_DESC sd, const char *port);
+extern void m68hc11cpu_set_port (struct hw *me, sim_cpu *cpu,
+ unsigned addr, uint8 val);
+
/* The current state of the processor; registers, memory, etc. */
#define CIA_GET(CPU) (cpu_get_pc (CPU))