Yet another fix for mcore-sim (rotli)

[thirdparty/binutils-gdb.git] / sim / mcore / interp.c

diff --git a/sim/mcore/interp.c b/sim/mcore/interp.c
index 8bfb745a11f236df21d7afacf0b0884578243711..94e0a1675be7fd9b405632a60eb2ff5187e24236 100644 (file)
--- a/sim/mcore/interp.c
+++ b/sim/mcore/interp.c
@@ -1015,7 +1015,7 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
        case 0x38: case 0x39:                           /* xsr, rotli */
          {
            unsigned imm = IMM5;
-           unsigned long tmp = gr[RD];
+           uint32_t tmp = gr[RD];
            if (imm == 0)
              {
                int32_t cbit;