+2005-01-07 Andrew Cagney <cagney@gnu.org>
+
+ * configure.ac: Rename configure.in, require autoconf 2.59.
+ * configure: Re-generate.
+
+2004-12-08 Hans-Peter Nilsson <hp@axis.com>
+
+ * configure: Regenerate for ../common/aclocal.m4 update.
+
+2004-09-24 Monika Chaddha <monika@acmet.com>
+
+ Committed by Andrew Cagney.
+ * m16.igen (CMP, CMPI): Fix assembler.
+
+2004-08-18 Chris Demetriou <cgd@broadcom.com>
+
+ * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
+ * configure: Regenerate.
+
+2004-06-25 Chris Demetriou <cgd@broadcom.com>
+
+ * configure.in (sim_m16_machine): Include mipsIII.
+ * configure: Regenerate.
+
+2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
+
+ * mips/interp.c (decode_coproc): Sign-extend the address retrieved
+ from COP0_BADVADDR.
+ * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
+
+2004-04-10 Chris Demetriou <cgd@broadcom.com>
+
+ * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
+
+2004-04-09 Chris Demetriou <cgd@broadcom.com>
+
+ * mips.igen (check_fmt): Remove.
+ (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
+ (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
+ (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
+ (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
+ (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
+ (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
+ (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
+ (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
+ (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
+ (C.cnd.fmta): Remove incorrect call to check_fmt_p.
+
+2004-04-09 Chris Demetriou <cgd@broadcom.com>
+
+ * sb1.igen (check_sbx): New function.
+ (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
+
+2004-03-29 Chris Demetriou <cgd@broadcom.com>
+ Richard Sandiford <rsandifo@redhat.com>
+
+ * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
+ (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
+ * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
+ separate implementations for mipsIV and mipsV. Use new macros to
+ determine whether the restrictions apply.
+
+2004-01-19 Chris Demetriou <cgd@broadcom.com>
+
+ * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
+ (check_mult_hilo): Improve comments.
+ (check_div_hilo): Likewise. Also, fork off a new version
+ to handle mips32/mips64 (since there are no hazards to check
+ in MIPS32/MIPS64).
+
+2003-06-17 Richard Sandiford <rsandifo@redhat.com>
+
+ * mips.igen (do_dmultx): Fix check for negative operands.
+
+2003-05-16 Ian Lance Taylor <ian@airs.com>
+
+ * Makefile.in (SHELL): Make sure this is defined.
+ (various): Use $(SHELL) whenever we invoke move-if-change.
+
+2003-05-03 Chris Demetriou <cgd@broadcom.com>
+
+ * cp1.c: Tweak attribution slightly.
+ * cp1.h: Likewise.
+ * mdmx.c: Likewise.
+ * mdmx.igen: Likewise.
+ * mips3d.igen: Likewise.
+ * sb1.igen: Likewise.
+
+2003-04-15 Richard Sandiford <rsandifo@redhat.com>
+
+ * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
+ unsigned operands.
+
+2003-02-27 Andrew Cagney <cagney@redhat.com>
+
+ * interp.c (sim_open): Rename _bfd to bfd.
+ (sim_create_inferior): Ditto.
+
+2003-01-14 Chris Demetriou <cgd@broadcom.com>
+
+ * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
+
+2003-01-14 Chris Demetriou <cgd@broadcom.com>
+
+ * mips.igen (EI, DI): Remove.
+
+2003-01-05 Richard Sandiford <rsandifo@redhat.com>
+
+ * Makefile.in (tmp-run-multi): Fix mips16 filter.
+
+2003-01-04 Richard Sandiford <rsandifo@redhat.com>
+ Andrew Cagney <ac131313@redhat.com>
+ Gavin Romig-Koch <gavin@redhat.com>
+ Graydon Hoare <graydon@redhat.com>
+ Aldy Hernandez <aldyh@redhat.com>
+ Dave Brolley <brolley@redhat.com>
+ Chris Demetriou <cgd@broadcom.com>
+
+ * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
+ (sim_mach_default): New variable.
+ (mips64vr-*-*, mips64vrel-*-*): New configurations.
+ Add a new simulator generator, MULTI.
+ * configure: Regenerate.
+ * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
+ (multi-run.o): New dependency.
+ (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
+ (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
+ (tmp-multi): Combine them.
+ (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
+ (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
+ (distclean-extra): New rule.
+ * sim-main.h: Include bfd.h.
+ (MIPS_MACH): New macro.
+ * mips.igen (vr4120, vr5400, vr5500): New models.
+ (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
+ * vr.igen: Replace with new version.
+
+2003-01-04 Chris Demetriou <cgd@broadcom.com>
+
+ * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
+ * configure: Regenerate.
+
+2002-12-31 Chris Demetriou <cgd@broadcom.com>
+
+ * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
+ * mips.igen: Remove all invocations of check_branch_bug and
+ mark_branch_bug.
+
+2002-12-16 Chris Demetriou <cgd@broadcom.com>
+
+ * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
+
+2002-07-30 Chris Demetriou <cgd@broadcom.com>
+
+ * mips.igen (do_load_double, do_store_double): New functions.
+ (LDC1, SDC1): Rename to...
+ (LDC1b, SDC1b): respectively.
+ (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
+
+2002-07-29 Michael Snyder <msnyder@redhat.com>
+
+ * cp1.c (fp_recip2): Modify initialization expression so that
+ GCC will recognize it as constant.
+
+2002-06-18 Chris Demetriou <cgd@broadcom.com>
+
+ * mdmx.c (SD_): Delete.
+ (Unpredictable): Re-define, for now, to directly invoke
+ unpredictable_action().
+ (mdmx_acc_op): Fix error in .ob immediate handling.
+
+2002-06-18 Andrew Cagney <cagney@redhat.com>
+
+ * interp.c (sim_firmware_command): Initialize `address'.
+
+2002-06-16 Andrew Cagney <ac131313@redhat.com>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+2002-06-14 Chris Demetriou <cgd@broadcom.com>
+ Ed Satterthwaite <ehs@broadcom.com>
+
+ * mips3d.igen: New file which contains MIPS-3D ASE instructions.
+ * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
+ * mips.igen: Include mips3d.igen.
+ (mips3d): New model name for MIPS-3D ASE instructions.
+ (CVT.W.fmt): Don't use this instruction for word (source) format
+ instructions.
+ * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
+ (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
+ (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
+ (NR_FRAC_GUARD, IMPLICIT_1): New macros.
+ * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
+ (RSquareRoot1, RSquareRoot2): New macros.
+ (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
+ (fp_rsqrt2): New functions.
+ * configure.in: Add MIPS-3D support to mipsisa64 simulator.
+ * configure: Regenerate.
+
+2002-06-13 Chris Demetriou <cgd@broadcom.com>
+ Ed Satterthwaite <ehs@broadcom.com>
+
+ * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
+ (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
+ (fp_inv_sqrt, fpu_format_name): Add paired-single support.
+ (convert): Note that this function is not used for paired-single
+ format conversions.
+ (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
+ * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
+ (check_fmt_p): Enable paired-single support.
+ (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
+ (PUU.PS): New instructions.
+ (CVT.S.fmt): Don't use this instruction for paired-single format
+ destinations.
+ * sim-main.h (FP_formats): New value 'fmt_ps.'
+ (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
+ (PSLower, PSUpper, PackPS, ConvertPS): New macros.
+
+2002-06-12 Chris Demetriou <cgd@broadcom.com>
+
+ * mips.igen: Fix formatting of function calls in
+ many FP operations.
+
+2002-06-12 Chris Demetriou <cgd@broadcom.com>
+
+ * mips.igen (MOVN, MOVZ): Trace result.
+ (TNEI): Print "tnei" as the opcode name in traces.
+ (CEIL.W): Add disassembly string for traces.
+ (RSQRT.fmt): Make location of disassembly string consistent
+ with other instructions.
+
+2002-06-12 Chris Demetriou <cgd@broadcom.com>
+
+ * mips.igen (X): Delete unused function.
+
+2002-06-08 Andrew Cagney <cagney@redhat.com>
+
+ * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
+
+2002-06-07 Chris Demetriou <cgd@broadcom.com>
+ Ed Satterthwaite <ehs@broadcom.com>
+
+ * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
+ (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
+ * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
+ (fp_nmsub): New prototypes.
+ (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
+ (NegMultiplySub): New defines.
+ * mips.igen (RSQRT.fmt): Use RSquareRoot().
+ (MADD.D, MADD.S): Replace with...
+ (MADD.fmt): New instruction.
+ (MSUB.D, MSUB.S): Replace with...
+ (MSUB.fmt): New instruction.
+ (NMADD.D, NMADD.S): Replace with...
+ (NMADD.fmt): New instruction.
+ (NMSUB.D, MSUB.S): Replace with...
+ (NMSUB.fmt): New instruction.
+
+2002-06-07 Chris Demetriou <cgd@broadcom.com>
+ Ed Satterthwaite <ehs@broadcom.com>
+
+ * cp1.c: Fix more comment spelling and formatting.
+ (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
+ (denorm_mode): New function.
+ (fpu_unary, fpu_binary): Round results after operation, collect
+ status from rounding operations, and update the FCSR.
+ (convert): Collect status from integer conversions and rounding
+ operations, and update the FCSR. Adjust NaN values that result
+ from conversions. Convert to use sim_io_eprintf rather than
+ fprintf, and remove some debugging code.
+ * cp1.h (fenr_FS): New define.
+
+2002-06-07 Chris Demetriou <cgd@broadcom.com>
+
+ * cp1.c (convert): Remove unusable debugging code, and move MIPS
+ rounding mode to sim FP rounding mode flag conversion code into...
+ (rounding_mode): New function.
+
+2002-06-07 Chris Demetriou <cgd@broadcom.com>
+
+ * cp1.c: Clean up formatting of a few comments.
+ (value_fpr): Reformat switch statement.
+
+2002-06-06 Chris Demetriou <cgd@broadcom.com>
+ Ed Satterthwaite <ehs@broadcom.com>
+
+ * cp1.h: New file.
+ * sim-main.h: Include cp1.h.
+ (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
+ (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
+ (FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
+ (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
+ (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
+ (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
+ * cp1.c: Don't include sim-fpu.h; already included by
+ sim-main.h. Clean up formatting of some comments.
+ (NaN, Equal, Less): Remove.
+ (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
+ (fp_cmp): New functions.
+ * mips.igen (do_c_cond_fmt): Remove.
+ (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
+ Compare. Add result tracing.
+ (CxC1): Remove, replace with...
+ (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
+ (DMxC1): Remove, replace with...
+ (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
+ (MxC1): Remove, replace with...
+ (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
+
+2002-06-04 Chris Demetriou <cgd@broadcom.com>
+
+ * sim-main.h (FGRIDX): Remove, replace all uses with...
+ (FGR_BASE): New macro.
+ (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
+ (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
+ (NR_FGR, FGR): Likewise.
+ * interp.c: Replace all uses of FGRIDX with FGR_BASE.
+ * mips.igen: Likewise.
+
+2002-06-04 Chris Demetriou <cgd@broadcom.com>
+
+ * cp1.c: Add an FSF Copyright notice to this file.
+
+2002-06-04 Chris Demetriou <cgd@broadcom.com>
+ Ed Satterthwaite <ehs@broadcom.com>
+
+ * cp1.c (Infinity): Remove.
+ * sim-main.h (Infinity): Likewise.
+
+ * cp1.c (fp_unary, fp_binary): New functions.
+ (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
+ (fp_sqrt): New functions, implemented in terms of the above.
+ (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
+ (Recip, SquareRoot): Remove (replaced by functions above).
+ * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
+ (fp_recip, fp_sqrt): New prototypes.
+ (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
+ (Recip, SquareRoot): Replace prototypes with #defines which
+ invoke the functions above.
+
+2002-06-03 Chris Demetriou <cgd@broadcom.com>
+
+ * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
+ (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
+ file, remove PARAMS from prototypes.
+ (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
+ simulator state arguments.
+ (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
+ pass simulator state arguments.
+ * cp1.c (SD): Redefine as CPU_STATE(cpu).
+ (store_fpr, convert): Remove 'sd' argument.
+ (value_fpr): Likewise. Convert to use 'SD' instead.
+
+2002-06-03 Chris Demetriou <cgd@broadcom.com>
+
+ * cp1.c (Min, Max): Remove #if 0'd functions.
+ * sim-main.h (Min, Max): Remove.
+
+2002-06-03 Chris Demetriou <cgd@broadcom.com>
+
+ * cp1.c: fix formatting of switch case and default labels.
+ * interp.c: Likewise.
+ * sim-main.c: Likewise.
+
+2002-06-03 Chris Demetriou <cgd@broadcom.com>
+
+ * cp1.c: Clean up comments which describe FP formats.
+ (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
+
+2002-06-03 Chris Demetriou <cgd@broadcom.com>
+ Ed Satterthwaite <ehs@broadcom.com>
+
+ * configure.in (mipsisa64sb1*-*-*): New target for supporting
+ Broadcom SiByte SB-1 processor configurations.
+ * configure: Regenerate.
+ * sb1.igen: New file.
+ * mips.igen: Include sb1.igen.
+ (sb1): New model.
+ * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
+ * mdmx.igen: Add "sb1" model to all appropriate functions and
+ instructions.
+ * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
+ (ob_func, ob_acc): Reference the above.
+ (qh_acc): Adjust to keep the same size as ob_acc.
+ * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
+ (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
+
+2002-06-03 Chris Demetriou <cgd@broadcom.com>
+
+ * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
+
+2002-06-02 Chris Demetriou <cgd@broadcom.com>
+ Ed Satterthwaite <ehs@broadcom.com>
+
+ * mips.igen (mdmx): New (pseudo-)model.
+ * mdmx.c, mdmx.igen: New files.
+ * Makefile.in (SIM_OBJS): Add mdmx.o.
+ * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
+ New typedefs.
+ (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
+ (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
+ (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
+ (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
+ (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
+ (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
+ (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
+ (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
+ (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
+ (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
+ (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
+ (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
+ (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
+ (qh_fmtsel): New macros.
+ (_sim_cpu): New member "acc".
+ (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
+ (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
+
+2002-05-01 Chris Demetriou <cgd@broadcom.com>
+
+ * interp.c: Use 'deprecated' rather than 'depreciated.'
+ * sim-main.h: Likewise.
+
+2002-05-01 Chris Demetriou <cgd@broadcom.com>
+
+ * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
+ which wouldn't compile anyway.
+ * sim-main.h (unpredictable_action): New function prototype.
+ (Unpredictable): Define to call igen function unpredictable().
+ (NotWordValue): New macro to call igen function not_word_value().
+ (UndefinedResult): Remove.
+ * interp.c (undefined_result): Remove.
+ (unpredictable_action): New function.
+ * mips.igen (not_word_value, unpredictable): New functions.
+ (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
+ (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
+ (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
+ NotWordValue() to check for unpredictable inputs, then
+ Unpredictable() to handle them.
+
+2002-02-24 Chris Demetriou <cgd@broadcom.com>
+
+ * mips.igen: Fix formatting of calls to Unpredictable().
+
+2002-04-20 Andrew Cagney <ac131313@redhat.com>
+
+ * interp.c (sim_open): Revert previous change.
+
+2002-04-18 Alexandre Oliva <aoliva@redhat.com>
+
+ * interp.c (sim_open): Disable chunk of code that wrote code in
+ vector table entries.
+
+2002-03-19 Chris Demetriou <cgd@broadcom.com>
+
+ * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
+ (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
+ unused definitions.
+
+2002-03-19 Chris Demetriou <cgd@broadcom.com>
+
+ * cp1.c: Fix many formatting issues.
+
+2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
+
+ * cp1.c (fpu_format_name): New function to replace...
+ (DOFMT): This. Delete, and update all callers.
+ (fpu_rounding_mode_name): New function to replace...
+ (RMMODE): This. Delete, and update all callers.
+
+2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
+
+ * interp.c: Move FPU support routines from here to...
+ * cp1.c: Here. New file.
+ * Makefile.in (SIM_OBJS): Add cp1.o to object list.
+ (cp1.o): New target.
+
+2002-03-12 Chris Demetriou <cgd@broadcom.com>
+
+ * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
+ * mips.igen (mips32, mips64): New models, add to all instructions
+ and functions as appropriate.
+ (loadstore_ea, check_u64): New variant for model mips64.
+ (check_fmt_p): New variant for models mipsV and mips64, remove
+ mipsV model marking fro other variant.
+ (SLL) Rename to...
+ (SLLa) this.
+ (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
+ for mips32 and mips64.
+ (DCLO, DCLZ): New instructions for mips64.
+
+2002-03-07 Chris Demetriou <cgd@broadcom.com>
+
+ * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
+ immediate or code as a hex value with the "%#lx" format.
+ (ANDI): Likewise, and fix printed instruction name.
+
+2002-03-05 Chris Demetriou <cgd@broadcom.com>
+
+ * sim-main.h (UndefinedResult, Unpredictable): New macros
+ which currently do nothing.
+
+2002-03-05 Chris Demetriou <cgd@broadcom.com>
+
+ * sim-main.h (status_UX, status_SX, status_KX, status_TS)
+ (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
+ (status_CU3): New definitions.
+
+ * sim-main.h (ExceptionCause): Add new values for MIPS32
+ and MIPS64: MDMX, MCheck, CacheErr. Update comments
+ for DebugBreakPoint and NMIReset to note their status in
+ MIPS32 and MIPS64.
+ (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
+ (SignalExceptionCacheErr): New exception macros.
+
+2002-03-05 Chris Demetriou <cgd@broadcom.com>
+
+ * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
+ * sim-main.h (COP_Usable): Define, but for now coprocessor 1
+ is always enabled.
+ (SignalExceptionCoProcessorUnusable): Take as argument the
+ unusable coprocessor number.
+
+2002-03-05 Chris Demetriou <cgd@broadcom.com>
+
+ * mips.igen: Fix formatting of all SignalException calls.
+
+2002-03-05 Chris Demetriou <cgd@broadcom.com>
+
+ * sim-main.h (SIGNEXTEND): Remove.
+
+2002-03-04 Chris Demetriou <cgd@broadcom.com>
+
+ * mips.igen: Remove gencode comment from top of file, fix
+ spelling in another comment.
+
+2002-03-04 Chris Demetriou <cgd@broadcom.com>
+
+ * mips.igen (check_fmt, check_fmt_p): New functions to check
+ whether specific floating point formats are usable.
+ (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
+ (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
+ (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
+ Use the new functions.
+ (do_c_cond_fmt): Remove format checks...
+ (C.cond.fmta, C.cond.fmtb): And move them into all callers.
+
+2002-03-03 Chris Demetriou <cgd@broadcom.com>
+
+ * mips.igen: Fix formatting of check_fpu calls.
+
+2002-03-03 Chris Demetriou <cgd@broadcom.com>
+
+ * mips.igen (FLOOR.L.fmt): Store correct destination register.
+
+2002-03-03 Chris Demetriou <cgd@broadcom.com>
+
+ * mips.igen: Remove whitespace at end of lines.
+
+2002-03-02 Chris Demetriou <cgd@broadcom.com>
+
+ * mips.igen (loadstore_ea): New function to do effective
+ address calculations.
+ (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
+ do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
+ CACHE): Use loadstore_ea to do effective address computations.
+
+2002-03-02 Chris Demetriou <cgd@broadcom.com>
+
+ * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
+ * mips.igen (LL, CxC1, MxC1): Likewise.
+
+2002-03-02 Chris Demetriou <cgd@broadcom.com>
+
+ * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
+ CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
+ FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
+ MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
+ NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
+ SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
+ Don't split opcode fields by hand, use the opcode field values
+ provided by igen.
+
+2002-03-01 Chris Demetriou <cgd@broadcom.com>
+
+ * mips.igen (do_divu): Fix spacing.
+
+ * mips.igen (do_dsllv): Move to be right before DSLLV,
+ to match the rest of the do_<shift> functions.
+
+2002-03-01 Chris Demetriou <cgd@broadcom.com>
+
+ * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
+ DSRL32, do_dsrlv): Trace inputs and results.
+
+2002-03-01 Chris Demetriou <cgd@broadcom.com>
+
+ * mips.igen (CACHE): Provide instruction-printing string.
+
+ * interp.c (signal_exception): Comment tokens after #endif.
+
+2002-02-28 Chris Demetriou <cgd@broadcom.com>
+
+ * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
+ (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
+ NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
+ ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
+ CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
+ C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
+ SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
+ LWC1, SWC1): Add "f" to filter, since these are FP instructions.
+
+2002-02-28 Chris Demetriou <cgd@broadcom.com>
+
+ * mips.igen (DSRA32, DSRAV): Fix order of arguments in
+ instruction-printing string.
+ (LWU): Use '64' as the filter flag.
+
+2002-02-28 Chris Demetriou <cgd@broadcom.com>
+
+ * mips.igen (SDXC1): Fix instruction-printing string.
+
+2002-02-28 Chris Demetriou <cgd@broadcom.com>
+
+ * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
+ filter flags "32,f".
+
+2002-02-27 Chris Demetriou <cgd@broadcom.com>
+
+ * mips.igen (PREFX): This is a 64-bit instruction, use '64'
+ as the filter flag.
+
+2002-02-27 Chris Demetriou <cgd@broadcom.com>
+
+ * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
+ add a comma) so that it more closely match the MIPS ISA
+ documentation opcode partitioning.
+ (PREF): Put useful names on opcode fields, and include
+ instruction-printing string.
+
+2002-02-27 Chris Demetriou <cgd@broadcom.com>
+
+ * mips.igen (check_u64): New function which in the future will
+ check whether 64-bit instructions are usable and signal an
+ exception if not. Currently a no-op.
+ (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
+ DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
+ DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
+ LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
+
+ * mips.igen (check_fpu): New function which in the future will
+ check whether FPU instructions are usable and signal an exception
+ if not. Currently a no-op.
+ (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
+ CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
+ CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
+ LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
+ MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
+ NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
+ ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
+ SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
+
+2002-02-27 Chris Demetriou <cgd@broadcom.com>
+
+ * mips.igen (do_load_left, do_load_right): Move to be immediately
+ following do_load.
+ (do_store_left, do_store_right): Move to be immediately following
+ do_store.
+
+2002-02-27 Chris Demetriou <cgd@broadcom.com>
+
+ * mips.igen (mipsV): New model name. Also, add it to
+ all instructions and functions where it is appropriate.
+
+2002-02-18 Chris Demetriou <cgd@broadcom.com>
+
+ * mips.igen: For all functions and instructions, list model
+ names that support that instruction one per line.
+
+2002-02-11 Chris Demetriou <cgd@broadcom.com>
+
+ * mips.igen: Add some additional comments about supported
+ models, and about which instructions go where.
+ (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
+ order as is used in the rest of the file.
+
+2002-02-11 Chris Demetriou <cgd@broadcom.com>
+
+ * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
+ indicating that ALU32_END or ALU64_END are there to check
+ for overflow.
+ (DADD): Likewise, but also remove previous comment about
+ overflow checking.
+
+2002-02-10 Chris Demetriou <cgd@broadcom.com>
+
+ * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
+ DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
+ JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
+ SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
+ ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
+ fields (i.e., add and move commas) so that they more closely
+ match the MIPS ISA documentation opcode partitioning.
+
+2002-02-10 Chris Demetriou <cgd@broadcom.com>
+
+ * mips.igen (ADDI): Print immediate value.
+ (BREAK): Print code.
+ (DADDIU, DSRAV, DSRLV): Print correct instruction name.
+ (SLL): Print "nop" specially, and don't run the code
+ that does the shift for the "nop" case.
+
2001-11-17 Fred Fish <fnf@redhat.com>
* sim-main.h (float_operation): Move enum declaration outside
projects / thirdparty / binutils-gdb.git / blobdiff