import gdb-1999-09-08 snapshot

[thirdparty/binutils-gdb.git] / sim / mips / mips.igen

diff --git a/sim/mips/mips.igen b/sim/mips/mips.igen
index 21e822ea61587df313668117664c42e58329313c..17748febcfc40a0c266b05c60efa6faaa7ea49c2 100644 (file)
--- a/sim/mips/mips.igen
+++ b/sim/mips/mips.igen
@@ -40,21 +40,8 @@
 :model:::mipsIII:mips4000:
 :model:::mipsIV:mips8000:
 :model:::mips16:mips16:
-// start-sanitize-r5900
-:model:::r5900:mips5900:
-// end-sanitize-r5900
 :model:::r3900:mips3900:
-// start-sanitize-tx19
-:model:::tx19:tx19:
-// end-sanitize-tx19
 :model:::vr4100:mips4100:
-// start-sanitize-vr4320
-:model:::vr4320:mips4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-:model:::vr5400:mips5400:
-:model:::mdmx:mdmx:
-// end-sanitize-cygnus
 :model:::vr5000:mips5000:
 
 
@@ -89,6 +76,7 @@
   CIA = CIA + 4; /* NOTE not mips16 */
   STATE |= simDELAYSLOT;
   delay_insn = IMEM32 (CIA); /* NOTE not mips16 */
+  ENGINE_ISSUE_PREFIX_HOOK();
   idecode_issue (CPU_, delay_insn, (CIA));
   STATE &= ~simDELAYSLOT;
   return target;
@@ -101,27 +89,6 @@
   return CIA + 8;
 }
 
-// start-sanitize-branchbug4011
-:function:::void:check_4011_branch_bug:
-{
-  if (BRANCHBUG4011_OPTION == 2 && BRANCHBUG4011_LAST_TARGET == CIA)
-    sim_engine_abort (SD, CPU, CIA, "4011 BRANCH BUG: %s at 0x%08lx was target of branch at 0x%08lx\n",
-                     itable[MY_INDEX].name,
-                     (long) CIA,
-                     (long) BRANCHBUG4011_LAST_CIA);
-}
-
-:function:::void:mark_4011_branch_bug:address_word target
-{
-  if (BRANCHBUG4011_OPTION)
-    {
-      BRANCHBUG4011_OPTION = 2;
-      BRANCHBUG4011_LAST_TARGET = target;
-      BRANCHBUG4011_LAST_CIA = CIA;
-    }
-}
-
-// end-sanitize-branchbug4011
 // Helper:
 // 
 // Check that an access to a HI/LO register meets timing requirements
@@ -151,12 +118,6 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 {
   signed64 time = sim_events_time (SD);
   int ok = check_mf_cycles (SD_, history, time, "MT");
@@ -167,12 +128,6 @@
 
 :function:::int:check_mt_hilo:hilo_history *history
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 {
   signed64 time = sim_events_time (SD);
   history->mt.timestamp = time;
@@ -185,16 +140,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   signed64 time = sim_events_time (SD);
   int ok = 1;
@@ -220,34 +166,12 @@
   return ok;
 }
 
-// start-sanitize-r5900
-// The r5900 mfhi et.al insns _can_ be exectuted immediatly after a div
-:function:::int:check_mf_hilo:hilo_history *history, hilo_history *peer
-// end-sanitize-r5900
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-r5900
-{
-  /* FIXME: could record the fact that a stall occured if we want */
-  signed64 time = sim_events_time (SD);
-  history->mf.timestamp = time;
-  history->mf.cia = CIA;
-  return 1;
-}
-// end-sanitize-r5900
 
 
 :function:::int:check_mult_hilo:hilo_history *hi, hilo_history *lo
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 {
   signed64 time = sim_events_time (SD);
   int ok = (check_mf_cycles (SD_, hi, time, "OP")
@@ -263,12 +187,6 @@
 // a mf{hi,lo}
 :function:::int:check_mult_hilo:hilo_history *hi, hilo_history *lo
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 {
   /* FIXME: could record the fact that a stall occured if we want */
   signed64 time = sim_events_time (SD);
@@ -284,16 +202,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   signed64 time = sim_events_time (SD);
   int ok = (check_mf_cycles (SD_, hi, time, "OP")
@@ -306,25 +215,6 @@
 }
 
 
-// start-sanitize-r5900
-// The r5900 div et.al insns _can_ be exectuted immediatly after
-// a mf{hi,lo}
-:function:::int:check_div_hilo:hilo_history *hi, hilo_history *lo
-// end-sanitize-r5900
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-r5900
-{
-  /* FIXME: could record the fact that a stall occured if we want */
-  signed64 time = sim_events_time (SD);
-  hi->op.timestamp = time;
-  lo->op.timestamp = time;
-  hi->op.cia = CIA;
-  lo->op.cia = CIA;
-  return 1;
-}
-// end-sanitize-r5900
 
 
 
@@ -341,19 +231,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   TRACE_ALU_INPUT2 (GPR[RS], GPR[RT]);
   {
@@ -371,19 +249,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   TRACE_ALU_INPUT2 (GPR[RS], EXTEND16 (IMMEDIATE));
   {
@@ -408,19 +274,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_addiu (SD_, RS, RT, IMMEDIATE);
 }
@@ -439,19 +293,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_addu (SD_, RS, RT, RD);
 }
@@ -470,19 +312,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_and (SD_, RS, RT, RD);
 }
@@ -494,19 +324,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   TRACE_ALU_INPUT2 (GPR[RS], IMMEDIATE);
   GPR[RT] = GPR[RS] & IMMEDIATE;
@@ -520,19 +338,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   address_word offset = EXTEND16 (OFFSET) << 2;
   check_branch_bug ();
@@ -552,19 +358,7 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   address_word offset = EXTEND16 (OFFSET) << 2;
   check_branch_bug ();
@@ -584,19 +378,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   address_word offset = EXTEND16 (OFFSET) << 2;
   check_branch_bug ();
@@ -614,19 +396,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   address_word offset = EXTEND16 (OFFSET) << 2;
   check_branch_bug ();
@@ -647,19 +417,7 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   address_word offset = EXTEND16 (OFFSET) << 2;
   check_branch_bug ();
@@ -684,19 +442,7 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   address_word offset = EXTEND16 (OFFSET) << 2;
   check_branch_bug ();
@@ -716,19 +462,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   address_word offset = EXTEND16 (OFFSET) << 2;
   check_branch_bug ();
@@ -748,19 +482,7 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   address_word offset = EXTEND16 (OFFSET) << 2;
   check_branch_bug ();
@@ -782,19 +504,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   address_word offset = EXTEND16 (OFFSET) << 2;
   check_branch_bug ();
@@ -816,19 +526,7 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   address_word offset = EXTEND16 (OFFSET) << 2;
   check_branch_bug ();
@@ -848,19 +546,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   address_word offset = EXTEND16 (OFFSET) << 2;
   check_branch_bug ();
@@ -878,19 +564,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   address_word offset = EXTEND16 (OFFSET) << 2;
   check_branch_bug ();
@@ -913,19 +587,7 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   address_word offset = EXTEND16 (OFFSET) << 2;
   check_branch_bug ();
@@ -948,19 +610,7 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   address_word offset = EXTEND16 (OFFSET) << 2;
   check_branch_bug ();
@@ -982,19 +632,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   address_word offset = EXTEND16 (OFFSET) << 2;
   check_branch_bug ();
@@ -1014,19 +652,7 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   address_word offset = EXTEND16 (OFFSET) << 2;
   check_branch_bug ();
@@ -1046,19 +672,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   /* Check for some break instruction which are reserved for use by the simulator.  */
   unsigned int break_code = instruction_0 & HALT_INSTRUCTION_MASK;
@@ -1075,54 +689,8 @@
         PC = cia - 4; /* reference the branch instruction */
       else
         PC = cia;
-      sim_engine_halt (SD, CPU, NULL, cia, sim_stopped, SIM_SIGTRAP);
-    }
-// start-sanitize-sky
-#ifdef TARGET_SKY
-  else if (break_code == (HALT_INSTRUCTION_PASS & HALT_INSTRUCTION_MASK))
-    {
-      sim_engine_halt (SD, CPU, NULL, cia, sim_exited, 0);
-    }
-  else if (break_code == (HALT_INSTRUCTION_FAIL & HALT_INSTRUCTION_MASK))
-    {
-      sim_engine_halt (SD, CPU, NULL, cia, sim_exited, 15);
-    }
-  else if (break_code == (PRINTF_INSTRUCTION & HALT_INSTRUCTION_MASK))
-    {
-      sim_monitor(SD, CPU, cia, 316);  /* Magic number for idt printf routine. */
-    }
-  else if (break_code == (LOAD_INSTRUCTION & HALT_INSTRUCTION_MASK))
-    {
-      /* This is a multi-phase load instruction.  Load next configured
-        executable and return its starting PC in A0 ($4). */
-      
-      if (STATE_MLOAD_INDEX (SD) == STATE_MLOAD_COUNT (SD))
-       {
-         sim_io_eprintf (SD, "Cannot load program %d.  Not enough load-next options.\n",
-                         STATE_MLOAD_COUNT (SD));
-         A0 = 0;
-       }
-      else
-       {
-         char* next = STATE_MLOAD_NAME (SD) [STATE_MLOAD_INDEX (SD)];
-         SIM_RC rc;
-         
-         STATE_MLOAD_INDEX (SD) ++;
-         
-         /* call sim_load_file, preserving most previous state */
-         rc = sim_load (SD, next, NULL, 0);
-         if(rc != SIM_RC_OK)
-           {
-             sim_io_eprintf (SD, "Error during multi-phase load #%d.\n",
-                             STATE_MLOAD_INDEX (SD));
-             A0 = 0;
-           }
-         else
-           A0 = STATE_START_ADDR (SD);
-       }
+      SignalException(BreakPoint, instruction_0);
     }
-#endif TARGET_SKY
-// end-sanitize-sky
 
   else
     {
@@ -1143,18 +711,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   /* this check's for overflow */
   TRACE_ALU_INPUT2 (GPR[RS], GPR[RT]);
@@ -1174,18 +730,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   TRACE_ALU_INPUT2 (GPR[RS], EXTEND16 (IMMEDIATE));
   {
@@ -1198,7 +742,7 @@
 
 
 
-:function:64::void:do_daddiu:int rs, int rt, unsigned16 immediate
+:function:::void:do_daddiu:int rs, int rt, unsigned16 immediate
 {
   TRACE_ALU_INPUT2 (GPR[rs], EXTEND16 (immediate));
   GPR[rt] = GPR[rs] + EXTEND16 (immediate);
@@ -1211,18 +755,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_daddiu (SD_, RS, RT, IMMEDIATE);
 }
@@ -1242,46 +774,38 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_daddu (SD_, RS, RT, RD);
 }
 
 
 
-:function:64::void:do_ddiv:int rs, int rt
+:function:::void:do_ddiv:int rs, int rt
 {
   check_div_hilo (SD_, HIHISTORY, LOHISTORY);
   TRACE_ALU_INPUT2 (GPR[rs], GPR[rt]);
   {
     signed64 n = GPR[rs];
     signed64 d = GPR[rt];
+    signed64 hi;
+    signed64 lo;
     if (d == 0)
       {
-       LO = SIGNED64 (0x8000000000000000);
-       HI = 0;
+       lo = SIGNED64 (0x8000000000000000);
+       hi = 0;
       }
     else if (d == -1 && n == SIGNED64 (0x8000000000000000))
       {
-       LO = SIGNED64 (0x8000000000000000);
-       HI = 0;
+       lo = SIGNED64 (0x8000000000000000);
+       hi = 0;
       }
     else
       {
-       LO = (n / d);
-       HI = (n % d);
+       lo = (n / d);
+       hi = (n % d);
       }
+    HI = hi;
+    LO = lo;
   }
   TRACE_ALU_RESULT2 (HI, LO);
 }
@@ -1292,41 +816,33 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_ddiv (SD_, RS, RT);
 }
 
 
 
-:function:64::void:do_ddivu:int rs, int rt
+:function:::void:do_ddivu:int rs, int rt
 {
   check_div_hilo (SD_, HIHISTORY, LOHISTORY);
   TRACE_ALU_INPUT2 (GPR[rs], GPR[rt]);
   {
     unsigned64 n = GPR[rs];
     unsigned64 d = GPR[rt];
+    unsigned64 hi;
+    unsigned64 lo;
     if (d == 0)
       {
-       LO = SIGNED64 (0x8000000000000000);
-       HI = 0;
+       lo = SIGNED64 (0x8000000000000000);
+       hi = 0;
       }
     else
       {
-       LO = (n / d);
-       HI = (n % d);
+       lo = (n / d);
+       hi = (n % d);
       }
+    HI = hi;
+    LO = lo;
   }
   TRACE_ALU_RESULT2 (HI, LO);
 }
@@ -1337,15 +853,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_ddivu (SD_, RS, RT);
 }
@@ -1383,19 +890,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_div (SD_, RS, RT);
 }
@@ -1428,19 +923,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_divu (SD_, RS, RT);
 }
@@ -1516,12 +999,6 @@
 "dmult r<RS>, r<RT>"
 *mipsIII,mipsIV:
 *vr4100:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
 {
   do_dmult (SD_, RS, RT, 0);
 }
@@ -1530,9 +1007,6 @@
 "dmult r<RS>, r<RT>":RD == 0
 "dmult r<RD>, r<RS>, r<RT>"
 *vr5000:
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 {
   do_dmult (SD_, RS, RT, RD);
 }
@@ -1548,12 +1022,6 @@
 "dmultu r<RS>, r<RT>"
 *mipsIII,mipsIV:
 *vr4100:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
 {
   do_dmultu (SD_, RS, RT, 0);
 }
@@ -1562,13 +1030,20 @@
 "dmultu r<RD>, r<RS>, r<RT>":RD == 0
 "dmultu r<RS>, r<RT>"
 *vr5000:
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 {
   do_dmultu (SD_, RS, RT, RD);
 }
 
+:function:::void:do_dsll:int rt, int rd, int shift
+{
+  GPR[rd] = GPR[rt] << shift;
+}
+
+:function:::void:do_dsllv:int rs, int rt, int rd
+{
+  int s = MASKED64 (GPR[rs], 5, 0);
+  GPR[rd] = GPR[rt] << s;
+}
 
 
 00000000000,5.RT,5.RD,5.SHIFT,111000:SPECIAL:64::DSLL
@@ -1577,21 +1052,8 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
-{
-  int s = SHIFT;
-  GPR[RD] = GPR[RT] << s;
+{
+  do_dsll (SD_, RT, RD, SHIFT);
 }
 
 
@@ -1601,48 +1063,25 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   int s = 32 + SHIFT;
   GPR[RD] = GPR[RT] << s;
 }
 
-
-
 000000,5.RS,5.RT,5.RD,00000010100:SPECIAL:64::DSLLV
 "dsllv r<RD>, r<RT>, r<RS>"
 *mipsIII:
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
-{
-  int s = MASKED64 (GPR[RS], 5, 0);
-  GPR[RD] = GPR[RT] << s;
+{
+  do_dsllv (SD_, RS, RT, RD);
 }
 
+:function:::void:do_dsra:int rt, int rd, int shift
+{
+  GPR[rd] = ((signed64) GPR[rt]) >> shift;
+}
 
 
 00000000000,5.RT,5.RD,5.SHIFT,111011:SPECIAL:64::DSRA
@@ -1651,21 +1090,8 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
-{
-  int s = SHIFT;
-  GPR[RD] = ((signed64) GPR[RT]) >> s;
+{
+  do_dsra (SD_, RT, RD, SHIFT);
 }
 
 
@@ -1675,18 +1101,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   int s = 32 + SHIFT;
   GPR[RD] = ((signed64) GPR[RT]) >> s;
@@ -1707,22 +1121,15 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_dsrav (SD_, RS, RT, RD);
 }
 
+:function:::void:do_dsrl:int rt, int rd, int shift
+{
+  GPR[rd] = (unsigned64) GPR[rt] >> shift;
+}
+
 
 00000000000,5.RT,5.RD,5.SHIFT,111010:SPECIAL:64::DSRL
 "dsrl r<RD>, r<RT>, <SHIFT>"
@@ -1730,21 +1137,8 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
-{
-  int s = SHIFT;
-  GPR[RD] = (unsigned64) GPR[RT] >> s;
+{
+  do_dsrl (SD_, RT, RD, SHIFT);
 }
 
 
@@ -1754,45 +1148,28 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   int s = 32 + SHIFT;
   GPR[RD] = (unsigned64) GPR[RT] >> s;
 }
 
 
+:function:::void:do_dsrlv:int rs, int rt, int rd
+{
+  int s = MASKED64 (GPR[rs], 5, 0);
+  GPR[rd] = (unsigned64) GPR[rt] >> s;
+}
+
+
+
 000000,5.RS,5.RT,5.RD,00000010110:SPECIAL:64::DSRLV
 "dsrl32 r<RD>, r<RT>, r<RS>"
 *mipsIII:
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
-{
-  int s = MASKED64 (GPR[RS], 5, 0);
-  GPR[RD] = (unsigned64) GPR[RT] >> s;
+{
+  do_dsrlv (SD_, RS, RT, RD);
 }
 
 
@@ -1802,18 +1179,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   TRACE_ALU_INPUT2 (GPR[RS], GPR[RT]);
   {
@@ -1838,18 +1203,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_dsubu (SD_, RS, RT, RD);
 }
@@ -1860,19 +1213,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   /* NOTE: The region used is that of the delay slot NIA and NOT the
      current instruction */
@@ -1886,19 +1227,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   /* NOTE: The region used is that of the delay slot and NOT the
      current instruction */
@@ -1907,26 +1236,13 @@
   DELAY_SLOT (region | (INSTR_INDEX << 2));
 }
 
-
 000000,5.RS,00000,5.RD,00000001001:SPECIAL:32::JALR
 "jalr r<RS>":RD == 31
 "jalr r<RD>, r<RS>"
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   address_word temp = GPR[RS];
   GPR[RD] = CIA + 8;
@@ -1939,19 +1255,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   DELAY_SLOT (GPR[RS]);
 }
@@ -1970,7 +1274,9 @@
 
   vaddr = base + offset;
   if ((vaddr & access) != 0)
-    SignalExceptionAddressLoad ();
+    {
+      SIM_CORE_SIGNAL (SD, STATE_CPU (SD, 0), cia, read_map, access+1, vaddr, read_transfer, sim_core_unaligned_signal);
+    }
   AddressTranslation (vaddr, isDATA, isLOAD, &paddr, &uncached, isTARGET, isREAL);
   paddr = ((paddr & ~mask) | ((paddr & mask) ^ reverseendian));
   LoadMemory (&memval, NULL, uncached, access, paddr, vaddr, isDATA, isREAL);
@@ -1984,19 +1290,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   GPR[RT] = EXTEND8 (do_load (SD_, AccessLength_BYTE, GPR[BASE], EXTEND16 (OFFSET)));
 }
@@ -2007,19 +1301,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   GPR[RT] = do_load (SD_, AccessLength_BYTE, GPR[BASE], EXTEND16 (OFFSET));
 }
@@ -2031,18 +1313,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   GPR[RT] = EXTEND64 (do_load (SD_, AccessLength_DOUBLEWORD, GPR[BASE], EXTEND16 (OFFSET)));
 }
@@ -2055,16 +1325,7 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   COP_LD (ZZ, RT, do_load (SD_, AccessLength_DOUBLEWORD, GPR[BASE], EXTEND16 (OFFSET)));
 }
@@ -2078,18 +1339,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   GPR[RT] = do_load_left (SD_, AccessLength_DOUBLEWORD, GPR[BASE], EXTEND16 (OFFSET), GPR[RT]);
 }
@@ -2101,18 +1350,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   GPR[RT] = do_load_right (SD_, AccessLength_DOUBLEWORD, GPR[BASE], EXTEND16 (OFFSET), GPR[RT]);
 }
@@ -2123,19 +1360,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   GPR[RT] = EXTEND16 (do_load (SD_, AccessLength_HALFWORD, GPR[BASE], EXTEND16 (OFFSET)));
 }
@@ -2146,19 +1371,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   GPR[RT] = do_load (SD_, AccessLength_HALFWORD, GPR[BASE], EXTEND16 (OFFSET));
 }
@@ -2171,18 +1384,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   signed_word offset = SIGNEXTEND((signed_word)((instruction >> 0) & 0x0000FFFF),16);
@@ -2193,7 +1394,9 @@
     address_word paddr;
     int uncached;
     if ((vaddr & 3) != 0)
-      SignalExceptionAddressLoad();
+      {
+        SIM_CORE_SIGNAL (SD, CPU, cia, read_map, 4, vaddr, read_transfer, sim_core_unaligned_signal);
+      }
     else
       {
        if (AddressTranslation(vaddr,isDATA,isLOAD,&paddr,&uncached,isTARGET,isREAL))
@@ -2222,18 +1425,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   signed_word offset = SIGNEXTEND((signed_word)((instruction >> 0) & 0x0000FFFF),16);
@@ -2244,7 +1435,9 @@
     address_word paddr;
     int uncached;
     if ((vaddr & 7) != 0)
-      SignalExceptionAddressLoad();
+      {
+       SIM_CORE_SIGNAL (SD, CPU, cia, read_map, 8, vaddr, read_transfer, sim_core_unaligned_signal);
+      }
     else
       {
        if (AddressTranslation(vaddr,isDATA,isLOAD,&paddr,&uncached,isTARGET,isREAL))
@@ -2265,19 +1458,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   TRACE_ALU_INPUT1 (IMMEDIATE);
   GPR[RT] = EXTEND32 (IMMEDIATE << 16);
@@ -2290,19 +1471,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   GPR[RT] = EXTEND32 (do_load (SD_, AccessLength_WORD, GPR[BASE], EXTEND16 (OFFSET)));
 }
@@ -2313,19 +1482,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   COP_LW (ZZ, RT, do_load (SD_, AccessLength_WORD, GPR[BASE], EXTEND16 (OFFSET)));
 }
@@ -2393,21 +1550,9 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
-  GPR[RT] = EXTEND32 (do_load_left (SD_, AccessLength_WORD, GPR[BASE], EXTEND32 (OFFSET), GPR[RT]));
+  GPR[RT] = EXTEND32 (do_load_left (SD_, AccessLength_WORD, GPR[BASE], EXTEND16 (OFFSET), GPR[RT]));
 }
 
 
@@ -2447,19 +1592,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   GPR[RT] = EXTEND32 (do_load_right (SD_, AccessLength_WORD, GPR[BASE], EXTEND16 (OFFSET), GPR[RT]));
 }
@@ -2471,18 +1604,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   GPR[RT] = do_load (SD_, AccessLength_WORD, GPR[BASE], EXTEND16 (OFFSET));
 }
@@ -2501,19 +1622,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_mfhi (SD_, RD);
 }
@@ -2533,19 +1642,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_mflo (SD_, RD);
 }
@@ -2556,15 +1653,6 @@
 "movn r<RD>, r<RS>, r<RT>"
 *mipsIV:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 {
   if (GPR[RT] != 0)
     GPR[RD] = GPR[RS];
@@ -2576,15 +1664,6 @@
 "movz r<RD>, r<RS>, r<RT>"
 *mipsIV:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 {
   if (GPR[RT] == 0)
     GPR[RD] = GPR[RS];
@@ -2597,19 +1676,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   check_mt_hilo (SD_, HIHISTORY);
   HI = GPR[RS];
@@ -2622,19 +1689,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   check_mt_hilo (SD_, LOHISTORY);
   LO = GPR[RS];
@@ -2660,27 +1715,16 @@
 "mult r<RS>, r<RT>"
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
 {
   do_mult (SD_, RS, RT, 0);
 }
 
 
 000000,5.RS,5.RT,5.RD,00000011000:SPECIAL:32::MULT
+"mult r<RS>, r<RT>":RD == 0
 "mult r<RD>, r<RS>, r<RT>"
 *vr5000:
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_mult (SD_, RS, RT, RD);
 }
@@ -2704,26 +1748,15 @@
 "multu r<RS>, r<RT>"
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
 {
-  do_multu (SD_, RS, RT, 0);
+  do_multu (SD_, RS, RT, RD);
 }
 
 000000,5.RS,5.RT,5.RD,00000011001:SPECIAL:32::MULTU
+"multu r<RS>, r<RT>":RD == 0
 "multu r<RD>, r<RS>, r<RT>"
 *vr5000:
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_multu (SD_, RS, RT, 0);
 }
@@ -2741,19 +1774,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_nor (SD_, RS, RT, RD);
 }
@@ -2771,19 +1792,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_or (SD_, RS, RT, RD);
 }
@@ -2802,19 +1811,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_ori (SD_, RS, RT, IMMEDIATE);
 }
@@ -2823,15 +1820,6 @@
 110011,5.RS,nnnnn,16.OFFSET:NORMAL:32::PREF
 *mipsIV:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 {
   unsigned32 instruction = instruction_0;
   signed_word offset = SIGNEXTEND((signed_word)((instruction >> 0) & 0x0000FFFF),16);
@@ -2861,7 +1849,9 @@
 
   vaddr = base + offset;
   if ((vaddr & access) != 0)
-    SignalExceptionAddressStore ();
+    {
+      SIM_CORE_SIGNAL (SD, STATE_CPU(SD, 0), cia, read_map, access+1, vaddr, write_transfer, sim_core_unaligned_signal);
+    }
   AddressTranslation (vaddr, isDATA, isSTORE, &paddr, &uncached, isTARGET, isREAL);
   paddr = ((paddr & ~mask) | ((paddr & mask) ^ reverseendian));
   byte = ((vaddr & mask) ^ bigendiancpu);
@@ -2875,19 +1865,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_store (SD_, AccessLength_BYTE, GPR[BASE], EXTEND16 (OFFSET), GPR[RT]);
 }
@@ -2900,18 +1878,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   signed_word offset = SIGNEXTEND((signed_word)((instruction >> 0) & 0x0000FFFF),16);
@@ -2922,7 +1888,9 @@
     address_word paddr;
     int uncached;
     if ((vaddr & 3) != 0)
-      SignalExceptionAddressStore();
+      {
+       SIM_CORE_SIGNAL (SD, CPU, cia, read_map, 4, vaddr, write_transfer, sim_core_unaligned_signal);
+      }
     else
       {
        if (AddressTranslation(vaddr,isDATA,isSTORE,&paddr,&uncached,isTARGET,isREAL))
@@ -2951,18 +1919,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   signed_word offset = SIGNEXTEND((signed_word)((instruction >> 0) & 0x0000FFFF),16);
@@ -2973,7 +1929,9 @@
     address_word paddr;
     int uncached;
     if ((vaddr & 7) != 0)
-      SignalExceptionAddressStore();
+      {
+       SIM_CORE_SIGNAL (SD, CPU, cia, read_map, 8, vaddr, write_transfer, sim_core_unaligned_signal);
+      }
     else
       {
        if (AddressTranslation(vaddr,isDATA,isSTORE,&paddr,&uncached,isTARGET,isREAL))
@@ -2998,18 +1956,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_store (SD_, AccessLength_DOUBLEWORD, GPR[BASE], EXTEND16 (OFFSET), GPR[RT]);
 }
@@ -3022,15 +1968,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_store (SD_, AccessLength_DOUBLEWORD, GPR[BASE], EXTEND16 (OFFSET), COP_SD (ZZ, RT));
 }
@@ -3042,18 +1979,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_store_left (SD_, AccessLength_DOUBLEWORD, GPR[BASE], EXTEND16 (OFFSET), GPR[RT]);
 }
@@ -3065,18 +1990,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_store_right (SD_, AccessLength_DOUBLEWORD, GPR[BASE], EXTEND16 (OFFSET), GPR[RT]);
 }
@@ -3087,19 +2000,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_store (SD_, AccessLength_HALFWORD, GPR[BASE], EXTEND16 (OFFSET), GPR[RT]);
 }
@@ -3118,19 +2019,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_sll (SD_, RT, RD, SHIFT);
 }
@@ -3150,19 +2039,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_sllv (SD_, RS, RT, RD);
 }
@@ -3180,19 +2057,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_slt (SD_, RS, RT, RD);
 }
@@ -3210,19 +2075,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_slti (SD_, RS, RT, IMMEDIATE);
 }
@@ -3240,19 +2093,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_sltiu (SD_, RS, RT, IMMEDIATE);
 }
@@ -3271,19 +2112,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_sltu (SD_, RS, RT, RD);
 }
@@ -3302,19 +2131,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_sra (SD_, RT, RD, SHIFT);
 }
@@ -3335,19 +2152,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_srav (SD_, RS, RT, RD);
 }
@@ -3367,19 +2172,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_srl (SD_, RT, RD, SHIFT);
 }
@@ -3399,19 +2192,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_srlv (SD_, RS, RT, RD);
 }
@@ -3422,19 +2203,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   TRACE_ALU_INPUT2 (GPR[RS], GPR[RT]);
   {
@@ -3458,19 +2227,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_subu (SD_, RS, RT, RD);
 }
@@ -3480,20 +2237,8 @@
 "sw r<RT>, <OFFSET>(r<BASE>)"
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 *r3900:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
 *vr5000:
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 {
   do_store (SD_, AccessLength_WORD, GPR[BASE], EXTEND16 (OFFSET), GPR[RT]);
 }
@@ -3504,16 +2249,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_store (SD_, AccessLength_WORD, GPR[BASE], EXTEND16 (OFFSET), COP_SW (ZZ, RT));
 }
@@ -3571,19 +2307,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_store_left (SD_, AccessLength_WORD, GPR[BASE], EXTEND16 (OFFSET), GPR[RT]);
 }
@@ -3615,19 +2339,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_store_right (SD_, AccessLength_WORD, GPR[BASE], EXTEND16 (OFFSET), GPR[RT]);
 }
@@ -3641,19 +2353,7 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   SyncOperation (STYPE);
 }
@@ -3664,19 +2364,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   SignalException(SystemCall, instruction_0);
 }
@@ -3689,18 +2377,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   if ((signed_word) GPR[RS] == (signed_word) GPR[RT])
     SignalException(Trap, instruction_0);
@@ -3714,18 +2390,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   if ((signed_word) GPR[RS] == (signed_word) EXTEND16 (IMMEDIATE))
     SignalException(Trap, instruction_0);
@@ -3739,18 +2403,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   if ((signed_word) GPR[RS] >= (signed_word) GPR[RT])
     SignalException(Trap, instruction_0);
@@ -3764,18 +2416,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   if ((signed_word) GPR[RS] >= (signed_word) EXTEND16 (IMMEDIATE))
     SignalException(Trap, instruction_0);
@@ -3789,18 +2429,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   if ((unsigned_word) GPR[RS] >= (unsigned_word) EXTEND16 (IMMEDIATE))
     SignalException(Trap, instruction_0);
@@ -3814,18 +2442,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   if ((unsigned_word) GPR[RS] >= (unsigned_word) GPR[RT])
     SignalException(Trap, instruction_0);
@@ -3839,18 +2455,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   if ((signed_word) GPR[RS] < (signed_word) GPR[RT])
     SignalException(Trap, instruction_0);
@@ -3864,18 +2468,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   if ((signed_word) GPR[RS] < (signed_word) EXTEND16 (IMMEDIATE))
     SignalException(Trap, instruction_0);
@@ -3889,18 +2481,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   if ((unsigned_word) GPR[RS] < (unsigned_word) EXTEND16 (IMMEDIATE))
     SignalException(Trap, instruction_0);
@@ -3914,18 +2494,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   if ((unsigned_word) GPR[RS] < (unsigned_word) GPR[RT])
     SignalException(Trap, instruction_0);
@@ -3939,18 +2507,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   if ((signed_word) GPR[RS] != (signed_word) GPR[RT])
     SignalException(Trap, instruction_0);
@@ -3964,18 +2520,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   if ((signed_word) GPR[RS] != (signed_word) EXTEND16 (IMMEDIATE))
     SignalException(Trap, instruction_0);
@@ -3994,19 +2538,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_xor (SD_, RS, RT, RD);
 }
@@ -4024,19 +2556,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_xori (SD_, RS, RT, IMMEDIATE);
 }
@@ -4117,16 +2637,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -4147,16 +2658,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -4178,13 +2680,9 @@
 // BC1T
 // BC1TL
 
-010001,01000,3.0,1.ND,1.TF,16.OFFSET:COP1S:32,f::BC1
+010001,01000,3.0,1.ND,1.TF,16.OFFSET:COP1S:32,f::BC1a
 "bc1%s<TF>%s<ND> <OFFSET>"
 *mipsI,mipsII,mipsIII:
-*vr4100:
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 {
   check_branch_bug ();
   TRACE_BRANCH_INPUT (PREVCOC1());
@@ -4206,21 +2704,13 @@
     }
 }
 
-010001,01000,3.CC,1.ND,1.TF,16.OFFSET:COP1S:32,f::BC1
+010001,01000,3.CC,1.ND,1.TF,16.OFFSET:COP1S:32,f::BC1b
 "bc1%s<TF>%s<ND> <OFFSET>":CC == 0
 "bc1%s<TF>%s<ND> <CC>, <OFFSET>"
 *mipsIV:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
+#*vr4100:
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   check_branch_bug ();
   if (GETFCC(CC) == TF)
@@ -4280,29 +2770,20 @@
     }
 }
 
-010001,10,3.FMT,5.FT,5.FS,3.0,00,11,4.COND:COP1:32::C.cond.fmt
-*mipsI,mipsII,mipsIII:
+010001,10,3.FMT,5.FT,5.FS,3.0,00,11,4.COND:COP1:32::C.cond.fmta
 "c.%s<COND>.%s<FMT> f<FS>, f<FT>"
+*mipsI,mipsII,mipsIII:
 {
   do_c_cond_fmt (SD_, FMT, FT, FS, 0, COND, instruction_0);
 }
 
-010001,10,3.FMT,5.FT,5.FS,3.CC,00,11,4.COND:COP1:32::C.cond.fmt
+010001,10,3.FMT,5.FT,5.FS,3.CC,00,11,4.COND:COP1:32::C.cond.fmtb
 "c.%s<COND>.%s<FMT> f<FS>, f<FT>":CC == 0
 "c.%s<COND>.%s<FMT> <CC>, f<FS>, f<FT>"
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_c_cond_fmt (SD_, FMT, FT, FS, CC, COND, instruction_0);
 }
@@ -4314,19 +2795,7 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -4347,19 +2816,7 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -4376,7 +2833,7 @@
 
 // CFC1
 // CTC1
-010001,00,X,10,5.RT,5.FS,00000000000:COP1S:32::CxC1
+010001,00,X,10,5.RT,5.FS,00000000000:COP1Sa:32::CxC1
 "c%s<X>c1 r<RT>, f<FS>"
 *mipsI:
 *mipsII:
@@ -4400,21 +2857,12 @@
       /* else NOP */
     }
 }
-010001,00,X,10,5.RT,5.FS,00000000000:COP1S:32::CxC1
+010001,00,X,10,5.RT,5.FS,00000000000:COP1Sb:32::CxC1
 "c%s<X>c1 r<RT>, f<FS>"
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   if (X)
     {
@@ -4463,16 +2911,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -4493,16 +2932,7 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -4525,16 +2955,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -4554,16 +2975,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -4583,16 +2995,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -4610,7 +3013,7 @@
 
 // DMFC1
 // DMTC1
-010001,00,X,01,5.RT,5.FS,00000000000:COP1S:64::DMxC1
+010001,00,X,01,5.RT,5.FS,00000000000:COP1Sa:64::DMxC1
 "dm%s<X>c1 r<RT>, f<FS>"
 *mipsIII:
 {
@@ -4634,24 +3037,12 @@
        PENDING_FILL(RT,SET64HI(0xDEADC0DE) | 0xBAD0BAD0);
     }
 }
-010001,00,X,01,5.RT,5.FS,00000000000:COP1S:64::DMxC1
+010001,00,X,01,5.RT,5.FS,00000000000:COP1Sb:64::DMxC1
 "dm%s<X>c1 r<RT>, f<FS>"
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   if (X)
     {
@@ -4678,19 +3069,7 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -4712,19 +3091,7 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -4746,16 +3113,7 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   COP_LD (1, FT, do_load (SD_, AccessLength_DOUBLEWORD, GPR[BASE], EXTEND16 (OFFSET)));
 }
@@ -4765,12 +3123,6 @@
 "ldxc1 f<FD>, r<INDEX>(r<BASE>)"
 *mipsIV:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 {
   COP_LD (1, FD, do_load (SD_, AccessLength_DOUBLEWORD, GPR[BASE], GPR[INDEX]));
 }
@@ -4782,19 +3134,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   COP_LW (1, FT, do_load (SD_, AccessLength_WORD, GPR[BASE], EXTEND16 (OFFSET)));
 }
@@ -4804,12 +3144,6 @@
 "lwxc1 f<FD>, r<INDEX>(r<BASE>)"
 *mipsIV:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 {
   COP_LW (1, FD, do_load (SD_, AccessLength_WORD, GPR[BASE], GPR[INDEX]));
 }
@@ -4823,12 +3157,6 @@
 "madd.d f<FD>, f<FR>, f<FS>, f<FT>"
 *mipsIV:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -4845,12 +3173,6 @@
 "madd.s f<FD>, f<FR>, f<FS>, f<FT>"
 *mipsIV:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -4865,7 +3187,7 @@
 
 // MFC1
 // MTC1
-010001,00,X,00,5.RT,5.FS,00000000000:COP1S:32::MxC1
+010001,00,X,00,5.RT,5.FS,00000000000:COP1Sa:32::MxC1
 "m%s<X>c1 r<RT>, f<FS>"
 *mipsI:
 *mipsII:
@@ -4881,22 +3203,14 @@
   else /*MFC1*/
     PENDING_FILL (RT, SIGNEXTEND(FGR[FS],32));
 }
-010001,00,X,00,5.RT,5.FS,00000000000:COP1S:32::MxC1
+010001,00,X,00,5.RT,5.FS,00000000000:COP1Sb:32::MxC1
 "m%s<X>c1 r<RT>, f<FS>"
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
+  int fs = FS;
   if (X)
     /*MTC1*/
     StoreFPR (FS, fmt_uninterpreted_32, VL4_8 (GPR[RT]));
@@ -4910,16 +3224,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -4936,15 +3241,6 @@
 "mov%s<TF> r<RD>, r<RS>, <CC>"
 *mipsIV:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 {
   if (GETFCC(CC) == TF)
     GPR[RD] = GPR[RS];
@@ -4956,15 +3252,6 @@
 "mov%s<TF>.%s<FMT> f<FD>, f<FS>, <CC>"
 *mipsIV:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 {
   unsigned32 instruction = instruction_0;
   int format = ((instruction >> 21) & 0x00000007);
@@ -4980,15 +3267,6 @@
 010001,10,3.FMT,5.RT,5.FS,5.FD,010011:COP1:32::MOVN.fmt
 *mipsIV:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -5011,15 +3289,6 @@
 "movz.%s<FMT> f<FD>, f<FS>, r<RT>"
 *mipsIV:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -5036,15 +3305,6 @@
 "msub.d f<FD>, f<FR>, f<FS>, f<FT>"
 *mipsIV:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -5062,15 +3322,6 @@
 "msub.s f<FD>, f<FR>, f<FS>, f<FT>"
 *mipsIV:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -5091,16 +3342,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -5121,16 +3363,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -5150,12 +3383,6 @@
 "nmadd.d f<FD>, f<FR>, f<FS>, f<FT>"
 *mipsIV:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -5173,12 +3400,6 @@
 "nmadd.s f<FD>, f<FR>, f<FS>, f<FT>"
 *mipsIV:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -5196,12 +3417,6 @@
 "nmsub.d f<FD>, f<FR>, f<FS>, f<FT>"
 *mipsIV:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -5219,12 +3434,6 @@
 "nmsub.s f<FD>, f<FR>, f<FS>, f<FT>"
 *mipsIV:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -5241,12 +3450,6 @@
 "prefx <HINT>, r<INDEX>(r<BASE>)"
 *mipsIV:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 {
   unsigned32 instruction = instruction_0;
   int fs = ((instruction >> 11) & 0x0000001F);
@@ -5265,12 +3468,6 @@
 *mipsIV:
 "recip.%s<FMT> f<FD>, f<FS>"
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -5291,19 +3488,7 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -5325,19 +3510,7 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -5356,12 +3529,6 @@
 *mipsIV:
 "rsqrt.%s<FMT> f<FD>, f<FS>"
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -5383,16 +3550,7 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   do_store (SD_, AccessLength_DOUBLEWORD, GPR[BASE], EXTEND16 (OFFSET), COP_SD (1, FT));
 }
@@ -5402,12 +3560,6 @@
 "ldxc1 f<FS>, r<INDEX>(r<BASE>)"
 *mipsIV:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 {
   do_store (SD_, AccessLength_DOUBLEWORD, GPR[BASE], GPR[INDEX], COP_SD (1, FS));
 }
@@ -5420,16 +3572,7 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -5449,16 +3592,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -5480,19 +3614,7 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   signed_word offset = EXTEND16 (OFFSET);
@@ -5503,7 +3625,9 @@
     address_word paddr;
     int uncached;
     if ((vaddr & 3) != 0)
-      SignalExceptionAddressStore();
+      {
+       SIM_CORE_SIGNAL (SD, CPU, cia, read_map, AccessLength_WORD+1, vaddr, write_transfer, sim_core_unaligned_signal);
+      }
     else
       {
        if (AddressTranslation(vaddr,isDATA,isSTORE,&paddr,&uncached,isTARGET,isREAL))
@@ -5528,12 +3652,6 @@
 "swxc1 f<FS>, r<INDEX>(r<BASE>)"
 *mipsIV:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 {
   unsigned32 instruction = instruction_0;
   int fs = ((instruction >> 11) & 0x0000001F);
@@ -5544,7 +3662,9 @@
    address_word paddr;
    int uncached;
    if ((vaddr & 3) != 0)
-    SignalExceptionAddressStore();
+     {
+       SIM_CORE_SIGNAL (SD, CPU, cia, read_map, 4, vaddr, write_transfer, sim_core_unaligned_signal);
+     }
    else
    {
     if (AddressTranslation(vaddr,isDATA,isSTORE,&paddr,&uncached,isTARGET,isREAL))
@@ -5571,19 +3691,7 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -5605,19 +3713,7 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   int destreg = ((instruction >> 6) & 0x0000001F);
@@ -5644,12 +3740,14 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
+
+010000,01000,00000,16.OFFSET:COP0:32::BC0F
+"bc0f <OFFSET>"
+// stub needed for eCos as tx39 hardware bug workaround
+*r3900:
+{
+  /* do nothing */
+}
 
 
 010000,01000,00010,16.OFFSET:COP0:32::BC0FL
@@ -5657,12 +3755,6 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 
 
 010000,01000,00001,16.OFFSET:COP0:32::BC0T
@@ -5676,12 +3768,6 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 
 
 101111,5.BASE,5.OP,16.OFFSET:NORMAL:32::CACHE
@@ -5689,16 +3775,7 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   unsigned32 instruction = instruction_0;
   signed_word offset = SIGNEXTEND((signed_word)((instruction >> 0) & 0x0000FFFF),16);
@@ -5719,12 +3796,22 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
+
+
+010000,00001,5.RT,5.RD,000,0000,0000:COP0:64::DMFC0
+"dmfc0 r<RT>, r<RD>"
+*mipsIII,mipsIV:
+{
+  DecodeCoproc (instruction_0);
+}
+
+
+010000,00101,5.RT,5.RD,000,0000,0000:COP0:64::DMTC0
+"dmtc0 r<RT>, r<RD>"
+*mipsIII,mipsIV:
+{
+  DecodeCoproc (instruction_0);
+}
 
 
 010000,10000,000000000000000,111000:COP0:32::EI
@@ -5732,12 +3819,6 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 
 
 010000,10000,000000000000000,011000:COP0:32::ERET
@@ -5746,15 +3827,6 @@
 *mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 {
   if (SR & status_ERL)
     {
@@ -5777,15 +3849,6 @@
 *r3900:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 {
   TRACE_ALU_INPUT0 ();
   DecodeCoproc (instruction_0);
@@ -5795,21 +3858,9 @@
 010000,00100,5.RT,5.RD,00000,6.REGX:COP0:32::MTC0
 "mtc0 r<RT>, r<RD> # <REGX>"
 *mipsI,mipsII,mipsIII,mipsIV:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 *r3900:
 *vr4100:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
 *vr5000:
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 {
   DecodeCoproc (instruction_0);
 }
@@ -5818,21 +3869,9 @@
 010000,10000,000000000000000,010000:COP0:32::RFE
 "rfe"
 *mipsI,mipsII,mipsIII,mipsIV:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 *r3900:
 *vr4100:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
 *vr5000:
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 {
   DecodeCoproc (instruction_0);
 }
@@ -5842,13 +3881,7 @@
 "cop<ZZ> <COP_FUN0><COP_FUN1><COP_FUN2>"
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
-// start-sanitize-r5900
-*r5900:
-// end-sanitize-r5900
 *r3900:
-// start-sanitize-tx19
-*tx19:
-// end-sanitize-tx19
 {
   DecodeCoproc (instruction_0);
 }
@@ -5860,12 +3893,6 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 
 
 010000,10000,000000000000000,000001:COP0:32::TLBR
@@ -5873,12 +3900,6 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 
 
 010000,10000,000000000000000,000010:COP0:32::TLBWI
@@ -5886,12 +3907,6 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 
 
 010000,10000,000000000000000,000110:COP0:32::TLBWR
@@ -5899,78 +3914,9 @@
 *mipsI,mipsII,mipsIII,mipsIV:
 *vr4100:
 *vr5000:
-// start-sanitize-vr4320
-*vr4320:
-// end-sanitize-vr4320
-// start-sanitize-cygnus
-*vr5400:
-// end-sanitize-cygnus
 
 \f
 :include:::m16.igen
-// start-sanitize-cygnus
-:include:64,f::mdmx.igen
-// end-sanitize-cygnus
-// start-sanitize-r5900
-:include::r5900:r5900.igen
-// end-sanitize-r5900
 :include:::tx.igen
 :include:::vr.igen
 \f
-// start-sanitize-cygnus-never
-
-// // FIXME FIXME FIXME What is this instruction?
-// 111011,5.RS,5.RT,16.OFFSET:NORMAL:32::<INT>
-// *mipsI:
-// *mipsII:
-// *mipsIII:
-// *mipsIV:
-// // start-sanitize-r5900
-// *r5900:
-// // end-sanitize-r5900
-// *r3900:
-// // start-sanitize-tx19
-// *tx19:
-// // end-sanitize-tx19
-// {
-//   unsigned32 instruction = instruction_0;
-//   signed_word offset = SIGNEXTEND((signed_word)((instruction >> 0) & 0x0000FFFF),16);
-//   signed_word op2 = GPR[((instruction >> 16) & 0x0000001F)];
-//   signed_word op1 = GPR[((instruction >> 21) & 0x0000001F)];
-//   {
-//     if (CoProcPresent(3))
-//       SignalException(CoProcessorUnusable);
-//     else
-//       SignalException(ReservedInstruction,instruction);
-//   }
-// }
-
-// end-sanitize-cygnus-never
-// start-sanitize-cygnus-never
-
-// // FIXME FIXME FIXME What is this?
-// 11100,******,00001:RR:16::SDBBP
-// *mips16:
-// {
-//   unsigned32 instruction = instruction_0;
-//   if (have_extendval)
-//     SignalException (ReservedInstruction, instruction);
-//   {
-//     SignalException(DebugBreakPoint,instruction);
-//   }
-// }
-
-// end-sanitize-cygnus-never
-// start-sanitize-cygnus-never
-
-// // FIXME FIXME FIXME What is this?
-// 000000,********************,001110:SPECIAL:32::SDBBP
-// *r3900:
-// {
-//   unsigned32 instruction = instruction_0;
-//   {
-//     SignalException(DebugBreakPoint,instruction);
-//   }
-// }
-
-// end-sanitize-cygnus-never