* config/sh/tm-sh.h (BELIEVE_PCC_PROMOTION): Define, so that

[thirdparty/binutils-gdb.git] / sim / mn10300 / ChangeLog

diff --git a/sim/mn10300/ChangeLog b/sim/mn10300/ChangeLog
index 4a63f19b94a3bbb2e62ec2e06bb326eb05522f09..c5a460b664d1b96ecb9079d9d1d859ad2f43beae 100644 (file)
--- a/sim/mn10300/ChangeLog
+++ b/sim/mn10300/ChangeLog
@@ -1,4 +1,133 @@
+Wed Aug 26 09:29:38 1998  Joyce Janczyn  <janczyn@cygnus.com>
+
+       * mn10300.igen (div,divu): Fix divide instructions so divide by 0
+       behaves like the hardware.
+
+Mon Aug 24 11:50:09 1998  Joyce Janczyn  <janczyn@cygnus.com>
+
+       * sim-main.h (SIM_HANDLES_LMA): Define SIM_HANDLES_LMA.
+
+start-sanitize-am33
+Wed Aug 12 12:36:07 1998  Jeffrey A Law  (law@cygnus.com)
+
+       * am33.igen: Handle case where first DSP operation modifies a 
+       register used in the second DSP operation correctly.
+
+Tue Jul 28 10:10:25 1998  Jeffrey A Law  (law@cygnus.com)
+
+       * am33.igen: Detect cases where two operands must not match for
+       DSP instructions too.
+
+Mon Jul 27 12:04:17 1998  Jeffrey A Law  (law@cygnus.com)
+
+       * am33.igen: Detect cases where two operands must not match in
+       non-DSP instructions.
+
+end-sanitize-am33
+Fri Jul 24 18:15:21 1998  Joyce Janczyn  <janczyn@cygnus.com>
+
+       * op_utils.c (do_syscall): Rewrite to use common/syscall.c.
+       (syscall_read_mem, syscall_write_mem): New functions for syscall
+       callbacks.
+       * mn10300_sim.h: Add prototypes for syscall_read_mem and
+       syscall_write_mem. 
+       * mn10300.igen: Change C++ style comments to C style comments.
+       Check for divide by zero in div and divu ops.
+
+start-sanitize-am33
+Fri Jul 24 12:49:28 1998  Jeffrey A Law  (law@cygnus.com)
+
+       * am33.igen (translate_xreg): New function.  Use it as needed.
+
+Thu Jul 23 10:05:28 1998  Jeffrey A Law  (law@cygnus.com)
+
+       * am33.igen: Add some missing instructions.
+
+       * am33.igen: Autoincrement loads/store fixes.
+
+Tue Jul 21 09:48:14 1998  Jeffrey A Law  (law@cygnus.com)
+
+       * am33.igen: Add mov_lCC DSP instructions.
+
+       * am33.igen: Add most am33 DSP instructions.
+
+end-sanitize-am33
+Thu Jul  9 10:06:55 1998  Jeffrey A Law  (law@cygnus.com)
+
+       * mn10300.igen: Fix Z bit for addc and subc instructions.
+       Minor fixes in multiply/divide patterns.
+
+start-sanitize-am33
+       * am33.igen: Add missing mul[u] imm32,Rn.  Fix condition code
+       handling for many instructions.  Fix sign extension for some
+       24bit immediates.
+
+       * am33.igen: Fix Z bit for remaining addc/subc instructions.
+       Do not sign extend immediate for mov imm,XRn.
+       More random mul, mac & div fixes.
+       Remove some unused variables.
+       Sign extend 24bit displacement in memory addresses.
+
+       * am33.igen: Fix Z bit for addc Rm,Rn and subc Rm,Rn.  Various
+       fixes to 2 register multiply, divide and mac instructions.  Set
+       Z,N correctly for sat16.  Sign extend 24 bit immediate for add,
+       and sub instructions.
+
+       * am33.igen: Add remaining non-DSP instructions.
+end-sanitize-am33
+
+start-sanitize-am33
+Wed Jul  8 16:29:12 1998  Jeffrey A Law  (law@cygnus.com)
+
+       * am33.igen (translate_rreg): New function.  Use it as appropriate.
+
+       * am33.igen: More am33 instructions.  Fix "div".
+
+Mon Jul  6 15:39:22 1998  Jeffrey A Law  (law@cygnus.com)
+
+       * mn10300.igen: Add am33 support.
+
+       * Makefile.in: Use multi-sim to support both a mn10300 and am33
+       simulator.
+
+       * am33.igen: Add many more am33 instructions.
+
+end-sanitize-am33
+Wed Jul  1 17:07:09 1998  Jeffrey A Law  (law@cygnus.com)
+
+       * mn10300_sim.h (FETCH24): Define.
+
+start-sanitize-am33
+       * mn10300_sim.h: Add defines for some registers found on the AM33.
+       * am33.igen: New file with some am33 support.
+end-sanitize-am33
+
+Tue Jun 30 11:23:20 1998  Jeffrey A Law  (law@cygnus.com)
+
+       * mn10300_sim.h: Include bfd.h
+       (struct state): Add more room for processor specific registers.
+start-sanitize-am33
+       (REG_E0): Define.
+end-sanitize-am33
+
 start-sanitize-am30
+Thu Jun 25 10:12:03 1998  Joyce Janczyn  <janczyn@cygnus.com>
+
+       * dv-mn103tim.c: Include sim-assert.h
+       * dv-mn103ser.c (do_polling_event): Check for incoming data on
+       serial line and schedule next polling event.
+       (read_status_reg): schedule events to check for incoming data on
+       serial line and issue interrupt if necessary.
+       
+Fri Jun 19 16:47:27 1998  Joyce Janczyn  <janczyn@cygnus.com>
+
+       * interp.c (sim_open): hook up serial 1 and 2 ports properly (typo).
+
+Fri Jun 19 11:59:26 1998  Joyce Janczyn  <janczyn@cygnus.com>
+
+       * interp.c (board): Rename am32 to stdeval1 as this is the name
+       consistently used to refer to the mn1030002 board.
+
 Thu June 18 14:37:14 1998  Joyce Janczyn  <janczyn@cygnus.com>
        * interp.c (sim_open): Fix typo in address of EXTMD register
        (0x34000280, not 0x3400280).