/* This file is part of the program GDB, the GNU debugger.
- Copyright (C) 1998-2017 Free Software Foundation, Inc.
+ Copyright (C) 1998-2024 Free Software Foundation, Inc.
Contributed by Cygnus Solutions.
This program is free software; you can redistribute it and/or modify
*/
+/* This must come before any other includes. */
+#include "defs.h"
+
#include "sim-main.h"
#include "hw-main.h"
#include "sim-assert.h"
TM6MDB,
TM6CA,
TM6CB,
- LAST_TIMER_REG = TM6BC,
+ LAST_TIMER_REG = TM6CB,
};
#define NR_TIMERS 7
typedef struct _mn10300_timer_regs {
- unsigned32 base;
- unsigned8 mode;
+ uint32_t base;
+ uint8_t mode;
} mn10300_timer_regs;
typedef struct _mn10300_timer {
- unsigned32 div_ratio, start;
+ uint32_t div_ratio, start;
struct hw_event *event;
} mn10300_timer;
mn10300_timer timer[NR_TIMERS];
/* treat timer 6 registers specially. */
- unsigned16 tm6md0, tm6md1, tm6bc, tm6ca, tm6cb;
- unsigned8 tm6mda, tm6mdb; /* compare/capture mode regs for timer 6 */
+ uint16_t tm6md0, tm6md1, tm6bc, tm6ca, tm6cb;
+ uint8_t tm6mda, tm6mdb; /* compare/capture mode regs for timer 6 */
};
/* output port ID's */
void *dest,
unsigned nr_bytes)
{
- unsigned16 val16;
- unsigned32 val32;
+ uint16_t val16;
+ uint32_t val32;
switch ( nr_bytes )
{
/* Accessing 1 byte is ok for all mode registers. */
if ( timer_nr == 6 )
{
- *(unsigned8*)dest = timers->tm6md0;
+ *(uint8_t*)dest = timers->tm6md0;
}
else
{
- *(unsigned8*)dest = timers->reg[timer_nr].mode;
+ *(uint8_t*)dest = timers->reg[timer_nr].mode;
}
break;
case 2:
if ( timer_nr == 6 )
{
- *(unsigned16 *)dest = (timers->tm6md0 << 8) | timers->tm6md1;
+ *(uint16_t *)dest = (timers->tm6md0 << 8) | timers->tm6md1;
}
else if ( timer_nr == 0 || timer_nr == 2 )
{
val16 = (timers->reg[timer_nr].mode << 8)
| timers->reg[timer_nr+1].mode;
- *(unsigned16*)dest = val16;
+ *(uint16_t*)dest = val16;
}
else
{
| (timers->reg[1].mode << 16)
| (timers->reg[2].mode << 8)
| timers->reg[3].mode;
- *(unsigned32*)dest = val32;
+ *(uint32_t*)dest = val32;
}
else
{
void *dest,
unsigned nr_bytes)
{
- unsigned16 val16;
- unsigned32 val32;
+ uint16_t val16;
+ uint32_t val32;
/* Check nr_bytes: accesses of 1, 2 and 4 bytes allowed depending on timer. */
switch ( nr_bytes )
/* Reading 1 byte is ok for all registers. */
if ( timer_nr < NR_8BIT_TIMERS )
{
- *(unsigned8*)dest = timers->reg[timer_nr].base;
+ *(uint8_t*)dest = timers->reg[timer_nr].base;
}
break;
{
val16 = timers->reg[timer_nr].base;
}
- *(unsigned16*)dest = val16;
+ *(uint16_t*)dest = val16;
}
break;
{
val32 = (timers->reg[0].base << 24) | (timers->reg[1].base << 16)
| (timers->reg[2].base << 8) | timers->reg[3].base;
- *(unsigned32*)dest = val32;
+ *(uint32_t*)dest = val32;
}
else if ( timer_nr == 4 )
{
val32 = (timers->reg[4].base << 16) | timers->reg[5].base;
- *(unsigned32*)dest = val32;
+ *(uint32_t*)dest = val32;
}
else
{
void *dest,
unsigned nr_bytes)
{
- unsigned32 val;
+ uint32_t val;
if ( NULL == timers->timer[timer_nr].event )
{
switch (nr_bytes) {
case 1:
- *(unsigned8 *)dest = val;
+ *(uint8_t *)dest = val;
break;
case 2:
- *(unsigned16 *)dest = val;
+ *(uint16_t *)dest = val;
break;
case 4:
- *(unsigned32 *)dest = val;
+ *(uint32_t *)dest = val;
break;
default:
void *dest,
unsigned nr_bytes)
{
- unsigned32 val;
-
switch (nr_bytes) {
case 1:
{
switch ( timer_nr ) {
case TM6MDA:
- *(unsigned8 *)dest = timers->tm6mda;
+ *(uint8_t *)dest = timers->tm6mda;
break;
case TM6MDB:
- *(unsigned8 *)dest = timers->tm6mdb;
+ *(uint8_t *)dest = timers->tm6mdb;
break;
case TM6CA:
- *(unsigned8 *)dest = timers->tm6ca;
+ *(uint8_t *)dest = timers->tm6ca;
break;
case TM6CB:
- *(unsigned8 *)dest = timers->tm6cb;
+ *(uint8_t *)dest = timers->tm6cb;
break;
default:
case 2:
if ( timer_nr == TM6CA )
{
- *(unsigned16 *)dest = timers->tm6ca;
+ *(uint16_t *)dest = timers->tm6ca;
}
else if ( timer_nr == TM6CB )
{
- *(unsigned16 *)dest = timers->tm6cb;
+ *(uint16_t *)dest = timers->tm6cb;
}
else
{
void *data)
{
struct mn103tim *timers = hw_data(me);
- long timer_nr = (long) data;
+ long timer_nr = (uintptr_t) data;
int next_timer;
/* Check if counting is still enabled. */
/* FIX: Check if div_ratio has changed and if it's now 0. */
timers->timer[timer_nr].event
= hw_event_queue_schedule (me, timers->timer[timer_nr].div_ratio,
- do_counter_event, (void *)timer_nr);
+ do_counter_event, (void *)(uintptr_t)timer_nr);
}
else
{
void *data)
{
struct mn103tim *timers = hw_data(me);
- long timer_nr = (long) data;
- int next_timer;
+ long timer_nr = (uintptr_t) data;
/* Check if counting is still enabled. */
if ( (timers->reg[timer_nr].mode & count_mask) != 0 )
/* FIX: Check if div_ratio has changed and if it's now 0. */
timers->timer[timer_nr].event
= hw_event_queue_schedule (me, timers->timer[timer_nr].div_ratio,
- do_counter6_event, (void *)timer_nr);
+ do_counter6_event, (void *)(uintptr_t)timer_nr);
}
else
{
const void *source,
unsigned nr_bytes)
{
- unsigned i;
- const unsigned8 *buf8 = source;
- const unsigned16 *buf16 = source;
+ const uint8_t *buf8 = source;
+ const uint16_t *buf16 = source;
/* If TMnCNE == 0 (counting is off), writing to the base register
(TMnBR) causes a simultaneous write to the counter reg (TMnBC).
/* for timers 0 to 5 */
{
unsigned i;
- unsigned8 mode_val, next_mode_val;
- unsigned32 div_ratio;
+ uint8_t mode_val, next_mode_val;
+ uint32_t div_ratio;
if ( nr_bytes != 1 )
{
timer_nr);
}
- mode_val = *(unsigned8 *)source;
+ mode_val = *(uint8_t *)source;
timers->reg[timer_nr].mode = mode_val;
if ( ( mode_val & count_and_load_mask ) == count_and_load_mask )
timers->timer[timer_nr].event
= hw_event_queue_schedule(me, div_ratio,
do_counter_event,
- (void *)(timer_nr));
+ (void *)(uintptr_t)timer_nr);
}
}
}
const void *source,
unsigned nr_bytes)
{
- unsigned8 mode_val0 = 0x00, mode_val1 = 0x00;
- unsigned32 div_ratio;
+ uint8_t mode_val0 = 0x00, mode_val1 = 0x00;
+ uint32_t div_ratio;
long timer_nr = 6;
unsigned_word offset = address - timers->block[0].base;
if ( offset == 0x84 ) /* address of TM6MD */
{
/* Fill in first byte of mode */
- mode_val0 = *(unsigned8 *)source;
+ mode_val0 = *(uint8_t *)source;
timers->tm6md0 = mode_val0;
if ( ( mode_val0 & 0x26 ) != 0 )
/* Fill in second byte of mode */
if ( nr_bytes == 2 )
{
- mode_val1 = *(unsigned8 *)source+1;
+ mode_val1 = *(uint8_t *)source+1;
}
else
{
- mode_val1 = *(unsigned8 *)source;
+ mode_val1 = *(uint8_t *)source;
}
timers->tm6md1 = mode_val1;
timers->timer[timer_nr].event
= hw_event_queue_schedule(me, div_ratio,
do_counter6_event,
- (void *)(timer_nr));
+ (void *)(uintptr_t)timer_nr);
}
}
else
const void *source,
unsigned nr_bytes)
{
- unsigned32 val;
-
switch (nr_bytes) {
case 1:
{
switch ( timer_nr ) {
case TM6MDA:
- timers->tm6mda = *(unsigned8 *)source;
+ timers->tm6mda = *(uint8_t *)source;
break;
case TM6MDB:
- timers->tm6mdb = *(unsigned8 *)source;
+ timers->tm6mdb = *(uint8_t *)source;
break;
case TM6CA:
- timers->tm6ca = *(unsigned8 *)source;
+ timers->tm6ca = *(uint8_t *)source;
break;
case TM6CB:
- timers->tm6cb = *(unsigned8 *)source;
+ timers->tm6cb = *(uint8_t *)source;
break;
default:
case 2:
if ( timer_nr == TM6CA )
{
- timers->tm6ca = *(unsigned16 *)source;
+ timers->tm6ca = *(uint16_t *)source;
}
else if ( timer_nr == TM6CB )
{
- timers->tm6cb = *(unsigned16 *)source;
+ timers->tm6cb = *(uint16_t *)source;
}
else
{
enum timer_register_types timer_reg;
HW_TRACE ((me, "write to 0x%08lx length %d with 0x%x", (long) base,
- (int) nr_bytes, *(unsigned32 *)source));
+ (int) nr_bytes, *(uint32_t *)source));
timer_reg = decode_addr (me, timers, base);
projects / thirdparty / binutils-gdb.git / blobdiff