+2015-12-15 Dominik Vogt <vogt@linux.vnet.ibm.com>
+
+ * simops.c (v850_bins): Fix left shift of negative value.
+
+2015-11-17 Mike Frysinger <vapier@gentoo.org>
+
+ * sim-main.h (WITH_CORE): Delete.
+
+2015-11-17 Mike Frysinger <vapier@gentoo.org>
+
+ * sim-main.h (WITH_MODULO_MEMORY): Delete.
+
+2015-11-15 Mike Frysinger <vapier@gentoo.org>
+
+ * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o.
+
+2015-11-14 Mike Frysinger <vapier@gentoo.org>
+
+ * interp.c (sim_close): Delete.
+
+2015-06-23 Mike Frysinger <vapier@gentoo.org>
+
+ * configure: Regenerate.
+
+2015-06-12 Mike Frysinger <vapier@gentoo.org>
+
+ * configure: Regenerate.
+
+2015-06-12 Mike Frysinger <vapier@gentoo.org>
+
+ * configure: Regenerate.
+
+2015-06-11 Mike Frysinger <vapier@gentoo.org>
+
+ * interp.c (INLINE): Delete define.
+
+2015-04-18 Mike Frysinger <vapier@gentoo.org>
+
+ * sim-main.h (SIM_CPU): Delete.
+
+2015-04-18 Mike Frysinger <vapier@gentoo.org>
+
+ * sim-main.h (sim_cia): Delete.
+
+2015-04-17 Mike Frysinger <vapier@gentoo.org>
+
+ * sim-main.h (CIA_GET, CIA_SET): Delete.
+
+2015-04-15 Mike Frysinger <vapier@gentoo.org>
+
+ * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
+ * sim-main.h (STATE_CPU): Delete.
+
+2015-04-13 Mike Frysinger <vapier@gentoo.org>
+
+ * configure: Regenerate.
+
+2015-04-13 Mike Frysinger <vapier@gentoo.org>
+
+ * Makefile.in (SIM_OBJS): Add sim-cpu.o.
+ * interp.c (v850_pc_get, v850_pc_set): New functions.
+ (sim_open): Declare new local var i. Call sim_cpu_alloc_all.
+ Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
+ (sim_pc_get): Delete.
+ * sim-main.h (SIM_CPU): Define.
+ (struct sim_state): Change cpu to an array of pointers.
+ (STATE_CPU): Drop &.
+
+2015-04-06 Mike Frysinger <vapier@gentoo.org>
+
+ * Makefile.in (SIM_OBJS): Delete sim-engine.o and sim-hrw.o.
+
+2015-03-31 Mike Frysinger <vapier@gentoo.org>
+
+ * config.in, configure: Regenerate.
+
+2015-03-24 Mike Frysinger <vapier@gentoo.org>
+
+ * interp.c (sim_pc_get): New function.
+
+2015-03-16 Mike Frysinger <vapier@gentoo.org>
+
+ * config.in, configure: Regenerate.
+
+2015-03-14 Mike Frysinger <vapier@gentoo.org>
+
+ * Makefile.in (SIM_RUN_OBJS): Delete.
+
+2015-03-14 Mike Frysinger <vapier@gentoo.org>
+
+ * configure.ac (AC_CHECK_HEADERS): Delete unistd.h & stdlib.h &
+ string.h & strings.h & time.h.
+ * aclocal.m4, configure: Regenerate.
+
+2015-02-27 Nick Clifton <nickc@redhat.com>
+
+ * sim-main.h (reg64_t): New type.
+ (v850_regs): Add selID_sregs field.
+ (VR, SAT16, SAT32, ABS16, ABS32 ): New macros.
+ * v850-dc: Add fields for v850e3v5 instructions.
+ * v850.igen (cvtf.dl): Use correctly signed local value.
+ (cvtf.dw, cvtf.sw, trncf.dul, trncf.dl, trncf.sul, trncf.sw):
+ Likewise.
+ * interp.c: Fix old style function declarations.
+ * simops.c: Likewise.
+
+2015-02-24 Nick Clifton <nickc@redhat.com>
+
+ * v850.igen: Add more e3v5 support.
+ (FMAF.S): New pattern.
+ (FMSF.S): New pattern.
+ (FNMAF.S): New pattern.
+ (FNMSF.S): New pattern.
+ (cnvq15q30): New pattern.
+ (cnvq30q15): New pattern.
+ (cnvq31q62): New pattern.
+ (cnvq62q31): New pattern.
+ (dup.h): New pattern.
+ (dup.w): New pattern.
+ (expq31): New pattern.
+ (modadd): New pattern.
+ (mov.dw): New pattern.
+ (mov.h): New pattern.
+ (mov.w): New pattern.
+ (pki16i32): New pattern.
+ (pki16ui8): New pattern.
+ (pki32i16): New pattern.
+ (pki64i32): New pattern.
+ (pkq15q31): New pattern.
+ (pkq30q31): New pattern.
+ (pkq31q15): New pattern.
+ (pkui8i16): New pattern.
+ (vabs.h): New pattern.
+ (vabs.w): New pattern.
+ (vadd.dw): New placeholder pattern.
+ (vadd.h): New placeholder pattern.
+ (vadd.w): New placeholder pattern.
+ (vadds.h): New placeholder pattern.
+ (vadds.w): New placeholder pattern.
+ (vaddsat.h): New placeholder pattern.
+ (vaddsat.w): New placeholder pattern.
+ (vand): New pattern.
+ (vbiq.h): New placeholder pattern.
+ (vbswap.dw): New placeholder pattern.
+ (vbswap.h): New placeholder pattern.
+ (vbswap.w): New placeholder pattern.
+ (vcalc.h): New placeholder pattern.
+ (vcalc.w): New placeholder pattern.
+ (vcmov): New placeholder pattern.
+
+2014-08-19 Alan Modra <amodra@gmail.com>
+
+ * configure: Regenerate.
+
+2014-08-15 Roland McGrath <mcgrathr@google.com>
+
+ * configure: Regenerate.
+ * config.in: Regenerate.
+
+2014-03-04 Mike Frysinger <vapier@gentoo.org>
+
+ * configure: Regenerate.
+
+2013-09-23 Alan Modra <amodra@gmail.com>
+
+ * configure: Regenerate.
+
+2013-06-03 Mike Frysinger <vapier@gentoo.org>
+
+ * aclocal.m4, configure: Regenerate.
+
+2013-05-13 Nick Clifton <nickc@redhat.com>
+
+ * v850.igen (LDSR): Accept but ignore a selID parameter.
+
+2013-05-10 Freddie Chopin <freddie_chopin@op.pl>
+
+ * configure: Rebuild.
+
+2013-01-28 Nick Clifton <nickc@redhat.com>
+
+ * simops.c (v850_rotl): New function.
+ (v850_bins): New function.
+ * simops.h: Add prototypes fir v850_rotl and v850_bins.
+ * v850-dc: Add entries for V850e3v5.
+ * v850.igen: Add support for v850e3v5.
+ (ld.dw, st.dw, rotl, bins): New patterns.
+
+2013-01-10 Nick Clifton <nickc@redhat.com>
+
+ * interp.c (sim_open): Add support for bfd_arch_v850_rh850
+ architecture type. Add support for bfd_mach_v850e2 and
+ bfd_mach_v850e2v3 machine numbers.
+ * v850.igen (dbtrap): Add support for SIM_OPEN_DEBUG.
+ (cmpf.d): Correct order of operands.
+ (cmpf.s): Likewise.
+ (trncf.dul): New pattern.
+ (trncf.duw): New pattern.
+ (trncf.sul): New pattern.
+ (trncf.suw): New pattern.
+ * v850-dc: Correct bitfield selection for TRNCF.SW and CVTF.SW.
+
+2012-09-13 Nick Clifton <nickc@redhat.com>
+
+ * v850.igen (W,WWWW): Correct computation of register number.
+ (JR32): Remove unnecessary comma.
+ (cmovf.s): Register 0 is an invalid source register.
+ (maddf.s): Remove bogus intermediary rounding.
+ (nmaddf.s): Likewise.
+ (trncf.sl): Remove bogus initial rounding.
+ (trncf.dw): Likewise.
+ (trncf.sl): Likewise.
+ (trncf.sw): Likewise.
+
+2012-06-15 Joel Brobecker <brobecker@adacore.com>
+
+ * config.in, configure: Regenerate.
+
+2012-03-28 Rathish C <rathish.c@kpitcummins.com>
+
+ * sim-main.h (struct _v850_regs): Add new fields mpu0_sregs,
+ mpu1_sregs, and fpu_sregs.
+ (MPU0_SR, MPU1_SR, FPU_SR): New macros for accessing new fields
+ in _v850_regs struct.
+ (SP_REGNO): Define.
+ (SP): Redefine using SP_REGNO.
+ (PSW_REGNO, EIIC, FEIC, DBIC, DIR, EIWR, FEWR, DBWR, BSEL, PSW_NPV)
+ (PSW_DMP, PSW_IMP, ECR_EICC, ECR_FECC, FPSR, FPSR_REGNO, FPEPC)
+ (FPST, FPST_REGNO, FPCC, FPCFG, FPCFG_REGNO, FPSR_DEM, FPSR_SEM)
+ (FPSR_RM, FPSR_RN, FPSR_FS, FPSR_PR, FPSR_XC, FPSR_XCE, FPSR_XCV)
+ (FPSR_XCZ, FPSR_XCO, FPSR_XCU, FPSR_XCI, FPSR_XE, FPSR_XEV)
+ (FPSR_XEZ, FPSR_XEO, FPSR_XEU, FPSR_XEI, FPSR_XP, FPSR_XPV)
+ (FPSR_XPZ, FPSR_XPO, FPSR_XPU, FPSR_XPI, FPST_PR, FPST_XCE)
+ (FPST_XCV, FPST_XCZ, FPST_XCO, FPST_XCU, FPST_XCI, FPST_XPV)
+ (FPST_XPZ, FPST_XPO, FPST_XPU, FPST_XPI, FPCFG_RM, FPCFG_XEV)
+ (FPCFG_XEZ, FPCFG_XEO, FPCFG_XEU, FPCFG_XEI, GET_FPCC, CLEAR_FPCC)
+ (SET_FPCC, TEST_FPCC, FPSR_GET_ROUND, MPM, MPC, MPC_REGNO, TID)
+ (PPA, PPM, PPC, DCC, DCV0, DCV1, SPAL, SPAU, IPA0L, IPA0U, IPA1L)
+ (IPA1U, IPA2L, IPA2U, IPA3L, IPA3U, DPA0L, DPA0U, DPA1L, DPA1U)
+ (DPA2L, DPA2U, DPA3L, DPA3U, PPC_PPE, SPAL_SPE, SPAL_SPS, VIP)
+ (VMECR, VMTID, VMADR, VPECR, VPTID, VPADR, VDECR, VDTID, MPM_AUE)
+ (MPM_MPE, VMECR_VMX, VMECR_VMR, VMECR_VMW, VMECR_VMS, VMECR_VMRMW)
+ (VMECR_VMMS, IPA2ADDR, IPA_IPE, IPA_IPX, IPA_IPR, IPE0, IPE1, IPE2)
+ (IPE3, IPX0, IPX1, IPX2, IPX3, IPR0, IPR1, IPR2, IPR3, DPA2ADDR)
+ (DPA_DPE, DPA_DPR, DPA_DPW, DPE0, DPE1, DPE2, DPE3, DPR0, DPR1)
+ (DPR2, DPR3, DPW0, DPW1, DPW2, DPW3, DCC_DCE0, DCC_DCE1, PPA2ADDR)
+ (PPC_PPC, PPC_PPE, PPC_PPM): New macros.
+ (FPU_COMPARE): New enum.
+ (TRACE_FP_INPUT_FPU1, TRACE_FP_INPUT_FPU2, TRACE_FP_INPUT_FPU3)
+ (TRACE_FP_INPUT_BOOL1_FPU2, TRACE_FP_INPUT_WORD2)
+ (TRACE_FP_RESULT_WORD1, TRACE_FP_RESULT_WORD2): New macros.
+ * simops.c (Add32): Update prototype.
+ (update_fpsr): New function.
+ (SignalException): New function.
+ (SignalExceptionFPE): New function.
+ (check_invalid_snan): New function.
+ (v850_float_compare): New function.
+ (v850_div): New function.
+ (v850_divu): New function.
+ (v850_sar): New function.
+ (v850_shl): New function.
+ (v850_shr): New function.
+ (v850_satadd): New function.
+ (v850_satsub): New function.
+ (load_data_mem): New function.
+ (store_data_mem): New function.
+ (mpu_load_mem_test): New function.
+ (mpu_store_mem_test): New function.
+ * simops.h: Add function prototype for above mentioned functions.
+ (check_cvt_fi, check_cvt_if, check_cvt_ff): Define.
+ * v850-dc: Add entry for v850e2 and v850e2v3.
+ * v850.igen: Add support for v850e2 and v850e2v3.
+
+2012-03-24 Mike Frysinger <vapier@gentoo.org>
+
+ * aclocal.m4, config.in, configure: Regenerate.
+
+2011-12-03 Mike Frysinger <vapier@gentoo.org>
+
+ * aclocal.m4: New file.
+ * configure: Regenerate.
+
+2011-10-17 Mike Frysinger <vapier@gentoo.org>
+
+ * configure.ac: Change include to common/acinclude.m4.
+
+2011-10-17 Mike Frysinger <vapier@gentoo.org>
+
+ * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
+ call. Replace common.m4 include with SIM_AC_COMMON.
+ * configure: Regenerate.
+
+2011-07-05 Mike Frysinger <vapier@gentoo.org>
+
+ * interp.c (sim_do_command): Delete.
+
+2011-03-21 Kevin Buettner <kevinb@redhat.com>
+
+ * simops (OP_10007E0): Update errno handling as most traps
+ do not invoke the host's functionality directly. Invoke
+ sim_io_stat() instead of stat() for implementing TARGET_SYS_stat.
+ Implement TARGET_SYS_fstat, TARGET_SYS_rename, and TARGET_SYS_unlink.
+
+2011-02-14 Mike Frysinger <vapier@gentoo.org>
+
+ * simops.c (OP_10007E0): Change zfree to free.
+
+2011-01-11 Andrew Burgess <aburgess@broadcom.com>
+
+ * interp.c (sim_store_register): Update return value to
+ match new API.
+
+2010-03-30 Mike Frysinger <vapier@gentoo.org>
+
+ * interp.c (interrupt_names): Add const to pointer type.
+ (do_interrupt): Add const to interrupt_name.
+
+2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
+
+ * configure: Regenerate.
+
+2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
+
+ * config.in: Regenerate.
+ * configure: Likewise.
+
+ * configure: Regenerate.
+
+2008-07-11 Hans-Peter Nilsson <hp@axis.com>
+
+ * configure: Regenerate to track ../common/common.m4 changes.
+ * config.in: Ditto.
+
+2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
+ Daniel Jacobowitz <dan@codesourcery.com>
+ Joseph Myers <joseph@codesourcery.com>
+
+ * configure: Regenerate.
+
+2008-02-05 DJ Delorie <dj@redhat.com>
+
+ * simops.c (OP_1C007E0): Compensate for 64 bit hosts.
+ (OP_18007E0): Likewise.
+ (OP_2C007E0): Likewise.
+ (OP_28007E0): Likewise.
+ * v850.igen (divh): Likewise.
+
+ * simops.c (OP_C0): Correct saturation logic.
+ (OP_220): Likewise.
+ (OP_A0): Likewise.
+ (OP_660): Likewise.
+ (OP_80): Likewise.
+
+ * simops.c (OP_2A0): If the shift count is zero, clear the
+ carry.
+ (OP_A007E0): Likewise.
+ (OP_2C0): Likewise.
+ (OP_C007E0): Likewise.
+ (OP_280): Likewise.
+ (OP_8007E0): Likewise.
+
+ * simops.c (OP_2C207E0): Correct PSW flags for special divu
+ conditions.
+ (OP_2C007E0): Likewise, for div.
+ (OP_28207E0): Likewise, for divhu.
+ (OP_28007E0): Likewise, for divh. Also, sign-extend the correct
+ operand.
+ * v850.igen (divh): Likewise, for 2-op divh.
+
+ * v850.igen (bsh): Fix carry logic.
+
+2007-02-20 Daniel Jacobowitz <dan@codesourcery.com>
+
+ * Makefile.in (interp.o): Uncomment and update.
+
+2006-12-21 Hans-Peter Nilsson <hp@axis.com>
+
+ * acconfig.h: Remove.
+ * config.in: Regenerate.
+
+2006-06-13 Richard Earnshaw <rearnsha@arm.com>
+
+ * configure: Regenerated.
+
+2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
+
+ * configure: Regenerated.
+
+2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
+
+ * configure: Regenerated.
+
+2005-03-23 Mark Kettenis <kettenis@gnu.org>
+
+ * configure: Regenerate.
+
+2005-01-14 Andrew Cagney <cagney@gnu.org>
+
+ * configure.ac: Sinclude aclocal.m4 before common.m4. Add
+ explicit call to AC_CONFIG_HEADER.
+ * configure: Regenerate.
+
+2005-01-12 Andrew Cagney <cagney@gnu.org>
+
+ * configure.ac: Update to use ../common/common.m4.
+ * configure: Re-generate.
+
+2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+2005-01-07 Andrew Cagney <cagney@gnu.org>
+
+ * configure.ac: Rename configure.in, require autoconf 2.59.
+ * configure: Re-generate.
+
+2004-12-08 Hans-Peter Nilsson <hp@axis.com>
+
+ * configure: Regenerate for ../common/aclocal.m4 update.
+
+2004-01-18 Mark Kettenis <kettenis@gnu.org>
+
+ * simops.c: Include <sys/types.h>.
+
+2003-09-05 Andrew Cagney <cagney@redhat.com>
+ Nick Clifton <nickc@redhat.com>
+
+ * interp.c (sim_open): Accept bfd_mach_v850e1.
+ * v850-dc: Add entry for v850e1.
+ * v850.igen: Add support for v850e1.
+ Add code for DBTRAP and DBRET instructions.
+ (dbtrap): Create a separate v850e1 specific instruction.
+ Only generate a trap if the target is not the v850e1.
+ Otherwise treat it as a special kind of branch.
+ (break): Mark as v850/v850e specific.
+
+2003-05-16 Ian Lance Taylor <ian@airs.com>
+
+ * Makefile.in (SHELL): Make sure this is defined.
+ (tmp-igen): Use $(SHELL) whenever we invoke move-if-change.
+
+2003-04-06 Nick Clifton <nickc@redhat.com>
+
+ * simops.c (OP_40): Delete. Move code to...
+ * v850-igen.c (): ...Here. Sign extend the first operand.
+ * simops.h (OP_40): Remove prototype.
+
+2003-02-27 Andrew Cagney <cagney@redhat.com>
+
+ * interp.c (sim_open, sim_create_inferior): Rename _bfd to bfd.
+
+2002-11-30 Andrew Cagney <cagney@redhat.com>
+
+ * simops.c: Use int, 1, 0 instead of boolean, true and false.
+ * sim-main.h: Ditto.
+
+2002-09-27 Jim Wilson <wilson@redhat.com>
+
+ * simops.c (OP_E6077E0): And op1 with 7 after reading register, not
+ before.
+ (BIT_CHANGE_OP): Likewise.
+
+2002-09-26 Jim Wilson <wilson@redhat.com>
+
+ * simops (OP_10007E0): Don't subtract 4 from PC.
+
+2002-09-19 Nick Clifton <nickc@redhat.com>
+
+ * interp.c (sim_open): Remove reference to v850ea.
+ (sim_create_inferior): Likewise.
+ * v850-dc: Likewise.
+ * v850.igen: Remove all references to v850ea, including v850ea
+ specific instructions.
+
+2002-08-29 Nick Clifton <nickc@redhat.com>
+
+ From 2001-08-23 Catherine Moore <clm@redhat.com>
+
+ * Makefile.in: Add gen-zero-r0 option.
+ * sim-main.h (GPR_SET, GPR_CLEAR): Define.
+ * simops.c (OP_24007E0): Sign extend the imm9
+ operand of a mul instruction.
+
2002-06-17 Andrew Cagney <cagney@redhat.com>
* simops.c (trace_result): Fix printf formatting.
(simops.h): New file.
($(BUILT_SRC_FROM_IGEN)): Do not depend on simops.h.
* gencode.c: Delete file.
-
+
2001-04-15 J.T. Conklin <jtc@redback.com>
* Makefile.in (simops.o): Add simops.h to dependency list.
1999-05-08 Felix Lee <flee@cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
-
+
Tue Dec 1 17:25:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
* Makefile.in (NL_TARGET): Define as -DNL_TARGET_v850.
Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
- * configure: Regenerated to track ../common/aclocal.m4 changes.
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
* sim-main.h (trace_module): Change variable decl to integer type.
(TRACE_BRANCH*, TRACE_LD, TRACE_ST): Update.
-
+
Tue Feb 17 12:51:18 1998 Andrew Cagney <cagney@b1.cygnus.com>
* interp.c (sim_store_register, sim_fetch_register): Pass in
* v850.igen (BREAK), simops.c (OP_12007E0): Rename SIGTRAP to
SIM_SIGTRAP.
(illegal): Rename SIGILL to SIM_SIGILL.
-
+
* sim-main.h, simops.c, interp.c: Do not include signal.h.
* sim-main.h: Include sim-signal.h instead of signal.h.
* sim-main.h: delete null override of SIM_ENGINE_HALT_HOOK and
SIM_ENGINE_RESTART_HOOK.
-
+
Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
* Makefile.in (SIM_WARNINGS, SIM_ALIGNMENT, SIM_ENDIAN,
SIM_HOSTENDIAN, SIM_RESERVED_BITS): Delete, moved to common.
(SIM_EXTRA_CFLAGS): Update.
-
+
Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
* configure: Regenerated to track ../common/aclocal.m4 changes.
Wed Sep 17 16:21:08 1997 Andrew Cagney <cagney@b1.cygnus.com>
* simops.c: Move "mov", "reti", to v850.igen, fix tracing.
-
+
* interp.c (hash): Delete.
* v850.igen (nop): Really do nothing.
(trace_module): Global, save component/module name across insn.
* simops.c: Move "bsh" to v850.igen, fix.
-
+
* v850.igen (callt): Load correct number of bytes. Fix tracing.
(stsr, ldsr): Correct src, dest fields. Fix tracing.
(ctret): Force alignment. Fix tracing.
-
+
Tue Sep 16 22:14:01 1997 Andrew Cagney <cagney@b1.cygnus.com>
* simops.c (trace_output): Add result argument.
(trace_values, trace_name, trace_pc, trace_num_values): Make
global.
(GR, SR): Define.
-
+
v850.insn (movea, stsr): Use.
(sxb, sxh, zxb, zxh): Ditto.
-
+
Tue Sep 16 21:14:01 1997 Andrew Cagney <cagney@b1.cygnus.com>
* simops.c: Move "movea" from here.
* v850.igen (simm16): Define, sign extend imm16.
(uimm16): Define, no sign extension.
(addi, andi, movea, movhi, mulhi, ori, satsubi, xori): Use.
-
+
* simops.c: Move "sxh", "switch", "sxb", "callt", "dispose",
"mov32" from here.
* v850.igen: To here.
(switch): Fix off by two error in NIA calc.
-
+
Tue Sep 16 15:14:01 1997 Andrew Cagney <cagney@b1.cygnus.com>
* simops.c (trace_pc, trace_name, trace_values, trace_num_values):
(trace_output): Write trace values to a buffer. Use
trace_one_insn to print trace info and buffer.
(SIZE_OPERANDS, SIZE_LOCATION): Delete.
-
+
Tue Sep 16 09:02:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
* sim-main.h (struct _sim_cpu): Add psw_mask so that reserved bits
instructions from here.
* v850.igen (ldsr, stsr): To here. Mask out reserved bits when
setting PSW.
-
+
* interp.c (sim_open): Set psw_mask if machine known.
Tue Sep 16 10:20:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
* simops.c (OP_300, OP_400, OP_70): Make behavour depend on PSW[US].
-
+
* simops.c: Move "divun", "sld.bu", "divhn", "divhun", "divn",
"divun", "pushml" code from here to v850.igen.
(divun): Make global.
(type3_regs): Make global
-
+
* v850.igen: Move simops.c code to here.
* interp.c (sim_create_inferior): For v850eq set US bit by
* v850.igen (prepare, ...): Add to v850eq architecture.
* interp.c (sim_open): Default to v850eq.
-
+
* interp.c (sim_open): Default to v850e.
* sim-main.h (signal.h): Include.
* interp.c (sim_open): Use sim_do_commandf instead of asprintf.
- * sim-main.h (INSN_NAME):
+ * sim-main.h (INSN_NAME):
* Makefile.in (INCLUDE): Add SIM_EXTRA_DEPS.
(SIM_EXTRA_DEPS): Add itable.h
(SEXT32): Delete, used?
(SEXT40, SEXT44, SEXT64): Use UNSIGNED64 for constants, not ...LL.
(WITH_TARGET_WORD_MSB): Define as 31. v850 little bit endian.
-
+
* simops.c: Use EXTEND15 from sim-bits instead of SEXT16.
* sim-main.h (DEBUG_TRACE, DEBUG_VALUES, v850_debug): Delete,
* sim-main.h (WITH_WATCHPOINTS): Define.
(WITH_MODULO_MEMORY): Define
-
+
* Makefile.in (SIM_OBJS): Add sim-resume, sim-watch, sim-stop,
sim-reason.
* sim-main.h: Replace SIM_HAVE_FLATMEM with mem ptr.
* interp.c (map): Do not add to a void pointer.
-
+
* Makefile.in (INCLUDE): Add sim-main.h
* configure.in: Check for time.h
(AC_CHECK_FUNCS): Add utime.
(AC_CHECK_HEADERS): Add stdlib.h, string.h, strings.h, utime.h
configure: Regenerate.
-
+
* Makefile.in (SIM_RUN_OBJS): Use nrun.o.
(SIM_OBJS): Add sim-io.o, sim-hload.o, sim-utils.o, sim-options.o,
* gencode.c (write_template): Generate #include sim-main.h.
(write_opcodes): Ditto.
-
+
* interp.c (prog_bfd, prog_bfd_was_opened_p): Delete.
(v850_callback): Ditto.
(sim_kind, myname): Ditto.
(sim_set_callbacks): Delete.
(sim_set_interrupt): Pass in SD, use.
(start_time): Delete.
-
+
* v850_sim.h: Remove everything except `struct simops' from here.
* sim-main.h: Move most to here.
* gencode.c: Move #includes to here.
* configure.in: Check for time, chmod.
* configure: Regenerate.
* simops.c (SYS_time, SYS_chmod): Use HAVE_TIME, HAVE_CHMOD.
-
+
* simops.c (../../libgloss/v850/sys/syscall.h): Include instead of
sys/syscall.h.
(OP_10007E0): Check the existance each SYS_* macro independantly.
* simops.c (bsh): Only set CY flag if either of the bottom
bytes is zero.
-
+
* simops.c (prepare, dispose): Lower numbered
registers go to higher numbered address.
* simops.c (unsigned divide instructions): S bit set if result has
top bit set.
-
+
* simops.c (pushml, pushmh, popml, popmh): Lower numbered
registers go to higher numbered address.
-
+
Wed Aug 20 13:56:35 1997 Nick Clifton <nickc@cygnus.com>
* simops.c (OP_107E0, OP_107F0, OP_307E0, OP_307F0): Use correct
* interp.c (sim_resume): Opcode functions return amount to be
added to PC and all opcodes take a standard format in the OP[]
array.
-
+
(do_format_*): Functions removed.
* v850_sim.h (SP, EP): New register mnemonics.
-
+
* gencode.c (write_header): Functions prototypes return an
integer.
* simops.c: Opcode functions return amount to be added to PC.
-
+
* v850_sim.h (CTPC, CTPSW, CTBP): New register mnemonics.
-
+
* simops.c: Add support for v850e instructions.
-
+
* simops.c: Add support for v850eq instructions.
-
+
Tue May 20 10:24:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
* interp.c (sim_open): Add callback argument.
* interp.c: Add support for variable-size allocation of memory,
via simulator command "sim memory-map".
(map): Issue SIGSEGV for references to invalid memory regions.
-
+
Thu Oct 31 14:44:10 1996 Gavin Koch <gavin@cygnus.com>
-
- * simops.c: Include <sys/time.h> for struct timeval and
- struct timezone.
-
+
+ * simops.c: Include <sys/time.h> for struct timeval and
+ struct timezone.
+
Wed Oct 30 08:49:10 1996 Jeffrey A Law (law@cygnus.com)
* simops.c (OP_10007E0): Handle SYS_times and SYS_gettimeofday.
* (sim_size): MEM_SIZE is now bytes, not shift factor.
Tue Oct 1 15:53:24 1996 Gavin Koch <gavin@cygnus.com>
-
- * simops.c (trace_input): Swapped order of operands for output
- output of OP_IMM_REG. Changed the fetching of the operands for
- OP_LOAD32, and OP_STORE32 to work like op-function.
-
+
+ * simops.c (trace_input): Swapped order of operands for output
+ output of OP_IMM_REG. Changed the fetching of the operands for
+ OP_LOAD32, and OP_STORE32 to work like op-function.
+
Mon Sep 30 15:46:33 1996 Stu Grossman (grossman@critters.cygnus.com)
* interp.c: Move includes of remote-sim.h and callback.h to
Fri Sep 27 17:42:37 1996 Jeffrey A Law (law@cygnus.com)
- * simops.c (trace_input): Fix thinko.
+ * simops.c (trace_input): Fix thinko.
Wed Sep 18 09:54:12 1996 Michael Meissner <meissner@tiktok.cygnus.com>
Wed Aug 28 13:53:22 1996 Jeffrey A Law (law@cygnus.com)
- * ChangeLog, Makefile.in, configure, configure.in, v850_sim.h,
+ * ChangeLog, Makefile.in, configure, configure.in, v850_sim.h,
gencode.c, interp.c, simops.c: Created.
projects / thirdparty / binutils-gdb.git / blobdiff