]> git.ipfire.org Git - people/pmueller/ipfire-2.x.git/blobdiff - src/patches/suse-2.6.27.31/patches.drivers/e1000e_add_ICH9_BM.patch
Reenabled linux-xen, added patches for Xen Kernel Version 2.6.27.31,
[people/pmueller/ipfire-2.x.git] / src / patches / suse-2.6.27.31 / patches.drivers / e1000e_add_ICH9_BM.patch
diff --git a/src/patches/suse-2.6.27.31/patches.drivers/e1000e_add_ICH9_BM.patch b/src/patches/suse-2.6.27.31/patches.drivers/e1000e_add_ICH9_BM.patch
new file mode 100644 (file)
index 0000000..c08e65b
--- /dev/null
@@ -0,0 +1,44 @@
+From: Bruce Allan <bruce.w.allan@intel.com>
+Acked-by: Karsten Keil <kkeil@novell.com>
+Subject: e1000e: add support for the 82567LM-4 device
+Reference: fate 303916,303898
+
+Enable PCI device ID for a new combination of MAC and PHY already supported
+in the driver.
+---
+
+ drivers/net/e1000e/hw.h      |    1 +
+ drivers/net/e1000e/ich8lan.c |    1 +
+ drivers/net/e1000e/netdev.c  |    1 +
+ 3 files changed, 3 insertions(+)
+
+--- a/drivers/net/e1000e/hw.h
++++ b/drivers/net/e1000e/hw.h
+@@ -351,6 +351,7 @@ enum e1e_registers {
+ #define E1000_DEV_ID_ICH8_IFE_G                       0x10C5
+ #define E1000_DEV_ID_ICH8_IGP_M                       0x104D
+ #define E1000_DEV_ID_ICH9_IGP_AMT             0x10BD
++#define E1000_DEV_ID_ICH9_BM                  0x10E5
+ #define E1000_DEV_ID_ICH9_IGP_M_AMT           0x10F5
+ #define E1000_DEV_ID_ICH9_IGP_M                       0x10BF
+ #define E1000_DEV_ID_ICH9_IGP_M_V             0x10CB
+--- a/drivers/net/e1000e/ich8lan.c
++++ b/drivers/net/e1000e/ich8lan.c
+@@ -44,6 +44,7 @@
+  * 82567LF-2 Gigabit Network Connection
+  * 82567V-2 Gigabit Network Connection
+  * 82562GT-3 10/100 Network Connection
++ * 82567LM-4 Gigabit Network Connection
+  */
+ #include <linux/netdevice.h>
+--- a/drivers/net/e1000e/netdev.c
++++ b/drivers/net/e1000e/netdev.c
+@@ -5102,6 +5102,7 @@ static struct pci_device_id e1000_pci_tb
+       { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
+       { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
+       { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
++      { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
+       { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
+       { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
+       { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },