]> git.ipfire.org Git - ipfire-2.x.git/blobdiff - src/patches/suse-2.6.27.31/patches.drivers/r8169-use-pci_find_capability-for-the-PCI-E-features
Revert "Move xen patchset to new version's subdir."
[ipfire-2.x.git] / src / patches / suse-2.6.27.31 / patches.drivers / r8169-use-pci_find_capability-for-the-PCI-E-features
diff --git a/src/patches/suse-2.6.27.31/patches.drivers/r8169-use-pci_find_capability-for-the-PCI-E-features b/src/patches/suse-2.6.27.31/patches.drivers/r8169-use-pci_find_capability-for-the-PCI-E-features
deleted file mode 100644 (file)
index 198f314..0000000
+++ /dev/null
@@ -1,92 +0,0 @@
-Commit-Id: 9c14ceafa5ca7f57225a43fb0785c56ddc7f1823
-From: Francois Romieu <romieu@fr.zoreil.com>
-Date: Sat, 5 Jul 2008 00:21:15 +0200
-Acked-by: Karsten Keil <kkeil@novell.com>
-Reference: bnc#448168
-Subject: [PATCH] r8169: use pci_find_capability for the PCI-E features
-
-Signed-off-by: Francois Romieu <romieu@fr.zoreil.com>
-Cc: Edward Hsu <edward_hsu@realtek.com.tw>
-
----
- drivers/net/r8169.c |   32 ++++++++++++++++++++++++--------
- 1 file changed, 24 insertions(+), 8 deletions(-)
-
---- a/drivers/net/r8169.c
-+++ b/drivers/net/r8169.c
-@@ -61,6 +61,7 @@ static const int multicast_filter_limit
- /* MAC address length */
- #define MAC_ADDR_LEN  6
-+#define MAX_READ_REQUEST_SHIFT        12
- #define RX_FIFO_THRESH        7       /* 7 means NO threshold, Rx buffer level before first PCI xfer. */
- #define RX_DMA_BURST  6       /* Maximum PCI burst, '6' is 1024 */
- #define TX_DMA_BURST  6       /* Maximum PCI burst, '6' is 1024 */
-@@ -428,6 +429,7 @@ struct rtl8169_private {
-       void (*hw_start)(struct net_device *);
-       unsigned int (*phy_reset_pending)(void __iomem *);
-       unsigned int (*link_ok)(void __iomem *);
-+      int pcie_cap;
-       struct delayed_work task;
-       unsigned features;
-@@ -1687,6 +1689,10 @@ rtl8169_init_one(struct pci_dev *pdev, c
-               goto err_out_free_res_4;
-       }
-+      tp->pcie_cap = pci_find_capability(pdev, PCI_CAP_ID_EXP);
-+      if (!tp->pcie_cap && netif_msg_probe(tp))
-+              dev_info(&pdev->dev, "no PCI Express capability\n");
-+
-       RTL_W16(IntrMask, 0x0000);
-       /* Soft reset the chip. */
-@@ -2079,13 +2085,19 @@ static void rtl_hw_start_8169(struct net
-       RTL_W16(IntrMask, tp->intr_event);
- }
--static void rtl_tx_performance_tweak(struct pci_dev *pdev, u8 force)
-+static void rtl_tx_performance_tweak(struct pci_dev *pdev, u16 force)
- {
--      u8 ctl;
-+      struct net_device *dev = pci_get_drvdata(pdev);
-+      struct rtl8169_private *tp = netdev_priv(dev);
-+      int cap = tp->pcie_cap;
-+
-+      if (cap) {
-+              u16 ctl;
--      pci_read_config_byte(pdev, 0x69, &ctl);
--      ctl = (ctl & ~0x70) | force;
--      pci_write_config_byte(pdev, 0x69, ctl);
-+              pci_read_config_word(pdev, cap + PCI_EXP_DEVCTL, &ctl);
-+              ctl = (ctl & ~PCI_EXP_DEVCTL_READRQ) | force;
-+              pci_write_config_word(pdev, cap + PCI_EXP_DEVCTL, ctl);
-+      }
- }
- static void rtl_hw_start_8168(struct net_device *dev)
-@@ -2106,7 +2118,7 @@ static void rtl_hw_start_8168(struct net
-       RTL_W16(CPlusCmd, tp->cp_cmd);
--      rtl_tx_performance_tweak(pdev, 0x50);
-+      rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
-       RTL_W16(IntrMitigate, 0x5151);
-@@ -2139,8 +2151,12 @@ static void rtl_hw_start_8101(struct net
-       if ((tp->mac_version == RTL_GIGA_MAC_VER_13) ||
-           (tp->mac_version == RTL_GIGA_MAC_VER_16)) {
--              pci_write_config_word(pdev, 0x68, 0x00);
--              pci_write_config_word(pdev, 0x69, 0x08);
-+              int cap = tp->pcie_cap;
-+
-+              if (cap) {
-+                      pci_write_config_word(pdev, cap + PCI_EXP_DEVCTL,
-+                                            PCI_EXP_DEVCTL_NOSNOOP_EN);
-+              }
-       }
-       RTL_W8(Cfg9346, Cfg9346_Unlock);