RISC-V: Relax RISCV_PCREL_* to RISCV_GPREL_*

RISC-V: Relax RISCV_PCREL_* to RISCV_GPREL_*

In the medany code model the compiler generates PCREL_HI20+PCREL_LO12
relocation pairs against local symbols because HI20+LO12 relocations
can't reach high addresses.  We relax HI20+LO12 pairs to GPREL
relocations when possible, which is an important optimization for
Dhrystone.  Without this commit we are unable to relax
PCREL_HI20+PCREL_LO12 pairs to GPREL when possible, causing a 10%
permormance hit on Dhrystone on Rocket.

Note that we'll now relax

  la gp, __global_pointer$

to

  mv gp, gp

which probably isn't what you want in your entry code.  Users who want
gp-relative symbols to continue to resolve should add ".option norelax"
accordingly.  Due to this, the assembler now pairs PCREL relocations
with RELAX relocations when they're expected to be relaxed just like
every other relaxable relocation.

bfd/ChangeLog

2017-10-19  Palmer Dabbelt  <palmer@dabbelt.com>

        * elfnn-riscv.c (riscv_pcgp_hi_reloc): New structure.
        (riscv_pcgp_lo_reloc): Likewise.
        (riscv_pcgp_relocs): Likewise.
        (riscv_init_pcgp_relocs): New function.
        (riscv_free_pcgp_relocs): Likewise.
        (riscv_record_pcgp_hi_reloc): Likewise.
        (riscv_record_pcgp_lo_reloc): Likewise.
        (riscv_delete_pcgp_hi_reloc): Likewise.
        (riscv_use_pcgp_hi_reloc): Likewise.
        (riscv_record_pcgp_lo_reloc): Likewise.
        (riscv_find_pcgp_lo_reloc): Likewise.
        (riscv_delete_pcgp_lo_reloc): Likewise.
        (_bfd_riscv_relax_pc): Likewise.
        (_bfd_riscv_relax_section): Handle R_RISCV_PCREL_* relocations
        via the new functions above.

gas/ChangeLog

2017-10-19  Palmer Dabbelt  <palmer@dabbelt.com>

        * config/tc-riscv.c (md_apply_fix): Mark
        BFD_RELOC_RISCV_PCREL_HI20 as relaxable when relaxations are
        enabled.