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(parent: cc5201d) | patch
* gencode.c (process_instructions): Correct shift count for 32
authorIan Lance Taylor <ian@airs.com>
Thu, 19 Sep 1996 21:55:10 +0000 (21:55 +0000)
committerIan Lance Taylor <ian@airs.com>
Thu, 19 Sep 1996 21:55:10 +0000 (21:55 +0000)
commit47c6ce6c2de14635d0d71d63e5dbea036084b6ec
treef201912ca1444749e9912657ae431043e8ac0215tree | snapshot
parentcc5201d78c016dc38c3dfbbb22b1332b80f88589commit | diff
* gencode.c (process_instructions): Correct shift count for 32
bit shift instructions.  Correct sign extension for arithmetic
shifts to not shift the number of bits in the type.
sim/mips/ChangeLog diff | blob | blame | history
sim/mips/gencode.c diff | blob | blame | history
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