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author	Jan Beulich <jbeulich@suse.com>
	Fri, 4 Mar 2022 12:37:59 +0000 (13:37 +0100)
committer	Jan Beulich <jbeulich@suse.com>
	Fri, 4 Mar 2022 12:37:59 +0000 (13:37 +0100)
commit	7919e5667cf6607a3d7e28b1fa7f15f3c49a4e55
tree	28d8cd75aa781911c522ef5e56d677bfdc525c2d	tree \| snapshot
parent	6a778a2100901f665ed087d069e5c962bd4c93d7	commit \| diff

RISC-V: make .insn actually work for 64-bit insns

Presently in this case, due to an undefined behavior shift, at least
with x86 cross builds I'm observing:

Error: value conflicts with instruction length `8,0x0000003f'

Eliminate the UB and extend the respective testcase.

gas/config/tc-riscv.c		diff \| blob \| blame \| history
gas/testsuite/gas/riscv/insn.d		diff \| blob \| blame \| history
gas/testsuite/gas/riscv/insn.s		diff \| blob \| blame \| history

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