x86: Update constraints for APX NDD instructions

x86: Update constraints for APX NDD instructions

1. The only supported TLS code sequence with ADD is

	addq foo@gottpoff(%rip),%reg

Change je constraint to a memory operand in APX NDD ADD pattern with
register source operand.

2. The instruction length of APX NDD instructions with immediate operand:

op imm, mem, reg

may exceed the size limit of 15 byes when non-default address space,
segment register or address size prefix are used.

Add jM constraint which is a memory operand valid for APX NDD instructions
with immediate operand and add jO constraint which is an offsetable memory
operand valid for APX NDD instructions with immediate operand.  Update
APX NDD patterns with jM and jO constraints.

gcc/

	PR target/113711
	PR target/113733
	* config/i386/constraints.md: List all constraints with j prefix.
	(j>): Change auto-dec to auto-inc in documentation.
	(je): Changed to a memory constraint with APX NDD TLS operand
	check.
	(jM): New memory constraint for APX NDD instructions.
	(jO): Likewise.
	* config/i386/i386-protos.h (x86_poff_operand_p): Removed.
	* config/i386/i386.cc (x86_poff_operand_p): Likewise.
	* config/i386/i386.md (*add<dwi>3_doubleword): Use rjO.
	(*add<mode>_1[SWI48]): Use je and jM.
	(addsi_1_zext): Use jM.
	(*addv<dwi>4_doubleword_1[DWI]): Likewise.
	(*sub<mode>_1[SWI]): Use jM.
	(@add<mode>3_cc_overflow_1[SWI]): Likewise.
	(*add<dwi>3_doubleword_cc_overflow_1): Use rjO.
	(*and<dwi>3_doubleword): Likewise.
	(*anddi_1): Use jM.
	(*andsi_1_zext): Likewise.
	(*and<mode>_1[SWI24]): Likewise.
	(*<code><dwi>3_doubleword[any_or]): Use rjO
	(*code<mode>_1[any_or SWI248]): Use jM.
	(*<code>si_1_zext[zero_extend + any_or]): Likewise.
	* config/i386/predicates.md (apx_ndd_memory_operand): New.
	(apx_ndd_add_memory_operand): Likewise.

gcc/testsuite/

	PR target/113711
	PR target/113733
	* gcc.target/i386/apx-ndd-2.c: New test.
	* gcc.target/i386/apx-ndd-base-index-1.c: Likewise.
	* gcc.target/i386/apx-ndd-no-seg-global-1.c: Likewise.
	* gcc.target/i386/apx-ndd-seg-1.c: Likewise.
	* gcc.target/i386/apx-ndd-seg-2.c: Likewise.
	* gcc.target/i386/apx-ndd-seg-3.c: Likewise.
	* gcc.target/i386/apx-ndd-seg-4.c: Likewise.
	* gcc.target/i386/apx-ndd-seg-5.c: Likewise.
	* gcc.target/i386/apx-ndd-tls-1a.c: Likewise.
	* gcc.target/i386/apx-ndd-tls-2.c: Likewise.
	* gcc.target/i386/apx-ndd-tls-3.c: Likewise.
	* gcc.target/i386/apx-ndd-tls-4.c: Likewise.
	* gcc.target/i386/apx-ndd-x32-1.c: Likewise.