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i386: Remove broadcasts from TARGET_MMX_WITH_SSE vec_dup insn patterns
authorUros Bizjak <ubizjak@gmail.com>
Mon, 25 May 2020 14:11:18 +0000 (16:11 +0200)
committerUros Bizjak <ubizjak@gmail.com>
Mon, 25 May 2020 14:11:18 +0000 (16:11 +0200)
XMM broadcast instructions broadcast value from general reg to all
elements of the vector.  This is not allowed for TARGET_MMX_WITH_SSE,
where it is expected that bits outside lower 64bits load or retain
zero value.  Following testcases expect broadcast, and are thus invalid:

FAIL: gcc.target/i386/sse2-mmx-18b.c scan-assembler-not movd
FAIL: gcc.target/i386/sse2-mmx-18b.c scan-assembler-times pbroadcastd 1
FAIL: gcc.target/i386/sse2-mmx-19b.c scan-assembler-not movd
FAIL: gcc.target/i386/sse2-mmx-19b.c scan-assembler-times pbroadcastw 1
FAIL: gcc.target/i386/sse2-mmx-19d.c scan-assembler-times pbroadcastw 1
FAIL: gcc.target/i386/sse2-mmx-19e.c scan-assembler-times pbroadcastw 1

These testcases are removed entirely.

2020-05-25  Uroš Bizjak  <ubizjak@gmail.com>

gcc/ChangeLog:
* config/i386/mmx.md (*vec_dupv2sf): Redefine as define_insn.
(mmx_pshufw_1): Change Yv constraint to xYw.  Correct type attribute.
(*vec_dupv4hi): Redefine as define_insn.
Remove alternative with general register input.
(*vec_dupv2si): Ditto.

gcc/testsuite/ChangeLog:
* gcc.target/i386/sse2-mmx-18a.c (dg-options): Remove -mno-avx512vl.
* gcc.target/i386/sse2-mmx-19a.c (dg-options): Remove -mno-avx.
* gcc.target/i386/sse2-mmx-18b.c: Remove.
* gcc.target/i386/sse2-mmx-18c.c: Ditto.
* gcc.target/i386/sse2-mmx-19b.c: Ditto.
* gcc.target/i386/sse2-mmx-19c.c: Ditto.
* gcc.target/i386/sse2-mmx-19d.c: Ditto.
* gcc.target/i386/sse2-mmx-19e.c: Ditto.

gcc/ChangeLog patch | blob | blame | history
gcc/config/i386/mmx.md patch | blob | blame | history
gcc/testsuite/ChangeLog patch | blob | blame | history
gcc/testsuite/gcc.target/i386/sse2-mmx-18a.c patch | blob | blame | history
gcc/testsuite/gcc.target/i386/sse2-mmx-18b.c [deleted file] patch | blob | blame | history
gcc/testsuite/gcc.target/i386/sse2-mmx-18c.c [deleted file] patch | blob | blame | history
gcc/testsuite/gcc.target/i386/sse2-mmx-19a.c patch | blob | blame | history
gcc/testsuite/gcc.target/i386/sse2-mmx-19b.c [deleted file] patch | blob | blame | history
gcc/testsuite/gcc.target/i386/sse2-mmx-19c.c [deleted file] patch | blob | blame | history
gcc/testsuite/gcc.target/i386/sse2-mmx-19d.c [deleted file] patch | blob | blame | history
gcc/testsuite/gcc.target/i386/sse2-mmx-19e.c [deleted file] patch | blob | blame | history

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index ac8ab3ee21806d0b17e4fc37c8ccdacc5a04ef21..52a7e507740306fadb94b5583e5fbcd2ba246a9c 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2020-05-25  Uroš Bizjak  <ubizjak@gmail.com>
+
+       * config/i386/mmx.md (*vec_dupv2sf): Redefine as define_insn.
+       (mmx_pshufw_1): Change Yv constraint to xYw.  Correct type attribute.
+       (*vec_dupv4hi): Redefine as define_insn.
+       Remove alternative with general register input.
+       (*vec_dupv2si): Ditto.
+
 2020-05-25  Richard Biener  <rguenther@suse.de>
 
        PR tree-optimization/95309
diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md
index 5deef683b0bef64b2db41eab4b64fd26668fab9b..b5564711aa454bab2915c73698971e8e6d361c05 100644 (file)
--- a/gcc/config/i386/mmx.md
+++ b/gcc/config/i386/mmx.md
@@ -947,27 +947,22 @@
    (set_attr "prefix_extra" "1")
    (set_attr "mode" "V2SF")])
 
-(define_insn_and_split "*vec_dupv2sf"
+(define_insn "*vec_dupv2sf"
   [(set (match_operand:V2SF 0 "register_operand" "=y,x,Yv")
        (vec_duplicate:V2SF
          (match_operand:SF 1 "register_operand" "0,0,Yv")))]
   "TARGET_MMX || TARGET_MMX_WITH_SSE"
   "@
    punpckldq\t%0, %0
-   #
-   #"
-  "TARGET_SSE && reload_completed
-   && SSE_REGNO_P (REGNO (operands[0]))"
-  [(set (match_dup 0)
-       (vec_duplicate:V4SF (match_dup 1)))]
-{
-  operands[0] = lowpart_subreg (V4SFmode, operands[0],
-                               GET_MODE (operands[0]));
-}
-  [(set_attr "isa" "*,sse_noavx,avx")
+   shufps\t{$0xe0, %0, %0|%0, %0, 0xe0}
+   %vmovsldup\t{%1, %0|%0, %1}"
+  [(set_attr "isa" "*,sse_noavx,sse3")
    (set_attr "mmx_isa" "native,*,*")
-   (set_attr "type" "mmxcvt,ssemov,ssemov")
-   (set_attr "mode" "DI,TI,TI")])
+   (set_attr "type" "mmxcvt,sseshuf1,sse")
+   (set_attr "length_immediate" "*,1,*")
+   (set_attr "prefix_rep" "*,*,1")
+   (set_attr "prefix" "*,orig,maybe_vex")
+   (set_attr "mode" "DI,V4SF,V4SF")])
 
 (define_insn "*mmx_concatv2sf"
   [(set (match_operand:V2SF 0 "register_operand"     "=y,y")
@@ -1960,9 +1955,9 @@
 })
 
 (define_insn "mmx_pshufw_1"
-  [(set (match_operand:V4HI 0 "register_operand" "=y,Yv")
+  [(set (match_operand:V4HI 0 "register_operand" "=y,xYw")
         (vec_select:V4HI
-          (match_operand:V4HI 1 "register_mmxmem_operand" "ym,Yv")
+          (match_operand:V4HI 1 "register_mmxmem_operand" "ym,xYw")
           (parallel [(match_operand 2 "const_0_to_3_operand")
                      (match_operand 3 "const_0_to_3_operand")
                      (match_operand 4 "const_0_to_3_operand")
@@ -1989,7 +1984,7 @@
 }
   [(set_attr "isa" "*,sse2")
    (set_attr "mmx_isa" "native,*")
-   (set_attr "type" "mmxcvt,sselog")
+   (set_attr "type" "mmxcvt,sselog1")
    (set_attr "length_immediate" "1")
    (set_attr "mode" "DI,TI")])
 
@@ -2004,77 +1999,37 @@
    (set_attr "prefix_extra" "1")
    (set_attr "mode" "DI")])
 
-(define_insn_and_split "*vec_dupv4hi"
-  [(set (match_operand:V4HI 0 "register_operand" "=y,xYw,Yw")
+(define_insn "*vec_dupv4hi"
+  [(set (match_operand:V4HI 0 "register_operand" "=y,xYw")
        (vec_duplicate:V4HI
          (truncate:HI
-           (match_operand:SI 1 "register_operand" "0,xYw,r"))))]
+           (match_operand:SI 1 "register_operand" "0,xYw"))))]
   "(TARGET_MMX || TARGET_MMX_WITH_SSE)
    && (TARGET_SSE || TARGET_3DNOW_A)"
   "@
    pshufw\t{$0, %0, %0|%0, %0, 0}
-   #
-   #"
-  "TARGET_SSE2 && reload_completed
-   && SSE_REGNO_P (REGNO (operands[0]))"
-  [(const_int 0)]
-{
-  rtx op;
-  operands[0] = lowpart_subreg (V8HImode, operands[0],
-                               GET_MODE (operands[0]));
-  if (TARGET_AVX2)
-    {
-      operands[1] = lowpart_subreg (HImode, operands[1],
-                                   GET_MODE (operands[1]));
-      op = gen_rtx_VEC_DUPLICATE (V8HImode, operands[1]);
-    }
-  else
-    {
-      operands[1] = lowpart_subreg (V8HImode, operands[1],
-                                   GET_MODE (operands[1]));
-      rtx mask = gen_rtx_PARALLEL (VOIDmode,
-                                  gen_rtvec (8,
-                                             GEN_INT (0),
-                                             GEN_INT (0),
-                                             GEN_INT (0),
-                                             GEN_INT (0),
-                                             GEN_INT (4),
-                                             GEN_INT (5),
-                                             GEN_INT (6),
-                                             GEN_INT (7)));
-
-      op = gen_rtx_VEC_SELECT (V8HImode, operands[1], mask);
-    }
-  emit_insn (gen_rtx_SET (operands[0], op));
-  DONE;
-}
-  [(set_attr "mmx_isa" "native,sse,avx")
-   (set_attr "type" "mmxcvt,sselog1,ssemov")
-   (set_attr "length_immediate" "1,1,0")
-   (set_attr "mode" "DI,TI,TI")])
+   %vpshuflw\t{$0, %1, %0|%0, %1, 0}"
+  [(set_attr "isa" "*,sse2")
+   (set_attr "mmx_isa" "native,*")
+   (set_attr "type" "mmxcvt,sselog1")
+   (set_attr "length_immediate" "1")
+   (set_attr "mode" "DI,TI")])
+
 
-(define_insn_and_split "*vec_dupv2si"
-  [(set (match_operand:V2SI 0 "register_operand" "=y,x,Yv,Yw")
+(define_insn "*vec_dupv2si"
+  [(set (match_operand:V2SI 0 "register_operand" "=y,Yv")
        (vec_duplicate:V2SI
-         (match_operand:SI 1 "register_operand" "0,0,Yv,r")))]
+         (match_operand:SI 1 "register_operand" "0,Yv")))]
   "TARGET_MMX || TARGET_MMX_WITH_SSE"
   "@
    punpckldq\t%0, %0
-   #
-   #
-   #"
-  "TARGET_SSE && reload_completed
-   && SSE_REGNO_P (REGNO (operands[0]))"
-  [(set (match_dup 0)
-       (vec_duplicate:V4SI (match_dup 1)))]
-{
-  operands[0] = lowpart_subreg (V4SImode, operands[0],
-                               GET_MODE (operands[0]));
-}
-  [(set_attr "isa" "*,sse_noavx,avx,avx")
-   (set_attr "mmx_isa" "native,*,*,*")
-   (set_attr "type" "mmxcvt,ssemov,ssemov,ssemov")
-   (set_attr "mode" "DI,TI,TI,TI")])
+   %vpshufd\t{$0xe0, %1, %0|%0, %1, 0xe0}"
+  [(set_attr "isa" "*,sse2")
+   (set_attr "mmx_isa" "native,*")
+   (set_attr "type" "mmxcvt,sselog1")
+   (set_attr "prefix_data16" "*,1")
+   (set_attr "length_immediate" "*,1")
+   (set_attr "mode" "DI,TI")])
 
 (define_insn "*mmx_concatv2si"
   [(set (match_operand:V2SI 0 "register_operand"     "=y,y")
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 58521437e2d4abe37e174c4b49e49e790b1c995d..4cc2d4188bfea04786ceb5acd0c51ff5ccaa13a6 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,14 @@
+2020-05-25  Uroš Bizjak  <ubizjak@gmail.com>
+
+       * gcc.target/i386/sse2-mmx-18a.c (dg-options): Remove -mno-avx512vl.
+       * gcc.target/i386/sse2-mmx-19a.c (dg-options): Remove -mno-avx.
+       * gcc.target/i386/sse2-mmx-18b.c: Remove.
+       * gcc.target/i386/sse2-mmx-18c.c: Ditto.
+       * gcc.target/i386/sse2-mmx-19b.c: Ditto.
+       * gcc.target/i386/sse2-mmx-19c.c: Ditto.
+       * gcc.target/i386/sse2-mmx-19d.c: Ditto.
+       * gcc.target/i386/sse2-mmx-19e.c: Ditto.
+
 2020-05-25  Martin Jambor  <mjambor@suse.cz>
 
        * brig.dg/test/gimple/packed.hsail: Fix scan dump patterns.
diff --git a/gcc/testsuite/gcc.target/i386/sse2-mmx-18a.c b/gcc/testsuite/gcc.target/i386/sse2-mmx-18a.c
index 3505a5c0cf445f75b66179e4bb8acd9f7c162984..d08da8b43776721b33ff14b0d54fb5e084d8a471 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/sse2-mmx-18a.c
+++ b/gcc/testsuite/gcc.target/i386/sse2-mmx-18a.c
@@ -1,5 +1,5 @@
 /* { dg-do compile { target { ! ia32 } } } */
-/* { dg-options "-O2 -msse2 -mno-mmx -mno-avx512vl" } */
+/* { dg-options "-O2 -msse2 -mno-mmx" } */
 /* { dg-final { scan-assembler-times "pshufd" 1 } } */
 /* { dg-final { scan-assembler-times "movd" 1 } } */
 /* { dg-final { scan-assembler-not "movl" } } */
diff --git a/gcc/testsuite/gcc.target/i386/sse2-mmx-18b.c b/gcc/testsuite/gcc.target/i386/sse2-mmx-18b.c
deleted file mode 100644 (file)
index 9b267b1..0000000
--- a/gcc/testsuite/gcc.target/i386/sse2-mmx-18b.c
+++ /dev/null
@@ -1,7 +0,0 @@
-/* { dg-do compile { target { ! ia32 } } } */
-/* { dg-options "-O2 -mno-mmx -mavx512bw -mavx512vl" } */
-/* { dg-final { scan-assembler-times "pbroadcastd" 1 } } */
-/* { dg-final { scan-assembler-not "movd" } } */
-/* { dg-final { scan-assembler-not "movl" } } */
-
-#include "sse2-mmx-18a.c"
diff --git a/gcc/testsuite/gcc.target/i386/sse2-mmx-18c.c b/gcc/testsuite/gcc.target/i386/sse2-mmx-18c.c
deleted file mode 100644 (file)
index 394f05b..0000000
--- a/gcc/testsuite/gcc.target/i386/sse2-mmx-18c.c
+++ /dev/null
@@ -1,7 +0,0 @@
-/* { dg-do compile { target { ! ia32 } } } */
-/* { dg-options "-O2 -mno-mmx -mavx512bw -mno-avx512vl" } */
-/* { dg-final { scan-assembler-times "pshufd" 1 } } */
-/* { dg-final { scan-assembler-times "movd" 1 } } */
-/* { dg-final { scan-assembler-not "movl" } } */
-
-#include "sse2-mmx-18a.c"
diff --git a/gcc/testsuite/gcc.target/i386/sse2-mmx-19a.c b/gcc/testsuite/gcc.target/i386/sse2-mmx-19a.c
index 9715ace241f8f03dfc9f3b175005f24777ff6d34..7f8b8b261962c32137430cf223809b2385e6545d 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/sse2-mmx-19a.c
+++ b/gcc/testsuite/gcc.target/i386/sse2-mmx-19a.c
@@ -1,5 +1,5 @@
 /* { dg-do compile { target { ! ia32 } } } */
-/* { dg-options "-O2 -msse2 -mno-mmx -mno-avx -mtune=intel" } */
+/* { dg-options "-O2 -msse2 -mno-mmx -mtune=intel" } */
 /* { dg-final { scan-assembler-times "pshuflw" 1 } } */
 /* { dg-final { scan-assembler-times "movd" 1 } } */
 /* { dg-final { scan-assembler-not "movl" } } */
diff --git a/gcc/testsuite/gcc.target/i386/sse2-mmx-19b.c b/gcc/testsuite/gcc.target/i386/sse2-mmx-19b.c
deleted file mode 100644 (file)
index a6d4231..0000000
--- a/gcc/testsuite/gcc.target/i386/sse2-mmx-19b.c
+++ /dev/null
@@ -1,7 +0,0 @@
-/* { dg-do compile { target { ! ia32 } } } */
-/* { dg-options "-O2 -mno-mmx -mavx512bw -mavx512vl" } */
-/* { dg-final { scan-assembler-times "pbroadcastw" 1 } } */
-/* { dg-final { scan-assembler-not "movd" } } */
-/* { dg-final { scan-assembler-not "movl" } } */
-
-#include "sse2-mmx-19a.c"
diff --git a/gcc/testsuite/gcc.target/i386/sse2-mmx-19c.c b/gcc/testsuite/gcc.target/i386/sse2-mmx-19c.c
deleted file mode 100644 (file)
index b02dc8c..0000000
--- a/gcc/testsuite/gcc.target/i386/sse2-mmx-19c.c
+++ /dev/null
@@ -1,7 +0,0 @@
-/* { dg-do compile { target { ! ia32 } } } */
-/* { dg-options "-O2 -mno-mmx -mavx -mno-avx2 -mtune=intel" } */
-/* { dg-final { scan-assembler-times "pshuflw" 1 } } */
-/* { dg-final { scan-assembler-times "movd" 1 } } */
-/* { dg-final { scan-assembler-not "movl" } } */
-
-#include "sse2-mmx-19a.c"
diff --git a/gcc/testsuite/gcc.target/i386/sse2-mmx-19d.c b/gcc/testsuite/gcc.target/i386/sse2-mmx-19d.c
deleted file mode 100644 (file)
index 5469188..0000000
--- a/gcc/testsuite/gcc.target/i386/sse2-mmx-19d.c
+++ /dev/null
@@ -1,7 +0,0 @@
-/* { dg-do compile { target { ! ia32 } } } */
-/* { dg-options "-O2 -mno-mmx -mavx512bw -mno-avx512vl -mtune=intel" } */
-/* { dg-final { scan-assembler-times "pbroadcastw" 1 } } */
-/* { dg-final { scan-assembler-times "movd" 1 } } */
-/* { dg-final { scan-assembler-not "movl" } } */
-
-#include "sse2-mmx-19a.c"
diff --git a/gcc/testsuite/gcc.target/i386/sse2-mmx-19e.c b/gcc/testsuite/gcc.target/i386/sse2-mmx-19e.c
deleted file mode 100644 (file)
index 8be973c..0000000
--- a/gcc/testsuite/gcc.target/i386/sse2-mmx-19e.c
+++ /dev/null
@@ -1,7 +0,0 @@
-/* { dg-do compile { target { ! ia32 } } } */
-/* { dg-options "-O2 -mno-mmx -mavx2 -mno-avx512f -mtune=intel" } */
-/* { dg-final { scan-assembler-times "pbroadcastw" 1 } } */
-/* { dg-final { scan-assembler-times "movd" 1 } } */
-/* { dg-final { scan-assembler-not "movl" } } */
-
-#include "sse2-mmx-19a.c"
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