+2017-03-28 Anton Kolesov <anton.kolesov@synopsys.com>
+
+ * arc-tdep.c (core_v2_register_names, core_arcompact_register_names)
+ Add "limm" and "reserved".
+ (arc_cannot_fetch_register, arc_cannot_store_register): Add
+ ARC_RESERVED_REGNUM and ARC_LIMM_REGNUM.
+ * arc-tdep.h (arc_regnum): Likewise.
+
2017-03-27 Max Filippov <jcmvbkbc@gmail.com>
* xtensa-linux-nat.c (fill_gregset): Call regcache_raw_collect
"r48", "r49", "r50", "r51",
"r52", "r53", "r54", "r55",
"r56", "r57", "accl", "acch",
- "lp_count", "pcl",
+ "lp_count", "reserved", "limm", "pcl",
};
static const char *const aux_minimal_register_names[] = {
"r48", "r49", "r50", "r51",
"r52", "r53", "r54", "r55",
"r56", "r57", "r58", "r59",
- "lp_count", "pcl",
+ "lp_count", "reserved", "limm", "pcl",
};
/* Implement the "write_pc" gdbarch method.
static int
arc_cannot_fetch_register (struct gdbarch *gdbarch, int regnum)
{
- /* Assume that register is readable if it is unknown. */
- return FALSE;
+ /* Assume that register is readable if it is unknown. LIMM and RESERVED are
+ not real registers, but specific register numbers. They are available as
+ regnums to align architectural register numbers with GDB internal regnums,
+ but they shouldn't appear in target descriptions generated by
+ GDB-servers. */
+ switch (regnum)
+ {
+ case ARC_RESERVED_REGNUM:
+ case ARC_LIMM_REGNUM:
+ return true;
+ default:
+ return false;
+ }
}
/* Implement the "cannot_store_register" gdbarch method. */
static int
arc_cannot_store_register (struct gdbarch *gdbarch, int regnum)
{
- /* Assume that register is writable if it is unknown. */
+ /* Assume that register is writable if it is unknown. See comment in
+ arc_cannot_fetch_register about LIMM and RESERVED. */
switch (regnum)
{
+ case ARC_RESERVED_REGNUM:
+ case ARC_LIMM_REGNUM:
case ARC_PCL_REGNUM:
- return TRUE;
+ return true;
default:
- return FALSE;
+ return false;
}
}
/* Need disassemble_info. */
#include "dis-asm.h"
+/* To simplify GDB code this enum assumes that internal regnums should be same
+ as architectural register numbers, i.e. PCL regnum is 63. This allows to
+ use internal GDB regnums as architectural numbers when dealing with
+ instruction encodings, for example when analyzing what are the registers
+ saved in function prologue. */
+
enum arc_regnum
{
/* Core registers. */
ARC_BLINK_REGNUM,
/* Zero-delay loop counter. */
ARC_LP_COUNT_REGNUM = 60,
+ /* Reserved register number. There should never be a register with such
+ number, this name is needed only for a sanity check in
+ arc_cannot_(fetch|store)_register. */
+ ARC_RESERVED_REGNUM,
+ /* Long-immediate value. This is not a physical register - if instruction
+ has register 62 as an operand, then this operand is a literal value
+ stored in the instruction memory right after the instruction itself.
+ This value is required in this enumeration as an architectural number
+ for instruction analysis. */
+ ARC_LIMM_REGNUM,
/* Program counter, aligned to 4-bytes, read-only. */
ARC_PCL_REGNUM,
ARC_LAST_CORE_REGNUM = ARC_PCL_REGNUM,