]> git.ipfire.org Git - people/ms/u-boot.git/commitdiff
AT91: change common at91sam9261 files to compile with new scheme
authorAsen Dimov <dimov@ronetix.at>
Tue, 26 Jul 2011 01:23:39 +0000 (01:23 +0000)
committerU-Boot <uboot@aari01-12.(none)>
Wed, 3 Aug 2011 11:00:56 +0000 (13:00 +0200)
Signed-off-by: Asen Dimov <dimov@ronetix.at>
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
arch/arm/cpu/arm926ejs/at91/at91sam9261_devices.c
arch/arm/include/asm/arch-at91/at91sam9261.h

index b4353ef5cb5d39206ea9c4114a9ac1fe05cb1810..edc797214c93fca1a4cda0b9027f244a0b064b84 100644 (file)
  */
 
 #include <common.h>
+#include <asm/io.h>
 #include <asm/arch/at91_common.h>
 #include <asm/arch/at91_pmc.h>
 #include <asm/arch/gpio.h>
-#include <asm/arch/io.h>
+
+/*
+ * if CONFIG_AT91_GPIO_PULLUP ist set, keep pullups on on all
+ * peripheral pins. Good to have if hardware is soldered optionally
+ * or in case of SPI no slave is selected. Avoid lines to float
+ * needlessly. Use a short local PUP define.
+ *
+ * Due to errata "TXD floats when CTS is inactive" pullups are always
+ * on for TXD pins.
+ */
+#ifdef CONFIG_AT91_GPIO_PULLUP
+# define PUP CONFIG_AT91_GPIO_PULLUP
+#else
+# define PUP 0
+#endif
 
 void at91_serial0_hw_init(void)
 {
-       at91_pmc_t      *pmc    = (at91_pmc_t *) AT91_PMC_BASE;
+       at91_pmc_t      *pmc    = (at91_pmc_t *) ATMEL_BASE_PMC;
 
        at91_set_a_periph(AT91_PIO_PORTC, 8, 1);                /* TXD0 */
        at91_set_a_periph(AT91_PIO_PORTC, 9, 0);                /* RXD0 */
-       writel(1 << AT91SAM9261_ID_US0, &pmc->pcer);
+       writel(1 << ATMEL_ID_USART0, &pmc->pcer);
 }
 
 void at91_serial1_hw_init(void)
 {
-       at91_pmc_t      *pmc    = (at91_pmc_t *) AT91_PMC_BASE;
+       at91_pmc_t      *pmc    = (at91_pmc_t *) ATMEL_BASE_PMC;
 
        at91_set_a_periph(AT91_PIO_PORTC, 12, 1);               /* TXD1 */
        at91_set_a_periph(AT91_PIO_PORTC, 13, 0);               /* RXD1 */
-       writel(1 << AT91SAM9261_ID_US1, &pmc->pcer);
+       writel(1 << ATMEL_ID_USART1, &pmc->pcer);
 }
 
 void at91_serial2_hw_init(void)
 {
-       at91_pmc_t      *pmc    = (at91_pmc_t *) AT91_PMC_BASE;
+       at91_pmc_t      *pmc    = (at91_pmc_t *) ATMEL_BASE_PMC;
 
        at91_set_a_periph(AT91_PIO_PORTC, 14, 1);               /* TXD2 */
        at91_set_a_periph(AT91_PIO_PORTC, 15, 0);               /* RXD2 */
-       writel(1 << AT91SAM9261_ID_US2, &pmc->pcer);
+       writel(1 << ATMEL_ID_USART2, &pmc->pcer);
 }
 
-void at91_serial3_hw_init(void)
+void at91_seriald_hw_init(void)
 {
-       at91_pmc_t      *pmc    = (at91_pmc_t *) AT91_PMC_BASE;
+       at91_pmc_t      *pmc    = (at91_pmc_t *) ATMEL_BASE_PMC;
 
        at91_set_a_periph(AT91_PIO_PORTA, 9, 0);                /* DRXD */
        at91_set_a_periph(AT91_PIO_PORTA, 10, 1);               /* DTXD */
-       writel(1 << AT91_ID_SYS, &pmc->pcer);
-}
-
-void at91_serial_hw_init(void)
-{
-#ifdef CONFIG_USART0
-       at91_serial0_hw_init();
-#endif
-
-#ifdef CONFIG_USART1
-       at91_serial1_hw_init();
-#endif
-
-#ifdef CONFIG_USART2
-       at91_serial2_hw_init();
-#endif
-
-#ifdef CONFIG_USART3   /* DBGU */
-       at91_serial3_hw_init();
-#endif
+       writel(1 << ATMEL_ID_SYS, &pmc->pcer);
 }
 
-#ifdef CONFIG_HAS_DATAFLASH
+#if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI)
 void at91_spi0_hw_init(unsigned long cs_mask)
 {
-       at91_pmc_t      *pmc    = (at91_pmc_t *) AT91_PMC_BASE;
+       at91_pmc_t      *pmc    = (at91_pmc_t *) ATMEL_BASE_PMC;
 
-       at91_set_a_periph(AT91_PIO_PORTA, 0, 0);        /* SPI0_MISO */
-       at91_set_a_periph(AT91_PIO_PORTA, 1, 0);        /* SPI0_MOSI */
-       at91_set_a_periph(AT91_PIO_PORTA, 2, 0);        /* SPI0_SPCK */
+       at91_set_a_periph(AT91_PIO_PORTA, 0, PUP);      /* SPI0_MISO */
+       at91_set_a_periph(AT91_PIO_PORTA, 1, PUP);      /* SPI0_MOSI */
+       at91_set_a_periph(AT91_PIO_PORTA, 2, PUP);      /* SPI0_SPCK */
 
        /* Enable clock */
-       writel(1 << AT91SAM9261_ID_SPI0, &pmc->pcer);
+       writel(1 << ATMEL_ID_SPI0, &pmc->pcer);
 
        if (cs_mask & (1 << 0)) {
                at91_set_a_periph(AT91_PIO_PORTA, 3, 1);
@@ -123,14 +119,14 @@ void at91_spi0_hw_init(unsigned long cs_mask)
 
 void at91_spi1_hw_init(unsigned long cs_mask)
 {
-       at91_pmc_t      *pmc    = (at91_pmc_t *) AT91_PMC_BASE;
+       at91_pmc_t      *pmc    = (at91_pmc_t *) ATMEL_BASE_PMC;
 
-       at91_set_a_periph(AT91_PIO_PORTB, 30, 0);       /* SPI1_MISO */
-       at91_set_a_periph(AT91_PIO_PORTB, 31, 0);       /* SPI1_MOSI */
-       at91_set_a_periph(AT91_PIO_PORTB, 29, 0);       /* SPI1_SPCK */
+       at91_set_a_periph(AT91_PIO_PORTB, 30, PUP);     /* SPI1_MISO */
+       at91_set_a_periph(AT91_PIO_PORTB, 31, PUP);     /* SPI1_MOSI */
+       at91_set_a_periph(AT91_PIO_PORTB, 29, PUP);     /* SPI1_SPCK */
 
        /* Enable clock */
-       writel(1 << AT91SAM9261_ID_SPI1, &pmc->pcer);
+       writel(1 << ATMEL_ID_SPI1, &pmc->pcer);
 
        if (cs_mask & (1 << 0)) {
                at91_set_a_periph(AT91_PIO_PORTB, 28, 1);
index c85fd29b4620dda98d18ecfdc3ba25b0ca2c6b67..59b18648b7f859ebc6ac62f30c92cd9ea2779aed 100644 (file)
 #define ATMEL_SIZE_SRAM                0x00028000      /* Internal SRAM size (160Kb) */
 
 #define ATMEL_BASE_ROM         0x00400000      /* Internal ROM base address */
-#define ATMEL_SIZE_ROM         SZ_32K          /* Internal ROM size (32Kb) */
+#define ATMEL_SIZE_ROM         0x00008000      /* Internal ROM size (32Kb) */
 
 #define ATMEL_BASE_UHP         0x00500000      /* USB Host controller */
 #define ATMEL_BASE_LCDC                0x00600000      /* LDC controller */
  * Other misc defines
  */
 #define ATMEL_PIO_PORTS                3               /* theese SoCs have 3 PIO */
+#define ATMEL_PMC_UHP          AT91SAM926x_PMC_UHP
 #define ATMEL_BASE_PIO         ATMEL_BASE_PIOA
 
 /*