* ld-powerpc/relax.d: Fix whitespace.

* ld-powerpc/relaxr.d: Likewise.

diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog
index 040ce8fa1b42f238d3a3a1d8c7561e2315071d1e..87ef48e95ee16bba7406cf2e3066f4486b395ba1 100644 (file)
--- a/ld/testsuite/ChangeLog
+++ b/ld/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2009-08-23  Andreas Schwab  <schwab@linux-m68k.org>
+
+       * ld-powerpc/relax.d: Fix whitespace.
+       * ld-powerpc/relaxr.d: Likewise.
+
 2009-08-21  Daniel Gutson  <dgutson@codesourcery.com>
 
        * ld-arm/callweak.d: Opcodes updated.

diff --git a/ld/testsuite/ld-powerpc/relax.d b/ld/testsuite/ld-powerpc/relax.d
index 2f095227e9f223b4141121e480f1a1294034cb8e..51d253be33b3e45b67d900a4106dfe19f71aa0c2 100644 (file)
--- a/ld/testsuite/ld-powerpc/relax.d
+++ b/ld/testsuite/ld-powerpc/relax.d
@@ -4,12 +4,12 @@
 Disassembly of section .text:
 
 00000000 <_start>:
-   0:  48 00 43 21     bl      4320 <near>
-   4:  48 00 00 11     bl      14 <_start\+0x14>
-   8:  48 00 43 19     bl      4320 <near>
-   c:  48 00 00 09     bl      14 <_start\+0x14>
-  10:  48 00 00 14     b       24 <.*>
-  14:  3d 80 80 00     lis     r12,-32768
-  18:  39 8c 12 34     addi    r12,r12,4660
-  1c:  7d 89 03 a6     mtctr   r12
+   0:  48 00 43 21     bl      4320 <near>
+   4:  48 00 00 11     bl      14 <_start\+0x14>
+   8:  48 00 43 19     bl      4320 <near>
+   c:  48 00 00 09     bl      14 <_start\+0x14>
+  10:  48 00 00 14     b       24 <.*>
+  14:  3d 80 80 00     lis     r12,-32768
+  18:  39 8c 12 34     addi    r12,r12,4660
+  1c:  7d 89 03 a6     mtctr   r12
   20:  4e 80 04 20     bctr

diff --git a/ld/testsuite/ld-powerpc/relaxr.d b/ld/testsuite/ld-powerpc/relaxr.d
index 62fa8aeb62fea26a9d41de2bee9fc44c00f6355e..ce8cb9c7bf80084c6857dad9f9ffa6a64b6879e5 100644 (file)
--- a/ld/testsuite/ld-powerpc/relaxr.d
+++ b/ld/testsuite/ld-powerpc/relaxr.d
@@ -4,22 +4,22 @@
 Disassembly of section .text:
 
 00000000 <_start>:
-   0:  48 00 00 15     bl      14 <_start\+0x14>
-   4:  48 00 00 21     bl      24 <_start\+0x24>
-   8:  48 00 00 0d     bl      14 <_start\+0x14>
+   0:  48 00 00 15     bl      14 <_start\+0x14>
+   4:  48 00 00 21     bl      24 <_start\+0x24>
+   8:  48 00 00 0d     bl      14 <_start\+0x14>
                        8: R_PPC_NONE   \*ABS\*
-   c:  48 00 00 19     bl      24 <_start\+0x24>
+   c:  48 00 00 19     bl      24 <_start\+0x24>
                        c: R_PPC_NONE   \*ABS\*
-  10:  48 00 00 24     b       34 <_start\+0x34>
-  14:  3d 80 00 00     lis     r12,0
+  10:  48 00 00 24     b       34 <_start\+0x34>
+  14:  3d 80 00 00     lis     r12,0
                        16: R_PPC_ADDR16_HA     near
-  18:  39 8c 00 00     addi    r12,r12,0
+  18:  39 8c 00 00     addi    r12,r12,0
                        1a: R_PPC_ADDR16_LO     near
-  1c:  7d 89 03 a6     mtctr   r12
+  1c:  7d 89 03 a6     mtctr   r12
   20:  4e 80 04 20     bctr
-  24:  3d 80 00 00     lis     r12,0
+  24:  3d 80 00 00     lis     r12,0
                        26: R_PPC_ADDR16_HA     far
-  28:  39 8c 00 00     addi    r12,r12,0
+  28:  39 8c 00 00     addi    r12,r12,0
                        2a: R_PPC_ADDR16_LO     far
-  2c:  7d 89 03 a6     mtctr   r12
+  2c:  7d 89 03 a6     mtctr   r12
   30:  4e 80 04 20     bctr