T: git git://github.com/linux-test-project/ltp.git
S: Maintained
-M32R ARCHITECTURE
-W: http://www.linux-m32r.org/
-S: Orphan
-F: arch/m32r/
-
M68K ARCHITECTURE
M: Geert Uytterhoeven <geert@linux-m68k.org>
L: linux-m68k@lists.linux-m68k.org
+++ /dev/null
-# SPDX-License-Identifier: GPL-2.0
-config M32R
- bool
- default y
- select HAVE_IDE
- select HAVE_OPROFILE
- select INIT_ALL_POSSIBLE
- select HAVE_KERNEL_GZIP
- select HAVE_KERNEL_BZIP2
- select HAVE_KERNEL_LZMA
- select ARCH_WANT_IPC_PARSE_VERSION
- select HAVE_DEBUG_BUGVERBOSE
- select VIRT_TO_BUS
- select GENERIC_IRQ_PROBE
- select GENERIC_IRQ_SHOW
- select GENERIC_ATOMIC64
- select ARCH_HAS_DEVMEM_IS_ALLOWED
- select ARCH_USES_GETTIMEOFFSET
- select MODULES_USE_ELF_RELA
- select HAVE_DEBUG_STACKOVERFLOW
- select CPU_NO_EFFICIENT_FFS
- select DMA_DIRECT_OPS
- select ARCH_NO_COHERENT_DMA_MMAP if !MMU
-
-config SBUS
- bool
-
-config GENERIC_ISA_DMA
- bool
- default y
-
-config ZONE_DMA
- bool
- default y
-
-config NO_IOPORT_MAP
- def_bool y
-
-config NO_DMA
- def_bool n
-
-config HZ
- int
- default 100
-
-source "init/Kconfig"
-
-source "kernel/Kconfig.freezer"
-
-
-menu "Processor type and features"
-
-choice
- prompt "Platform Type"
- default PLAT_MAPPI
-
-config PLAT_MAPPI
- bool "Mappi-I"
- help
- The Mappi-I is an FPGA board for SOC (System-On-a-Chip) prototyping.
- You can operate a Linux system on this board by using an M32R
- softmacro core, which is a fully-synthesizable functional model
- described in Verilog-HDL.
-
- The Mappi-I board was the first platform, which had been used
- to port and develop a Linux system for the M32R processor.
- Currently, the Mappi-II, an heir to the Mappi-I, is available.
-
-config PLAT_USRV
- bool "uServer"
- select PLAT_HAS_INT1ICU
-
-config PLAT_M32700UT
- bool "M32700UT"
- select PLAT_HAS_INT0ICU
- select PLAT_HAS_INT1ICU
- select PLAT_HAS_INT2ICU
- help
- The M3T-M32700UT is an evaluation board based on uT-Engine
- specification. This board has an M32700 (Chaos) evaluation chip.
- You can say Y for SMP, because the M32700 is a single chip
- multiprocessor.
-
-config PLAT_OPSPUT
- bool "OPSPUT"
- select PLAT_HAS_INT0ICU
- select PLAT_HAS_INT1ICU
- select PLAT_HAS_INT2ICU
- help
- The OPSPUT is an evaluation board based on uT-Engine
- specification. This board has a OPSP-REP chip.
-
-config PLAT_OAKS32R
- bool "OAKS32R"
- help
- The OAKS32R is a tiny, inexpensive evaluation board.
- Please note that if you say Y here and choose chip "M32102",
- say N for MMU and select a no-MMU version kernel, otherwise
- a kernel with MMU support will not work, because the M32102
- is a microcontroller for embedded systems and it has no MMU.
-
-config PLAT_MAPPI2
- bool "Mappi-II(M3A-ZA36/M3A-ZA52)"
-
-config PLAT_MAPPI3
- bool "Mappi-III(M3A-2170)"
-
-config PLAT_M32104UT
- bool "M32104UT"
- select PLAT_HAS_INT1ICU
- help
- The M3T-M32104UT is an reference board based on uT-Engine
- specification. This board has a M32104 chip.
-
-endchoice
-
-choice
- prompt "Processor family"
- default CHIP_M32700
-
-config CHIP_M32700
- bool "M32700 (Chaos)"
-
-config CHIP_M32102
- bool "M32102"
-
-config CHIP_M32104
- bool "M32104"
- depends on PLAT_M32104UT
-
-config CHIP_VDEC2
- bool "VDEC2"
-
-config CHIP_OPSP
- bool "OPSP"
-
-endchoice
-
-config MMU
- bool "Support for memory management hardware"
- depends on CHIP_M32700 || CHIP_VDEC2 || CHIP_OPSP
- default y
-
-config TLB_ENTRIES
- int "TLB Entries"
- depends on CHIP_M32700 || CHIP_VDEC2 || CHIP_OPSP
- default 32 if CHIP_M32700 || CHIP_OPSP
- default 16 if CHIP_VDEC2
-
-
-config ISA_M32R
- bool
- depends on CHIP_M32102 || CHIP_M32104
- default y
-
-config ISA_M32R2
- bool
- depends on CHIP_M32700 || CHIP_VDEC2 || CHIP_OPSP
- default y
-
-config ISA_DSP_LEVEL2
- bool
- depends on CHIP_M32700 || CHIP_OPSP
- default y
-
-config ISA_DUAL_ISSUE
- bool
- depends on CHIP_M32700 || CHIP_OPSP
- default y
-
-config PLAT_HAS_INT0ICU
- bool
- default n
-
-config PLAT_HAS_INT1ICU
- bool
- default n
-
-config PLAT_HAS_INT2ICU
- bool
- default n
-
-config BUS_CLOCK
- int "Bus Clock [Hz] (integer)"
- default "70000000" if PLAT_MAPPI
- default "25000000" if PLAT_USRV
- default "50000000" if PLAT_MAPPI3
- default "50000000" if PLAT_M32700UT
- default "50000000" if PLAT_OPSPUT
- default "54000000" if PLAT_M32104UT
- default "33333333" if PLAT_OAKS32R
- default "20000000" if PLAT_MAPPI2
-
-config TIMER_DIVIDE
- int "Timer divider (integer)"
- default "128"
-
-config CPU_BIG_ENDIAN
- bool
- default !CPU_LITTLE_ENDIAN
-
-config CPU_LITTLE_ENDIAN
- bool "Generate little endian code"
- default n
-
-config MEMORY_START
- hex "Physical memory start address (hex)"
- default "08000000" if PLAT_MAPPI || PLAT_MAPPI2 || PLAT_MAPPI3
- default "08000000" if PLAT_USRV
- default "08000000" if PLAT_M32700UT
- default "08000000" if PLAT_OPSPUT
- default "04000000" if PLAT_M32104UT
- default "01000000" if PLAT_OAKS32R
-
-config MEMORY_SIZE
- hex "Physical memory size (hex)"
- default "08000000" if PLAT_MAPPI3
- default "04000000" if PLAT_MAPPI || PLAT_MAPPI2
- default "02000000" if PLAT_USRV
- default "01000000" if PLAT_M32700UT
- default "01000000" if PLAT_OPSPUT
- default "01000000" if PLAT_M32104UT
- default "00800000" if PLAT_OAKS32R
-
-config ARCH_DISCONTIGMEM_ENABLE
- bool "Internal RAM Support"
- depends on CHIP_M32700 || CHIP_M32102 || CHIP_VDEC2 || CHIP_OPSP || CHIP_M32104
- default y
-
-source "mm/Kconfig"
-
-config IRAM_START
- hex "Internal memory start address (hex)"
- default "00f00000" if !CHIP_M32104
- default "00700000" if CHIP_M32104
- depends on (CHIP_M32700 || CHIP_M32102 || CHIP_VDEC2 || CHIP_OPSP || CHIP_M32104) && DISCONTIGMEM
-
-config IRAM_SIZE
- hex "Internal memory size (hex)"
- depends on (CHIP_M32700 || CHIP_M32102 || CHIP_VDEC2 || CHIP_OPSP || CHIP_M32104) && DISCONTIGMEM
- default "00080000" if CHIP_M32700
- default "00010000" if CHIP_M32102 || CHIP_OPSP || CHIP_M32104
- default "00008000" if CHIP_VDEC2
-
-#
-# Define implied options from the CPU selection here
-#
-
-config GENERIC_LOCKBREAK
- bool
- default y
- depends on SMP && PREEMPT
-
-config RWSEM_GENERIC_SPINLOCK
- bool
- depends on M32R
- default y
-
-config RWSEM_XCHGADD_ALGORITHM
- bool
- default n
-
-config ARCH_HAS_ILOG2_U32
- bool
- default n
-
-config ARCH_HAS_ILOG2_U64
- bool
- default n
-
-config GENERIC_HWEIGHT
- bool
- default y
-
-config GENERIC_CALIBRATE_DELAY
- bool
- default y
-
-config SCHED_OMIT_FRAME_POINTER
- bool
- default y
-
-source "kernel/Kconfig.preempt"
-
-config SMP
- bool "Symmetric multi-processing support"
- depends on MMU
- ---help---
- This enables support for systems with more than one CPU. If you have
- a system with only one CPU, say N. If you have a system with more
- than one CPU, say Y.
-
- If you say N here, the kernel will run on uni- and multiprocessor
- machines, but will use only one CPU of a multiprocessor machine. If
- you say Y here, the kernel will run on many, but not all,
- uniprocessor machines. On a uniprocessor machine, the kernel
- will run faster if you say N here.
-
- People using multiprocessor machines who say Y here should also say
- Y to "Enhanced Real Time Clock Support", below. The "Advanced Power
- Management" code will be disabled if you say Y here.
-
- See also the SMP-HOWTO available at
- <http://tldp.org/HOWTO/SMP-HOWTO.html>.
-
- If you don't know what to do here, say N.
-
-config CHIP_M32700_TS1
- bool "Workaround code for the M32700 TS1 chip's bug"
- depends on (CHIP_M32700 && SMP)
- default n
-
-config NR_CPUS
- int "Maximum number of CPUs (2-32)"
- range 2 32
- depends on SMP
- default "2"
- help
- This allows you to specify the maximum number of CPUs which this
- kernel will support. The maximum supported value is 32 and the
- minimum value which makes sense is 2.
-
- This is purely to save memory - each supported CPU adds
- approximately eight kilobytes to the kernel image.
-
-# Common NUMA Features
-config NUMA
- bool "Numa Memory Allocation Support"
- depends on SMP && BROKEN
- default n
-
-config NODES_SHIFT
- int
- default "1"
- depends on NEED_MULTIPLE_NODES
-
-endmenu
-
-
-menu "Bus options (PCI, PCMCIA, EISA, MCA, ISA)"
-
-config PCI
- bool "PCI support"
- depends on BROKEN
- default n
- help
- Find out whether you have a PCI motherboard. PCI is the name of a
- bus system, i.e. the way the CPU talks to the other stuff inside
- your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
- VESA. If you have PCI, say Y, otherwise N.
-
-choice
- prompt "PCI access mode"
- depends on PCI
- default PCI_GOANY
-
-config PCI_GOBIOS
- bool "BIOS"
- ---help---
- On PCI systems, the BIOS can be used to detect the PCI devices and
- determine their configuration. However, some old PCI motherboards
- have BIOS bugs and may crash if this is done. Also, some embedded
- PCI-based systems don't have any BIOS at all. Linux can also try to
- detect the PCI hardware directly without using the BIOS.
-
- With this option, you can specify how Linux should detect the PCI
- devices. If you choose "BIOS", the BIOS will be used, if you choose
- "Direct", the BIOS won't be used, and if you choose "Any", the
- kernel will try the direct access method and falls back to the BIOS
- if that doesn't work. If unsure, go with the default, which is
- "Any".
-
-config PCI_GODIRECT
- bool "Direct"
-
-config PCI_GOANY
- bool "Any"
-
-endchoice
-
-config PCI_BIOS
- bool
- depends on PCI && (PCI_GOBIOS || PCI_GOANY)
- default y
-
-config PCI_DIRECT
- bool
- depends on PCI && (PCI_GODIRECT || PCI_GOANY)
- default y
-
-source "drivers/pci/Kconfig"
-
-config ISA
- bool
-
-source "drivers/pcmcia/Kconfig"
-
-endmenu
-
-
-menu "Executable file formats"
-
-source "fs/Kconfig.binfmt"
-
-endmenu
-
-source "net/Kconfig"
-
-source "drivers/Kconfig"
-
-source "fs/Kconfig"
-
-source "arch/m32r/Kconfig.debug"
-
-source "security/Kconfig"
-
-source "crypto/Kconfig"
-
-source "lib/Kconfig"
+++ /dev/null
-# SPDX-License-Identifier: GPL-2.0
-menu "Kernel hacking"
-
-source "lib/Kconfig.debug"
-
-config DEBUG_PAGEALLOC
- bool "Debug page memory allocations"
- depends on DEBUG_KERNEL && BROKEN
- help
- Unmap pages from the kernel linear mapping after free_pages().
- This results in a large slowdown, but helps to find certain types
- of memory corruptions.
-
-config FRAME_POINTER
- bool "Compile the kernel with frame pointers"
- help
- If you say Y here the resulting kernel image will be slightly larger
- and slower, but it will give very useful debugging information.
- If you don't debug the kernel, you can say N, but we may not be able
- to solve problems without frame pointers.
-
-endmenu
+++ /dev/null
-# SPDX-License-Identifier: GPL-2.0
-#
-# m32r/Makefile
-#
-# This file is included by the global makefile so that you can add your own
-# architecture-specific flags and dependencies.
-#
-
-KBUILD_DEFCONFIG := m32700ut.smp_defconfig
-
-LDFLAGS :=
-OBJCOPYFLAGS := -O binary -R .note -R .comment -S
-LDFLAGS_vmlinux :=
-
-KBUILD_CFLAGS += -pipe -fno-schedule-insns
-KBUILD_CFLAGS_KERNEL += -mmodel=medium
-KBUILD_CFLAGS_MODULE += -mmodel=large
-
-ifdef CONFIG_CHIP_VDEC2
-cflags-$(CONFIG_ISA_M32R2) += -DNO_FPU -Wa,-bitinst
-aflags-$(CONFIG_ISA_M32R2) += -DNO_FPU -O2 -Wa,-bitinst -Wa,-no-parallel
-else
-cflags-$(CONFIG_ISA_M32R2) += -DNO_FPU -m32r2
-aflags-$(CONFIG_ISA_M32R2) += -DNO_FPU -m32r2 -O2
-endif
-
-cflags-$(CONFIG_ISA_M32R) += -DNO_FPU
-aflags-$(CONFIG_ISA_M32R) += -DNO_FPU -O2 -Wa,-no-bitinst
-
-KBUILD_CFLAGS += $(cflags-y)
-KBUILD_AFLAGS += $(aflags-y)
-
-CHECKFLAGS += -D__m32r__ -D__BIG_ENDIAN__=1
-
-head-y := arch/m32r/kernel/head.o
-
-LIBGCC := $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name)
-
-libs-y += arch/m32r/lib/ $(LIBGCC)
-core-y += arch/m32r/kernel/ \
- arch/m32r/mm/ \
- arch/m32r/boot/ \
- arch/m32r/platforms/
-
-drivers-$(CONFIG_OPROFILE) += arch/m32r/oprofile/
-
-boot := arch/m32r/boot
-
-PHONY += zImage
-
-all: zImage
-
-zImage: vmlinux
- $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
-
-compressed: zImage
-
-archclean:
- $(Q)$(MAKE) $(clean)=$(boot)
-
-define archhelp
- echo '* zImage - Compressed kernel image (arch/$(ARCH)/boot/zImage)'
-endef
+++ /dev/null
-#
-# arch/m32r/boot/Makefile
-#
-# This file is subject to the terms and conditions of the GNU General Public
-# License. See the file "COPYING" in the main directory of this archive
-# for more details.
-
-targets := zImage
-subdir- := compressed
-
-obj-y := setup.o
-
-$(obj)/zImage: $(obj)/compressed/vmlinux FORCE
- $(call if_changed,objcopy)
- @echo 'Kernel: $@ is ready'
-
-$(obj)/compressed/vmlinux: FORCE
- $(Q)$(MAKE) $(build)=$(obj)/compressed $@
-
+++ /dev/null
-# SPDX-License-Identifier: GPL-2.0
-#
-# linux/arch/m32r/boot/compressed/Makefile
-#
-# create a compressed vmlinux image from the original vmlinux
-#
-
-targets := vmlinux vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 \
- vmlinux.bin.lzma head.o misc.o piggy.o vmlinux.lds
-
-OBJECTS = $(obj)/head.o $(obj)/misc.o
-
-#
-# IMAGE_OFFSET is the load offset of the compression loader
-#
-#IMAGE_OFFSET := $(shell printf "0x%08x" $$[$(CONFIG_MEMORY_START)+0x2000])
-#IMAGE_OFFSET := $(shell printf "0x%08x" $$[$(CONFIG_MEMORY_START)+0x00400000])
-
-LDFLAGS_vmlinux := -T
-
-$(obj)/vmlinux: $(obj)/vmlinux.lds $(OBJECTS) $(obj)/piggy.o FORCE
- $(call if_changed,ld)
-
-$(obj)/vmlinux.bin: vmlinux FORCE
- $(call if_changed,objcopy)
-
-$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE
- $(call if_changed,gzip)
-
-$(obj)/vmlinux.bin.bz2: $(obj)/vmlinux.bin FORCE
- $(call if_changed,bzip2)
-
-$(obj)/vmlinux.bin.lzma: $(obj)/vmlinux.bin FORCE
- $(call if_changed,lzma)
-
-CFLAGS_misc.o += -fpic
-
-ifdef CONFIG_MMU
-LDFLAGS_piggy.o := -r --format binary --oformat elf32-m32r-linux -T
-else
-LDFLAGS_piggy.o := -r --format binary --oformat elf32-m32r -T
-endif
-
-OBJCOPYFLAGS += -R .empty_zero_page
-
-suffix-$(CONFIG_KERNEL_GZIP) = gz
-suffix-$(CONFIG_KERNEL_BZIP2) = bz2
-suffix-$(CONFIG_KERNEL_LZMA) = lzma
-
-$(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/vmlinux.bin.$(suffix-y) FORCE
- $(call if_changed,ld)
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * 1. load vmlinuz
- *
- * CONFIG_MEMORY_START +-----------------------+
- * | vmlinuz |
- * +-----------------------+
- * 2. decompressed
- *
- * CONFIG_MEMORY_START +-----------------------+
- * | vmlinuz |
- * +-----------------------+
- * | |
- * BOOT_RELOC_ADDR +-----------------------+
- * | |
- * KERNEL_DECOMPRESS_ADDR +-----------------------+
- * | vmlinux |
- * +-----------------------+
- *
- * 3. relocate copy & jump code
- *
- * CONFIG_MEMORY_START +-----------------------+
- * | vmlinuz |
- * +-----------------------+
- * | |
- * BOOT_RELOC_ADDR +-----------------------+
- * | boot(copy&jump) |
- * KERNEL_DECOMPRESS_ADDR +-----------------------+
- * | vmlinux |
- * +-----------------------+
- *
- * 4. relocate decompressed kernel
- *
- * CONFIG_MEMORY_START +-----------------------+
- * | vmlinux |
- * +-----------------------+
- * | |
- * BOOT_RELOC_ADDR +-----------------------+
- * | boot(copy&jump) |
- * KERNEL_DECOMPRESS_ADDR +-----------------------+
- * | |
- * +-----------------------+
- *
- */
-#ifdef __ASSEMBLY__
-#define __val(x) x
-#else
-#define __val(x) (x)
-#endif
-
-#define DECOMPRESS_OFFSET_BASE __val(0x00900000)
-#define BOOT_RELOC_SIZE __val(0x00001000)
-
-#define KERNEL_EXEC_ADDR __val(CONFIG_MEMORY_START)
-#define KERNEL_DECOMPRESS_ADDR __val(CONFIG_MEMORY_START + \
- DECOMPRESS_OFFSET_BASE + BOOT_RELOC_SIZE)
-#define KERNEL_ENTRY __val(CONFIG_MEMORY_START + 0x1000)
-
-#define BOOT_EXEC_ADDR __val(CONFIG_MEMORY_START)
-#define BOOT_RELOC_ADDR __val(CONFIG_MEMORY_START + DECOMPRESS_OFFSET_BASE)
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * linux/arch/m32r/boot/compressed/head.S
- *
- * Copyright (c) 2001-2003 Hiroyuki Kondo, Hirokazu Takata,
- * Hitoshi Yamamoto, Takeo Takahashi
- * Copyright (c) 2004 Hirokazu Takata
- */
-
- .text
-#include <linux/linkage.h>
-#include <asm/addrspace.h>
-#include <asm/page.h>
-#include <asm/assembler.h>
-
- /*
- * This code can be loaded anywhere, as long as output will not
- * overlap it.
- *
- * NOTE: This head.S should *NOT* be compiled with -fpic.
- *
- */
-
- .global startup
- .global __bss_start, _ebss, end, zimage_data, zimage_len
- __ALIGN
-startup:
- ldi r0, #0x0000 /* SPI, disable EI */
- mvtc r0, psw
-
- ldi r12, #-8
- bl 1f
- .fillinsn
-1:
- seth r1, #high(CONFIG_MEMORY_START + 0x00400000) /* Start address */
- add r12, r14 /* Real address */
- sub r12, r1 /* difference */
-
- .global got_len
- seth r3, #high(_GLOBAL_OFFSET_TABLE_+8)
- or3 r3, r3, #low(_GLOBAL_OFFSET_TABLE_+12)
- add r3, r14
-
- /* Update the contents of global offset table */
- ldi r1, #low(got_len)
- srli r1, #2
- beqz r1, 2f
- .fillinsn
-1:
- ld r2, @r3
- add r2, r12
- st r2, @r3
- addi r3, #4
- addi r1, #-1
- bnez r1, 1b
- .fillinsn
-2:
- /* XXX: resolve plt */
-
-/*
- * Clear BSS first so that there are no surprises...
- */
-#ifdef CONFIG_ISA_DUAL_ISSUE
- seth r2, #high(__bss_start)
- or3 r2, r2, #low(__bss_start)
- add r2, r12
- seth r3, #high(_ebss)
- or3 r3, r3, #low(_ebss)
- add r3, r12
- sub r3, r2
-
- ; R4 = BSS size in longwords (rounded down)
- mv r4, r3 || ldi r1, #0
- srli r4, #4 || addi r2, #-4
- beqz r4, .Lendloop1
-.Lloop1:
-#ifndef CONFIG_CHIP_M32310
- ; Touch memory for the no-write-allocating cache.
- ld r0, @(4,r2)
-#endif
- st r1, @+r2 || addi r4, #-1
- st r1, @+r2
- st r1, @+r2
- st r1, @+r2 || cmpeq r1, r4 ; R4 = 0?
- bnc .Lloop1
-.Lendloop1:
- and3 r4, r3, #15
- addi r2, #4
- beqz r4, .Lendloop2
-.Lloop2:
- stb r1, @r2 || addi r4, #-1
- addi r2, #1
- bnez r4, .Lloop2
-.Lendloop2:
-
-#else /* not CONFIG_ISA_DUAL_ISSUE */
- seth r2, #high(__bss_start)
- or3 r2, r2, #low(__bss_start)
- add r2, r12
- seth r3, #high(_ebss)
- or3 r3, r3, #low(_ebss)
- add r3, r12
- sub r3, r2
- mv r4, r3
- srli r4, #2 ; R4 = BSS size in longwords (rounded down)
- ldi r1, #0 ; clear R1 for longwords store
- addi r2, #-4 ; account for pre-inc store
- beqz r4, .Lendloop1 ; any more to go?
-.Lloop1:
- st r1, @+r2 ; yep, zero out another longword
- addi r4, #-1 ; decrement count
- bnez r4, .Lloop1 ; go do some more
-.Lendloop1:
-
-#endif /* not CONFIG_ISA_DUAL_ISSUE */
-
- seth r1, #high(end)
- or3 r1, r1, #low(end)
- add r1, r12
- mv sp, r1
-
-/*
- * decompress the kernel
- */
- mv r0, sp
- srli r0, 31 /* MMU is ON or OFF */
- seth r1, #high(zimage_data)
- or3 r1, r1, #low(zimage_data)
- add r1, r12
- seth r2, #high(zimage_len)
- or3 r2, r2, #low(zimage_len)
- mv r3, sp
-
- bl decompress_kernel
-
-#if defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_VDEC2)
- /* Cache flush */
- ldi r0, -1
- ldi r1, 0xd0 ; invalidate i-cache, copy back d-cache
- stb r1, @r0
-#elif defined(CONFIG_CHIP_M32102)
- /* Cache flush */
- ldi r0, -2
- ldi r1, 0x0100 ; invalidate
- stb r1, @r0
-#elif defined(CONFIG_CHIP_M32104)
- /* Cache flush */
- ldi r0, -2
- ldi r1, 0x0700 ; invalidate i-cache, copy back d-cache
- sth r1, @r0
-#else
-#error "put your cache flush function, please"
-#endif
-
- mv r0, sp
- srli r0, 31 /* MMU is ON or OFF */
- slli r0, 31
- or3 r0, r0, #0x2000
- seth r1, #high(CONFIG_MEMORY_START)
- or r0, r1
- jmp r0
-
- .balign 512
-fake_headers_as_bzImage:
- .short 0
- .ascii "HdrS"
- .short 0x0202
- .short 0
- .short 0
- .byte 0x00, 0x10
- .short 0
- .byte 0
- .byte 1
- .byte 0x00, 0x80
- .long 0
- .long 0
-
+++ /dev/null
-#!/bin/sh
-#
-# arch/sh/boot/install.sh
-#
-# This file is subject to the terms and conditions of the GNU General Public
-# License. See the file "COPYING" in the main directory of this archive
-# for more details.
-#
-# Copyright (C) 1995 by Linus Torvalds
-#
-# Adapted from code in arch/i386/boot/Makefile by H. Peter Anvin
-# Adapted from code in arch/i386/boot/install.sh by Russell King
-# Adapted from code in arch/arm/boot/install.sh by Stuart Menefy
-# Adapted from code in arch/sh/boot/install.sh by Takeo Takahashi
-#
-# "make install" script for sh architecture
-#
-# Arguments:
-# $1 - kernel version
-# $2 - kernel image file
-# $3 - kernel map file
-# $4 - default install path (blank if root directory)
-#
-
-# User may have a custom install script
-
-if [ -x /sbin/${INSTALLKERNEL} ]; then
- exec /sbin/${INSTALLKERNEL} "$@"
-fi
-
-if [ "$2" = "zImage" ]; then
-# Compressed install
- echo "Installing compressed kernel"
- if [ -f $4/vmlinuz-$1 ]; then
- mv $4/vmlinuz-$1 $4/vmlinuz.old
- fi
-
- if [ -f $4/System.map-$1 ]; then
- mv $4/System.map-$1 $4/System.old
- fi
-
- cat $2 > $4/vmlinuz-$1
- cp $3 $4/System.map-$1
-else
-# Normal install
- echo "Installing normal kernel"
- if [ -f $4/vmlinux-$1 ]; then
- mv $4/vmlinux-$1 $4/vmlinux.old
- fi
-
- if [ -f $4/System.map ]; then
- mv $4/System.map $4/System.old
- fi
-
- cat $2 > $4/vmlinux-$1
- cp $3 $4/System.map
-fi
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0
-/*
- * arch/m32r/boot/compressed/m32r_sio.c
- *
- * 2003-02-12: Takeo Takahashi
- * 2006-11-30: OPSPUT support by Kazuhiro Inaoka
- *
- */
-
-#include <asm/processor.h>
-
-static void m32r_putc(char c);
-
-static int puts(const char *s)
-{
- char c;
- while ((c = *s++))
- m32r_putc(c);
- return 0;
-}
-
-#if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_OPSPUT)
-#include <asm/m32r.h>
-#include <asm/io.h>
-
-#define USE_FPGA_MAP 0
-
-#if USE_FPGA_MAP
-/*
- * fpga configuration program uses MMU, and define map as same as
- * M32104 uT-Engine board.
- */
-#define BOOT_SIO0STS (volatile unsigned short *)(0x02c00000 + 0x20006)
-#define BOOT_SIO0TXB (volatile unsigned short *)(0x02c00000 + 0x2000c)
-#else
-#undef PLD_BASE
-#if defined(CONFIG_PLAT_OPSPUT)
-#define PLD_BASE 0x1cc00000
-#else
-#define PLD_BASE 0xa4c00000
-#endif
-#define BOOT_SIO0STS PLD_ESIO0STS
-#define BOOT_SIO0TXB PLD_ESIO0TXB
-#endif
-
-static void m32r_putc(char c)
-{
- while ((*BOOT_SIO0STS & 0x3) != 0x3)
- cpu_relax();
- if (c == '\n') {
- *BOOT_SIO0TXB = '\r';
- while ((*BOOT_SIO0STS & 0x3) != 0x3)
- cpu_relax();
- }
- *BOOT_SIO0TXB = c;
-}
-#else /* !(CONFIG_PLAT_M32700UT) */
-#if defined(CONFIG_PLAT_MAPPI2)
-#define SIO0STS (volatile unsigned short *)(0xa0efd000 + 14)
-#define SIO0TXB (volatile unsigned short *)(0xa0efd000 + 30)
-#else
-#define SIO0STS (volatile unsigned short *)(0x00efd000 + 14)
-#define SIO0TXB (volatile unsigned short *)(0x00efd000 + 30)
-#endif
-
-static void m32r_putc(char c)
-{
- while ((*SIO0STS & 0x1) == 0)
- cpu_relax();
- if (c == '\n') {
- *SIO0TXB = '\r';
- while ((*SIO0STS & 0x1) == 0)
- cpu_relax();
- }
- *SIO0TXB = c;
-}
-#endif
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0
-/*
- * arch/m32r/boot/compressed/misc.c
- *
- * This is a collection of several routines from gzip-1.0.3
- * adapted for Linux.
- *
- * malloc by Hannu Savolainen 1993 and Matthias Urlichs 1994
- *
- * Adapted for SH by Stuart Menefy, Aug 1999
- *
- * 2003-02-12: Support M32R by Takeo Takahashi
- */
-
-/*
- * gzip declarations
- */
-#define STATIC static
-
-#undef memset
-#undef memcpy
-#define memzero(s, n) memset ((s), 0, (n))
-
-static void error(char *m);
-
-#include "m32r_sio.c"
-
-static unsigned long free_mem_ptr;
-static unsigned long free_mem_end_ptr;
-
-#ifdef CONFIG_KERNEL_BZIP2
-void *memset(void *s, int c, size_t n)
-{
- char *ss = s;
-
- while (n--)
- *ss++ = c;
- return s;
-}
-#endif
-
-#ifdef CONFIG_KERNEL_GZIP
-void *memcpy(void *dest, const void *src, size_t n)
-{
- char *d = dest;
- const char *s = src;
- while (n--)
- *d++ = *s++;
-
- return dest;
-}
-
-#define BOOT_HEAP_SIZE 0x10000
-#include "../../../../lib/decompress_inflate.c"
-#endif
-
-#ifdef CONFIG_KERNEL_BZIP2
-#define BOOT_HEAP_SIZE 0x400000
-#include "../../../../lib/decompress_bunzip2.c"
-#endif
-
-#ifdef CONFIG_KERNEL_LZMA
-#define BOOT_HEAP_SIZE 0x10000
-#include "../../../../lib/decompress_unlzma.c"
-#endif
-
-static void error(char *x)
-{
- puts("\n\n");
- puts(x);
- puts("\n\n -- System halted");
-
- while(1); /* Halt */
-}
-
-void
-decompress_kernel(int mmu_on, unsigned char *zimage_data,
- unsigned int zimage_len, unsigned long heap)
-{
- unsigned char *input_data = zimage_data;
- int input_len = zimage_len;
- unsigned char *output_data;
-
- output_data = (unsigned char *)CONFIG_MEMORY_START + 0x2000
- + (mmu_on ? 0x80000000 : 0);
- free_mem_ptr = heap;
- free_mem_end_ptr = free_mem_ptr + BOOT_HEAP_SIZE;
-
- puts("\nDecompressing Linux... ");
- __decompress(input_data, input_len, NULL, NULL, output_data, 0,
- NULL, error);
- puts("done.\nBooting the kernel.\n");
-}
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-
-OUTPUT_ARCH(m32r)
-ENTRY(startup)
-SECTIONS
-{
- . = CONFIG_MEMORY_START + 0x00400000;
-
- _text = .;
- .text : { *(.text) } = 0
- .rodata : { *(.rodata) *(.rodata.*) }
- _etext = .;
-
- . = ALIGN(32 / 8);
- .data : { *(.data) }
- . = ALIGN(32 / 8);
- _got = .;
- .got : { *(.got) _egot = .; *(.got.*) }
- _edata = .;
-
- . = ALIGN(32 / 8);
- __bss_start = .;
- .bss : { *(.bss) *(.sbss) }
- . = ALIGN(32 / 8);
- _ebss = .;
- . = ALIGN(4096);
- . += 4096;
- end = . ;
-
- got_len = (_egot - _got);
-}
+++ /dev/null
-SECTIONS
-{
- .data : {
- zimage_data = .;
- *(.data)
- zimage_data_end = .;
- }
- zimage_len = zimage_data_end - zimage_data;
-}
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * linux/arch/m32r/boot/setup.S -- A setup code.
- *
- * Copyright (C) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
- * Hitoshi Yamamoto, Hayato Fujiwara
- *
- */
-
-#include <linux/linkage.h>
-#include <asm/segment.h>
-#include <asm/page.h>
-#include <asm/pgtable.h>
-
-#include <asm/assembler.h>
-#include <asm/mmu_context.h>
-#include <asm/m32r.h>
-
-/*
- * References to members of the boot_cpu_data structure.
- */
-
-#define CPU_PARAMS boot_cpu_data
-#define M32R_MCICAR 0xfffffff0
-#define M32R_MCDCAR 0xfffffff4
-#define M32R_MCCR 0xfffffffc
-#define M32R_BSCR0 0xffffffd2
-
-;BSEL
-#define BSEL0CR0 0x00ef5000
-#define BSEL0CR1 0x00ef5004
-#define BSEL1CR0 0x00ef5100
-#define BSEL1CR1 0x00ef5104
-#define BSEL0CR0_VAL 0x00000000
-#define BSEL0CR1_VAL 0x01200100
-#define BSEL1CR0_VAL 0x01018000
-#define BSEL1CR1_VAL 0x00200001
-
-;SDRAMC
-#define SDRAMC_SDRF0 0x00ef6000
-#define SDRAMC_SDRF1 0x00ef6004
-#define SDRAMC_SDIR0 0x00ef6008
-#define SDRAMC_SDIR1 0x00ef600c
-#define SDRAMC_SD0ADR 0x00ef6020
-#define SDRAMC_SD0ER 0x00ef6024
-#define SDRAMC_SD0TR 0x00ef6028
-#define SDRAMC_SD0MOD 0x00ef602c
-#define SDRAMC_SD1ADR 0x00ef6040
-#define SDRAMC_SD1ER 0x00ef6044
-#define SDRAMC_SD1TR 0x00ef6048
-#define SDRAMC_SD1MOD 0x00ef604c
-#define SDRAM0 0x18000000
-#define SDRAM1 0x1c000000
-
-/*------------------------------------------------------------------------
- * start up
- */
-
-/*------------------------------------------------------------------------
- * Kernel entry
- */
- .section .boot, "ax"
-ENTRY(boot)
-
-/* Set cache mode */
-#if defined(CONFIG_CHIP_XNUX2)
- ldi r0, #-2 ;LDIMM (r0, M32R_MCCR)
- ldi r1, #0x0101 ; cache on (with invalidation)
-; ldi r1, #0x00 ; cache off
- sth r1, @r0
-#elif defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_VDEC2) \
- || defined(CONFIG_CHIP_OPSP)
- ldi r0, #-4 ;LDIMM (r0, M32R_MCCR)
- ldi r1, #0x73 ; cache on (with invalidation)
-; ldi r1, #0x00 ; cache off
- st r1, @r0
-#elif defined(CONFIG_CHIP_M32102)
- ldi r0, #-4 ;LDIMM (r0, M32R_MCCR)
- ldi r1, #0x101 ; cache on (with invalidation)
-; ldi r1, #0x00 ; cache off
- st r1, @r0
-#elif defined(CONFIG_CHIP_M32104)
- ldi r0, #-96 ; DNCR0
- seth r1, #0x0060 ; from 0x00600000
- or3 r1, r1, #0x0005 ; size 2MB
- st r1, @r0
- seth r1, #0x0100 ; from 0x01000000
- or3 r1, r1, #0x0003 ; size 16MB
- st r1, @+r0
- seth r1, #0x0200 ; from 0x02000000
- or3 r1, r1, #0x0002 ; size 32MB
- st r1, @+r0
- ldi r0, #-4 ;LDIMM (r0, M32R_MCCR)
- ldi r1, #0x703 ; cache on (with invalidation)
- st r1, @r0
-#else
-#error unknown chip configuration
-#endif
-
-#ifdef CONFIG_SMP
- ;; if not BSP (CPU#0) goto AP_loop
- seth r5, #shigh(M32R_CPUID_PORTL)
- ld r5, @(low(M32R_CPUID_PORTL), r5)
- bnez r5, AP_loop
-#if !defined(CONFIG_PLAT_USRV)
- ;; boot AP
- ld24 r5, #0xeff2f8 ; IPICR7
- ldi r6, #0x2 ; IPI to CPU1
- st r6, @r5
-#endif
-#endif
-
-/*
- * Now, Jump to stext
- * if with MMU, TLB on.
- * if with no MMU, only jump.
- */
- .global eit_vector
-mmu_on:
- LDIMM (r13, stext)
-#ifdef CONFIG_MMU
- bl init_tlb
- LDIMM (r2, eit_vector) ; set EVB(cr5)
- mvtc r2, cr5
- seth r0, #high(MMU_REG_BASE) ; Set MMU_REG_BASE higher
- or3 r0, r0, #low(MMU_REG_BASE) ; Set MMU_REG_BASE lower
- ldi r1, #0x01
- st r1, @(MATM_offset,r0) ; Set MATM (T bit ON)
- ld r0, @(MATM_offset,r0) ; Check
-#else
-#if defined(CONFIG_CHIP_M32700)
- seth r0,#high(M32R_MCDCAR)
- or3 r0,r0,#low(M32R_MCDCAR)
- ld24 r1,#0x8080
- st r1,@r0
-#elif defined(CONFIG_CHIP_M32104)
- LDIMM (r2, eit_vector) ; set EVB(cr5)
- mvtc r2, cr5
-#endif
-#endif /* CONFIG_MMU */
- jmp r13
- nop
- nop
-
-#ifdef CONFIG_SMP
-/*
- * AP wait loop
- */
-ENTRY(AP_loop)
- ;; disable interrupt
- clrpsw #0x40
- ;; reset EVB
- LDIMM (r4, _AP_RE)
- seth r5, #high(__PAGE_OFFSET)
- or3 r5, r5, #low(__PAGE_OFFSET)
- not r5, r5
- and r4, r5
- mvtc r4, cr5
- ;; disable maskable interrupt
- seth r4, #high(M32R_ICU_IMASK_PORTL)
- or3 r4, r4, #low(M32R_ICU_IMASK_PORTL)
- ldi r5, #0
- st r5, @r4
- ld r5, @r4
- ;; enable only IPI
- setpsw #0x40
- ;; LOOOOOOOOOOOOOOP!!!
- .fillinsn
-2:
- nop
- nop
- bra 2b
- nop
- nop
-
-#ifdef CONFIG_CHIP_M32700_TS1
- .global dcache_dummy
- .balign 16, 0
-dcache_dummy:
- .byte 16
-#endif /* CONFIG_CHIP_M32700_TS1 */
-#endif /* CONFIG_SMP */
-
- .end
-
+++ /dev/null
-CONFIG_SYSVIPC=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_SLAB=y
-CONFIG_PROFILING=y
-CONFIG_OPROFILE=m
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_PLAT_M32104UT=y
-CONFIG_CHIP_M32104=y
-CONFIG_MEMORY_START=0x04000000
-CONFIG_MEMORY_SIZE=0x01000000
-CONFIG_IRAM_START=0x00700000
-CONFIG_IRAM_SIZE=0x00010000
-CONFIG_PREEMPT=y
-CONFIG_BINFMT_MISC=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-# CONFIG_IPV6 is not set
-CONFIG_NETFILTER=y
-CONFIG_NETFILTER_NETLINK_QUEUE=m
-CONFIG_NETFILTER_NETLINK_LOG=m
-CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
-CONFIG_NETFILTER_XT_TARGET_MARK=m
-CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
-CONFIG_NETFILTER_XT_MATCH_COMMENT=m
-CONFIG_NETFILTER_XT_MATCH_DCCP=m
-CONFIG_NETFILTER_XT_MATCH_LENGTH=m
-CONFIG_NETFILTER_XT_MATCH_LIMIT=m
-CONFIG_NETFILTER_XT_MATCH_MAC=m
-CONFIG_NETFILTER_XT_MATCH_MARK=m
-CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
-CONFIG_NETFILTER_XT_MATCH_REALM=m
-CONFIG_NETFILTER_XT_MATCH_SCTP=m
-CONFIG_NETFILTER_XT_MATCH_STRING=m
-CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
-CONFIG_IP_NF_IPTABLES=m
-CONFIG_IP_NF_MATCH_ADDRTYPE=m
-CONFIG_IP_NF_MATCH_ECN=m
-CONFIG_IP_NF_MATCH_TTL=m
-CONFIG_IP_NF_FILTER=m
-CONFIG_IP_NF_TARGET_REJECT=m
-CONFIG_IP_NF_TARGET_LOG=m
-CONFIG_IP_NF_MANGLE=m
-CONFIG_IP_NF_TARGET_ECN=m
-CONFIG_IP_NF_TARGET_TTL=m
-CONFIG_IP_NF_RAW=m
-CONFIG_IP_NF_ARPTABLES=m
-CONFIG_IP_NF_ARPFILTER=m
-CONFIG_IP_NF_ARP_MANGLE=m
-CONFIG_PARPORT=m
-CONFIG_PARPORT_1284=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_NBD=m
-CONFIG_CDROM_PKTCDVD=m
-CONFIG_CDROM_PKTCDVD_WCACHE=y
-CONFIG_IDE=y
-CONFIG_BLK_DEV_IDECD=y
-CONFIG_IDE_GENERIC=y
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_ST=m
-CONFIG_BLK_DEV_SR=m
-CONFIG_CHR_DEV_SG=m
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_SCSI_CONSTANTS=y
-CONFIG_SCSI_SPI_ATTRS=y
-CONFIG_MD=y
-CONFIG_BLK_DEV_MD=y
-CONFIG_MD_RAID1=y
-CONFIG_BLK_DEV_DM=m
-CONFIG_DM_CRYPT=m
-CONFIG_DM_SNAPSHOT=m
-CONFIG_NETDEVICES=y
-CONFIG_DUMMY=m
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
-CONFIG_NE2000=m
-CONFIG_SERIAL_8250=m
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=m
-CONFIG_I2C_CHARDEV=m
-CONFIG_SENSORS_ADM1021=m
-CONFIG_SENSORS_ADM1025=m
-CONFIG_SENSORS_ADM1031=m
-CONFIG_SENSORS_DS1621=m
-CONFIG_SENSORS_GL518SM=m
-CONFIG_SENSORS_IT87=m
-CONFIG_SENSORS_LM75=m
-CONFIG_SENSORS_LM77=m
-CONFIG_SENSORS_LM78=m
-CONFIG_SENSORS_LM80=m
-CONFIG_SENSORS_LM83=m
-CONFIG_SENSORS_LM85=m
-CONFIG_SENSORS_LM90=m
-CONFIG_SENSORS_MAX1619=m
-CONFIG_SENSORS_SMSC47M1=m
-CONFIG_SENSORS_W83781D=m
-CONFIG_SENSORS_W83L785TS=m
-CONFIG_SENSORS_W83627HF=m
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-CONFIG_EXT2_FS_SECURITY=y
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_EXT3_FS_SECURITY=y
-CONFIG_ISO9660_FS=y
-CONFIG_JOLIET=y
-CONFIG_UDF_FS=m
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_CONFIGFS_FS=m
-CONFIG_ROMFS_FS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_NFSD=m
-CONFIG_NFSD_V3=y
-CONFIG_NLS_DEFAULT="cp437"
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_932=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_CRYPTO_NULL=m
-CONFIG_CRYPTO_ECB=m
-CONFIG_CRYPTO_PCBC=m
-CONFIG_CRYPTO_HMAC=y
-CONFIG_CRYPTO_MD4=m
-CONFIG_CRYPTO_MD5=m
-CONFIG_CRYPTO_SHA1=m
-CONFIG_CRYPTO_SHA256=m
-CONFIG_CRYPTO_SHA512=m
-CONFIG_CRYPTO_WP512=m
-CONFIG_CRYPTO_BLOWFISH=m
-CONFIG_CRYPTO_DES=m
-CONFIG_CRYPTO_SERPENT=m
-CONFIG_CRYPTO_TWOFISH=m
-CONFIG_CRC_CCITT=m
-CONFIG_CRC16=m
-CONFIG_LIBCRC32C=m
+++ /dev/null
-CONFIG_SYSVIPC=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=15
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
-# CONFIG_KALLSYMS is not set
-# CONFIG_FUTEX is not set
-# CONFIG_EPOLL is not set
-CONFIG_SLAB=y
-CONFIG_PROFILING=y
-CONFIG_OPROFILE=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_PLAT_M32700UT=y
-CONFIG_MEMORY_START=0x08000000
-CONFIG_MEMORY_SIZE=0x01000000
-CONFIG_IRAM_START=0x00f00000
-CONFIG_IRAM_SIZE=0x00080000
-CONFIG_PREEMPT=y
-CONFIG_SMP=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_IPV6 is not set
-CONFIG_MTD=y
-CONFIG_MTD_REDBOOT_PARTS=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=m
-CONFIG_MTD_JEDECPROBE=m
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_BE_BYTE_SWAP=y
-CONFIG_MTD_CFI_GEOMETRY=y
-# CONFIG_MTD_CFI_I2 is not set
-CONFIG_MTD_CFI_AMDSTD=m
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_NBD=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_ATA_OVER_ETH=m
-CONFIG_IDE=y
-CONFIG_BLK_DEV_IDECD=m
-CONFIG_IDE_GENERIC=y
-CONFIG_SCSI=m
-CONFIG_BLK_DEV_SD=m
-CONFIG_BLK_DEV_SR=m
-CONFIG_CHR_DEV_SG=m
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_SMC91X=y
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO_I8042 is not set
-CONFIG_SERIAL_M32R_SIO_CONSOLE=y
-CONFIG_SERIAL_M32R_PLDSIO=y
-CONFIG_HW_RANDOM=y
-CONFIG_DS1302=y
-CONFIG_FB=y
-CONFIG_FIRMWARE_EDID=y
-CONFIG_FB_S1D13XXX=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_LOGO=y
-CONFIG_MMC=y
-CONFIG_MMC_DEBUG=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-CONFIG_REISERFS_FS=m
-CONFIG_ISO9660_FS=m
-CONFIG_JOLIET=y
-CONFIG_UDF_FS=m
-CONFIG_MSDOS_FS=m
-CONFIG_VFAT_FS=m
-CONFIG_PROC_KCORE=y
-CONFIG_TMPFS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS=y
+++ /dev/null
-CONFIG_SYSVIPC=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
-# CONFIG_KALLSYMS is not set
-# CONFIG_FUTEX is not set
-# CONFIG_EPOLL is not set
-CONFIG_SLAB=y
-CONFIG_PROFILING=y
-CONFIG_OPROFILE=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_PLAT_M32700UT=y
-CONFIG_MEMORY_START=0x08000000
-CONFIG_MEMORY_SIZE=0x01000000
-CONFIG_IRAM_START=0x00f00000
-CONFIG_IRAM_SIZE=0x00080000
-CONFIG_PREEMPT=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_IPV6 is not set
-CONFIG_MTD=y
-CONFIG_MTD_REDBOOT_PARTS=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=m
-CONFIG_MTD_JEDECPROBE=m
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_BE_BYTE_SWAP=y
-CONFIG_MTD_CFI_GEOMETRY=y
-# CONFIG_MTD_CFI_I2 is not set
-CONFIG_MTD_CFI_AMDSTD=m
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_NBD=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_ATA_OVER_ETH=m
-CONFIG_IDE=y
-CONFIG_BLK_DEV_IDECD=m
-CONFIG_IDE_GENERIC=y
-CONFIG_SCSI=m
-CONFIG_BLK_DEV_SD=m
-CONFIG_BLK_DEV_SR=m
-CONFIG_CHR_DEV_SG=m
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_SMC91X=y
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO_I8042 is not set
-CONFIG_SERIAL_M32R_SIO_CONSOLE=y
-CONFIG_SERIAL_M32R_PLDSIO=y
-CONFIG_HW_RANDOM=y
-CONFIG_DS1302=y
-CONFIG_FB=y
-CONFIG_FIRMWARE_EDID=y
-CONFIG_FB_S1D13XXX=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_LOGO=y
-CONFIG_MMC=y
-CONFIG_MMC_DEBUG=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-CONFIG_REISERFS_FS=m
-CONFIG_ISO9660_FS=m
-CONFIG_JOLIET=y
-CONFIG_UDF_FS=m
-CONFIG_MSDOS_FS=m
-CONFIG_VFAT_FS=m
-CONFIG_PROC_KCORE=y
-CONFIG_TMPFS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS=y
+++ /dev/null
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_IKCONFIG=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
-# CONFIG_KALLSYMS is not set
-# CONFIG_FUTEX is not set
-# CONFIG_EPOLL is not set
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_MMU is not set
-CONFIG_BUS_CLOCK=50000000
-CONFIG_MEMORY_START=0x00000000
-CONFIG_MEMORY_SIZE=0x00E00000
-CONFIG_IRAM_START=0x00f00000
-CONFIG_IRAM_SIZE=0x00080000
-CONFIG_PREEMPT=y
-CONFIG_PCCARD=y
-CONFIG_M32R_PCC=y
-CONFIG_BINFMT_FLAT=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_IPV6 is not set
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_NBD=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_NETDEVICES=y
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO_I8042 is not set
-# CONFIG_VT is not set
-CONFIG_SERIAL_M32R_SIO_CONSOLE=y
-CONFIG_HW_RANDOM=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS=y
+++ /dev/null
-CONFIG_SYSVIPC=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=15
-CONFIG_BLK_DEV_INITRD=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
-# CONFIG_KALLSYMS is not set
-# CONFIG_FUTEX is not set
-# CONFIG_EPOLL is not set
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_BUS_CLOCK=10000000
-CONFIG_MEMORY_START=0x08000000
-CONFIG_MEMORY_SIZE=0x04000000
-CONFIG_IRAM_START=0x00f00000
-CONFIG_IRAM_SIZE=0x00080000
-CONFIG_PREEMPT=y
-CONFIG_SMP=y
-CONFIG_CHIP_M32700_TS1=y
-CONFIG_PCCARD=y
-CONFIG_M32R_PCC=y
-CONFIG_NET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_IPV6 is not set
-# CONFIG_STANDALONE is not set
-CONFIG_MTD=y
-CONFIG_MTD_REDBOOT_PARTS=y
-CONFIG_MTD_BLOCK=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_NBD=m
-CONFIG_BLK_DEV_RAM=y
-CONFIG_IDE=m
-CONFIG_BLK_DEV_IDECS=m
-CONFIG_BLK_DEV_IDECD=m
-CONFIG_IDE_GENERIC=m
-CONFIG_NETDEVICES=y
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO_I8042 is not set
-# CONFIG_SERIO_SERPORT is not set
-# CONFIG_VT is not set
-CONFIG_SERIAL_M32R_SIO_CONSOLE=y
-CONFIG_HW_RANDOM=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-CONFIG_ISO9660_FS=y
-CONFIG_MSDOS_FS=m
-CONFIG_VFAT_FS=m
-CONFIG_PROC_KCORE=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_ROMFS_FS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS=y
+++ /dev/null
-CONFIG_SYSVIPC=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
-# CONFIG_KALLSYMS is not set
-# CONFIG_FUTEX is not set
-# CONFIG_EPOLL is not set
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_BUS_CLOCK=10000000
-CONFIG_MEMORY_START=0x08000000
-CONFIG_MEMORY_SIZE=0x04000000
-CONFIG_IRAM_START=0x00f00000
-CONFIG_IRAM_SIZE=0x00080000
-CONFIG_PREEMPT=y
-CONFIG_PCCARD=y
-CONFIG_M32R_PCC=y
-CONFIG_NET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_IPV6 is not set
-# CONFIG_STANDALONE is not set
-CONFIG_MTD=y
-CONFIG_MTD_REDBOOT_PARTS=y
-CONFIG_MTD_BLOCK=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_NBD=m
-CONFIG_BLK_DEV_RAM=y
-CONFIG_IDE=m
-CONFIG_BLK_DEV_IDECS=m
-CONFIG_BLK_DEV_IDECD=m
-CONFIG_IDE_GENERIC=m
-CONFIG_NETDEVICES=y
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO_I8042 is not set
-# CONFIG_SERIO_SERPORT is not set
-# CONFIG_VT is not set
-CONFIG_SERIAL_M32R_SIO_CONSOLE=y
-CONFIG_HW_RANDOM=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-CONFIG_ISO9660_FS=y
-CONFIG_MSDOS_FS=m
-CONFIG_VFAT_FS=m
-CONFIG_PROC_KCORE=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_ROMFS_FS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS=y
+++ /dev/null
-CONFIG_SYSVIPC=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_IKCONFIG=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
-# CONFIG_KALLSYMS is not set
-# CONFIG_FUTEX is not set
-# CONFIG_EPOLL is not set
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_PLAT_MAPPI2=y
-CONFIG_CHIP_OPSP=y
-CONFIG_TLB_ENTRIES=16
-CONFIG_BUS_CLOCK=50000000
-CONFIG_MEMORY_START=0x08000000
-CONFIG_MEMORY_SIZE=0x01000000
-CONFIG_IRAM_START=0x00f00000
-CONFIG_IRAM_SIZE=0x00008000
-CONFIG_PREEMPT=y
-CONFIG_PCCARD=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_IPV6 is not set
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_NBD=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_IDE=y
-CONFIG_BLK_DEV_IDECS=y
-CONFIG_BLK_DEV_IDECD=m
-CONFIG_IDE_GENERIC=y
-CONFIG_SCSI=m
-CONFIG_BLK_DEV_SD=m
-CONFIG_BLK_DEV_SR=m
-CONFIG_CHR_DEV_SG=m
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_SMC91X=y
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO_I8042 is not set
-CONFIG_SERIAL_M32R_SIO_CONSOLE=y
-CONFIG_HW_RANDOM=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-CONFIG_ISO9660_FS=m
-CONFIG_JOLIET=y
-CONFIG_UDF_FS=m
-CONFIG_MSDOS_FS=m
-CONFIG_VFAT_FS=m
-CONFIG_PROC_KCORE=y
-CONFIG_TMPFS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS=y
+++ /dev/null
-CONFIG_SYSVIPC=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_IKCONFIG=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
-# CONFIG_KALLSYMS is not set
-# CONFIG_FUTEX is not set
-# CONFIG_EPOLL is not set
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_PLAT_MAPPI2=y
-CONFIG_CHIP_VDEC2=y
-CONFIG_BUS_CLOCK=50000000
-CONFIG_MEMORY_START=0x08000000
-CONFIG_MEMORY_SIZE=0x01000000
-CONFIG_IRAM_START=0x00f00000
-CONFIG_IRAM_SIZE=0x00008000
-CONFIG_PREEMPT=y
-CONFIG_PCCARD=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_IPV6 is not set
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_NBD=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_IDE=y
-CONFIG_BLK_DEV_IDECS=y
-CONFIG_BLK_DEV_IDECD=m
-CONFIG_IDE_GENERIC=y
-CONFIG_SCSI=m
-CONFIG_BLK_DEV_SD=m
-CONFIG_BLK_DEV_SR=m
-CONFIG_CHR_DEV_SG=m
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_SMC91X=y
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO_I8042 is not set
-CONFIG_SERIAL_M32R_SIO_CONSOLE=y
-CONFIG_HW_RANDOM=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-CONFIG_ISO9660_FS=m
-CONFIG_JOLIET=y
-CONFIG_UDF_FS=m
-CONFIG_MSDOS_FS=m
-CONFIG_VFAT_FS=m
-CONFIG_PROC_KCORE=y
-CONFIG_TMPFS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS=y
+++ /dev/null
-CONFIG_SYSVIPC=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=15
-CONFIG_BLK_DEV_INITRD=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
-# CONFIG_KALLSYMS is not set
-# CONFIG_FUTEX is not set
-# CONFIG_EPOLL is not set
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_PLAT_MAPPI3=y
-CONFIG_BUS_CLOCK=10000000
-CONFIG_MEMORY_START=0x08000000
-CONFIG_MEMORY_SIZE=0x08000000
-CONFIG_IRAM_START=0x00f00000
-CONFIG_IRAM_SIZE=0x00080000
-CONFIG_PREEMPT=y
-CONFIG_SMP=y
-CONFIG_PCCARD=y
-CONFIG_NET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_IPV6 is not set
-CONFIG_MTD=y
-CONFIG_MTD_REDBOOT_PARTS=y
-CONFIG_MTD_BLOCK=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_NBD=m
-CONFIG_BLK_DEV_RAM=y
-CONFIG_IDE=y
-CONFIG_BLK_DEV_IDECS=m
-CONFIG_BLK_DEV_IDECD=m
-CONFIG_IDE_GENERIC=y
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_SMC91X=y
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO_I8042 is not set
-# CONFIG_SERIO_SERPORT is not set
-# CONFIG_VT is not set
-CONFIG_SERIAL_M32R_SIO_CONSOLE=y
-CONFIG_HW_RANDOM=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-CONFIG_ISO9660_FS=y
-CONFIG_MSDOS_FS=m
-CONFIG_VFAT_FS=m
-CONFIG_PROC_KCORE=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_ROMFS_FS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS=y
+++ /dev/null
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
-# CONFIG_KALLSYMS is not set
-# CONFIG_FUTEX is not set
-# CONFIG_EPOLL is not set
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_PLAT_OAKS32R=y
-CONFIG_CHIP_M32102=y
-CONFIG_MEMORY_START=0x01000000
-CONFIG_MEMORY_SIZE=0x00800000
-CONFIG_IRAM_START=0x00f00000
-CONFIG_IRAM_SIZE=0x00010000
-CONFIG_PREEMPT=y
-CONFIG_BINFMT_FLAT=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_IPV6 is not set
-# CONFIG_FW_LOADER is not set
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_NBD=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_NETDEVICES=y
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO_I8042 is not set
-# CONFIG_VT is not set
-CONFIG_SERIAL_M32R_SIO_CONSOLE=y
-CONFIG_HW_RANDOM=y
-CONFIG_EXT2_FS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS=y
+++ /dev/null
-CONFIG_SYSVIPC=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_IKCONFIG=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
-# CONFIG_KALLSYMS is not set
-# CONFIG_FUTEX is not set
-# CONFIG_EPOLL is not set
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_PLAT_OPSPUT=y
-CONFIG_CHIP_OPSP=y
-CONFIG_MEMORY_START=0x08000000
-CONFIG_MEMORY_SIZE=0x01000000
-CONFIG_IRAM_START=0x00f00000
-CONFIG_IRAM_SIZE=0x00010000
-CONFIG_PCCARD=y
-CONFIG_M32R_CFC=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_IPV6 is not set
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_SCSI=m
-CONFIG_BLK_DEV_SD=m
-CONFIG_BLK_DEV_SR=m
-CONFIG_CHR_DEV_SG=m
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_SMC91X=y
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO_I8042 is not set
-# CONFIG_VT is not set
-CONFIG_SERIAL_M32R_SIO_CONSOLE=y
-CONFIG_SERIAL_M32R_PLDSIO=y
-CONFIG_HW_RANDOM=y
-CONFIG_DS1302=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-CONFIG_ISO9660_FS=m
-CONFIG_JOLIET=y
-CONFIG_UDF_FS=m
-CONFIG_MSDOS_FS=m
-CONFIG_VFAT_FS=m
-CONFIG_PROC_KCORE=y
-CONFIG_TMPFS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS=y
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_DEBUG_BUGVERBOSE is not set
-CONFIG_DEBUG_INFO=y
+++ /dev/null
-CONFIG_SYSVIPC=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_LOG_BUF_SHIFT=15
-CONFIG_BLK_DEV_INITRD=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
-CONFIG_KALLSYMS_EXTRA_PASS=y
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_PLAT_USRV=y
-CONFIG_BUS_CLOCK=50000000
-CONFIG_MEMORY_START=0x08000000
-CONFIG_MEMORY_SIZE=0x02000000
-# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
-CONFIG_SMP=y
-CONFIG_PCCARD=y
-CONFIG_M32R_CFC=y
-CONFIG_M32R_CFC_NUM=2
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_XFRM_USER=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-CONFIG_INET_AH=y
-CONFIG_INET_ESP=y
-CONFIG_INET_IPCOMP=y
-# CONFIG_IPV6 is not set
-CONFIG_MTD=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_BE_BYTE_SWAP=y
-CONFIG_MTD_CFI_GEOMETRY=y
-# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
-# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
-# CONFIG_MTD_CFI_I2 is not set
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_RAM=y
-CONFIG_MTD_ROM=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_IDE=y
-CONFIG_BLK_DEV_IDECS=y
-CONFIG_NETDEVICES=y
-CONFIG_NET_PCMCIA=y
-CONFIG_PCMCIA_PCNET=y
-# CONFIG_INPUT is not set
-# CONFIG_SERIO is not set
-# CONFIG_VT is not set
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-# CONFIG_SERIAL_M32R_SIO is not set
-# CONFIG_HWMON is not set
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-# CONFIG_EXT3_FS_XATTR is not set
-CONFIG_PROC_KCORE=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_CRAMFS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_ROOT_NFS=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_INFO=y
-CONFIG_FRAME_POINTER=y
-CONFIG_CRYPTO_ECB=y
-CONFIG_CRYPTO_PCBC=m
-CONFIG_CRYPTO_MICHAEL_MIC=y
-CONFIG_CRYPTO_AES=y
-CONFIG_CRYPTO_ARC4=y
+++ /dev/null
-generic-y += current.h
-generic-y += dma-mapping.h
-generic-y += exec.h
-generic-y += extable.h
-generic-y += irq_work.h
-generic-y += kprobes.h
-generic-y += mcs_spinlock.h
-generic-y += mm-arch-hooks.h
-generic-y += module.h
-generic-y += preempt.h
-generic-y += sections.h
-generic-y += trace_clock.h
-generic-y += word-at-a-time.h
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2001 by Hiroyuki Kondo
- *
- * Defitions for the address spaces of the M32R CPUs.
- */
-#ifndef __ASM_M32R_ADDRSPACE_H
-#define __ASM_M32R_ADDRSPACE_H
-
-/*
- * Memory segments (32bit kernel mode addresses)
- */
-#define KUSEG 0x00000000
-#define KSEG0 0x80000000
-#define KSEG1 0xa0000000
-#define KSEG2 0xc0000000
-#define KSEG3 0xe0000000
-
-#define K0BASE KSEG0
-
-/*
- * Returns the kernel segment base of a given address
- */
-#ifndef __ASSEMBLY__
-#define KSEGX(a) (((unsigned long)(a)) & 0xe0000000)
-#else
-#define KSEGX(a) ((a) & 0xe0000000)
-#endif
-
-/*
- * Returns the physical address of a KSEG0/KSEG1 address
- */
-#ifndef __ASSEMBLY__
-#define PHYSADDR(a) (((unsigned long)(a)) & 0x1fffffff)
-#else
-#define PHYSADDR(a) ((a) & 0x1fffffff)
-#endif
-
-/*
- * Map an address to a certain kernel segment
- */
-#ifndef __ASSEMBLY__
-#define KSEG0ADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | KSEG0))
-#define KSEG1ADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | KSEG1))
-#define KSEG2ADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | KSEG2))
-#define KSEG3ADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | KSEG3))
-#else
-#define KSEG0ADDR(a) (((a) & 0x1fffffff) | KSEG0)
-#define KSEG1ADDR(a) (((a) & 0x1fffffff) | KSEG1)
-#define KSEG2ADDR(a) (((a) & 0x1fffffff) | KSEG2)
-#define KSEG3ADDR(a) (((a) & 0x1fffffff) | KSEG3)
-#endif
-
-#endif /* __ASM_M32R_ADDRSPACE_H */
+++ /dev/null
-#include <generated/asm-offsets.h>
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_M32R_ASSEMBLER_H
-#define _ASM_M32R_ASSEMBLER_H
-
-/*
- * linux/asm-m32r/assembler.h
- *
- * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org>
- *
- * This file contains M32R architecture specific macro definitions.
- */
-
-#include <linux/stringify.h>
-
-#undef __STR
-
-#ifdef __ASSEMBLY__
-#define __STR(x) x
-#else
-#define __STR(x) __stringify(x)
-#endif
-
-#ifdef CONFIG_SMP
-#define M32R_LOCK __STR(lock)
-#define M32R_UNLOCK __STR(unlock)
-#else
-#define M32R_LOCK __STR(ld)
-#define M32R_UNLOCK __STR(st)
-#endif
-
-#ifdef __ASSEMBLY__
-#undef ENTRY
-#define ENTRY(name) ENTRY_M name
- .macro ENTRY_M name
- .global \name
- ALIGN
-\name:
- .endm
-#endif
-
-
-/**
- * LDIMM - load immediate value
- * STI - enable interruption
- * CLI - disable interruption
- */
-
-#ifdef __ASSEMBLY__
-
-#define LDIMM(reg,x) LDIMM reg x
- .macro LDIMM reg x
- seth \reg, #high(\x)
- or3 \reg, \reg, #low(\x)
- .endm
-
-#if !(defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_M32104))
-#define ENABLE_INTERRUPTS(reg) ENABLE_INTERRUPTS reg
- .macro ENABLE_INTERRUPTS reg
- setpsw #0x40 -> nop
- ; WORKAROUND: "-> nop" is a workaround for the M32700(TS1).
- .endm
-
-#define DISABLE_INTERRUPTS(reg) DISABLE_INTERRUPTS reg
- .macro DISABLE_INTERRUPTS reg
- clrpsw #0x40 -> nop
- ; WORKAROUND: "-> nop" is a workaround for the M32700(TS1).
- .endm
-#else /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */
-#define ENABLE_INTERRUPTS(reg) ENABLE_INTERRUPTS reg
- .macro ENABLE_INTERRUPTS reg
- mvfc \reg, psw
- or3 \reg, \reg, #0x0040
- mvtc \reg, psw
- .endm
-
-#define DISABLE_INTERRUPTS(reg) DISABLE_INTERRUPTS reg
- .macro DISABLE_INTERRUPTS reg
- mvfc \reg, psw
- and3 \reg, \reg, #0xffbf
- mvtc \reg, psw
- .endm
-#endif /* CONFIG_CHIP_M32102 */
-
- .macro SAVE_ALL
- push r0 ; orig_r0
- push sp ; spi (r15)
- push lr ; r14
- push r13
- mvfc r13, cr3 ; spu
- push r13
- mvfc r13, bbpc
- push r13
- mvfc r13, bbpsw
- push r13
- mvfc r13, bpc
- push r13
- mvfc r13, psw
- push r13
-#if defined(CONFIG_ISA_M32R2) && defined(CONFIG_ISA_DSP_LEVEL2)
- mvfaclo r13, a1
- push r13
- mvfachi r13, a1
- push r13
- mvfaclo r13, a0
- push r13
- mvfachi r13, a0
- push r13
-#elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R)
- mvfaclo r13
- push r13
- mvfachi r13
- push r13
- ldi r13, #0
- push r13 ; dummy push acc1h
- push r13 ; dummy push acc1l
-#else
-#error unknown isa configuration
-#endif
- ldi r13, #-1
- push r13 ; syscall_nr (default: -1)
- push r12
- push r11
- push r10
- push r9
- push r8
- push r7
- push r3
- push r2
- push r1
- push r0
- addi sp, #-4 ; room for implicit pt_regs parameter
- push r6
- push r5
- push r4
- .endm
-
- .macro RESTORE_ALL
- pop r4
- pop r5
- pop r6
- addi sp, #4
- pop r0
- pop r1
- pop r2
- pop r3
- pop r7
- pop r8
- pop r9
- pop r10
- pop r11
- pop r12
- addi r15, #4 ; Skip syscall number
-#if defined(CONFIG_ISA_M32R2) && defined(CONFIG_ISA_DSP_LEVEL2)
- pop r13
- mvtachi r13, a0
- pop r13
- mvtaclo r13, a0
- pop r13
- mvtachi r13, a1
- pop r13
- mvtaclo r13, a1
-#elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R)
- pop r13 ; dummy pop acc1h
- pop r13 ; dummy pop acc1l
- pop r13
- mvtachi r13
- pop r13
- mvtaclo r13
-#else
-#error unknown isa configuration
-#endif
- pop r14
- mvtc r14, psw
- pop r14
- mvtc r14, bpc
- addi sp, #8 ; Skip bbpsw, bbpc
- pop r14
- mvtc r14, cr3 ; spu
- pop r13
- pop lr ; r14
- pop sp ; spi (r15)
- addi sp, #4 ; Skip orig_r0
- .fillinsn
-1: rte
- .section .fixup,"ax"
-2: bl do_exit
- .previous
- .section __ex_table,"a"
- ALIGN
- .long 1b, 2b
- .previous
- .endm
-
-#define GET_CURRENT(reg) get_current reg
- .macro get_current reg
- ldi \reg, #-8192
- and \reg, sp
- .endm
-
-#if !(defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_M32104))
- .macro SWITCH_TO_KERNEL_STACK
- ; switch to kernel stack (spi)
- clrpsw #0x80 -> nop
- .endm
-#else /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */
- .macro SWITCH_TO_KERNEL_STACK
- push r0 ; save r0 for working
- mvfc r0, psw
- and3 r0, r0, #0x00ff7f
- mvtc r0, psw
- slli r0, #16
- bltz r0, 1f ; check BSM-bit
-;
- ;; called from kernel context: previous stack = spi
- pop r0 ; retrieve r0
- bra 2f
- .fillinsn
-1:
- ;; called from user context: previous stack = spu
- mvfc r0, cr3 ; spu
- addi r0, #4
- mvtc r0, cr3 ; spu
- ld r0, @(-4,r0) ; retrieve r0
- .fillinsn
-2:
- .endm
-#endif /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */
-
-#endif /* __ASSEMBLY__ */
-
-#endif /* _ASM_M32R_ASSEMBLER_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_M32R_ATOMIC_H
-#define _ASM_M32R_ATOMIC_H
-
-/*
- * linux/include/asm-m32r/atomic.h
- *
- * M32R version:
- * Copyright (C) 2001, 2002 Hitoshi Yamamoto
- * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org>
- */
-
-#include <linux/types.h>
-#include <asm/assembler.h>
-#include <asm/cmpxchg.h>
-#include <asm/dcache_clear.h>
-#include <asm/barrier.h>
-
-/*
- * Atomic operations that C can't guarantee us. Useful for
- * resource counting etc..
- */
-
-#define ATOMIC_INIT(i) { (i) }
-
-/**
- * atomic_read - read atomic variable
- * @v: pointer of type atomic_t
- *
- * Atomically reads the value of @v.
- */
-#define atomic_read(v) READ_ONCE((v)->counter)
-
-/**
- * atomic_set - set atomic variable
- * @v: pointer of type atomic_t
- * @i: required value
- *
- * Atomically sets the value of @v to @i.
- */
-#define atomic_set(v,i) WRITE_ONCE(((v)->counter), (i))
-
-#ifdef CONFIG_CHIP_M32700_TS1
-#define __ATOMIC_CLOBBER , "r4"
-#else
-#define __ATOMIC_CLOBBER
-#endif
-
-#define ATOMIC_OP(op) \
-static __inline__ void atomic_##op(int i, atomic_t *v) \
-{ \
- unsigned long flags; \
- int result; \
- \
- local_irq_save(flags); \
- __asm__ __volatile__ ( \
- "# atomic_" #op " \n\t" \
- DCACHE_CLEAR("%0", "r4", "%1") \
- M32R_LOCK" %0, @%1; \n\t" \
- #op " %0, %2; \n\t" \
- M32R_UNLOCK" %0, @%1; \n\t" \
- : "=&r" (result) \
- : "r" (&v->counter), "r" (i) \
- : "memory" \
- __ATOMIC_CLOBBER \
- ); \
- local_irq_restore(flags); \
-} \
-
-#define ATOMIC_OP_RETURN(op) \
-static __inline__ int atomic_##op##_return(int i, atomic_t *v) \
-{ \
- unsigned long flags; \
- int result; \
- \
- local_irq_save(flags); \
- __asm__ __volatile__ ( \
- "# atomic_" #op "_return \n\t" \
- DCACHE_CLEAR("%0", "r4", "%1") \
- M32R_LOCK" %0, @%1; \n\t" \
- #op " %0, %2; \n\t" \
- M32R_UNLOCK" %0, @%1; \n\t" \
- : "=&r" (result) \
- : "r" (&v->counter), "r" (i) \
- : "memory" \
- __ATOMIC_CLOBBER \
- ); \
- local_irq_restore(flags); \
- \
- return result; \
-}
-
-#define ATOMIC_FETCH_OP(op) \
-static __inline__ int atomic_fetch_##op(int i, atomic_t *v) \
-{ \
- unsigned long flags; \
- int result, val; \
- \
- local_irq_save(flags); \
- __asm__ __volatile__ ( \
- "# atomic_fetch_" #op " \n\t" \
- DCACHE_CLEAR("%0", "r4", "%2") \
- M32R_LOCK" %1, @%2; \n\t" \
- "mv %0, %1 \n\t" \
- #op " %1, %3; \n\t" \
- M32R_UNLOCK" %1, @%2; \n\t" \
- : "=&r" (result), "=&r" (val) \
- : "r" (&v->counter), "r" (i) \
- : "memory" \
- __ATOMIC_CLOBBER \
- ); \
- local_irq_restore(flags); \
- \
- return result; \
-}
-
-#define ATOMIC_OPS(op) ATOMIC_OP(op) ATOMIC_OP_RETURN(op) ATOMIC_FETCH_OP(op)
-
-ATOMIC_OPS(add)
-ATOMIC_OPS(sub)
-
-#undef ATOMIC_OPS
-#define ATOMIC_OPS(op) ATOMIC_OP(op) ATOMIC_FETCH_OP(op)
-
-ATOMIC_OPS(and)
-ATOMIC_OPS(or)
-ATOMIC_OPS(xor)
-
-#undef ATOMIC_OPS
-#undef ATOMIC_FETCH_OP
-#undef ATOMIC_OP_RETURN
-#undef ATOMIC_OP
-
-/**
- * atomic_sub_and_test - subtract value from variable and test result
- * @i: integer value to subtract
- * @v: pointer of type atomic_t
- *
- * Atomically subtracts @i from @v and returns
- * true if the result is zero, or false for all
- * other cases.
- */
-#define atomic_sub_and_test(i,v) (atomic_sub_return((i), (v)) == 0)
-
-/**
- * atomic_inc_return - increment atomic variable and return it
- * @v: pointer of type atomic_t
- *
- * Atomically increments @v by 1 and returns the result.
- */
-static __inline__ int atomic_inc_return(atomic_t *v)
-{
- unsigned long flags;
- int result;
-
- local_irq_save(flags);
- __asm__ __volatile__ (
- "# atomic_inc_return \n\t"
- DCACHE_CLEAR("%0", "r4", "%1")
- M32R_LOCK" %0, @%1; \n\t"
- "addi %0, #1; \n\t"
- M32R_UNLOCK" %0, @%1; \n\t"
- : "=&r" (result)
- : "r" (&v->counter)
- : "memory"
- __ATOMIC_CLOBBER
- );
- local_irq_restore(flags);
-
- return result;
-}
-
-/**
- * atomic_dec_return - decrement atomic variable and return it
- * @v: pointer of type atomic_t
- *
- * Atomically decrements @v by 1 and returns the result.
- */
-static __inline__ int atomic_dec_return(atomic_t *v)
-{
- unsigned long flags;
- int result;
-
- local_irq_save(flags);
- __asm__ __volatile__ (
- "# atomic_dec_return \n\t"
- DCACHE_CLEAR("%0", "r4", "%1")
- M32R_LOCK" %0, @%1; \n\t"
- "addi %0, #-1; \n\t"
- M32R_UNLOCK" %0, @%1; \n\t"
- : "=&r" (result)
- : "r" (&v->counter)
- : "memory"
- __ATOMIC_CLOBBER
- );
- local_irq_restore(flags);
-
- return result;
-}
-
-/**
- * atomic_inc - increment atomic variable
- * @v: pointer of type atomic_t
- *
- * Atomically increments @v by 1.
- */
-#define atomic_inc(v) ((void)atomic_inc_return(v))
-
-/**
- * atomic_dec - decrement atomic variable
- * @v: pointer of type atomic_t
- *
- * Atomically decrements @v by 1.
- */
-#define atomic_dec(v) ((void)atomic_dec_return(v))
-
-/**
- * atomic_inc_and_test - increment and test
- * @v: pointer of type atomic_t
- *
- * Atomically increments @v by 1
- * and returns true if the result is zero, or false for all
- * other cases.
- */
-#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
-
-/**
- * atomic_dec_and_test - decrement and test
- * @v: pointer of type atomic_t
- *
- * Atomically decrements @v by 1 and
- * returns true if the result is 0, or false for all
- * other cases.
- */
-#define atomic_dec_and_test(v) (atomic_dec_return(v) == 0)
-
-/**
- * atomic_add_negative - add and test if negative
- * @v: pointer of type atomic_t
- * @i: integer value to add
- *
- * Atomically adds @i to @v and returns true
- * if the result is negative, or false when
- * result is greater than or equal to zero.
- */
-#define atomic_add_negative(i,v) (atomic_add_return((i), (v)) < 0)
-
-#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
-#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
-
-/**
- * __atomic_add_unless - add unless the number is a given value
- * @v: pointer of type atomic_t
- * @a: the amount to add to v...
- * @u: ...unless v is equal to u.
- *
- * Atomically adds @a to @v, so long as it was not @u.
- * Returns the old value of @v.
- */
-static __inline__ int __atomic_add_unless(atomic_t *v, int a, int u)
-{
- int c, old;
- c = atomic_read(v);
- for (;;) {
- if (unlikely(c == (u)))
- break;
- old = atomic_cmpxchg((v), c, c + (a));
- if (likely(old == c))
- break;
- c = old;
- }
- return c;
-}
-
-#endif /* _ASM_M32R_ATOMIC_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2001 Hiroyuki Kondo, Hirokazu Takata, and Hitoshi Yamamoto
- * Copyright (C) 2004, 2006 Hirokazu Takata <takata at linux-m32r.org>
- */
-#ifndef _ASM_M32R_BARRIER_H
-#define _ASM_M32R_BARRIER_H
-
-#define nop() __asm__ __volatile__ ("nop" : : )
-
-#include <asm-generic/barrier.h>
-
-#endif /* _ASM_M32R_BARRIER_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_M32R_BITOPS_H
-#define _ASM_M32R_BITOPS_H
-
-/*
- * linux/include/asm-m32r/bitops.h
- *
- * Copyright 1992, Linus Torvalds.
- *
- * M32R version:
- * Copyright (C) 2001, 2002 Hitoshi Yamamoto
- * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org>
- */
-
-#ifndef _LINUX_BITOPS_H
-#error only <linux/bitops.h> can be included directly
-#endif
-
-#include <linux/compiler.h>
-#include <linux/irqflags.h>
-#include <asm/assembler.h>
-#include <asm/byteorder.h>
-#include <asm/dcache_clear.h>
-#include <asm/types.h>
-#include <asm/barrier.h>
-
-/*
- * These have to be done with inline assembly: that way the bit-setting
- * is guaranteed to be atomic. All bit operations return 0 if the bit
- * was cleared before the operation and != 0 if it was not.
- *
- * bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1).
- */
-
-/**
- * set_bit - Atomically set a bit in memory
- * @nr: the bit to set
- * @addr: the address to start counting from
- *
- * This function is atomic and may not be reordered. See __set_bit()
- * if you do not require the atomic guarantees.
- * Note that @nr may be almost arbitrarily large; this function is not
- * restricted to acting on a single-word quantity.
- */
-static __inline__ void set_bit(int nr, volatile void * addr)
-{
- __u32 mask;
- volatile __u32 *a = addr;
- unsigned long flags;
- unsigned long tmp;
-
- a += (nr >> 5);
- mask = (1 << (nr & 0x1F));
-
- local_irq_save(flags);
- __asm__ __volatile__ (
- DCACHE_CLEAR("%0", "r6", "%1")
- M32R_LOCK" %0, @%1; \n\t"
- "or %0, %2; \n\t"
- M32R_UNLOCK" %0, @%1; \n\t"
- : "=&r" (tmp)
- : "r" (a), "r" (mask)
- : "memory"
-#ifdef CONFIG_CHIP_M32700_TS1
- , "r6"
-#endif /* CONFIG_CHIP_M32700_TS1 */
- );
- local_irq_restore(flags);
-}
-
-/**
- * clear_bit - Clears a bit in memory
- * @nr: Bit to clear
- * @addr: Address to start counting from
- *
- * clear_bit() is atomic and may not be reordered. However, it does
- * not contain a memory barrier, so if it is used for locking purposes,
- * you should call smp_mb__before_atomic() and/or smp_mb__after_atomic()
- * in order to ensure changes are visible on other processors.
- */
-static __inline__ void clear_bit(int nr, volatile void * addr)
-{
- __u32 mask;
- volatile __u32 *a = addr;
- unsigned long flags;
- unsigned long tmp;
-
- a += (nr >> 5);
- mask = (1 << (nr & 0x1F));
-
- local_irq_save(flags);
-
- __asm__ __volatile__ (
- DCACHE_CLEAR("%0", "r6", "%1")
- M32R_LOCK" %0, @%1; \n\t"
- "and %0, %2; \n\t"
- M32R_UNLOCK" %0, @%1; \n\t"
- : "=&r" (tmp)
- : "r" (a), "r" (~mask)
- : "memory"
-#ifdef CONFIG_CHIP_M32700_TS1
- , "r6"
-#endif /* CONFIG_CHIP_M32700_TS1 */
- );
- local_irq_restore(flags);
-}
-
-/**
- * change_bit - Toggle a bit in memory
- * @nr: Bit to clear
- * @addr: Address to start counting from
- *
- * change_bit() is atomic and may not be reordered.
- * Note that @nr may be almost arbitrarily large; this function is not
- * restricted to acting on a single-word quantity.
- */
-static __inline__ void change_bit(int nr, volatile void * addr)
-{
- __u32 mask;
- volatile __u32 *a = addr;
- unsigned long flags;
- unsigned long tmp;
-
- a += (nr >> 5);
- mask = (1 << (nr & 0x1F));
-
- local_irq_save(flags);
- __asm__ __volatile__ (
- DCACHE_CLEAR("%0", "r6", "%1")
- M32R_LOCK" %0, @%1; \n\t"
- "xor %0, %2; \n\t"
- M32R_UNLOCK" %0, @%1; \n\t"
- : "=&r" (tmp)
- : "r" (a), "r" (mask)
- : "memory"
-#ifdef CONFIG_CHIP_M32700_TS1
- , "r6"
-#endif /* CONFIG_CHIP_M32700_TS1 */
- );
- local_irq_restore(flags);
-}
-
-/**
- * test_and_set_bit - Set a bit and return its old value
- * @nr: Bit to set
- * @addr: Address to count from
- *
- * This operation is atomic and cannot be reordered.
- * It also implies a memory barrier.
- */
-static __inline__ int test_and_set_bit(int nr, volatile void * addr)
-{
- __u32 mask, oldbit;
- volatile __u32 *a = addr;
- unsigned long flags;
- unsigned long tmp;
-
- a += (nr >> 5);
- mask = (1 << (nr & 0x1F));
-
- local_irq_save(flags);
- __asm__ __volatile__ (
- DCACHE_CLEAR("%0", "%1", "%2")
- M32R_LOCK" %0, @%2; \n\t"
- "mv %1, %0; \n\t"
- "and %0, %3; \n\t"
- "or %1, %3; \n\t"
- M32R_UNLOCK" %1, @%2; \n\t"
- : "=&r" (oldbit), "=&r" (tmp)
- : "r" (a), "r" (mask)
- : "memory"
- );
- local_irq_restore(flags);
-
- return (oldbit != 0);
-}
-
-/**
- * test_and_clear_bit - Clear a bit and return its old value
- * @nr: Bit to set
- * @addr: Address to count from
- *
- * This operation is atomic and cannot be reordered.
- * It also implies a memory barrier.
- */
-static __inline__ int test_and_clear_bit(int nr, volatile void * addr)
-{
- __u32 mask, oldbit;
- volatile __u32 *a = addr;
- unsigned long flags;
- unsigned long tmp;
-
- a += (nr >> 5);
- mask = (1 << (nr & 0x1F));
-
- local_irq_save(flags);
-
- __asm__ __volatile__ (
- DCACHE_CLEAR("%0", "%1", "%3")
- M32R_LOCK" %0, @%3; \n\t"
- "mv %1, %0; \n\t"
- "and %0, %2; \n\t"
- "not %2, %2; \n\t"
- "and %1, %2; \n\t"
- M32R_UNLOCK" %1, @%3; \n\t"
- : "=&r" (oldbit), "=&r" (tmp), "+r" (mask)
- : "r" (a)
- : "memory"
- );
- local_irq_restore(flags);
-
- return (oldbit != 0);
-}
-
-/**
- * test_and_change_bit - Change a bit and return its old value
- * @nr: Bit to set
- * @addr: Address to count from
- *
- * This operation is atomic and cannot be reordered.
- * It also implies a memory barrier.
- */
-static __inline__ int test_and_change_bit(int nr, volatile void * addr)
-{
- __u32 mask, oldbit;
- volatile __u32 *a = addr;
- unsigned long flags;
- unsigned long tmp;
-
- a += (nr >> 5);
- mask = (1 << (nr & 0x1F));
-
- local_irq_save(flags);
- __asm__ __volatile__ (
- DCACHE_CLEAR("%0", "%1", "%2")
- M32R_LOCK" %0, @%2; \n\t"
- "mv %1, %0; \n\t"
- "and %0, %3; \n\t"
- "xor %1, %3; \n\t"
- M32R_UNLOCK" %1, @%2; \n\t"
- : "=&r" (oldbit), "=&r" (tmp)
- : "r" (a), "r" (mask)
- : "memory"
- );
- local_irq_restore(flags);
-
- return (oldbit != 0);
-}
-
-#include <asm-generic/bitops/non-atomic.h>
-#include <asm-generic/bitops/ffz.h>
-#include <asm-generic/bitops/__ffs.h>
-#include <asm-generic/bitops/fls.h>
-#include <asm-generic/bitops/__fls.h>
-#include <asm-generic/bitops/fls64.h>
-
-#ifdef __KERNEL__
-
-#include <asm-generic/bitops/sched.h>
-#include <asm-generic/bitops/find.h>
-#include <asm-generic/bitops/ffs.h>
-#include <asm-generic/bitops/hweight.h>
-#include <asm-generic/bitops/lock.h>
-
-#endif /* __KERNEL__ */
-
-#ifdef __KERNEL__
-
-#include <asm-generic/bitops/le.h>
-#include <asm-generic/bitops/ext2-atomic.h>
-
-#endif /* __KERNEL__ */
-
-#endif /* _ASM_M32R_BITOPS_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _M32R_BUG_H
-#define _M32R_BUG_H
-#include <asm-generic/bug.h>
-#endif
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_M32R_BUGS_H
-#define _ASM_M32R_BUGS_H
-
-/*
- * This is included by init/main.c to check for architecture-dependent bugs.
- *
- * Needs:
- * void check_bugs(void);
- */
-#include <asm/processor.h>
-
-static void __init check_bugs(void)
-{
- extern unsigned long loops_per_jiffy;
-
- current_cpu_data.loops_per_jiffy = loops_per_jiffy;
-}
-
-#endif /* _ASM_M32R_BUGS_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_M32R_CACHE_H
-#define _ASM_M32R_CACHE_H
-
-/* L1 cache line size */
-#define L1_CACHE_SHIFT 4
-#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
-
-#endif /* _ASM_M32R_CACHE_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * cachectl.h -- defines for M32R cache control system calls
- *
- * Copyright (C) 2003 by Kazuhiro Inaoka
- */
-#ifndef __ASM_M32R_CACHECTL
-#define __ASM_M32R_CACHECTL
-
-/*
- * Options for cacheflush system call
- *
- * cacheflush() is currently fluch_cache_all().
- */
-#define ICACHE (1<<0) /* flush instruction cache */
-#define DCACHE (1<<1) /* writeback and flush data cache */
-#define BCACHE (ICACHE|DCACHE) /* flush both caches */
-
-/*
- * Caching modes for the cachectl(2) call
- *
- * cachectl(2) is currently not supported and returns ENOSYS.
- */
-#define CACHEABLE 0 /* make pages cacheable */
-#define UNCACHEABLE 1 /* make pages uncacheable */
-
-#endif /* __ASM_M32R_CACHECTL */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_M32R_CACHEFLUSH_H
-#define _ASM_M32R_CACHEFLUSH_H
-
-#include <linux/mm.h>
-
-extern void _flush_cache_all(void);
-extern void _flush_cache_copyback_all(void);
-
-#if defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104)
-#define flush_cache_all() do { } while (0)
-#define flush_cache_mm(mm) do { } while (0)
-#define flush_cache_dup_mm(mm) do { } while (0)
-#define flush_cache_range(vma, start, end) do { } while (0)
-#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
-#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0
-#define flush_dcache_page(page) do { } while (0)
-#define flush_dcache_mmap_lock(mapping) do { } while (0)
-#define flush_dcache_mmap_unlock(mapping) do { } while (0)
-#ifndef CONFIG_SMP
-#define flush_icache_range(start, end) _flush_cache_copyback_all()
-#define flush_icache_page(vma,pg) _flush_cache_copyback_all()
-#define flush_icache_user_range(vma,pg,adr,len) _flush_cache_copyback_all()
-#define flush_cache_sigtramp(addr) _flush_cache_copyback_all()
-#else /* CONFIG_SMP */
-extern void smp_flush_cache_all(void);
-#define flush_icache_range(start, end) smp_flush_cache_all()
-#define flush_icache_page(vma,pg) smp_flush_cache_all()
-#define flush_icache_user_range(vma,pg,adr,len) smp_flush_cache_all()
-#define flush_cache_sigtramp(addr) _flush_cache_copyback_all()
-#endif /* CONFIG_SMP */
-#elif defined(CONFIG_CHIP_M32102)
-#define flush_cache_all() do { } while (0)
-#define flush_cache_mm(mm) do { } while (0)
-#define flush_cache_dup_mm(mm) do { } while (0)
-#define flush_cache_range(vma, start, end) do { } while (0)
-#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
-#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0
-#define flush_dcache_page(page) do { } while (0)
-#define flush_dcache_mmap_lock(mapping) do { } while (0)
-#define flush_dcache_mmap_unlock(mapping) do { } while (0)
-#define flush_icache_range(start, end) _flush_cache_all()
-#define flush_icache_page(vma,pg) _flush_cache_all()
-#define flush_icache_user_range(vma,pg,adr,len) _flush_cache_all()
-#define flush_cache_sigtramp(addr) _flush_cache_all()
-#else
-#define flush_cache_all() do { } while (0)
-#define flush_cache_mm(mm) do { } while (0)
-#define flush_cache_dup_mm(mm) do { } while (0)
-#define flush_cache_range(vma, start, end) do { } while (0)
-#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
-#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0
-#define flush_dcache_page(page) do { } while (0)
-#define flush_dcache_mmap_lock(mapping) do { } while (0)
-#define flush_dcache_mmap_unlock(mapping) do { } while (0)
-#define flush_icache_range(start, end) do { } while (0)
-#define flush_icache_page(vma,pg) do { } while (0)
-#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
-#define flush_cache_sigtramp(addr) do { } while (0)
-#endif /* CONFIG_CHIP_* */
-
-#define flush_cache_vmap(start, end) do { } while (0)
-#define flush_cache_vunmap(start, end) do { } while (0)
-
-#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
-do { \
- memcpy(dst, src, len); \
- flush_icache_user_range(vma, page, vaddr, len); \
-} while (0)
-#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
- memcpy(dst, src, len)
-
-#endif /* _ASM_M32R_CACHEFLUSH_H */
+++ /dev/null
-#ifdef __KERNEL__
-#ifndef _ASM_M32R_CHECKSUM_H
-#define _ASM_M32R_CHECKSUM_H
-
-/*
- * include/asm-m32r/checksum.h
- *
- * IP/TCP/UDP checksum routines
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Some code taken from mips and parisc architecture.
- *
- * Copyright (C) 2001, 2002 Hiroyuki Kondo, Hirokazu Takata
- * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org>
- */
-
-#include <linux/in6.h>
-
-/*
- * computes the checksum of a memory block at buff, length len,
- * and adds in "sum" (32-bit)
- *
- * returns a 32-bit number suitable for feeding into itself
- * or csum_tcpudp_magic
- *
- * this function must be called with even lengths, except
- * for the last fragment, which may be odd
- *
- * it's best to have buff aligned on a 32-bit boundary
- */
-asmlinkage __wsum csum_partial(const void *buff, int len, __wsum sum);
-
-/*
- * The same as csum_partial, but copies from src while it checksums.
- *
- * Here even more important to align src and dst on a 32-bit (or even
- * better 64-bit) boundary
- */
-extern __wsum csum_partial_copy_nocheck(const void *src, void *dst,
- int len, __wsum sum);
-
-/*
- * This is a new version of the above that records errors it finds in *errp,
- * but continues and zeros thre rest of the buffer.
- */
-extern __wsum csum_partial_copy_from_user(const void __user *src, void *dst,
- int len, __wsum sum,
- int *err_ptr);
-
-/*
- * Fold a partial checksum
- */
-
-static inline __sum16 csum_fold(__wsum sum)
-{
- unsigned long tmpreg;
- __asm__(
- " sll3 %1, %0, #16 \n"
- " cmp %0, %0 \n"
- " addx %0, %1 \n"
- " ldi %1, #0 \n"
- " srli %0, #16 \n"
- " addx %0, %1 \n"
- " xor3 %0, %0, #0x0000ffff \n"
- : "=r" (sum), "=&r" (tmpreg)
- : "0" (sum)
- : "cbit"
- );
- return (__force __sum16)sum;
-}
-
-/*
- * This is a version of ip_compute_csum() optimized for IP headers,
- * which always checksum on 4 octet boundaries.
- */
-static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl)
-{
- unsigned long tmpreg0, tmpreg1;
- __wsum sum;
-
- __asm__ __volatile__(
- " ld %0, @%1+ \n"
- " addi %2, #-4 \n"
- "# bgez %2, 2f \n"
- " cmp %0, %0 \n"
- " ld %3, @%1+ \n"
- " ld %4, @%1+ \n"
- " addx %0, %3 \n"
- " ld %3, @%1+ \n"
- " addx %0, %4 \n"
- " addx %0, %3 \n"
- " .fillinsn\n"
- "1: \n"
- " ld %4, @%1+ \n"
- " addi %2, #-1 \n"
- " addx %0, %4 \n"
- " bgtz %2, 1b \n"
- "\n"
- " ldi %3, #0 \n"
- " addx %0, %3 \n"
- " .fillinsn\n"
- "2: \n"
- /* Since the input registers which are loaded with iph and ihl
- are modified, we must also specify them as outputs, or gcc
- will assume they contain their original values. */
- : "=&r" (sum), "=r" (iph), "=r" (ihl), "=&r" (tmpreg0), "=&r" (tmpreg1)
- : "1" (iph), "2" (ihl)
- : "cbit", "memory");
-
- return csum_fold(sum);
-}
-
-static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr,
- __u32 len, __u8 proto,
- __wsum sum)
-{
-#if defined(__LITTLE_ENDIAN)
- unsigned long len_proto = (proto + len) << 8;
-#else
- unsigned long len_proto = proto + len;
-#endif
- unsigned long tmpreg;
-
- __asm__(
- " cmp %0, %0 \n"
- " addx %0, %2 \n"
- " addx %0, %3 \n"
- " addx %0, %4 \n"
- " ldi %1, #0 \n"
- " addx %0, %1 \n"
- : "=r" (sum), "=&r" (tmpreg)
- : "r" (daddr), "r" (saddr), "r" (len_proto), "0" (sum)
- : "cbit"
- );
-
- return sum;
-}
-
-/*
- * computes the checksum of the TCP/UDP pseudo-header
- * returns a 16-bit checksum, already complemented
- */
-static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr,
- __u32 len, __u8 proto,
- __wsum sum)
-{
- return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum));
-}
-
-/*
- * this routine is used for miscellaneous IP-like checksums, mainly
- * in icmp.c
- */
-
-static inline __sum16 ip_compute_csum(const void *buff, int len)
-{
- return csum_fold (csum_partial(buff, len, 0));
-}
-
-#define _HAVE_ARCH_IPV6_CSUM
-static inline __sum16 csum_ipv6_magic(const struct in6_addr *saddr,
- const struct in6_addr *daddr,
- __u32 len, unsigned short proto,
- __wsum sum)
-{
- unsigned long tmpreg0, tmpreg1, tmpreg2, tmpreg3;
- __asm__(
- " ld %1, @(%5) \n"
- " ld %2, @(4,%5) \n"
- " ld %3, @(8,%5) \n"
- " ld %4, @(12,%5) \n"
- " add %0, %1 \n"
- " addx %0, %2 \n"
- " addx %0, %3 \n"
- " addx %0, %4 \n"
- " ld %1, @(%6) \n"
- " ld %2, @(4,%6) \n"
- " ld %3, @(8,%6) \n"
- " ld %4, @(12,%6) \n"
- " addx %0, %1 \n"
- " addx %0, %2 \n"
- " addx %0, %3 \n"
- " addx %0, %4 \n"
- " addx %0, %7 \n"
- " addx %0, %8 \n"
- " ldi %1, #0 \n"
- " addx %0, %1 \n"
- : "=&r" (sum), "=&r" (tmpreg0), "=&r" (tmpreg1),
- "=&r" (tmpreg2), "=&r" (tmpreg3)
- : "r" (saddr), "r" (daddr),
- "r" (htonl(len)), "r" (htonl(proto)), "0" (sum)
- : "cbit"
- );
-
- return csum_fold(sum);
-}
-
-#endif /* _ASM_M32R_CHECKSUM_H */
-#endif /* __KERNEL__ */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_M32R_CMPXCHG_H
-#define _ASM_M32R_CMPXCHG_H
-
-/*
- * M32R version:
- * Copyright (C) 2001, 2002 Hitoshi Yamamoto
- * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org>
- */
-
-#include <linux/irqflags.h>
-#include <asm/assembler.h>
-#include <asm/dcache_clear.h>
-
-extern void __xchg_called_with_bad_pointer(void);
-
-static __always_inline unsigned long
-__xchg(unsigned long x, volatile void *ptr, int size)
-{
- unsigned long flags;
- unsigned long tmp = 0;
-
- local_irq_save(flags);
-
- switch (size) {
-#ifndef CONFIG_SMP
- case 1:
- __asm__ __volatile__ (
- "ldb %0, @%2 \n\t"
- "stb %1, @%2 \n\t"
- : "=&r" (tmp) : "r" (x), "r" (ptr) : "memory");
- break;
- case 2:
- __asm__ __volatile__ (
- "ldh %0, @%2 \n\t"
- "sth %1, @%2 \n\t"
- : "=&r" (tmp) : "r" (x), "r" (ptr) : "memory");
- break;
- case 4:
- __asm__ __volatile__ (
- "ld %0, @%2 \n\t"
- "st %1, @%2 \n\t"
- : "=&r" (tmp) : "r" (x), "r" (ptr) : "memory");
- break;
-#else /* CONFIG_SMP */
- case 4:
- __asm__ __volatile__ (
- DCACHE_CLEAR("%0", "r4", "%2")
- "lock %0, @%2; \n\t"
- "unlock %1, @%2; \n\t"
- : "=&r" (tmp) : "r" (x), "r" (ptr)
- : "memory"
-#ifdef CONFIG_CHIP_M32700_TS1
- , "r4"
-#endif /* CONFIG_CHIP_M32700_TS1 */
- );
- break;
-#endif /* CONFIG_SMP */
- default:
- __xchg_called_with_bad_pointer();
- }
-
- local_irq_restore(flags);
-
- return (tmp);
-}
-
-#define xchg(ptr, x) ({ \
- ((__typeof__(*(ptr)))__xchg((unsigned long)(x), (ptr), \
- sizeof(*(ptr)))); \
-})
-
-static __always_inline unsigned long
-__xchg_local(unsigned long x, volatile void *ptr, int size)
-{
- unsigned long flags;
- unsigned long tmp = 0;
-
- local_irq_save(flags);
-
- switch (size) {
- case 1:
- __asm__ __volatile__ (
- "ldb %0, @%2 \n\t"
- "stb %1, @%2 \n\t"
- : "=&r" (tmp) : "r" (x), "r" (ptr) : "memory");
- break;
- case 2:
- __asm__ __volatile__ (
- "ldh %0, @%2 \n\t"
- "sth %1, @%2 \n\t"
- : "=&r" (tmp) : "r" (x), "r" (ptr) : "memory");
- break;
- case 4:
- __asm__ __volatile__ (
- "ld %0, @%2 \n\t"
- "st %1, @%2 \n\t"
- : "=&r" (tmp) : "r" (x), "r" (ptr) : "memory");
- break;
- default:
- __xchg_called_with_bad_pointer();
- }
-
- local_irq_restore(flags);
-
- return (tmp);
-}
-
-#define xchg_local(ptr, x) \
- ((__typeof__(*(ptr)))__xchg_local((unsigned long)(x), (ptr), \
- sizeof(*(ptr))))
-
-static inline unsigned long
-__cmpxchg_u32(volatile unsigned int *p, unsigned int old, unsigned int new)
-{
- unsigned long flags;
- unsigned int retval;
-
- local_irq_save(flags);
- __asm__ __volatile__ (
- DCACHE_CLEAR("%0", "r4", "%1")
- M32R_LOCK" %0, @%1; \n"
- " bne %0, %2, 1f; \n"
- M32R_UNLOCK" %3, @%1; \n"
- " bra 2f; \n"
- " .fillinsn \n"
- "1:"
- M32R_UNLOCK" %0, @%1; \n"
- " .fillinsn \n"
- "2:"
- : "=&r" (retval)
- : "r" (p), "r" (old), "r" (new)
- : "cbit", "memory"
-#ifdef CONFIG_CHIP_M32700_TS1
- , "r4"
-#endif /* CONFIG_CHIP_M32700_TS1 */
- );
- local_irq_restore(flags);
-
- return retval;
-}
-
-static inline unsigned long
-__cmpxchg_local_u32(volatile unsigned int *p, unsigned int old,
- unsigned int new)
-{
- unsigned long flags;
- unsigned int retval;
-
- local_irq_save(flags);
- __asm__ __volatile__ (
- DCACHE_CLEAR("%0", "r4", "%1")
- "ld %0, @%1; \n"
- " bne %0, %2, 1f; \n"
- "st %3, @%1; \n"
- " bra 2f; \n"
- " .fillinsn \n"
- "1:"
- "st %0, @%1; \n"
- " .fillinsn \n"
- "2:"
- : "=&r" (retval)
- : "r" (p), "r" (old), "r" (new)
- : "cbit", "memory"
-#ifdef CONFIG_CHIP_M32700_TS1
- , "r4"
-#endif /* CONFIG_CHIP_M32700_TS1 */
- );
- local_irq_restore(flags);
-
- return retval;
-}
-
-/* This function doesn't exist, so you'll get a linker error
- if something tries to do an invalid cmpxchg(). */
-extern void __cmpxchg_called_with_bad_pointer(void);
-
-static inline unsigned long
-__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
-{
- switch (size) {
- case 4:
- return __cmpxchg_u32(ptr, old, new);
-#if 0 /* we don't have __cmpxchg_u64 */
- case 8:
- return __cmpxchg_u64(ptr, old, new);
-#endif /* 0 */
- }
- __cmpxchg_called_with_bad_pointer();
- return old;
-}
-
-#define cmpxchg(ptr, o, n) ({ \
- ((__typeof__(*(ptr))) \
- __cmpxchg((ptr), (unsigned long)(o), \
- (unsigned long)(n), \
- sizeof(*(ptr)))); \
-})
-
-#include <asm-generic/cmpxchg-local.h>
-
-static inline unsigned long __cmpxchg_local(volatile void *ptr,
- unsigned long old,
- unsigned long new, int size)
-{
- switch (size) {
- case 4:
- return __cmpxchg_local_u32(ptr, old, new);
- default:
- return __cmpxchg_local_generic(ptr, old, new, size);
- }
-
- return old;
-}
-
-/*
- * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
- * them available.
- */
-#define cmpxchg_local(ptr, o, n) \
- ((__typeof__(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(o), \
- (unsigned long)(n), sizeof(*(ptr))))
-#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
-
-#endif /* _ASM_M32R_CMPXCHG_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2001 Hiroyuki Kondo, Hirokazu Takata, and Hitoshi Yamamoto
- * Copyright (C) 2004, 2006 Hirokazu Takata <takata at linux-m32r.org>
- */
-#ifndef _ASM_M32R_DCACHE_CLEAR_H
-#define _ASM_M32R_DCACHE_CLEAR_H
-
-#ifdef CONFIG_CHIP_M32700_TS1
-#define DCACHE_CLEAR(reg0, reg1, addr) \
- "seth "reg1", #high(dcache_dummy); \n\t" \
- "or3 "reg1", "reg1", #low(dcache_dummy); \n\t" \
- "lock "reg0", @"reg1"; \n\t" \
- "add3 "reg0", "addr", #0x1000; \n\t" \
- "ld "reg0", @"reg0"; \n\t" \
- "add3 "reg0", "addr", #0x2000; \n\t" \
- "ld "reg0", @"reg0"; \n\t" \
- "unlock "reg0", @"reg1"; \n\t"
- /* FIXME: This workaround code cannot handle kernel modules
- * correctly under SMP environment.
- */
-#else /* CONFIG_CHIP_M32700_TS1 */
-#define DCACHE_CLEAR(reg0, reg1, addr)
-#endif /* CONFIG_CHIP_M32700_TS1 */
-
-#endif /* _ASM_M32R_DCACHE_CLEAR_H */
+++ /dev/null
-#include <asm-generic/delay.h>
+++ /dev/null
-/*
- * Arch specific extensions to struct device
- *
- * This file is released under the GPLv2
- */
-struct dev_archdata {
-};
-
-struct pdev_archdata {
-};
+++ /dev/null
-#include <asm-generic/div64.h>
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_M32R_DMA_H
-#define _ASM_M32R_DMA_H
-
-#include <asm/io.h>
-
-/*
- * The maximum address that we can perform a DMA transfer
- * to on this platform
- */
-#define MAX_DMA_ADDRESS (PAGE_OFFSET+0x20000000)
-
-#endif /* _ASM_M32R_DMA_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_M32R__ELF_H
-#define _ASM_M32R__ELF_H
-
-/*
- * ELF-specific definitions.
- *
- * Copyright (C) 1999-2004, Renesas Technology Corp.
- * Hirokazu Takata <takata at linux-m32r.org>
- */
-
-#include <asm/ptrace.h>
-#include <asm/user.h>
-#include <asm/page.h>
-
-/* M32R relocation types */
-#define R_M32R_NONE 0
-#define R_M32R_16 1
-#define R_M32R_32 2
-#define R_M32R_24 3
-#define R_M32R_10_PCREL 4
-#define R_M32R_18_PCREL 5
-#define R_M32R_26_PCREL 6
-#define R_M32R_HI16_ULO 7
-#define R_M32R_HI16_SLO 8
-#define R_M32R_LO16 9
-#define R_M32R_SDA16 10
-#define R_M32R_GNU_VTINHERIT 11
-#define R_M32R_GNU_VTENTRY 12
-
-#define R_M32R_16_RELA 33
-#define R_M32R_32_RELA 34
-#define R_M32R_24_RELA 35
-#define R_M32R_10_PCREL_RELA 36
-#define R_M32R_18_PCREL_RELA 37
-#define R_M32R_26_PCREL_RELA 38
-#define R_M32R_HI16_ULO_RELA 39
-#define R_M32R_HI16_SLO_RELA 40
-#define R_M32R_LO16_RELA 41
-#define R_M32R_SDA16_RELA 42
-#define R_M32R_RELA_GNU_VTINHERIT 43
-#define R_M32R_RELA_GNU_VTENTRY 44
-
-#define R_M32R_GOT24 48
-#define R_M32R_26_PLTREL 49
-#define R_M32R_COPY 50
-#define R_M32R_GLOB_DAT 51
-#define R_M32R_JMP_SLOT 52
-#define R_M32R_RELATIVE 53
-#define R_M32R_GOTOFF 54
-#define R_M32R_GOTPC24 55
-#define R_M32R_GOT16_HI_ULO 56
-#define R_M32R_GOT16_HI_SLO 57
-#define R_M32R_GOT16_LO 58
-#define R_M32R_GOTPC_HI_ULO 59
-#define R_M32R_GOTPC_HI_SLO 60
-#define R_M32R_GOTPC_LO 61
-#define R_M32R_GOTOFF_HI_ULO 62
-#define R_M32R_GOTOFF_HI_SLO 63
-#define R_M32R_GOTOFF_LO 64
-
-#define R_M32R_NUM 256
-
-/*
- * ELF register definitions..
- */
-#define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t))
-
-typedef unsigned long elf_greg_t;
-typedef elf_greg_t elf_gregset_t[ELF_NGREG];
-
-/* We have no FP mumumu. */
-typedef double elf_fpreg_t;
-typedef elf_fpreg_t elf_fpregset_t;
-
-/*
- * This is used to ensure we don't load something for the wrong architecture.
- */
-#define elf_check_arch(x) \
- (((x)->e_machine == EM_M32R) || ((x)->e_machine == EM_CYGNUS_M32R))
-
-/*
- * These are used to set parameters in the core dumps.
- */
-#define ELF_CLASS ELFCLASS32
-#if defined(__LITTLE_ENDIAN__)
-#define ELF_DATA ELFDATA2LSB
-#elif defined(__BIG_ENDIAN__)
-#define ELF_DATA ELFDATA2MSB
-#else
-#error no endian defined
-#endif
-#define ELF_ARCH EM_M32R
-
-/* r0 is set by ld.so to a pointer to a function which might be
- * registered using 'atexit'. This provides a mean for the dynamic
- * linker to call DT_FINI functions for shared libraries that have
- * been loaded before the code runs.
- *
- * So that we can use the same startup file with static executables,
- * we start programs with a value of 0 to indicate that there is no
- * such function.
- */
-#define ELF_PLAT_INIT(_r, load_addr) (_r)->r0 = 0
-
-#define ELF_EXEC_PAGESIZE PAGE_SIZE
-
-/*
- * This is the location that an ET_DYN program is loaded if exec'ed.
- * Typical use of this is to invoke "./ld.so someprog" to test out a
- * new version of the loader. We need to make sure that it is out of
- * the way of the program that it will "exec", and that there is
- * sufficient room for the brk.
- */
-#define ELF_ET_DYN_BASE (TASK_SIZE / 3 * 2)
-
-/* regs is struct pt_regs, pr_reg is elf_gregset_t (which is
- now struct_user_regs, they are different) */
-
-#define ELF_CORE_COPY_REGS(pr_reg, regs) \
- memcpy((char *)pr_reg, (char *)regs, sizeof (struct pt_regs));
-
-/* This yields a mask that user programs can use to figure out what
- instruction set this CPU supports. */
-#define ELF_HWCAP (0)
-
-/* This yields a string that ld.so will use to load implementation
- specific libraries for optimization. This is more specific in
- intent than poking at uname or /proc/cpuinfo. */
-#define ELF_PLATFORM (NULL)
-
-#endif /* _ASM_M32R__ELF_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_EMERGENCY_RESTART_H
-#define _ASM_EMERGENCY_RESTART_H
-
-#include <asm-generic/emergency-restart.h>
-
-#endif /* _ASM_EMERGENCY_RESTART_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_FB_H_
-#define _ASM_FB_H_
-
-#include <linux/fb.h>
-#include <linux/fs.h>
-#include <asm/page.h>
-
-static inline void fb_pgprotect(struct file *file, struct vm_area_struct *vma,
- unsigned long off)
-{
- vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
-}
-
-static inline int fb_is_primary_device(struct fb_info *info)
-{
- return 0;
-}
-
-#endif /* _ASM_FB_H_ */
+++ /dev/null
-/*
- * include/asm-m32r/flat.h
- *
- * uClinux flat-format executables
- *
- * Copyright (C) 2004 Kazuhiro Inaoka
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive for
- * more details.
- */
-#ifndef __ASM_M32R_FLAT_H
-#define __ASM_M32R_FLAT_H
-
-#define flat_argvp_envp_on_stack() 0
-#define flat_old_ram_flag(flags) (flags)
-#define flat_set_persistent(relval, p) 0
-#define flat_reloc_valid(reloc, size) \
- (((reloc) - textlen_for_m32r_lo16_data) <= (size))
-
-/* Convert a relocation entry into an address. */
-static inline unsigned long
-flat_get_relocate_addr (unsigned long relval)
-{
- return relval & 0x00ffffff; /* Mask out top 8-bits */
-}
-
-#define flat_m32r_get_reloc_type(relval) ((relval) >> 24)
-
-#define M32R_SETH_OPCODE 0xd0c00000 /* SETH instruction code */
-
-#define FLAT_M32R_32 0x00 /* 32bits reloc */
-#define FLAT_M32R_24 0x01 /* unsigned 24bits reloc */
-#define FLAT_M32R_16 0x02 /* 16bits reloc */
-#define FLAT_M32R_LO16 0x03 /* signed low 16bits reloc (low()) */
-#define FLAT_M32R_LO16_DATA 0x04 /* signed low 16bits reloc (low())
- for a symbol in .data section */
- /* High 16bits of an address used
- when the lower 16bbits are treated
- as unsigned.
- To create SETH instruction only.
- 0x1X: X means a number of register.
- 0x10 - 0x3F are reserved. */
-#define FLAT_M32R_HI16_ULO 0x10 /* reloc for SETH Rn,#high(imm16) */
- /* High 16bits of an address used
- when the lower 16bbits are treated
- as signed.
- To create SETH instruction only.
- 0x2X: X means a number of register.
- 0x20 - 0x4F are reserved. */
-#define FLAT_M32R_HI16_SLO 0x20 /* reloc for SETH Rn,#shigh(imm16) */
-
-static unsigned long textlen_for_m32r_lo16_data = 0;
-
-static inline unsigned long m32r_flat_get_addr_from_rp (u32 *rp,
- u32 relval,
- u32 textlen)
-{
- unsigned int reloc = flat_m32r_get_reloc_type (relval);
- textlen_for_m32r_lo16_data = 0;
- if (reloc & 0xf0) {
- unsigned long addr = htonl(*rp);
- switch (reloc & 0xf0)
- {
- case FLAT_M32R_HI16_ULO:
- case FLAT_M32R_HI16_SLO:
- if (addr == 0) {
- /* put "seth Rn,#0x0" instead of 0 (addr). */
- *rp = (M32R_SETH_OPCODE | ((reloc & 0x0f)<<24));
- }
- return addr;
- default:
- break;
- }
- } else {
- switch (reloc)
- {
- case FLAT_M32R_LO16:
- return htonl(*rp) & 0xFFFF;
- case FLAT_M32R_LO16_DATA:
- /* FIXME: The return value will decrease by textlen
- at m32r_flat_put_addr_at_rp () */
- textlen_for_m32r_lo16_data = textlen;
- return (htonl(*rp) & 0xFFFF) + textlen;
- case FLAT_M32R_16:
- return htons(*(unsigned short *)rp) & 0xFFFF;
- case FLAT_M32R_24:
- return htonl(*rp) & 0xFFFFFF;
- case FLAT_M32R_32:
- return htonl(*rp);
- default:
- break;
- }
- }
- return ~0; /* bogus value */
-}
-
-static inline int flat_put_addr_at_rp(u32 *rp, u32 addr, u32 relval)
-{
- unsigned int reloc = flat_m32r_get_reloc_type (relval);
- if (reloc & 0xf0) {
- unsigned long Rn = reloc & 0x0f; /* get a number of register */
- Rn <<= 24; /* 0x0R000000 */
- reloc &= 0xf0;
- switch (reloc)
- {
- case FLAT_M32R_HI16_ULO: /* To create SETH Rn,#high(imm16) */
- *rp = (M32R_SETH_OPCODE | Rn
- | ((addr >> 16) & 0xFFFF));
- break;
- case FLAT_M32R_HI16_SLO: /* To create SETH Rn,#shigh(imm16) */
- *rp = (M32R_SETH_OPCODE | Rn
- | (((addr >> 16) + ((addr & 0x8000) ? 1 : 0))
- & 0xFFFF));
- break;
- }
- } else {
- switch (reloc) {
- case FLAT_M32R_LO16_DATA:
- addr -= textlen_for_m32r_lo16_data;
- textlen_for_m32r_lo16_data = 0;
- case FLAT_M32R_LO16:
- *rp = (htonl(*rp) & 0xFFFF0000) | (addr & 0xFFFF);
- break;
- case FLAT_M32R_16:
- *(unsigned short *)rp = addr & 0xFFFF;
- break;
- case FLAT_M32R_24:
- *rp = (htonl(*rp) & 0xFF000000) | (addr & 0xFFFFFF);
- break;
- case FLAT_M32R_32:
- *rp = addr;
- break;
- }
- }
- return 0;
-}
-
-// kludge - text_len is a local variable in the only user.
-#define flat_get_addr_from_rp(rp, relval, flags, addr, persistent) \
- (m32r_flat_get_addr_from_rp(rp, relval, text_len), 0)
-
-#endif /* __ASM_M32R_FLAT_H */
+++ /dev/null
-/* empty */
+++ /dev/null
-#ifndef _ASM_FUTEX_H
-#define _ASM_FUTEX_H
-
-#include <asm-generic/futex.h>
-
-#endif
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifdef __KERNEL__
-#ifndef __ASM_HARDIRQ_H
-#define __ASM_HARDIRQ_H
-
-#include <asm/irq.h>
-#include <asm-generic/hardirq.h>
-
-#endif /* __ASM_HARDIRQ_H */
-#endif /* __KERNEL__ */
+++ /dev/null
-#ifndef _ASM_M32R_HW_IRQ_H
-#define _ASM_M32R_HW_IRQ_H
-
-#endif /* _ASM_M32R_HW_IRQ_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_M32R_IO_H
-#define _ASM_M32R_IO_H
-
-#include <linux/string.h>
-#include <linux/compiler.h>
-#include <asm/page.h> /* __va */
-
-#ifdef __KERNEL__
-
-#define IO_SPACE_LIMIT 0xFFFFFFFF
-
-/**
- * virt_to_phys - map virtual addresses to physical
- * @address: address to remap
- *
- * The returned physical address is the physical (CPU) mapping for
- * the memory address given. It is only valid to use this function on
- * addresses directly mapped or allocated via kmalloc.
- *
- * This function does not give bus mappings for DMA transfers. In
- * almost all conceivable cases a device driver should not be using
- * this function
- */
-
-static inline unsigned long virt_to_phys(volatile void * address)
-{
- return __pa(address);
-}
-
-/**
- * phys_to_virt - map physical address to virtual
- * @address: address to remap
- *
- * The returned virtual address is a current CPU mapping for
- * the memory address given. It is only valid to use this function on
- * addresses that have a kernel mapping
- *
- * This function does not handle bus mappings for DMA transfers. In
- * almost all conceivable cases a device driver should not be using
- * this function
- */
-
-static inline void *phys_to_virt(unsigned long address)
-{
- return __va(address);
-}
-
-extern void __iomem *
-__ioremap(unsigned long offset, unsigned long size, unsigned long flags);
-
-/**
- * ioremap - map bus memory into CPU space
- * @offset: bus address of the memory
- * @size: size of the resource to map
- *
- * ioremap performs a platform specific sequence of operations to
- * make bus memory CPU accessible via the readb/readw/readl/writeb/
- * writew/writel functions and the other mmio helpers. The returned
- * address is not guaranteed to be usable directly as a virtual
- * address.
- */
-
-static inline void __iomem *ioremap(unsigned long offset, unsigned long size)
-{
- return __ioremap(offset, size, 0);
-}
-
-extern void iounmap(volatile void __iomem *addr);
-#define ioremap_nocache(off,size) ioremap(off,size)
-#define ioremap_wc ioremap_nocache
-#define ioremap_wt ioremap_nocache
-#define ioremap_uc ioremap_nocache
-
-/*
- * IO bus memory addresses are also 1:1 with the physical address
- */
-#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
-#define page_to_bus page_to_phys
-#define virt_to_bus virt_to_phys
-
-extern unsigned char _inb(unsigned long);
-extern unsigned short _inw(unsigned long);
-extern unsigned long _inl(unsigned long);
-extern unsigned char _inb_p(unsigned long);
-extern unsigned short _inw_p(unsigned long);
-extern unsigned long _inl_p(unsigned long);
-extern void _outb(unsigned char, unsigned long);
-extern void _outw(unsigned short, unsigned long);
-extern void _outl(unsigned long, unsigned long);
-extern void _outb_p(unsigned char, unsigned long);
-extern void _outw_p(unsigned short, unsigned long);
-extern void _outl_p(unsigned long, unsigned long);
-extern void _insb(unsigned int, void *, unsigned long);
-extern void _insw(unsigned int, void *, unsigned long);
-extern void _insl(unsigned int, void *, unsigned long);
-extern void _outsb(unsigned int, const void *, unsigned long);
-extern void _outsw(unsigned int, const void *, unsigned long);
-extern void _outsl(unsigned int, const void *, unsigned long);
-
-static inline unsigned char _readb(unsigned long addr)
-{
- return *(volatile unsigned char __force *)addr;
-}
-
-static inline unsigned short _readw(unsigned long addr)
-{
- return *(volatile unsigned short __force *)addr;
-}
-
-static inline unsigned long _readl(unsigned long addr)
-{
- return *(volatile unsigned long __force *)addr;
-}
-
-static inline void _writeb(unsigned char b, unsigned long addr)
-{
- *(volatile unsigned char __force *)addr = b;
-}
-
-static inline void _writew(unsigned short w, unsigned long addr)
-{
- *(volatile unsigned short __force *)addr = w;
-}
-
-static inline void _writel(unsigned long l, unsigned long addr)
-{
- *(volatile unsigned long __force *)addr = l;
-}
-
-#define inb _inb
-#define inw _inw
-#define inl _inl
-#define outb _outb
-#define outw _outw
-#define outl _outl
-
-#define inb_p _inb_p
-#define inw_p _inw_p
-#define inl_p _inl_p
-#define outb_p _outb_p
-#define outw_p _outw_p
-#define outl_p _outl_p
-
-#define insb _insb
-#define insw _insw
-#define insl _insl
-#define outsb _outsb
-#define outsw _outsw
-#define outsl _outsl
-
-#define readb(addr) _readb((unsigned long)(addr))
-#define readw(addr) _readw((unsigned long)(addr))
-#define readl(addr) _readl((unsigned long)(addr))
-#define __raw_readb readb
-#define __raw_readw readw
-#define __raw_readl readl
-#define readb_relaxed readb
-#define readw_relaxed readw
-#define readl_relaxed readl
-
-#define writeb(val, addr) _writeb((val), (unsigned long)(addr))
-#define writew(val, addr) _writew((val), (unsigned long)(addr))
-#define writel(val, addr) _writel((val), (unsigned long)(addr))
-#define __raw_writeb writeb
-#define __raw_writew writew
-#define __raw_writel writel
-#define writeb_relaxed writeb
-#define writew_relaxed writew
-#define writel_relaxed writel
-
-#define ioread8 readb
-#define ioread16 readw
-#define ioread32 readl
-#define iowrite8 writeb
-#define iowrite16 writew
-#define iowrite32 writel
-
-#define ioread8_rep(p, dst, count) insb((unsigned long)(p), (dst), (count))
-#define ioread16_rep(p, dst, count) insw((unsigned long)(p), (dst), (count))
-#define ioread32_rep(p, dst, count) insl((unsigned long)(p), (dst), (count))
-
-#define iowrite8_rep(p, src, count) outsb((unsigned long)(p), (src), (count))
-#define iowrite16_rep(p, src, count) outsw((unsigned long)(p), (src), (count))
-#define iowrite32_rep(p, src, count) outsl((unsigned long)(p), (src), (count))
-
-#define ioread16be(addr) be16_to_cpu(readw(addr))
-#define ioread32be(addr) be32_to_cpu(readl(addr))
-#define iowrite16be(v, addr) writew(cpu_to_be16(v), (addr))
-#define iowrite32be(v, addr) writel(cpu_to_be32(v), (addr))
-
-#define mmiowb()
-
-static inline void
-memset_io(volatile void __iomem *addr, unsigned char val, int count)
-{
- memset((void __force *) addr, val, count);
-}
-
-static inline void
-memcpy_fromio(void *dst, volatile void __iomem *src, int count)
-{
- memcpy(dst, (void __force *) src, count);
-}
-
-static inline void
-memcpy_toio(volatile void __iomem *dst, const void *src, int count)
-{
- memcpy((void __force *) dst, src, count);
-}
-
-/*
- * Convert a physical pointer to a virtual kernel pointer for /dev/mem
- * access
- */
-#define xlate_dev_mem_ptr(p) __va(p)
-
-/*
- * Convert a virtual cached pointer to an uncached pointer
- */
-#define xlate_dev_kmem_ptr(p) p
-
-#endif /* __KERNEL__ */
-
-#endif /* _ASM_M32R_IO_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifdef __KERNEL__
-#ifndef _ASM_M32R_IRQ_H
-#define _ASM_M32R_IRQ_H
-
-
-#if defined(CONFIG_PLAT_USRV)
-/*
- * IRQ definitions for M32700UT
- * M32700 Chip: 64 interrupts
- * ICU of M32700UT-on-board PLD: 32 interrupts cascaded to INT1# chip pin
- */
-#define M32700UT_NUM_CPU_IRQ (64)
-#define M32700UT_NUM_PLD_IRQ (32)
-#define M32700UT_IRQ_BASE 0
-#define M32700UT_CPU_IRQ_BASE M32700UT_IRQ_BASE
-#define M32700UT_PLD_IRQ_BASE (M32700UT_CPU_IRQ_BASE + M32700UT_NUM_CPU_IRQ)
-
-#define NR_IRQS (M32700UT_NUM_CPU_IRQ + M32700UT_NUM_PLD_IRQ)
-#elif defined(CONFIG_PLAT_M32700UT)
-/*
- * IRQ definitions for M32700UT(Rev.C) + M32R-LAN
- * M32700 Chip: 64 interrupts
- * ICU of M32700UT-on-board PLD: 32 interrupts cascaded to INT1# chip pin
- * ICU of M32R-LCD-on-board PLD: 32 interrupts cascaded to INT2# chip pin
- * ICU of M32R-LAN-on-board PLD: 32 interrupts cascaded to INT0# chip pin
- */
-#define M32700UT_NUM_CPU_IRQ (64)
-#define M32700UT_NUM_PLD_IRQ (32)
-#define M32700UT_NUM_LCD_PLD_IRQ (32)
-#define M32700UT_NUM_LAN_PLD_IRQ (32)
-#define M32700UT_IRQ_BASE 0
-#define M32700UT_CPU_IRQ_BASE (M32700UT_IRQ_BASE)
-#define M32700UT_PLD_IRQ_BASE \
- (M32700UT_CPU_IRQ_BASE + M32700UT_NUM_CPU_IRQ)
-#define M32700UT_LCD_PLD_IRQ_BASE \
- (M32700UT_PLD_IRQ_BASE + M32700UT_NUM_PLD_IRQ)
-#define M32700UT_LAN_PLD_IRQ_BASE \
- (M32700UT_LCD_PLD_IRQ_BASE + M32700UT_NUM_LCD_PLD_IRQ)
-
-#define NR_IRQS \
- (M32700UT_NUM_CPU_IRQ + M32700UT_NUM_PLD_IRQ \
- + M32700UT_NUM_LCD_PLD_IRQ + M32700UT_NUM_LAN_PLD_IRQ)
-#elif defined(CONFIG_PLAT_OPSPUT)
-/*
- * IRQ definitions for OPSPUT + M32R-LAN
- * OPSP Chip: 64 interrupts
- * ICU of OPSPUT-on-board PLD: 32 interrupts cascaded to INT1# chip pin
- * ICU of M32R-LCD-on-board PLD: 32 interrupts cascaded to INT2# chip pin
- * ICU of M32R-LAN-on-board PLD: 32 interrupts cascaded to INT0# chip pin
- */
-#define OPSPUT_NUM_CPU_IRQ (64)
-#define OPSPUT_NUM_PLD_IRQ (32)
-#define OPSPUT_NUM_LCD_PLD_IRQ (32)
-#define OPSPUT_NUM_LAN_PLD_IRQ (32)
-#define OPSPUT_IRQ_BASE 0
-#define OPSPUT_CPU_IRQ_BASE (OPSPUT_IRQ_BASE)
-#define OPSPUT_PLD_IRQ_BASE \
- (OPSPUT_CPU_IRQ_BASE + OPSPUT_NUM_CPU_IRQ)
-#define OPSPUT_LCD_PLD_IRQ_BASE \
- (OPSPUT_PLD_IRQ_BASE + OPSPUT_NUM_PLD_IRQ)
-#define OPSPUT_LAN_PLD_IRQ_BASE \
- (OPSPUT_LCD_PLD_IRQ_BASE + OPSPUT_NUM_LCD_PLD_IRQ)
-
-#define NR_IRQS \
- (OPSPUT_NUM_CPU_IRQ + OPSPUT_NUM_PLD_IRQ \
- + OPSPUT_NUM_LCD_PLD_IRQ + OPSPUT_NUM_LAN_PLD_IRQ)
-
-#elif defined(CONFIG_PLAT_M32104UT)
-/*
- * IRQ definitions for M32104UT
- * M32104 Chip: 64 interrupts
- * ICU of M32104UT-on-board PLD: 32 interrupts cascaded to INT1# chip pin
- */
-#define M32104UT_NUM_CPU_IRQ (64)
-#define M32104UT_NUM_PLD_IRQ (32)
-#define M32104UT_IRQ_BASE 0
-#define M32104UT_CPU_IRQ_BASE M32104UT_IRQ_BASE
-#define M32104UT_PLD_IRQ_BASE (M32104UT_CPU_IRQ_BASE + M32104UT_NUM_CPU_IRQ)
-
-#define NR_IRQS \
- (M32104UT_NUM_CPU_IRQ + M32104UT_NUM_PLD_IRQ)
-
-#else
-#define NR_IRQS 64
-#endif
-
-#define irq_canonicalize(irq) (irq)
-
-#endif /* _ASM_M32R_IRQ_H */
-#endif /* __KERNEL__ */
+++ /dev/null
-#include <asm-generic/irq_regs.h>
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2001 Hiroyuki Kondo, Hirokazu Takata, and Hitoshi Yamamoto
- * Copyright (C) 2004, 2006 Hirokazu Takata <takata at linux-m32r.org>
- */
-
-#ifndef _ASM_M32R_IRQFLAGS_H
-#define _ASM_M32R_IRQFLAGS_H
-
-#include <linux/types.h>
-
-static inline unsigned long arch_local_save_flags(void)
-{
- unsigned long flags;
- asm volatile("mvfc %0,psw" : "=r"(flags));
- return flags;
-}
-
-static inline void arch_local_irq_disable(void)
-{
-#if !defined(CONFIG_CHIP_M32102) && !defined(CONFIG_CHIP_M32104)
- asm volatile (
- "clrpsw #0x40 -> nop"
- : : : "memory");
-#else
- unsigned long tmpreg0, tmpreg1;
- asm volatile (
- "ld24 %0, #0 ; Use 32-bit insn. \n\t"
- "mvfc %1, psw ; No interrupt can be accepted here. \n\t"
- "mvtc %0, psw \n\t"
- "and3 %0, %1, #0xffbf \n\t"
- "mvtc %0, psw \n\t"
- : "=&r" (tmpreg0), "=&r" (tmpreg1)
- :
- : "cbit", "memory");
-#endif
-}
-
-static inline void arch_local_irq_enable(void)
-{
-#if !defined(CONFIG_CHIP_M32102) && !defined(CONFIG_CHIP_M32104)
- asm volatile (
- "setpsw #0x40 -> nop"
- : : : "memory");
-#else
- unsigned long tmpreg;
- asm volatile (
- "mvfc %0, psw; \n\t"
- "or3 %0, %0, #0x0040; \n\t"
- "mvtc %0, psw; \n\t"
- : "=&r" (tmpreg)
- :
- : "cbit", "memory");
-#endif
-}
-
-static inline unsigned long arch_local_irq_save(void)
-{
- unsigned long flags;
-
-#if !(defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_M32104))
- asm volatile (
- "mvfc %0, psw; \n\t"
- "clrpsw #0x40 -> nop; \n\t"
- : "=r" (flags)
- :
- : "memory");
-#else
- unsigned long tmpreg;
- asm volatile (
- "ld24 %1, #0 \n\t"
- "mvfc %0, psw \n\t"
- "mvtc %1, psw \n\t"
- "and3 %1, %0, #0xffbf \n\t"
- "mvtc %1, psw \n\t"
- : "=r" (flags), "=&r" (tmpreg)
- :
- : "cbit", "memory");
-#endif
- return flags;
-}
-
-static inline void arch_local_irq_restore(unsigned long flags)
-{
- asm volatile("mvtc %0,psw"
- :
- : "r" (flags)
- : "cbit", "memory");
-}
-
-static inline bool arch_irqs_disabled_flags(unsigned long flags)
-{
- return !(flags & 0x40);
-}
-
-static inline bool arch_irqs_disabled(void)
-{
- return arch_irqs_disabled_flags(arch_local_save_flags());
-}
-
-#endif /* _ASM_M32R_IRQFLAGS_H */
+++ /dev/null
-#include <asm-generic/kdebug.h>
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __M32R_KMAP_TYPES_H
-#define __M32R_KMAP_TYPES_H
-
-#ifdef CONFIG_DEBUG_HIGHMEM
-#define __WITH_KM_FENCE
-#endif
-
-#include <asm-generic/kmap_types.h>
-
-#undef __WITH_KM_FENCE
-
-#endif /* __M32R_KMAP_TYPES_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __ASM_LINKAGE_H
-#define __ASM_LINKAGE_H
-
-#define __ALIGN .balign 4
-#define __ALIGN_STR ".balign 4"
-
-#endif /* __ASM_LINKAGE_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __M32R_LOCAL_H
-#define __M32R_LOCAL_H
-
-/*
- * linux/include/asm-m32r/local.h
- *
- * M32R version:
- * Copyright (C) 2001, 2002 Hitoshi Yamamoto
- * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org>
- * Copyright (C) 2007 Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca>
- */
-
-#include <linux/percpu.h>
-#include <asm/assembler.h>
-#include <asm/local.h>
-
-/*
- * Atomic operations that C can't guarantee us. Useful for
- * resource counting etc..
- */
-
-/*
- * Make sure gcc doesn't try to be clever and move things around
- * on us. We need to use _exactly_ the address the user gave us,
- * not some alias that contains the same information.
- */
-typedef struct { volatile int counter; } local_t;
-
-#define LOCAL_INIT(i) { (i) }
-
-/**
- * local_read - read local variable
- * @l: pointer of type local_t
- *
- * Atomically reads the value of @l.
- */
-#define local_read(l) ((l)->counter)
-
-/**
- * local_set - set local variable
- * @l: pointer of type local_t
- * @i: required value
- *
- * Atomically sets the value of @l to @i.
- */
-#define local_set(l, i) (((l)->counter) = (i))
-
-/**
- * local_add_return - add long to local variable and return it
- * @i: long value to add
- * @l: pointer of type local_t
- *
- * Atomically adds @i to @l and return (@i + @l).
- */
-static inline long local_add_return(long i, local_t *l)
-{
- unsigned long flags;
- long result;
-
- local_irq_save(flags);
- __asm__ __volatile__ (
- "# local_add_return \n\t"
- DCACHE_CLEAR("%0", "r4", "%1")
- "ld %0, @%1; \n\t"
- "add %0, %2; \n\t"
- "st %0, @%1; \n\t"
- : "=&r" (result)
- : "r" (&l->counter), "r" (i)
- : "memory"
-#ifdef CONFIG_CHIP_M32700_TS1
- , "r4"
-#endif /* CONFIG_CHIP_M32700_TS1 */
- );
- local_irq_restore(flags);
-
- return result;
-}
-
-/**
- * local_sub_return - subtract long from local variable and return it
- * @i: long value to subtract
- * @l: pointer of type local_t
- *
- * Atomically subtracts @i from @l and return (@l - @i).
- */
-static inline long local_sub_return(long i, local_t *l)
-{
- unsigned long flags;
- long result;
-
- local_irq_save(flags);
- __asm__ __volatile__ (
- "# local_sub_return \n\t"
- DCACHE_CLEAR("%0", "r4", "%1")
- "ld %0, @%1; \n\t"
- "sub %0, %2; \n\t"
- "st %0, @%1; \n\t"
- : "=&r" (result)
- : "r" (&l->counter), "r" (i)
- : "memory"
-#ifdef CONFIG_CHIP_M32700_TS1
- , "r4"
-#endif /* CONFIG_CHIP_M32700_TS1 */
- );
- local_irq_restore(flags);
-
- return result;
-}
-
-/**
- * local_add - add long to local variable
- * @i: long value to add
- * @l: pointer of type local_t
- *
- * Atomically adds @i to @l.
- */
-#define local_add(i, l) ((void) local_add_return((i), (l)))
-
-/**
- * local_sub - subtract the local variable
- * @i: long value to subtract
- * @l: pointer of type local_t
- *
- * Atomically subtracts @i from @l.
- */
-#define local_sub(i, l) ((void) local_sub_return((i), (l)))
-
-/**
- * local_sub_and_test - subtract value from variable and test result
- * @i: integer value to subtract
- * @l: pointer of type local_t
- *
- * Atomically subtracts @i from @l and returns
- * true if the result is zero, or false for all
- * other cases.
- */
-#define local_sub_and_test(i, l) (local_sub_return((i), (l)) == 0)
-
-/**
- * local_inc_return - increment local variable and return it
- * @l: pointer of type local_t
- *
- * Atomically increments @l by 1 and returns the result.
- */
-static inline long local_inc_return(local_t *l)
-{
- unsigned long flags;
- long result;
-
- local_irq_save(flags);
- __asm__ __volatile__ (
- "# local_inc_return \n\t"
- DCACHE_CLEAR("%0", "r4", "%1")
- "ld %0, @%1; \n\t"
- "addi %0, #1; \n\t"
- "st %0, @%1; \n\t"
- : "=&r" (result)
- : "r" (&l->counter)
- : "memory"
-#ifdef CONFIG_CHIP_M32700_TS1
- , "r4"
-#endif /* CONFIG_CHIP_M32700_TS1 */
- );
- local_irq_restore(flags);
-
- return result;
-}
-
-/**
- * local_dec_return - decrement local variable and return it
- * @l: pointer of type local_t
- *
- * Atomically decrements @l by 1 and returns the result.
- */
-static inline long local_dec_return(local_t *l)
-{
- unsigned long flags;
- long result;
-
- local_irq_save(flags);
- __asm__ __volatile__ (
- "# local_dec_return \n\t"
- DCACHE_CLEAR("%0", "r4", "%1")
- "ld %0, @%1; \n\t"
- "addi %0, #-1; \n\t"
- "st %0, @%1; \n\t"
- : "=&r" (result)
- : "r" (&l->counter)
- : "memory"
-#ifdef CONFIG_CHIP_M32700_TS1
- , "r4"
-#endif /* CONFIG_CHIP_M32700_TS1 */
- );
- local_irq_restore(flags);
-
- return result;
-}
-
-/**
- * local_inc - increment local variable
- * @l: pointer of type local_t
- *
- * Atomically increments @l by 1.
- */
-#define local_inc(l) ((void)local_inc_return(l))
-
-/**
- * local_dec - decrement local variable
- * @l: pointer of type local_t
- *
- * Atomically decrements @l by 1.
- */
-#define local_dec(l) ((void)local_dec_return(l))
-
-/**
- * local_inc_and_test - increment and test
- * @l: pointer of type local_t
- *
- * Atomically increments @l by 1
- * and returns true if the result is zero, or false for all
- * other cases.
- */
-#define local_inc_and_test(l) (local_inc_return(l) == 0)
-
-/**
- * local_dec_and_test - decrement and test
- * @l: pointer of type local_t
- *
- * Atomically decrements @l by 1 and
- * returns true if the result is 0, or false for all
- * other cases.
- */
-#define local_dec_and_test(l) (local_dec_return(l) == 0)
-
-/**
- * local_add_negative - add and test if negative
- * @l: pointer of type local_t
- * @i: integer value to add
- *
- * Atomically adds @i to @l and returns true
- * if the result is negative, or false when
- * result is greater than or equal to zero.
- */
-#define local_add_negative(i, l) (local_add_return((i), (l)) < 0)
-
-#define local_cmpxchg(l, o, n) (cmpxchg_local(&((l)->counter), (o), (n)))
-#define local_xchg(v, new) (xchg_local(&((l)->counter), new))
-
-/**
- * local_add_unless - add unless the number is a given value
- * @l: pointer of type local_t
- * @a: the amount to add to l...
- * @u: ...unless l is equal to u.
- *
- * Atomically adds @a to @l, so long as it was not @u.
- * Returns non-zero if @l was not @u, and zero otherwise.
- */
-static inline int local_add_unless(local_t *l, long a, long u)
-{
- long c, old;
- c = local_read(l);
- for (;;) {
- if (unlikely(c == (u)))
- break;
- old = local_cmpxchg((l), c, c + (a));
- if (likely(old == c))
- break;
- c = old;
- }
- return c != (u);
-}
-
-#define local_inc_not_zero(l) local_add_unless((l), 1, 0)
-
-static inline void local_clear_mask(unsigned long mask, local_t *addr)
-{
- unsigned long flags;
- unsigned long tmp;
-
- local_irq_save(flags);
- __asm__ __volatile__ (
- "# local_clear_mask \n\t"
- DCACHE_CLEAR("%0", "r5", "%1")
- "ld %0, @%1; \n\t"
- "and %0, %2; \n\t"
- "st %0, @%1; \n\t"
- : "=&r" (tmp)
- : "r" (addr), "r" (~mask)
- : "memory"
-#ifdef CONFIG_CHIP_M32700_TS1
- , "r5"
-#endif /* CONFIG_CHIP_M32700_TS1 */
- );
- local_irq_restore(flags);
-}
-
-static inline void local_set_mask(unsigned long mask, local_t *addr)
-{
- unsigned long flags;
- unsigned long tmp;
-
- local_irq_save(flags);
- __asm__ __volatile__ (
- "# local_set_mask \n\t"
- DCACHE_CLEAR("%0", "r5", "%1")
- "ld %0, @%1; \n\t"
- "or %0, %2; \n\t"
- "st %0, @%1; \n\t"
- : "=&r" (tmp)
- : "r" (addr), "r" (mask)
- : "memory"
-#ifdef CONFIG_CHIP_M32700_TS1
- , "r5"
-#endif /* CONFIG_CHIP_M32700_TS1 */
- );
- local_irq_restore(flags);
-}
-
-/* Atomic operations are already serializing on m32r */
-#define smp_mb__before_local_dec() barrier()
-#define smp_mb__after_local_dec() barrier()
-#define smp_mb__before_local_inc() barrier()
-#define smp_mb__after_local_inc() barrier()
-
-/* Use these for per-cpu local_t variables: on some archs they are
- * much more efficient than these naive implementations. Note they take
- * a variable, not an address.
- */
-
-#define __local_inc(l) ((l)->a.counter++)
-#define __local_dec(l) ((l)->a.counter++)
-#define __local_add(i, l) ((l)->a.counter += (i))
-#define __local_sub(i, l) ((l)->a.counter -= (i))
-
-/* Use these for per-cpu local_t variables: on some archs they are
- * much more efficient than these naive implementations. Note they take
- * a variable, not an address.
- */
-
-#endif /* __M32R_LOCAL_H */
+++ /dev/null
-#include <asm-generic/local64.h>
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _M32102_H_
-#define _M32102_H_
-
-/*
- * Renesas M32R 32102 group
- *
- * Copyright (c) 2001 Hitoshi Yamamoto
- * Copyright (c) 2003, 2004 Renesas Technology Corp.
- */
-
-/*======================================================================*
- * Special Function Register
- *======================================================================*/
-#if !defined(CONFIG_CHIP_M32104)
-#define M32R_SFR_OFFSET (0x00E00000) /* 0x00E00000-0x00EFFFFF 1[MB] */
-#else
-#define M32R_SFR_OFFSET (0x00700000) /* 0x00700000-0x007FFFFF 1[MB] */
-#endif
-
-/*
- * Clock and Power Management registers.
- */
-#define M32R_CPM_OFFSET (0x000F4000+M32R_SFR_OFFSET)
-
-#define M32R_CPM_CPUCLKCR_PORTL (0x00+M32R_CPM_OFFSET)
-#define M32R_CPM_CLKMOD_PORTL (0x04+M32R_CPM_OFFSET)
-#define M32R_CPM_PLLCR_PORTL (0x08+M32R_CPM_OFFSET)
-
-/*
- * DMA Controller registers.
- */
-#define M32R_DMA_OFFSET (0x000F8000+M32R_SFR_OFFSET)
-
-#define M32R_DMAEN_PORTL (0x000+M32R_DMA_OFFSET)
-#define M32R_DMAISTS_PORTL (0x004+M32R_DMA_OFFSET)
-#define M32R_DMAEDET_PORTL (0x008+M32R_DMA_OFFSET)
-#define M32R_DMAASTS_PORTL (0x00c+M32R_DMA_OFFSET)
-
-#define M32R_DMA0CR0_PORTL (0x100+M32R_DMA_OFFSET)
-#define M32R_DMA0CR1_PORTL (0x104+M32R_DMA_OFFSET)
-#define M32R_DMA0CSA_PORTL (0x108+M32R_DMA_OFFSET)
-#define M32R_DMA0RSA_PORTL (0x10c+M32R_DMA_OFFSET)
-#define M32R_DMA0CDA_PORTL (0x110+M32R_DMA_OFFSET)
-#define M32R_DMA0RDA_PORTL (0x114+M32R_DMA_OFFSET)
-#define M32R_DMA0CBCUT_PORTL (0x118+M32R_DMA_OFFSET)
-#define M32R_DMA0RBCUT_PORTL (0x11c+M32R_DMA_OFFSET)
-
-#define M32R_DMA1CR0_PORTL (0x200+M32R_DMA_OFFSET)
-#define M32R_DMA1CR1_PORTL (0x204+M32R_DMA_OFFSET)
-#define M32R_DMA1CSA_PORTL (0x208+M32R_DMA_OFFSET)
-#define M32R_DMA1RSA_PORTL (0x20c+M32R_DMA_OFFSET)
-#define M32R_DMA1CDA_PORTL (0x210+M32R_DMA_OFFSET)
-#define M32R_DMA1RDA_PORTL (0x214+M32R_DMA_OFFSET)
-#define M32R_DMA1CBCUT_PORTL (0x218+M32R_DMA_OFFSET)
-#define M32R_DMA1RBCUT_PORTL (0x21c+M32R_DMA_OFFSET)
-
-/*
- * Multi Function Timer registers.
- */
-#define M32R_MFT_OFFSET (0x000FC000+M32R_SFR_OFFSET)
-
-#define M32R_MFTCR_PORTL (0x000+M32R_MFT_OFFSET) /* MFT control */
-#define M32R_MFTRPR_PORTL (0x004+M32R_MFT_OFFSET) /* MFT real port */
-
-#define M32R_MFT0_OFFSET (0x100+M32R_MFT_OFFSET)
-#define M32R_MFT0MOD_PORTL (0x00+M32R_MFT0_OFFSET) /* MFT0 mode */
-#define M32R_MFT0BOS_PORTL (0x04+M32R_MFT0_OFFSET) /* MFT0 b-port output status */
-#define M32R_MFT0CUT_PORTL (0x08+M32R_MFT0_OFFSET) /* MFT0 count */
-#define M32R_MFT0RLD_PORTL (0x0C+M32R_MFT0_OFFSET) /* MFT0 reload */
-#define M32R_MFT0CMPRLD_PORTL (0x10+M32R_MFT0_OFFSET) /* MFT0 compare reload */
-
-#define M32R_MFT1_OFFSET (0x200+M32R_MFT_OFFSET)
-#define M32R_MFT1MOD_PORTL (0x00+M32R_MFT1_OFFSET) /* MFT1 mode */
-#define M32R_MFT1BOS_PORTL (0x04+M32R_MFT1_OFFSET) /* MFT1 b-port output status */
-#define M32R_MFT1CUT_PORTL (0x08+M32R_MFT1_OFFSET) /* MFT1 count */
-#define M32R_MFT1RLD_PORTL (0x0C+M32R_MFT1_OFFSET) /* MFT1 reload */
-#define M32R_MFT1CMPRLD_PORTL (0x10+M32R_MFT1_OFFSET) /* MFT1 compare reload */
-
-#define M32R_MFT2_OFFSET (0x300+M32R_MFT_OFFSET)
-#define M32R_MFT2MOD_PORTL (0x00+M32R_MFT2_OFFSET) /* MFT2 mode */
-#define M32R_MFT2BOS_PORTL (0x04+M32R_MFT2_OFFSET) /* MFT2 b-port output status */
-#define M32R_MFT2CUT_PORTL (0x08+M32R_MFT2_OFFSET) /* MFT2 count */
-#define M32R_MFT2RLD_PORTL (0x0C+M32R_MFT2_OFFSET) /* MFT2 reload */
-#define M32R_MFT2CMPRLD_PORTL (0x10+M32R_MFT2_OFFSET) /* MFT2 compare reload */
-
-#define M32R_MFT3_OFFSET (0x400+M32R_MFT_OFFSET)
-#define M32R_MFT3MOD_PORTL (0x00+M32R_MFT3_OFFSET) /* MFT3 mode */
-#define M32R_MFT3BOS_PORTL (0x04+M32R_MFT3_OFFSET) /* MFT3 b-port output status */
-#define M32R_MFT3CUT_PORTL (0x08+M32R_MFT3_OFFSET) /* MFT3 count */
-#define M32R_MFT3RLD_PORTL (0x0C+M32R_MFT3_OFFSET) /* MFT3 reload */
-#define M32R_MFT3CMPRLD_PORTL (0x10+M32R_MFT3_OFFSET) /* MFT3 compare reload */
-
-#define M32R_MFT4_OFFSET (0x500+M32R_MFT_OFFSET)
-#define M32R_MFT4MOD_PORTL (0x00+M32R_MFT4_OFFSET) /* MFT4 mode */
-#define M32R_MFT4BOS_PORTL (0x04+M32R_MFT4_OFFSET) /* MFT4 b-port output status */
-#define M32R_MFT4CUT_PORTL (0x08+M32R_MFT4_OFFSET) /* MFT4 count */
-#define M32R_MFT4RLD_PORTL (0x0C+M32R_MFT4_OFFSET) /* MFT4 reload */
-#define M32R_MFT4CMPRLD_PORTL (0x10+M32R_MFT4_OFFSET) /* MFT4 compare reload */
-
-#define M32R_MFT5_OFFSET (0x600+M32R_MFT_OFFSET)
-#define M32R_MFT5MOD_PORTL (0x00+M32R_MFT5_OFFSET) /* MFT4 mode */
-#define M32R_MFT5BOS_PORTL (0x04+M32R_MFT5_OFFSET) /* MFT4 b-port output status */
-#define M32R_MFT5CUT_PORTL (0x08+M32R_MFT5_OFFSET) /* MFT4 count */
-#define M32R_MFT5RLD_PORTL (0x0C+M32R_MFT5_OFFSET) /* MFT4 reload */
-#define M32R_MFT5CMPRLD_PORTL (0x10+M32R_MFT5_OFFSET) /* MFT4 compare reload */
-
-#if (defined(CONFIG_CHIP_M32700) && !defined(CONFIG_PLAT_MAPPI2)) \
- || defined(CONFIG_CHIP_M32104)
-#define M32R_MFTCR_MFT0MSK (1UL<<31) /* b0 */
-#define M32R_MFTCR_MFT1MSK (1UL<<30) /* b1 */
-#define M32R_MFTCR_MFT2MSK (1UL<<29) /* b2 */
-#define M32R_MFTCR_MFT3MSK (1UL<<28) /* b3 */
-#define M32R_MFTCR_MFT4MSK (1UL<<27) /* b4 */
-#define M32R_MFTCR_MFT5MSK (1UL<<26) /* b5 */
-#define M32R_MFTCR_MFT0EN (1UL<<23) /* b8 */
-#define M32R_MFTCR_MFT1EN (1UL<<22) /* b9 */
-#define M32R_MFTCR_MFT2EN (1UL<<21) /* b10 */
-#define M32R_MFTCR_MFT3EN (1UL<<20) /* b11 */
-#define M32R_MFTCR_MFT4EN (1UL<<19) /* b12 */
-#define M32R_MFTCR_MFT5EN (1UL<<18) /* b13 */
-#else
-#define M32R_MFTCR_MFT0MSK (1UL<<15) /* b16 */
-#define M32R_MFTCR_MFT1MSK (1UL<<14) /* b17 */
-#define M32R_MFTCR_MFT2MSK (1UL<<13) /* b18 */
-#define M32R_MFTCR_MFT3MSK (1UL<<12) /* b19 */
-#define M32R_MFTCR_MFT4MSK (1UL<<11) /* b20 */
-#define M32R_MFTCR_MFT5MSK (1UL<<10) /* b21 */
-#define M32R_MFTCR_MFT0EN (1UL<<7) /* b24 */
-#define M32R_MFTCR_MFT1EN (1UL<<6) /* b25 */
-#define M32R_MFTCR_MFT2EN (1UL<<5) /* b26 */
-#define M32R_MFTCR_MFT3EN (1UL<<4) /* b27 */
-#define M32R_MFTCR_MFT4EN (1UL<<3) /* b28 */
-#define M32R_MFTCR_MFT5EN (1UL<<2) /* b29 */
-#endif
-
-#define M32R_MFTMOD_CC_MASK (1UL<<15) /* b16 */
-#define M32R_MFTMOD_TCCR (1UL<<13) /* b18 */
-#define M32R_MFTMOD_GTSEL000 (0UL<<8) /* b21-23 : 000 */
-#define M32R_MFTMOD_GTSEL001 (1UL<<8) /* b21-23 : 001 */
-#define M32R_MFTMOD_GTSEL010 (2UL<<8) /* b21-23 : 010 */
-#define M32R_MFTMOD_GTSEL011 (3UL<<8) /* b21-23 : 011 */
-#define M32R_MFTMOD_GTSEL110 (6UL<<8) /* b21-23 : 110 */
-#define M32R_MFTMOD_GTSEL111 (7UL<<8) /* b21-23 : 111 */
-#define M32R_MFTMOD_CMSEL (1UL<<3) /* b28 */
-#define M32R_MFTMOD_CSSEL000 (0UL<<0) /* b29-b31 : 000 */
-#define M32R_MFTMOD_CSSEL001 (1UL<<0) /* b29-b31 : 001 */
-#define M32R_MFTMOD_CSSEL010 (2UL<<0) /* b29-b31 : 010 */
-#define M32R_MFTMOD_CSSEL011 (3UL<<0) /* b29-b31 : 011 */
-#define M32R_MFTMOD_CSSEL100 (4UL<<0) /* b29-b31 : 100 */
-#define M32R_MFTMOD_CSSEL110 (6UL<<0) /* b29-b31 : 110 */
-
-/*
- * Serial I/O registers.
- */
-#define M32R_SIO_OFFSET (0x000FD000+M32R_SFR_OFFSET)
-
-#define M32R_SIO0_CR_PORTL (0x000+M32R_SIO_OFFSET)
-#define M32R_SIO0_MOD0_PORTL (0x004+M32R_SIO_OFFSET)
-#define M32R_SIO0_MOD1_PORTL (0x008+M32R_SIO_OFFSET)
-#define M32R_SIO0_STS_PORTL (0x00C+M32R_SIO_OFFSET)
-#define M32R_SIO0_TRCR_PORTL (0x010+M32R_SIO_OFFSET)
-#define M32R_SIO0_BAUR_PORTL (0x014+M32R_SIO_OFFSET)
-#define M32R_SIO0_RBAUR_PORTL (0x018+M32R_SIO_OFFSET)
-#define M32R_SIO0_TXB_PORTL (0x01C+M32R_SIO_OFFSET)
-#define M32R_SIO0_RXB_PORTL (0x020+M32R_SIO_OFFSET)
-
-/*
- * Interrupt Control Unit registers.
- */
-#define M32R_ICU_OFFSET (0x000FF000+M32R_SFR_OFFSET)
-#define M32R_ICU_ISTS_PORTL (0x004+M32R_ICU_OFFSET)
-#define M32R_ICU_IREQ0_PORTL (0x008+M32R_ICU_OFFSET)
-#define M32R_ICU_IREQ1_PORTL (0x00C+M32R_ICU_OFFSET)
-#define M32R_ICU_SBICR_PORTL (0x018+M32R_ICU_OFFSET)
-#define M32R_ICU_IMASK_PORTL (0x01C+M32R_ICU_OFFSET)
-#define M32R_ICU_CR1_PORTL (0x200+M32R_ICU_OFFSET) /* INT0 */
-#define M32R_ICU_CR2_PORTL (0x204+M32R_ICU_OFFSET) /* INT1 */
-#define M32R_ICU_CR3_PORTL (0x208+M32R_ICU_OFFSET) /* INT2 */
-#define M32R_ICU_CR4_PORTL (0x20C+M32R_ICU_OFFSET) /* INT3 */
-#define M32R_ICU_CR5_PORTL (0x210+M32R_ICU_OFFSET) /* INT4 */
-#define M32R_ICU_CR6_PORTL (0x214+M32R_ICU_OFFSET) /* INT5 */
-#define M32R_ICU_CR7_PORTL (0x218+M32R_ICU_OFFSET) /* INT6 */
-#define M32R_ICU_CR8_PORTL (0x219+M32R_ICU_OFFSET) /* INT7 */
-#define M32R_ICU_CR16_PORTL (0x23C+M32R_ICU_OFFSET) /* MFT0 */
-#define M32R_ICU_CR17_PORTL (0x240+M32R_ICU_OFFSET) /* MFT1 */
-#define M32R_ICU_CR18_PORTL (0x244+M32R_ICU_OFFSET) /* MFT2 */
-#define M32R_ICU_CR19_PORTL (0x248+M32R_ICU_OFFSET) /* MFT3 */
-#define M32R_ICU_CR20_PORTL (0x24C+M32R_ICU_OFFSET) /* MFT4 */
-#define M32R_ICU_CR21_PORTL (0x250+M32R_ICU_OFFSET) /* MFT5 */
-#define M32R_ICU_CR32_PORTL (0x27C+M32R_ICU_OFFSET) /* DMA0 */
-#define M32R_ICU_CR33_PORTL (0x280+M32R_ICU_OFFSET) /* DMA1 */
-#define M32R_ICU_CR48_PORTL (0x2BC+M32R_ICU_OFFSET) /* SIO0 */
-#define M32R_ICU_CR49_PORTL (0x2C0+M32R_ICU_OFFSET) /* SIO0 */
-#define M32R_ICU_CR50_PORTL (0x2C4+M32R_ICU_OFFSET) /* SIO1 */
-#define M32R_ICU_CR51_PORTL (0x2C8+M32R_ICU_OFFSET) /* SIO1 */
-#define M32R_ICU_CR52_PORTL (0x2CC+M32R_ICU_OFFSET) /* SIO2 */
-#define M32R_ICU_CR53_PORTL (0x2D0+M32R_ICU_OFFSET) /* SIO2 */
-#define M32R_ICU_CR54_PORTL (0x2D4+M32R_ICU_OFFSET) /* SIO3 */
-#define M32R_ICU_CR55_PORTL (0x2D8+M32R_ICU_OFFSET) /* SIO3 */
-#define M32R_ICU_CR56_PORTL (0x2DC+M32R_ICU_OFFSET) /* SIO4 */
-#define M32R_ICU_CR57_PORTL (0x2E0+M32R_ICU_OFFSET) /* SIO4 */
-
-#ifdef CONFIG_SMP
-#define M32R_ICU_IPICR0_PORTL (0x2dc+M32R_ICU_OFFSET) /* IPI0 */
-#define M32R_ICU_IPICR1_PORTL (0x2e0+M32R_ICU_OFFSET) /* IPI1 */
-#define M32R_ICU_IPICR2_PORTL (0x2e4+M32R_ICU_OFFSET) /* IPI2 */
-#define M32R_ICU_IPICR3_PORTL (0x2e8+M32R_ICU_OFFSET) /* IPI3 */
-#define M32R_ICU_IPICR4_PORTL (0x2ec+M32R_ICU_OFFSET) /* IPI4 */
-#define M32R_ICU_IPICR5_PORTL (0x2f0+M32R_ICU_OFFSET) /* IPI5 */
-#define M32R_ICU_IPICR6_PORTL (0x2f4+M32R_ICU_OFFSET) /* IPI6 */
-#define M32R_ICU_IPICR7_PORTL (0x2f8+M32R_ICU_OFFSET) /* IPI7 */
-#endif /* CONFIG_SMP */
-
-#define M32R_ICUIMASK_IMSK0 (0UL<<16) /* b13-b15: Disable interrupt */
-#define M32R_ICUIMASK_IMSK1 (1UL<<16) /* b13-b15: Enable level 0 interrupt */
-#define M32R_ICUIMASK_IMSK2 (2UL<<16) /* b13-b15: Enable level 0,1 interrupt */
-#define M32R_ICUIMASK_IMSK3 (3UL<<16) /* b13-b15: Enable level 0-2 interrupt */
-#define M32R_ICUIMASK_IMSK4 (4UL<<16) /* b13-b15: Enable level 0-3 interrupt */
-#define M32R_ICUIMASK_IMSK5 (5UL<<16) /* b13-b15: Enable level 0-4 interrupt */
-#define M32R_ICUIMASK_IMSK6 (6UL<<16) /* b13-b15: Enable level 0-5 interrupt */
-#define M32R_ICUIMASK_IMSK7 (7UL<<16) /* b13-b15: Enable level 0-6 interrupt */
-
-#define M32R_ICUCR_IEN (1UL<<12) /* b19: Interrupt enable */
-#define M32R_ICUCR_IRQ (1UL<<8) /* b23: Interrupt request */
-#define M32R_ICUCR_ISMOD00 (0UL<<4) /* b26-b27: Interrupt sense mode Edge HtoL */
-#define M32R_ICUCR_ISMOD01 (1UL<<4) /* b26-b27: Interrupt sense mode Level L */
-#define M32R_ICUCR_ISMOD10 (2UL<<4) /* b26-b27: Interrupt sense mode Edge LtoH*/
-#define M32R_ICUCR_ISMOD11 (3UL<<4) /* b26-b27: Interrupt sense mode Level H */
-#define M32R_ICUCR_ILEVEL0 (0UL<<0) /* b29-b31: Interrupt priority level 0 */
-#define M32R_ICUCR_ILEVEL1 (1UL<<0) /* b29-b31: Interrupt priority level 1 */
-#define M32R_ICUCR_ILEVEL2 (2UL<<0) /* b29-b31: Interrupt priority level 2 */
-#define M32R_ICUCR_ILEVEL3 (3UL<<0) /* b29-b31: Interrupt priority level 3 */
-#define M32R_ICUCR_ILEVEL4 (4UL<<0) /* b29-b31: Interrupt priority level 4 */
-#define M32R_ICUCR_ILEVEL5 (5UL<<0) /* b29-b31: Interrupt priority level 5 */
-#define M32R_ICUCR_ILEVEL6 (6UL<<0) /* b29-b31: Interrupt priority level 6 */
-#define M32R_ICUCR_ILEVEL7 (7UL<<0) /* b29-b31: Disable interrupt */
-
-#define M32R_IRQ_INT0 (1) /* INT0 */
-#define M32R_IRQ_INT1 (2) /* INT1 */
-#define M32R_IRQ_INT2 (3) /* INT2 */
-#define M32R_IRQ_INT3 (4) /* INT3 */
-#define M32R_IRQ_INT4 (5) /* INT4 */
-#define M32R_IRQ_INT5 (6) /* INT5 */
-#define M32R_IRQ_INT6 (7) /* INT6 */
-#define M32R_IRQ_MFT0 (16) /* MFT0 */
-#define M32R_IRQ_MFT1 (17) /* MFT1 */
-#define M32R_IRQ_MFT2 (18) /* MFT2 */
-#define M32R_IRQ_MFT3 (19) /* MFT3 */
-#ifdef CONFIG_CHIP_M32104
-#define M32R_IRQ_MFTX0 (24) /* MFTX0 */
-#define M32R_IRQ_MFTX1 (25) /* MFTX1 */
-#define M32R_IRQ_DMA0 (32) /* DMA0 */
-#define M32R_IRQ_DMA1 (33) /* DMA1 */
-#define M32R_IRQ_DMA2 (34) /* DMA2 */
-#define M32R_IRQ_DMA3 (35) /* DMA3 */
-#define M32R_IRQ_SIO0_R (40) /* SIO0 send */
-#define M32R_IRQ_SIO0_S (41) /* SIO0 receive */
-#define M32R_IRQ_SIO1_R (42) /* SIO1 send */
-#define M32R_IRQ_SIO1_S (43) /* SIO1 receive */
-#define M32R_IRQ_SIO2_R (44) /* SIO2 send */
-#define M32R_IRQ_SIO2_S (45) /* SIO2 receive */
-#define M32R_IRQ_SIO3_R (46) /* SIO3 send */
-#define M32R_IRQ_SIO3_S (47) /* SIO3 receive */
-#define M32R_IRQ_ADC (56) /* ADC */
-#define M32R_IRQ_PC (57) /* PC */
-#else /* ! M32104 */
-#define M32R_IRQ_DMA0 (32) /* DMA0 */
-#define M32R_IRQ_DMA1 (33) /* DMA1 */
-#define M32R_IRQ_SIO0_R (48) /* SIO0 send */
-#define M32R_IRQ_SIO0_S (49) /* SIO0 receive */
-#define M32R_IRQ_SIO1_R (50) /* SIO1 send */
-#define M32R_IRQ_SIO1_S (51) /* SIO1 receive */
-#define M32R_IRQ_SIO2_R (52) /* SIO2 send */
-#define M32R_IRQ_SIO2_S (53) /* SIO2 receive */
-#define M32R_IRQ_SIO3_R (54) /* SIO3 send */
-#define M32R_IRQ_SIO3_S (55) /* SIO3 receive */
-#define M32R_IRQ_SIO4_R (56) /* SIO4 send */
-#define M32R_IRQ_SIO4_S (57) /* SIO4 receive */
-#endif /* ! M32104 */
-
-#ifdef CONFIG_SMP
-#define M32R_IRQ_IPI0 (56)
-#define M32R_IRQ_IPI1 (57)
-#define M32R_IRQ_IPI2 (58)
-#define M32R_IRQ_IPI3 (59)
-#define M32R_IRQ_IPI4 (60)
-#define M32R_IRQ_IPI5 (61)
-#define M32R_IRQ_IPI6 (62)
-#define M32R_IRQ_IPI7 (63)
-#define M32R_CPUID_PORTL (0xffffffe0)
-
-#define M32R_FPGA_TOP (0x000F0000+M32R_SFR_OFFSET)
-
-#define M32R_FPGA_NUM_OF_CPUS_PORTL (0x00+M32R_FPGA_TOP)
-#define M32R_FPGA_CPU_NAME0_PORTL (0x10+M32R_FPGA_TOP)
-#define M32R_FPGA_CPU_NAME1_PORTL (0x14+M32R_FPGA_TOP)
-#define M32R_FPGA_CPU_NAME2_PORTL (0x18+M32R_FPGA_TOP)
-#define M32R_FPGA_CPU_NAME3_PORTL (0x1c+M32R_FPGA_TOP)
-#define M32R_FPGA_MODEL_ID0_PORTL (0x20+M32R_FPGA_TOP)
-#define M32R_FPGA_MODEL_ID1_PORTL (0x24+M32R_FPGA_TOP)
-#define M32R_FPGA_MODEL_ID2_PORTL (0x28+M32R_FPGA_TOP)
-#define M32R_FPGA_MODEL_ID3_PORTL (0x2c+M32R_FPGA_TOP)
-#define M32R_FPGA_VERSION0_PORTL (0x30+M32R_FPGA_TOP)
-#define M32R_FPGA_VERSION1_PORTL (0x34+M32R_FPGA_TOP)
-
-#endif /* CONFIG_SMP */
-
-#ifndef __ASSEMBLY__
-typedef struct {
- unsigned long icucr; /* ICU Control Register */
-} icu_data_t;
-#endif
-
-#endif /* _M32102_H_ */
+++ /dev/null
-#ifndef _M32104UT_M32104UT_PLD_H
-#define _M32104UT_M32104UT_PLD_H
-
-/*
- * include/asm-m32r/m32104ut/m32104ut_pld.h
- *
- * Definitions for Programmable Logic Device(PLD) on M32104UT board.
- * Based on m32700ut_pld.h
- *
- * Copyright (c) 2002 Takeo Takahashi
- * Copyright (c) 2005 Naoto Sugai
- *
- * This file is subject to the terms and conditions of the GNU General
- * Public License. See the file "COPYING" in the main directory of
- * this archive for more details.
- */
-
-#if defined(CONFIG_PLAT_M32104UT)
-#define PLD_PLAT_BASE 0x02c00000
-#else
-#error "no platform configuration"
-#endif
-
-#ifndef __ASSEMBLY__
-/*
- * C functions use non-cache address.
- */
-#define PLD_BASE (PLD_PLAT_BASE /* + NONCACHE_OFFSET */)
-#define __reg8 (volatile unsigned char *)
-#define __reg16 (volatile unsigned short *)
-#define __reg32 (volatile unsigned int *)
-#else
-#define PLD_BASE (PLD_PLAT_BASE + NONCACHE_OFFSET)
-#define __reg8
-#define __reg16
-#define __reg32
-#endif /* __ASSEMBLY__ */
-
-/* CFC */
-#define PLD_CFRSTCR __reg16(PLD_BASE + 0x0000)
-#define PLD_CFSTS __reg16(PLD_BASE + 0x0002)
-#define PLD_CFIMASK __reg16(PLD_BASE + 0x0004)
-#define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006)
-
-/* MMC */
-#define PLD_MMCCR __reg16(PLD_BASE + 0x4000)
-#define PLD_MMCMOD __reg16(PLD_BASE + 0x4002)
-#define PLD_MMCSTS __reg16(PLD_BASE + 0x4006)
-#define PLD_MMCBAUR __reg16(PLD_BASE + 0x400a)
-#define PLD_MMCCMDBCUT __reg16(PLD_BASE + 0x400c)
-#define PLD_MMCCDTBCUT __reg16(PLD_BASE + 0x400e)
-#define PLD_MMCDET __reg16(PLD_BASE + 0x4010)
-#define PLD_MMCWP __reg16(PLD_BASE + 0x4012)
-#define PLD_MMCWDATA __reg16(PLD_BASE + 0x5000)
-#define PLD_MMCRDATA __reg16(PLD_BASE + 0x6000)
-#define PLD_MMCCMDDATA __reg16(PLD_BASE + 0x7000)
-#define PLD_MMCRSPDATA __reg16(PLD_BASE + 0x7006)
-
-/* ICU
- * ICUISTS: status register
- * ICUIREQ0: request register
- * ICUIREQ1: request register
- * ICUCR3: control register for CFIREQ# interrupt
- * ICUCR4: control register for CFC Card insert interrupt
- * ICUCR5: control register for CFC Card eject interrupt
- * ICUCR6: control register for external interrupt
- * ICUCR11: control register for MMC Card insert/eject interrupt
- * ICUCR13: control register for SC error interrupt
- * ICUCR14: control register for SC receive interrupt
- * ICUCR15: control register for SC send interrupt
- */
-
-#define PLD_IRQ_INT0 (M32104UT_PLD_IRQ_BASE + 0) /* None */
-#define PLD_IRQ_CFIREQ (M32104UT_PLD_IRQ_BASE + 3) /* CF IREQ */
-#define PLD_IRQ_CFC_INSERT (M32104UT_PLD_IRQ_BASE + 4) /* CF Insert */
-#define PLD_IRQ_CFC_EJECT (M32104UT_PLD_IRQ_BASE + 5) /* CF Eject */
-#define PLD_IRQ_EXINT (M32104UT_PLD_IRQ_BASE + 6) /* EXINT */
-#define PLD_IRQ_MMCCARD (M32104UT_PLD_IRQ_BASE + 11) /* MMC Insert/Eject */
-#define PLD_IRQ_SC_ERROR (M32104UT_PLD_IRQ_BASE + 13) /* SC error */
-#define PLD_IRQ_SC_RCV (M32104UT_PLD_IRQ_BASE + 14) /* SC receive */
-#define PLD_IRQ_SC_SND (M32104UT_PLD_IRQ_BASE + 15) /* SC send */
-
-#define PLD_ICUISTS __reg16(PLD_BASE + 0x8002)
-#define PLD_ICUISTS_VECB_MASK (0xf000)
-#define PLD_ICUISTS_VECB(x) ((x) & PLD_ICUISTS_VECB_MASK)
-#define PLD_ICUISTS_ISN_MASK (0x07c0)
-#define PLD_ICUISTS_ISN(x) ((x) & PLD_ICUISTS_ISN_MASK)
-#define PLD_ICUCR3 __reg16(PLD_BASE + 0x8104)
-#define PLD_ICUCR4 __reg16(PLD_BASE + 0x8106)
-#define PLD_ICUCR5 __reg16(PLD_BASE + 0x8108)
-#define PLD_ICUCR6 __reg16(PLD_BASE + 0x810a)
-#define PLD_ICUCR11 __reg16(PLD_BASE + 0x8114)
-#define PLD_ICUCR13 __reg16(PLD_BASE + 0x8118)
-#define PLD_ICUCR14 __reg16(PLD_BASE + 0x811a)
-#define PLD_ICUCR15 __reg16(PLD_BASE + 0x811c)
-#define PLD_ICUCR_IEN (0x1000)
-#define PLD_ICUCR_IREQ (0x0100)
-#define PLD_ICUCR_ISMOD00 (0x0000) /* Low edge */
-#define PLD_ICUCR_ISMOD01 (0x0010) /* Low level */
-#define PLD_ICUCR_ISMOD02 (0x0020) /* High edge */
-#define PLD_ICUCR_ISMOD03 (0x0030) /* High level */
-#define PLD_ICUCR_ILEVEL0 (0x0000)
-#define PLD_ICUCR_ILEVEL1 (0x0001)
-#define PLD_ICUCR_ILEVEL2 (0x0002)
-#define PLD_ICUCR_ILEVEL3 (0x0003)
-#define PLD_ICUCR_ILEVEL4 (0x0004)
-#define PLD_ICUCR_ILEVEL5 (0x0005)
-#define PLD_ICUCR_ILEVEL6 (0x0006)
-#define PLD_ICUCR_ILEVEL7 (0x0007)
-
-/* Power Control of MMC and CF */
-#define PLD_CPCR __reg16(PLD_BASE + 0x14000)
-#define PLD_CPCR_CDP 0x0001
-
-/* LED Control
- *
- * 1: DIP swich side
- * 2: Reset switch side
- */
-#define PLD_IOLEDCR __reg16(PLD_BASE + 0x14002)
-#define PLD_IOLED_1_ON 0x001
-#define PLD_IOLED_1_OFF 0x000
-#define PLD_IOLED_2_ON 0x002
-#define PLD_IOLED_2_OFF 0x000
-
-/* DIP Switch
- * 0: Write-protect of Flash Memory (0:protected, 1:non-protected)
- * 1: -
- * 2: -
- * 3: -
- */
-#define PLD_IOSWSTS __reg16(PLD_BASE + 0x14004)
-#define PLD_IOSWSTS_IOSW2 0x0200
-#define PLD_IOSWSTS_IOSW1 0x0100
-#define PLD_IOSWSTS_IOWP0 0x0001
-
-/* CRC */
-#define PLD_CRC7DATA __reg16(PLD_BASE + 0x18000)
-#define PLD_CRC7INDATA __reg16(PLD_BASE + 0x18002)
-#define PLD_CRC16DATA __reg16(PLD_BASE + 0x18004)
-#define PLD_CRC16INDATA __reg16(PLD_BASE + 0x18006)
-#define PLD_CRC16ADATA __reg16(PLD_BASE + 0x18008)
-#define PLD_CRC16AINDATA __reg16(PLD_BASE + 0x1800a)
-
-/* RTC */
-#define PLD_RTCCR __reg16(PLD_BASE + 0x1c000)
-#define PLD_RTCBAUR __reg16(PLD_BASE + 0x1c002)
-#define PLD_RTCWRDATA __reg16(PLD_BASE + 0x1c004)
-#define PLD_RTCRDDATA __reg16(PLD_BASE + 0x1c006)
-#define PLD_RTCRSTODT __reg16(PLD_BASE + 0x1c008)
-
-/* SIM Card */
-#define PLD_SCCR __reg16(PLD_BASE + 0x38000)
-#define PLD_SCMOD __reg16(PLD_BASE + 0x38004)
-#define PLD_SCSTS __reg16(PLD_BASE + 0x38006)
-#define PLD_SCINTCR __reg16(PLD_BASE + 0x38008)
-#define PLD_SCBAUR __reg16(PLD_BASE + 0x3800a)
-#define PLD_SCTXB __reg16(PLD_BASE + 0x3800c)
-#define PLD_SCRXB __reg16(PLD_BASE + 0x3800e)
-
-#endif /* _M32104UT_M32104UT_PLD_H */
+++ /dev/null
-#ifndef _M32700UT_M32700UT_LAN_H
-#define _M32700UT_M32700UT_LAN_H
-
-/*
- * include/asm-m32r/m32700ut/m32700ut_lan.h
- *
- * M32700UT-LAN board
- *
- * Copyright (c) 2002 Takeo Takahashi
- *
- * This file is subject to the terms and conditions of the GNU General
- * Public License. See the file "COPYING" in the main directory of
- * this archive for more details.
- */
-
-#ifndef __ASSEMBLY__
-/*
- * C functions use non-cache address.
- */
-#define M32700UT_LAN_BASE (0x10000000 /* + NONCACHE_OFFSET */)
-#else
-#define M32700UT_LAN_BASE (0x10000000 + NONCACHE_OFFSET)
-#endif /* __ASSEMBLY__ */
-
-/* ICU
- * ICUISTS: status register
- * ICUIREQ0: request register
- * ICUIREQ1: request register
- * ICUCR3: control register for CFIREQ# interrupt
- * ICUCR4: control register for CFC Card insert interrupt
- * ICUCR5: control register for CFC Card eject interrupt
- * ICUCR6: control register for external interrupt
- * ICUCR11: control register for MMC Card insert/eject interrupt
- * ICUCR13: control register for SC error interrupt
- * ICUCR14: control register for SC receive interrupt
- * ICUCR15: control register for SC send interrupt
- * ICUCR16: control register for SIO0 receive interrupt
- * ICUCR17: control register for SIO0 send interrupt
- */
-#define M32700UT_LAN_IRQ_LAN (M32700UT_LAN_PLD_IRQ_BASE + 1) /* LAN */
-#define M32700UT_LAN_IRQ_I2C (M32700UT_LAN_PLD_IRQ_BASE + 3) /* I2C */
-
-#define M32700UT_LAN_ICUISTS __reg16(M32700UT_LAN_BASE + 0xc0002)
-#define M32700UT_LAN_ICUISTS_VECB_MASK (0xf000)
-#define M32700UT_LAN_VECB(x) ((x) & M32700UT_LAN_ICUISTS_VECB_MASK)
-#define M32700UT_LAN_ICUISTS_ISN_MASK (0x07c0)
-#define M32700UT_LAN_ICUISTS_ISN(x) ((x) & M32700UT_LAN_ICUISTS_ISN_MASK)
-#define M32700UT_LAN_ICUIREQ0 __reg16(M32700UT_LAN_BASE + 0xc0004)
-#define M32700UT_LAN_ICUCR1 __reg16(M32700UT_LAN_BASE + 0xc0010)
-#define M32700UT_LAN_ICUCR3 __reg16(M32700UT_LAN_BASE + 0xc0014)
-
-/*
- * AR register on PLD
- */
-#define ARVCR0 __reg32(M32700UT_LAN_BASE + 0x40000)
-#define ARVCR0_VDS 0x00080000
-#define ARVCR0_RST 0x00010000
-#define ARVCR1 __reg32(M32700UT_LAN_BASE + 0x40004)
-#define ARVCR1_QVGA 0x02000000
-#define ARVCR1_NORMAL 0x01000000
-#define ARVCR1_HIEN 0x00010000
-#define ARVHCOUNT __reg32(M32700UT_LAN_BASE + 0x40008)
-#define ARDATA __reg32(M32700UT_LAN_BASE + 0x40010)
-#define ARINTSEL __reg32(M32700UT_LAN_BASE + 0x40014)
-#define ARINTSEL_INT3 0x10000000 /* CPU INT3 */
-#define ARDATA32 __reg32(M32700UT_LAN_BASE + 0x04040010) // Block 5
-/*
-#define ARINTSEL_SEL2 0x00002000
-#define ARINTSEL_SEL3 0x00001000
-#define ARINTSEL_SEL6 0x00000200
-#define ARINTSEL_SEL7 0x00000100
-#define ARINTSEL_SEL9 0x00000040
-#define ARINTSEL_SEL10 0x00000020
-#define ARINTSEL_SEL11 0x00000010
-#define ARINTSEL_SEL12 0x00000008
-*/
-
-/*
- * I2C register on PLD
- */
-#define PLDI2CCR __reg32(M32700UT_LAN_BASE + 0x40040)
-#define PLDI2CCR_ES0 0x00000001 /* enable I2C interface */
-#define PLDI2CMOD __reg32(M32700UT_LAN_BASE + 0x40044)
-#define PLDI2CMOD_ACKCLK 0x00000200
-#define PLDI2CMOD_DTWD 0x00000100
-#define PLDI2CMOD_10BT 0x00000004
-#define PLDI2CMOD_ATM_NORMAL 0x00000000
-#define PLDI2CMOD_ATM_AUTO 0x00000003
-#define PLDI2CACK __reg32(M32700UT_LAN_BASE + 0x40048)
-#define PLDI2CACK_ACK 0x00000001
-#define PLDI2CFREQ __reg32(M32700UT_LAN_BASE + 0x4004c)
-#define PLDI2CCND __reg32(M32700UT_LAN_BASE + 0x40050)
-#define PLDI2CCND_START 0x00000001
-#define PLDI2CCND_STOP 0x00000002
-#define PLDI2CSTEN __reg32(M32700UT_LAN_BASE + 0x40054)
-#define PLDI2CSTEN_STEN 0x00000001
-#define PLDI2CDATA __reg32(M32700UT_LAN_BASE + 0x40060)
-#define PLDI2CSTS __reg32(M32700UT_LAN_BASE + 0x40064)
-#define PLDI2CSTS_TRX 0x00000020
-#define PLDI2CSTS_BB 0x00000010
-#define PLDI2CSTS_NOACK 0x00000001 /* 0:ack, 1:noack */
-
-#endif /* _M32700UT_M32700UT_LAN_H */
+++ /dev/null
-#ifndef _M32700UT_M32700UT_LCD_H
-#define _M32700UT_M32700UT_LCD_H
-
-/*
- * include/asm-m32r/m32700ut/m32700ut_lcd.h
- *
- * M32700UT-LCD board
- *
- * Copyright (c) 2002 Takeo Takahashi
- *
- * This file is subject to the terms and conditions of the GNU General
- * Public License. See the file "COPYING" in the main directory of
- * this archive for more details.
- */
-
-#ifndef __ASSEMBLY__
-/*
- * C functions use non-cache address.
- */
-#define M32700UT_LCD_BASE (0x10000000 /* + NONCACHE_OFFSET */)
-#else
-#define M32700UT_LCD_BASE (0x10000000 + NONCACHE_OFFSET)
-#endif /* __ASSEMBLY__ */
-
-/*
- * ICU
- */
-#define M32700UT_LCD_IRQ_BAT_INT (M32700UT_LCD_PLD_IRQ_BASE + 1)
-#define M32700UT_LCD_IRQ_USB_INT1 (M32700UT_LCD_PLD_IRQ_BASE + 2)
-#define M32700UT_LCD_IRQ_AUDT0 (M32700UT_LCD_PLD_IRQ_BASE + 3)
-#define M32700UT_LCD_IRQ_AUDT2 (M32700UT_LCD_PLD_IRQ_BASE + 4)
-#define M32700UT_LCD_IRQ_BATSIO_RCV (M32700UT_LCD_PLD_IRQ_BASE + 16)
-#define M32700UT_LCD_IRQ_BATSIO_SND (M32700UT_LCD_PLD_IRQ_BASE + 17)
-#define M32700UT_LCD_IRQ_ASNDSIO_RCV (M32700UT_LCD_PLD_IRQ_BASE + 18)
-#define M32700UT_LCD_IRQ_ASNDSIO_SND (M32700UT_LCD_PLD_IRQ_BASE + 19)
-#define M32700UT_LCD_IRQ_ACNLSIO_SND (M32700UT_LCD_PLD_IRQ_BASE + 21)
-
-#define M32700UT_LCD_ICUISTS __reg16(M32700UT_LCD_BASE + 0x300002)
-#define M32700UT_LCD_ICUISTS_VECB_MASK (0xf000)
-#define M32700UT_LCD_VECB(x) ((x) & M32700UT_LCD_ICUISTS_VECB_MASK)
-#define M32700UT_LCD_ICUISTS_ISN_MASK (0x07c0)
-#define M32700UT_LCD_ICUISTS_ISN(x) ((x) & M32700UT_LCD_ICUISTS_ISN_MASK)
-#define M32700UT_LCD_ICUIREQ0 __reg16(M32700UT_LCD_BASE + 0x300004)
-#define M32700UT_LCD_ICUIREQ1 __reg16(M32700UT_LCD_BASE + 0x300006)
-#define M32700UT_LCD_ICUCR1 __reg16(M32700UT_LCD_BASE + 0x300020)
-#define M32700UT_LCD_ICUCR2 __reg16(M32700UT_LCD_BASE + 0x300022)
-#define M32700UT_LCD_ICUCR3 __reg16(M32700UT_LCD_BASE + 0x300024)
-#define M32700UT_LCD_ICUCR4 __reg16(M32700UT_LCD_BASE + 0x300026)
-#define M32700UT_LCD_ICUCR16 __reg16(M32700UT_LCD_BASE + 0x300030)
-#define M32700UT_LCD_ICUCR17 __reg16(M32700UT_LCD_BASE + 0x300032)
-#define M32700UT_LCD_ICUCR18 __reg16(M32700UT_LCD_BASE + 0x300034)
-#define M32700UT_LCD_ICUCR19 __reg16(M32700UT_LCD_BASE + 0x300036)
-#define M32700UT_LCD_ICUCR21 __reg16(M32700UT_LCD_BASE + 0x30003a)
-
-#endif /* _M32700UT_M32700UT_LCD_H */
+++ /dev/null
-#ifndef _M32700UT_M32700UT_PLD_H
-#define _M32700UT_M32700UT_PLD_H
-
-/*
- * include/asm-m32r/m32700ut/m32700ut_pld.h
- *
- * Definitions for Programmable Logic Device(PLD) on M32700UT board.
- *
- * Copyright (c) 2002 Takeo Takahashi
- *
- * This file is subject to the terms and conditions of the GNU General
- * Public License. See the file "COPYING" in the main directory of
- * this archive for more details.
- */
-
-#if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_USRV)
-#define PLD_PLAT_BASE 0x04c00000
-#else
-#error "no platform configuration"
-#endif
-
-#ifndef __ASSEMBLY__
-/*
- * C functions use non-cache address.
- */
-#define PLD_BASE (PLD_PLAT_BASE /* + NONCACHE_OFFSET */)
-#define __reg8 (volatile unsigned char *)
-#define __reg16 (volatile unsigned short *)
-#define __reg32 (volatile unsigned int *)
-#else
-#define PLD_BASE (PLD_PLAT_BASE + NONCACHE_OFFSET)
-#define __reg8
-#define __reg16
-#define __reg32
-#endif /* __ASSEMBLY__ */
-
-/* CFC */
-#define PLD_CFRSTCR __reg16(PLD_BASE + 0x0000)
-#define PLD_CFSTS __reg16(PLD_BASE + 0x0002)
-#define PLD_CFIMASK __reg16(PLD_BASE + 0x0004)
-#define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006)
-#define PLD_CFVENCR __reg16(PLD_BASE + 0x0008)
-#define PLD_CFCR0 __reg16(PLD_BASE + 0x000a)
-#define PLD_CFCR1 __reg16(PLD_BASE + 0x000c)
-#define PLD_IDERSTCR __reg16(PLD_BASE + 0x0010)
-
-/* MMC */
-#define PLD_MMCCR __reg16(PLD_BASE + 0x4000)
-#define PLD_MMCMOD __reg16(PLD_BASE + 0x4002)
-#define PLD_MMCSTS __reg16(PLD_BASE + 0x4006)
-#define PLD_MMCBAUR __reg16(PLD_BASE + 0x400a)
-#define PLD_MMCCMDBCUT __reg16(PLD_BASE + 0x400c)
-#define PLD_MMCCDTBCUT __reg16(PLD_BASE + 0x400e)
-#define PLD_MMCDET __reg16(PLD_BASE + 0x4010)
-#define PLD_MMCWP __reg16(PLD_BASE + 0x4012)
-#define PLD_MMCWDATA __reg16(PLD_BASE + 0x5000)
-#define PLD_MMCRDATA __reg16(PLD_BASE + 0x6000)
-#define PLD_MMCCMDDATA __reg16(PLD_BASE + 0x7000)
-#define PLD_MMCRSPDATA __reg16(PLD_BASE + 0x7006)
-
-/* ICU
- * ICUISTS: status register
- * ICUIREQ0: request register
- * ICUIREQ1: request register
- * ICUCR3: control register for CFIREQ# interrupt
- * ICUCR4: control register for CFC Card insert interrupt
- * ICUCR5: control register for CFC Card eject interrupt
- * ICUCR6: control register for external interrupt
- * ICUCR11: control register for MMC Card insert/eject interrupt
- * ICUCR13: control register for SC error interrupt
- * ICUCR14: control register for SC receive interrupt
- * ICUCR15: control register for SC send interrupt
- * ICUCR16: control register for SIO0 receive interrupt
- * ICUCR17: control register for SIO0 send interrupt
- */
-#if !defined(CONFIG_PLAT_USRV)
-#define PLD_IRQ_INT0 (M32700UT_PLD_IRQ_BASE + 0) /* None */
-#define PLD_IRQ_INT1 (M32700UT_PLD_IRQ_BASE + 1) /* reserved */
-#define PLD_IRQ_INT2 (M32700UT_PLD_IRQ_BASE + 2) /* reserved */
-#define PLD_IRQ_CFIREQ (M32700UT_PLD_IRQ_BASE + 3) /* CF IREQ */
-#define PLD_IRQ_CFC_INSERT (M32700UT_PLD_IRQ_BASE + 4) /* CF Insert */
-#define PLD_IRQ_CFC_EJECT (M32700UT_PLD_IRQ_BASE + 5) /* CF Eject */
-#define PLD_IRQ_EXINT (M32700UT_PLD_IRQ_BASE + 6) /* EXINT */
-#define PLD_IRQ_INT7 (M32700UT_PLD_IRQ_BASE + 7) /* reserved */
-#define PLD_IRQ_INT8 (M32700UT_PLD_IRQ_BASE + 8) /* reserved */
-#define PLD_IRQ_INT9 (M32700UT_PLD_IRQ_BASE + 9) /* reserved */
-#define PLD_IRQ_INT10 (M32700UT_PLD_IRQ_BASE + 10) /* reserved */
-#define PLD_IRQ_MMCCARD (M32700UT_PLD_IRQ_BASE + 11) /* MMC Insert/Eject */
-#define PLD_IRQ_INT12 (M32700UT_PLD_IRQ_BASE + 12) /* reserved */
-#define PLD_IRQ_SC_ERROR (M32700UT_PLD_IRQ_BASE + 13) /* SC error */
-#define PLD_IRQ_SC_RCV (M32700UT_PLD_IRQ_BASE + 14) /* SC receive */
-#define PLD_IRQ_SC_SND (M32700UT_PLD_IRQ_BASE + 15) /* SC send */
-#define PLD_IRQ_SIO0_RCV (M32700UT_PLD_IRQ_BASE + 16) /* SIO receive */
-#define PLD_IRQ_SIO0_SND (M32700UT_PLD_IRQ_BASE + 17) /* SIO send */
-#define PLD_IRQ_INT18 (M32700UT_PLD_IRQ_BASE + 18) /* reserved */
-#define PLD_IRQ_INT19 (M32700UT_PLD_IRQ_BASE + 19) /* reserved */
-#define PLD_IRQ_INT20 (M32700UT_PLD_IRQ_BASE + 20) /* reserved */
-#define PLD_IRQ_INT21 (M32700UT_PLD_IRQ_BASE + 21) /* reserved */
-#define PLD_IRQ_INT22 (M32700UT_PLD_IRQ_BASE + 22) /* reserved */
-#define PLD_IRQ_INT23 (M32700UT_PLD_IRQ_BASE + 23) /* reserved */
-#define PLD_IRQ_INT24 (M32700UT_PLD_IRQ_BASE + 24) /* reserved */
-#define PLD_IRQ_INT25 (M32700UT_PLD_IRQ_BASE + 25) /* reserved */
-#define PLD_IRQ_INT26 (M32700UT_PLD_IRQ_BASE + 26) /* reserved */
-#define PLD_IRQ_INT27 (M32700UT_PLD_IRQ_BASE + 27) /* reserved */
-#define PLD_IRQ_INT28 (M32700UT_PLD_IRQ_BASE + 28) /* reserved */
-#define PLD_IRQ_INT29 (M32700UT_PLD_IRQ_BASE + 29) /* reserved */
-#define PLD_IRQ_INT30 (M32700UT_PLD_IRQ_BASE + 30) /* reserved */
-#define PLD_IRQ_INT31 (M32700UT_PLD_IRQ_BASE + 31) /* reserved */
-
-#else /* CONFIG_PLAT_USRV */
-
-#define PLD_IRQ_INT0 (M32700UT_PLD_IRQ_BASE + 0) /* None */
-#define PLD_IRQ_INT1 (M32700UT_PLD_IRQ_BASE + 1) /* reserved */
-#define PLD_IRQ_INT2 (M32700UT_PLD_IRQ_BASE + 2) /* reserved */
-#define PLD_IRQ_CF0 (M32700UT_PLD_IRQ_BASE + 3) /* CF0# */
-#define PLD_IRQ_CF1 (M32700UT_PLD_IRQ_BASE + 4) /* CF1# */
-#define PLD_IRQ_CF2 (M32700UT_PLD_IRQ_BASE + 5) /* CF2# */
-#define PLD_IRQ_CF3 (M32700UT_PLD_IRQ_BASE + 6) /* CF3# */
-#define PLD_IRQ_CF4 (M32700UT_PLD_IRQ_BASE + 7) /* CF4# */
-#define PLD_IRQ_INT8 (M32700UT_PLD_IRQ_BASE + 8) /* reserved */
-#define PLD_IRQ_INT9 (M32700UT_PLD_IRQ_BASE + 9) /* reserved */
-#define PLD_IRQ_INT10 (M32700UT_PLD_IRQ_BASE + 10) /* reserved */
-#define PLD_IRQ_INT11 (M32700UT_PLD_IRQ_BASE + 11) /* reserved */
-#define PLD_IRQ_UART0 (M32700UT_PLD_IRQ_BASE + 12) /* UARTIRQ0 */
-#define PLD_IRQ_UART1 (M32700UT_PLD_IRQ_BASE + 13) /* UARTIRQ1 */
-#define PLD_IRQ_INT14 (M32700UT_PLD_IRQ_BASE + 14) /* reserved */
-#define PLD_IRQ_INT15 (M32700UT_PLD_IRQ_BASE + 15) /* reserved */
-#define PLD_IRQ_SNDINT (M32700UT_PLD_IRQ_BASE + 16) /* SNDINT# */
-#define PLD_IRQ_INT17 (M32700UT_PLD_IRQ_BASE + 17) /* reserved */
-#define PLD_IRQ_INT18 (M32700UT_PLD_IRQ_BASE + 18) /* reserved */
-#define PLD_IRQ_INT19 (M32700UT_PLD_IRQ_BASE + 19) /* reserved */
-#define PLD_IRQ_INT20 (M32700UT_PLD_IRQ_BASE + 20) /* reserved */
-#define PLD_IRQ_INT21 (M32700UT_PLD_IRQ_BASE + 21) /* reserved */
-#define PLD_IRQ_INT22 (M32700UT_PLD_IRQ_BASE + 22) /* reserved */
-#define PLD_IRQ_INT23 (M32700UT_PLD_IRQ_BASE + 23) /* reserved */
-#define PLD_IRQ_INT24 (M32700UT_PLD_IRQ_BASE + 24) /* reserved */
-#define PLD_IRQ_INT25 (M32700UT_PLD_IRQ_BASE + 25) /* reserved */
-#define PLD_IRQ_INT26 (M32700UT_PLD_IRQ_BASE + 26) /* reserved */
-#define PLD_IRQ_INT27 (M32700UT_PLD_IRQ_BASE + 27) /* reserved */
-#define PLD_IRQ_INT28 (M32700UT_PLD_IRQ_BASE + 28) /* reserved */
-#define PLD_IRQ_INT29 (M32700UT_PLD_IRQ_BASE + 29) /* reserved */
-#define PLD_IRQ_INT30 (M32700UT_PLD_IRQ_BASE + 30) /* reserved */
-
-#endif /* CONFIG_PLAT_USRV */
-
-#define PLD_ICUISTS __reg16(PLD_BASE + 0x8002)
-#define PLD_ICUISTS_VECB_MASK (0xf000)
-#define PLD_ICUISTS_VECB(x) ((x) & PLD_ICUISTS_VECB_MASK)
-#define PLD_ICUISTS_ISN_MASK (0x07c0)
-#define PLD_ICUISTS_ISN(x) ((x) & PLD_ICUISTS_ISN_MASK)
-#define PLD_ICUIREQ0 __reg16(PLD_BASE + 0x8004)
-#define PLD_ICUIREQ1 __reg16(PLD_BASE + 0x8006)
-#define PLD_ICUCR1 __reg16(PLD_BASE + 0x8100)
-#define PLD_ICUCR2 __reg16(PLD_BASE + 0x8102)
-#define PLD_ICUCR3 __reg16(PLD_BASE + 0x8104)
-#define PLD_ICUCR4 __reg16(PLD_BASE + 0x8106)
-#define PLD_ICUCR5 __reg16(PLD_BASE + 0x8108)
-#define PLD_ICUCR6 __reg16(PLD_BASE + 0x810a)
-#define PLD_ICUCR7 __reg16(PLD_BASE + 0x810c)
-#define PLD_ICUCR8 __reg16(PLD_BASE + 0x810e)
-#define PLD_ICUCR9 __reg16(PLD_BASE + 0x8110)
-#define PLD_ICUCR10 __reg16(PLD_BASE + 0x8112)
-#define PLD_ICUCR11 __reg16(PLD_BASE + 0x8114)
-#define PLD_ICUCR12 __reg16(PLD_BASE + 0x8116)
-#define PLD_ICUCR13 __reg16(PLD_BASE + 0x8118)
-#define PLD_ICUCR14 __reg16(PLD_BASE + 0x811a)
-#define PLD_ICUCR15 __reg16(PLD_BASE + 0x811c)
-#define PLD_ICUCR16 __reg16(PLD_BASE + 0x811e)
-#define PLD_ICUCR17 __reg16(PLD_BASE + 0x8120)
-#define PLD_ICUCR_IEN (0x1000)
-#define PLD_ICUCR_IREQ (0x0100)
-#define PLD_ICUCR_ISMOD00 (0x0000) /* Low edge */
-#define PLD_ICUCR_ISMOD01 (0x0010) /* Low level */
-#define PLD_ICUCR_ISMOD02 (0x0020) /* High edge */
-#define PLD_ICUCR_ISMOD03 (0x0030) /* High level */
-#define PLD_ICUCR_ILEVEL0 (0x0000)
-#define PLD_ICUCR_ILEVEL1 (0x0001)
-#define PLD_ICUCR_ILEVEL2 (0x0002)
-#define PLD_ICUCR_ILEVEL3 (0x0003)
-#define PLD_ICUCR_ILEVEL4 (0x0004)
-#define PLD_ICUCR_ILEVEL5 (0x0005)
-#define PLD_ICUCR_ILEVEL6 (0x0006)
-#define PLD_ICUCR_ILEVEL7 (0x0007)
-
-/* Power Control of MMC and CF */
-#define PLD_CPCR __reg16(PLD_BASE + 0x14000)
-#define PLD_CPCR_CF 0x0001
-#define PLD_CPCR_MMC 0x0002
-
-/* LED Control
- *
- * 1: DIP swich side
- * 2: Reset switch side
- */
-#define PLD_IOLEDCR __reg16(PLD_BASE + 0x14002)
-#define PLD_IOLED_1_ON 0x001
-#define PLD_IOLED_1_OFF 0x000
-#define PLD_IOLED_2_ON 0x002
-#define PLD_IOLED_2_OFF 0x000
-
-/* DIP Switch
- * 0: Write-protect of Flash Memory (0:protected, 1:non-protected)
- * 1: -
- * 2: -
- * 3: -
- */
-#define PLD_IOSWSTS __reg16(PLD_BASE + 0x14004)
-#define PLD_IOSWSTS_IOSW2 0x0200
-#define PLD_IOSWSTS_IOSW1 0x0100
-#define PLD_IOSWSTS_IOWP0 0x0001
-
-/* CRC */
-#define PLD_CRC7DATA __reg16(PLD_BASE + 0x18000)
-#define PLD_CRC7INDATA __reg16(PLD_BASE + 0x18002)
-#define PLD_CRC16DATA __reg16(PLD_BASE + 0x18004)
-#define PLD_CRC16INDATA __reg16(PLD_BASE + 0x18006)
-#define PLD_CRC16ADATA __reg16(PLD_BASE + 0x18008)
-#define PLD_CRC16AINDATA __reg16(PLD_BASE + 0x1800a)
-
-/* RTC */
-#define PLD_RTCCR __reg16(PLD_BASE + 0x1c000)
-#define PLD_RTCBAUR __reg16(PLD_BASE + 0x1c002)
-#define PLD_RTCWRDATA __reg16(PLD_BASE + 0x1c004)
-#define PLD_RTCRDDATA __reg16(PLD_BASE + 0x1c006)
-#define PLD_RTCRSTODT __reg16(PLD_BASE + 0x1c008)
-
-/* SIO0 */
-#define PLD_ESIO0CR __reg16(PLD_BASE + 0x20000)
-#define PLD_ESIO0CR_TXEN 0x0001
-#define PLD_ESIO0CR_RXEN 0x0002
-#define PLD_ESIO0MOD0 __reg16(PLD_BASE + 0x20002)
-#define PLD_ESIO0MOD0_CTSS 0x0040
-#define PLD_ESIO0MOD0_RTSS 0x0080
-#define PLD_ESIO0MOD1 __reg16(PLD_BASE + 0x20004)
-#define PLD_ESIO0MOD1_LMFS 0x0010
-#define PLD_ESIO0STS __reg16(PLD_BASE + 0x20006)
-#define PLD_ESIO0STS_TEMP 0x0001
-#define PLD_ESIO0STS_TXCP 0x0002
-#define PLD_ESIO0STS_RXCP 0x0004
-#define PLD_ESIO0STS_TXSC 0x0100
-#define PLD_ESIO0STS_RXSC 0x0200
-#define PLD_ESIO0STS_TXREADY (PLD_ESIO0STS_TXCP | PLD_ESIO0STS_TEMP)
-#define PLD_ESIO0INTCR __reg16(PLD_BASE + 0x20008)
-#define PLD_ESIO0INTCR_TXIEN 0x0002
-#define PLD_ESIO0INTCR_RXCEN 0x0004
-#define PLD_ESIO0BAUR __reg16(PLD_BASE + 0x2000a)
-#define PLD_ESIO0TXB __reg16(PLD_BASE + 0x2000c)
-#define PLD_ESIO0RXB __reg16(PLD_BASE + 0x2000e)
-
-/* SIM Card */
-#define PLD_SCCR __reg16(PLD_BASE + 0x38000)
-#define PLD_SCMOD __reg16(PLD_BASE + 0x38004)
-#define PLD_SCSTS __reg16(PLD_BASE + 0x38006)
-#define PLD_SCINTCR __reg16(PLD_BASE + 0x38008)
-#define PLD_SCBAUR __reg16(PLD_BASE + 0x3800a)
-#define PLD_SCTXB __reg16(PLD_BASE + 0x3800c)
-#define PLD_SCRXB __reg16(PLD_BASE + 0x3800e)
-
-#endif /* _M32700UT_M32700UT_PLD.H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_M32R_M32R_H_
-#define _ASM_M32R_M32R_H_
-
-/*
- * Renesas M32R processor
- *
- * Copyright (C) 2003, 2004 Renesas Technology Corp.
- */
-
-
-/* Chip type */
-#if defined(CONFIG_CHIP_XNUX_MP) || defined(CONFIG_CHIP_XNUX2_MP)
-#include <asm/m32r_mp_fpga.h>
-#elif defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_XNUX2) \
- || defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_M32102) \
- || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104)
-#include <asm/m32102.h>
-#endif
-
-/* Platform type */
-#if defined(CONFIG_PLAT_M32700UT)
-#include <asm/m32700ut/m32700ut_pld.h>
-#include <asm/m32700ut/m32700ut_lan.h>
-#include <asm/m32700ut/m32700ut_lcd.h>
-/* for ei_handler:linux/arch/m32r/kernel/entry.S */
-#define M32R_INT1ICU_ISTS PLD_ICUISTS
-#define M32R_INT1ICU_IRQ_BASE M32700UT_PLD_IRQ_BASE
-#define M32R_INT0ICU_ISTS M32700UT_LAN_ICUISTS
-#define M32R_INT0ICU_IRQ_BASE M32700UT_LAN_PLD_IRQ_BASE
-#define M32R_INT2ICU_ISTS M32700UT_LCD_ICUISTS
-#define M32R_INT2ICU_IRQ_BASE M32700UT_LCD_PLD_IRQ_BASE
-#endif /* CONFIG_PLAT_M32700UT */
-
-#if defined(CONFIG_PLAT_OPSPUT)
-#include <asm/opsput/opsput_pld.h>
-#include <asm/opsput/opsput_lan.h>
-#include <asm/opsput/opsput_lcd.h>
-/* for ei_handler:linux/arch/m32r/kernel/entry.S */
-#define M32R_INT1ICU_ISTS PLD_ICUISTS
-#define M32R_INT1ICU_IRQ_BASE OPSPUT_PLD_IRQ_BASE
-#define M32R_INT0ICU_ISTS OPSPUT_LAN_ICUISTS
-#define M32R_INT0ICU_IRQ_BASE OPSPUT_LAN_PLD_IRQ_BASE
-#define M32R_INT2ICU_ISTS OPSPUT_LCD_ICUISTS
-#define M32R_INT2ICU_IRQ_BASE OPSPUT_LCD_PLD_IRQ_BASE
-#endif /* CONFIG_PLAT_OPSPUT */
-
-#if defined(CONFIG_PLAT_MAPPI2)
-#include <asm/mappi2/mappi2_pld.h>
-#endif /* CONFIG_PLAT_MAPPI2 */
-
-#if defined(CONFIG_PLAT_MAPPI3)
-#include <asm/mappi3/mappi3_pld.h>
-#endif /* CONFIG_PLAT_MAPPI3 */
-
-#if defined(CONFIG_PLAT_USRV)
-#include <asm/m32700ut/m32700ut_pld.h>
-/* for ei_handler:linux/arch/m32r/kernel/entry.S */
-#define M32R_INT1ICU_ISTS PLD_ICUISTS
-#define M32R_INT1ICU_IRQ_BASE M32700UT_PLD_IRQ_BASE
-#endif
-
-#if defined(CONFIG_PLAT_M32104UT)
-#include <asm/m32104ut/m32104ut_pld.h>
-/* for ei_handler:linux/arch/m32r/kernel/entry.S */
-#define M32R_INT1ICU_ISTS PLD_ICUISTS
-#define M32R_INT1ICU_IRQ_BASE M32104UT_PLD_IRQ_BASE
-#endif /* CONFIG_PLAT_M32104 */
-
-/*
- * M32R Register
- */
-
-/*
- * MMU Register
- */
-
-#define MMU_REG_BASE (0xffff0000)
-#define ITLB_BASE (0xfe000000)
-#define DTLB_BASE (0xfe000800)
-
-#define NR_TLB_ENTRIES CONFIG_TLB_ENTRIES
-
-#define MATM MMU_REG_BASE /* MMU Address Translation Mode
- Register */
-#define MPSZ (0x04 + MMU_REG_BASE) /* MMU Page Size Designation Register */
-#define MASID (0x08 + MMU_REG_BASE) /* MMU Address Space ID Register */
-#define MESTS (0x0c + MMU_REG_BASE) /* MMU Exception Status Register */
-#define MDEVA (0x10 + MMU_REG_BASE) /* MMU Operand Exception Virtual
- Address Register */
-#define MDEVP (0x14 + MMU_REG_BASE) /* MMU Operand Exception Virtual Page
- Number Register */
-#define MPTB (0x18 + MMU_REG_BASE) /* MMU Page Table Base Register */
-#define MSVA (0x20 + MMU_REG_BASE) /* MMU Search Virtual Address
- Register */
-#define MTOP (0x24 + MMU_REG_BASE) /* MMU TLB Operation Register */
-#define MIDXI (0x28 + MMU_REG_BASE) /* MMU Index Register for
- Instruciton */
-#define MIDXD (0x2c + MMU_REG_BASE) /* MMU Index Register for Operand */
-
-#define MATM_offset (MATM - MMU_REG_BASE)
-#define MPSZ_offset (MPSZ - MMU_REG_BASE)
-#define MASID_offset (MASID - MMU_REG_BASE)
-#define MESTS_offset (MESTS - MMU_REG_BASE)
-#define MDEVA_offset (MDEVA - MMU_REG_BASE)
-#define MDEVP_offset (MDEVP - MMU_REG_BASE)
-#define MPTB_offset (MPTB - MMU_REG_BASE)
-#define MSVA_offset (MSVA - MMU_REG_BASE)
-#define MTOP_offset (MTOP - MMU_REG_BASE)
-#define MIDXI_offset (MIDXI - MMU_REG_BASE)
-#define MIDXD_offset (MIDXD - MMU_REG_BASE)
-
-#define MESTS_IT (1 << 0) /* Instruction TLB miss */
-#define MESTS_IA (1 << 1) /* Instruction Access Exception */
-#define MESTS_DT (1 << 4) /* Operand TLB miss */
-#define MESTS_DA (1 << 5) /* Operand Access Exception */
-#define MESTS_DRW (1 << 6) /* Operand Write Exception Flag */
-
-/*
- * PSW (Processor Status Word)
- */
-
-/* PSW bit */
-#define M32R_PSW_BIT_SM (7) /* Stack Mode */
-#define M32R_PSW_BIT_IE (6) /* Interrupt Enable */
-#define M32R_PSW_BIT_PM (3) /* Processor Mode [0:Supervisor,1:User] */
-#define M32R_PSW_BIT_C (0) /* Condition */
-#define M32R_PSW_BIT_BSM (7+8) /* Backup Stack Mode */
-#define M32R_PSW_BIT_BIE (6+8) /* Backup Interrupt Enable */
-#define M32R_PSW_BIT_BPM (3+8) /* Backup Processor Mode */
-#define M32R_PSW_BIT_BC (0+8) /* Backup Condition */
-
-/* PSW bit map */
-#define M32R_PSW_SM (1UL<< M32R_PSW_BIT_SM) /* Stack Mode */
-#define M32R_PSW_IE (1UL<< M32R_PSW_BIT_IE) /* Interrupt Enable */
-#define M32R_PSW_PM (1UL<< M32R_PSW_BIT_PM) /* Processor Mode */
-#define M32R_PSW_C (1UL<< M32R_PSW_BIT_C) /* Condition */
-#define M32R_PSW_BSM (1UL<< M32R_PSW_BIT_BSM) /* Backup Stack Mode */
-#define M32R_PSW_BIE (1UL<< M32R_PSW_BIT_BIE) /* Backup Interrupt Enable */
-#define M32R_PSW_BPM (1UL<< M32R_PSW_BIT_BPM) /* Backup Processor Mode */
-#define M32R_PSW_BC (1UL<< M32R_PSW_BIT_BC) /* Backup Condition */
-
-/*
- * Direct address to SFR
- */
-
-#include <asm/page.h>
-#ifdef CONFIG_MMU
-#define NONCACHE_OFFSET (__PAGE_OFFSET + 0x20000000)
-#else
-#define NONCACHE_OFFSET __PAGE_OFFSET
-#endif /* CONFIG_MMU */
-
-#define M32R_ICU_ISTS_ADDR M32R_ICU_ISTS_PORTL+NONCACHE_OFFSET
-#define M32R_ICU_IPICR_ADDR M32R_ICU_IPICR0_PORTL+NONCACHE_OFFSET
-#define M32R_ICU_IMASK_ADDR M32R_ICU_IMASK_PORTL+NONCACHE_OFFSET
-#define M32R_FPGA_CPU_NAME_ADDR M32R_FPGA_CPU_NAME0_PORTL+NONCACHE_OFFSET
-#define M32R_FPGA_MODEL_ID_ADDR M32R_FPGA_MODEL_ID0_PORTL+NONCACHE_OFFSET
-#define M32R_FPGA_VERSION_ADDR M32R_FPGA_VERSION0_PORTL+NONCACHE_OFFSET
-
-#endif /* _ASM_M32R_M32R_H_ */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_M32R_M32R_MP_FPGA_
-#define _ASM_M32R_M32R_MP_FPGA_
-
-/*
- * Renesas M32R-MP-FPGA
- *
- * Copyright (c) 2002 Hitoshi Yamamoto
- * Copyright (c) 2003, 2004 Renesas Technology Corp.
- */
-
-/*
- * ========================================================
- * M32R-MP-FPGA Memory Map
- * ========================================================
- * 0x00000000 : Block#0 : 64[MB]
- * 0x03E00000 : SFR
- * 0x03E00000 : reserved
- * 0x03EF0000 : FPGA
- * 0x03EF1000 : reserved
- * 0x03EF4000 : CKM
- * 0x03EF4000 : BSELC
- * 0x03EF5000 : reserved
- * 0x03EFC000 : MFT
- * 0x03EFD000 : SIO
- * 0x03EFE000 : reserved
- * 0x03EFF000 : ICU
- * 0x03F00000 : Internal SRAM 64[KB]
- * 0x03F10000 : reserved
- * --------------------------------------------------------
- * 0x04000000 : Block#1 : 64[MB]
- * 0x04000000 : Debug board SRAM 4[MB]
- * 0x04400000 : reserved
- * --------------------------------------------------------
- * 0x08000000 : Block#2 : 64[MB]
- * --------------------------------------------------------
- * 0x0C000000 : Block#3 : 64[MB]
- * --------------------------------------------------------
- * 0x10000000 : Block#4 : 64[MB]
- * --------------------------------------------------------
- * 0x14000000 : Block#5 : 64[MB]
- * --------------------------------------------------------
- * 0x18000000 : Block#6 : 64[MB]
- * --------------------------------------------------------
- * 0x1C000000 : Block#7 : 64[MB]
- * --------------------------------------------------------
- * 0xFE000000 : TLB
- * 0xFE000000 : ITLB
- * 0xFE000080 : reserved
- * 0xFE000800 : DTLB
- * 0xFE000880 : reserved
- * --------------------------------------------------------
- * 0xFF000000 : System area
- * 0xFFFF0000 : MMU
- * 0xFFFF0030 : reserved
- * 0xFFFF8000 : Debug function
- * 0xFFFFA000 : reserved
- * 0xFFFFC000 : CPU control
- * 0xFFFFFFFF
- * ========================================================
- */
-
-/*======================================================================*
- * Special Function Register
- *======================================================================*/
-#define M32R_SFR_OFFSET (0x00E00000) /* 0x03E00000-0x03EFFFFF 1[MB] */
-
-/*
- * FPGA registers.
- */
-#define M32R_FPGA_TOP (0x000F0000+M32R_SFR_OFFSET)
-
-#define M32R_FPGA_NUM_OF_CPUS_PORTL (0x00+M32R_FPGA_TOP)
-#define M32R_FPGA_CPU_NAME0_PORTL (0x10+M32R_FPGA_TOP)
-#define M32R_FPGA_CPU_NAME1_PORTL (0x14+M32R_FPGA_TOP)
-#define M32R_FPGA_CPU_NAME2_PORTL (0x18+M32R_FPGA_TOP)
-#define M32R_FPGA_CPU_NAME3_PORTL (0x1C+M32R_FPGA_TOP)
-#define M32R_FPGA_MODEL_ID0_PORTL (0x20+M32R_FPGA_TOP)
-#define M32R_FPGA_MODEL_ID1_PORTL (0x24+M32R_FPGA_TOP)
-#define M32R_FPGA_MODEL_ID2_PORTL (0x28+M32R_FPGA_TOP)
-#define M32R_FPGA_MODEL_ID3_PORTL (0x2C+M32R_FPGA_TOP)
-#define M32R_FPGA_VERSION0_PORTL (0x30+M32R_FPGA_TOP)
-#define M32R_FPGA_VERSION1_PORTL (0x34+M32R_FPGA_TOP)
-
-/*
- * Clock and Power Manager registers.
- */
-#define M32R_CPM_OFFSET (0x000F4000+M32R_SFR_OFFSET)
-
-#define M32R_CPM_CPUCLKCR_PORTL (0x00+M32R_CPM_OFFSET)
-#define M32R_CPM_CLKMOD_PORTL (0x04+M32R_CPM_OFFSET)
-#define M32R_CPM_PLLCR_PORTL (0x08+M32R_CPM_OFFSET)
-
-/*
- * Block SELect Controller registers.
- */
-#define M32R_BSELC_OFFSET (0x000F5000+M32R_SFR_OFFSET)
-
-#define M32R_BSEL0_CR0_PORTL (0x000+M32R_BSELC_OFFSET)
-#define M32R_BSEL0_CR1_PORTL (0x004+M32R_BSELC_OFFSET)
-#define M32R_BSEL1_CR0_PORTL (0x100+M32R_BSELC_OFFSET)
-#define M32R_BSEL1_CR1_PORTL (0x104+M32R_BSELC_OFFSET)
-#define M32R_BSEL2_CR0_PORTL (0x200+M32R_BSELC_OFFSET)
-#define M32R_BSEL2_CR1_PORTL (0x204+M32R_BSELC_OFFSET)
-#define M32R_BSEL3_CR0_PORTL (0x300+M32R_BSELC_OFFSET)
-#define M32R_BSEL3_CR1_PORTL (0x304+M32R_BSELC_OFFSET)
-#define M32R_BSEL4_CR0_PORTL (0x400+M32R_BSELC_OFFSET)
-#define M32R_BSEL4_CR1_PORTL (0x404+M32R_BSELC_OFFSET)
-#define M32R_BSEL5_CR0_PORTL (0x500+M32R_BSELC_OFFSET)
-#define M32R_BSEL5_CR1_PORTL (0x504+M32R_BSELC_OFFSET)
-#define M32R_BSEL6_CR0_PORTL (0x600+M32R_BSELC_OFFSET)
-#define M32R_BSEL6_CR1_PORTL (0x604+M32R_BSELC_OFFSET)
-#define M32R_BSEL7_CR0_PORTL (0x700+M32R_BSELC_OFFSET)
-#define M32R_BSEL7_CR1_PORTL (0x704+M32R_BSELC_OFFSET)
-
-/*
- * Multi Function Timer registers.
- */
-#define M32R_MFT_OFFSET (0x000FC000+M32R_SFR_OFFSET)
-
-#define M32R_MFTCR_PORTL (0x000+M32R_MFT_OFFSET) /* MFT control */
-#define M32R_MFTRPR_PORTL (0x004+M32R_MFT_OFFSET) /* MFT real port */
-
-#define M32R_MFT0_OFFSET (0x100+M32R_MFT_OFFSET)
-#define M32R_MFT0MOD_PORTL (0x00+M32R_MFT0_OFFSET) /* MFT0 mode */
-#define M32R_MFT0BOS_PORTL (0x04+M32R_MFT0_OFFSET) /* MFT0 b-port output status */
-#define M32R_MFT0CUT_PORTL (0x08+M32R_MFT0_OFFSET) /* MFT0 count */
-#define M32R_MFT0RLD_PORTL (0x0C+M32R_MFT0_OFFSET) /* MFT0 reload */
-#define M32R_MFT0CMPRLD_PORTL (0x10+M32R_MFT0_OFFSET) /* MFT0 compare reload */
-
-#define M32R_MFT1_OFFSET (0x200+M32R_MFT_OFFSET)
-#define M32R_MFT1MOD_PORTL (0x00+M32R_MFT1_OFFSET) /* MFT1 mode */
-#define M32R_MFT1BOS_PORTL (0x04+M32R_MFT1_OFFSET) /* MFT1 b-port output status */
-#define M32R_MFT1CUT_PORTL (0x08+M32R_MFT1_OFFSET) /* MFT1 count */
-#define M32R_MFT1RLD_PORTL (0x0C+M32R_MFT1_OFFSET) /* MFT1 reload */
-#define M32R_MFT1CMPRLD_PORTL (0x10+M32R_MFT1_OFFSET) /* MFT1 compare reload */
-
-#define M32R_MFT2_OFFSET (0x300+M32R_MFT_OFFSET)
-#define M32R_MFT2MOD_PORTL (0x00+M32R_MFT2_OFFSET) /* MFT2 mode */
-#define M32R_MFT2BOS_PORTL (0x04+M32R_MFT2_OFFSET) /* MFT2 b-port output status */
-#define M32R_MFT2CUT_PORTL (0x08+M32R_MFT2_OFFSET) /* MFT2 count */
-#define M32R_MFT2RLD_PORTL (0x0C+M32R_MFT2_OFFSET) /* MFT2 reload */
-#define M32R_MFT2CMPRLD_PORTL (0x10+M32R_MFT2_OFFSET) /* MFT2 compare reload */
-
-#define M32R_MFT3_OFFSET (0x400+M32R_MFT_OFFSET)
-#define M32R_MFT3MOD_PORTL (0x00+M32R_MFT3_OFFSET) /* MFT3 mode */
-#define M32R_MFT3BOS_PORTL (0x04+M32R_MFT3_OFFSET) /* MFT3 b-port output status */
-#define M32R_MFT3CUT_PORTL (0x08+M32R_MFT3_OFFSET) /* MFT3 count */
-#define M32R_MFT3RLD_PORTL (0x0C+M32R_MFT3_OFFSET) /* MFT3 reload */
-#define M32R_MFT3CMPRLD_PORTL (0x10+M32R_MFT3_OFFSET) /* MFT3 compare reload */
-
-#define M32R_MFT4_OFFSET (0x500+M32R_MFT_OFFSET)
-#define M32R_MFT4MOD_PORTL (0x00+M32R_MFT4_OFFSET) /* MFT4 mode */
-#define M32R_MFT4BOS_PORTL (0x04+M32R_MFT4_OFFSET) /* MFT4 b-port output status */
-#define M32R_MFT4CUT_PORTL (0x08+M32R_MFT4_OFFSET) /* MFT4 count */
-#define M32R_MFT4RLD_PORTL (0x0C+M32R_MFT4_OFFSET) /* MFT4 reload */
-#define M32R_MFT4CMPRLD_PORTL (0x10+M32R_MFT4_OFFSET) /* MFT4 compare reload */
-
-#define M32R_MFT5_OFFSET (0x600+M32R_MFT_OFFSET)
-#define M32R_MFT5MOD_PORTL (0x00+M32R_MFT5_OFFSET) /* MFT4 mode */
-#define M32R_MFT5BOS_PORTL (0x04+M32R_MFT5_OFFSET) /* MFT4 b-port output status */
-#define M32R_MFT5CUT_PORTL (0x08+M32R_MFT5_OFFSET) /* MFT4 count */
-#define M32R_MFT5RLD_PORTL (0x0C+M32R_MFT5_OFFSET) /* MFT4 reload */
-#define M32R_MFT5CMPRLD_PORTL (0x10+M32R_MFT5_OFFSET) /* MFT4 compare reload */
-
-#define M32R_MFTCR_MFT0MSK (1UL<<15) /* b16 */
-#define M32R_MFTCR_MFT1MSK (1UL<<14) /* b17 */
-#define M32R_MFTCR_MFT2MSK (1UL<<13) /* b18 */
-#define M32R_MFTCR_MFT3MSK (1UL<<12) /* b19 */
-#define M32R_MFTCR_MFT4MSK (1UL<<11) /* b20 */
-#define M32R_MFTCR_MFT5MSK (1UL<<10) /* b21 */
-#define M32R_MFTCR_MFT0EN (1UL<<7) /* b24 */
-#define M32R_MFTCR_MFT1EN (1UL<<6) /* b25 */
-#define M32R_MFTCR_MFT2EN (1UL<<5) /* b26 */
-#define M32R_MFTCR_MFT3EN (1UL<<4) /* b27 */
-#define M32R_MFTCR_MFT4EN (1UL<<3) /* b28 */
-#define M32R_MFTCR_MFT5EN (1UL<<2) /* b29 */
-
-#define M32R_MFTMOD_CC_MASK (1UL<<15) /* b16 */
-#define M32R_MFTMOD_TCCR (1UL<<13) /* b18 */
-#define M32R_MFTMOD_GTSEL000 (0UL<<8) /* b21-23 : 000 */
-#define M32R_MFTMOD_GTSEL001 (1UL<<8) /* b21-23 : 001 */
-#define M32R_MFTMOD_GTSEL010 (2UL<<8) /* b21-23 : 010 */
-#define M32R_MFTMOD_GTSEL011 (3UL<<8) /* b21-23 : 011 */
-#define M32R_MFTMOD_GTSEL110 (6UL<<8) /* b21-23 : 110 */
-#define M32R_MFTMOD_GTSEL111 (7UL<<8) /* b21-23 : 111 */
-#define M32R_MFTMOD_CMSEL (1UL<<3) /* b28 */
-#define M32R_MFTMOD_CSSEL000 (0UL<<0) /* b29-b31 : 000 */
-#define M32R_MFTMOD_CSSEL001 (1UL<<0) /* b29-b31 : 001 */
-#define M32R_MFTMOD_CSSEL010 (2UL<<0) /* b29-b31 : 010 */
-#define M32R_MFTMOD_CSSEL011 (3UL<<0) /* b29-b31 : 011 */
-#define M32R_MFTMOD_CSSEL100 (4UL<<0) /* b29-b31 : 100 */
-#define M32R_MFTMOD_CSSEL110 (6UL<<0) /* b29-b31 : 110 */
-
-/*
- * Serial I/O registers.
- */
-#define M32R_SIO_OFFSET (0x000FD000+M32R_SFR_OFFSET)
-
-#define M32R_SIO0_CR_PORTL (0x000+M32R_SIO_OFFSET)
-#define M32R_SIO0_MOD0_PORTL (0x004+M32R_SIO_OFFSET)
-#define M32R_SIO0_MOD1_PORTL (0x008+M32R_SIO_OFFSET)
-#define M32R_SIO0_STS_PORTL (0x00C+M32R_SIO_OFFSET)
-#define M32R_SIO0_TRCR_PORTL (0x010+M32R_SIO_OFFSET)
-#define M32R_SIO0_BAUR_PORTL (0x014+M32R_SIO_OFFSET)
-#define M32R_SIO0_RBAUR_PORTL (0x018+M32R_SIO_OFFSET)
-#define M32R_SIO0_TXB_PORTL (0x01C+M32R_SIO_OFFSET)
-#define M32R_SIO0_RXB_PORTL (0x020+M32R_SIO_OFFSET)
-
-/*
- * Interrupt Control Unit registers.
- */
-#define M32R_ICU_OFFSET (0x000FF000+M32R_SFR_OFFSET)
-
-#define M32R_ICU_ISTS_PORTL (0x004+M32R_ICU_OFFSET)
-#define M32R_ICU_IREQ0_PORTL (0x008+M32R_ICU_OFFSET)
-#define M32R_ICU_IREQ1_PORTL (0x00C+M32R_ICU_OFFSET)
-#define M32R_ICU_SBICR_PORTL (0x018+M32R_ICU_OFFSET)
-#define M32R_ICU_IMASK_PORTL (0x01C+M32R_ICU_OFFSET)
-#define M32R_ICU_CR1_PORTL (0x200+M32R_ICU_OFFSET) /* INT0 */
-#define M32R_ICU_CR2_PORTL (0x204+M32R_ICU_OFFSET) /* INT1 */
-#define M32R_ICU_CR3_PORTL (0x208+M32R_ICU_OFFSET) /* INT2 */
-#define M32R_ICU_CR4_PORTL (0x20C+M32R_ICU_OFFSET) /* INT3 */
-#define M32R_ICU_CR5_PORTL (0x210+M32R_ICU_OFFSET) /* INT4 */
-#define M32R_ICU_CR6_PORTL (0x214+M32R_ICU_OFFSET) /* INT5 */
-#define M32R_ICU_CR7_PORTL (0x218+M32R_ICU_OFFSET) /* INT6 */
-#define M32R_ICU_CR8_PORTL (0x218+M32R_ICU_OFFSET) /* INT7 */
-#define M32R_ICU_CR32_PORTL (0x27C+M32R_ICU_OFFSET) /* SIO0 RX */
-#define M32R_ICU_CR33_PORTL (0x280+M32R_ICU_OFFSET) /* SIO0 TX */
-#define M32R_ICU_CR40_PORTL (0x29C+M32R_ICU_OFFSET) /* DMAC0 */
-#define M32R_ICU_CR41_PORTL (0x2A0+M32R_ICU_OFFSET) /* DMAC1 */
-#define M32R_ICU_CR48_PORTL (0x2BC+M32R_ICU_OFFSET) /* MFT0 */
-#define M32R_ICU_CR49_PORTL (0x2C0+M32R_ICU_OFFSET) /* MFT1 */
-#define M32R_ICU_CR50_PORTL (0x2C4+M32R_ICU_OFFSET) /* MFT2 */
-#define M32R_ICU_CR51_PORTL (0x2C8+M32R_ICU_OFFSET) /* MFT3 */
-#define M32R_ICU_CR52_PORTL (0x2CC+M32R_ICU_OFFSET) /* MFT4 */
-#define M32R_ICU_CR53_PORTL (0x2D0+M32R_ICU_OFFSET) /* MFT5 */
-#define M32R_ICU_IPICR0_PORTL (0x2DC+M32R_ICU_OFFSET) /* IPI0 */
-#define M32R_ICU_IPICR1_PORTL (0x2E0+M32R_ICU_OFFSET) /* IPI1 */
-#define M32R_ICU_IPICR2_PORTL (0x2E4+M32R_ICU_OFFSET) /* IPI2 */
-#define M32R_ICU_IPICR3_PORTL (0x2E8+M32R_ICU_OFFSET) /* IPI3 */
-#define M32R_ICU_IPICR4_PORTL (0x2EC+M32R_ICU_OFFSET) /* IPI4 */
-#define M32R_ICU_IPICR5_PORTL (0x2F0+M32R_ICU_OFFSET) /* IPI5 */
-#define M32R_ICU_IPICR6_PORTL (0x2F4+M32R_ICU_OFFSET) /* IPI6 */
-#define M32R_ICU_IPICR7_PORTL (0x2FC+M32R_ICU_OFFSET) /* IPI7 */
-
-#define M32R_ICUISTS_VECB(val) ((val>>28) & 0xF)
-#define M32R_ICUISTS_ISN(val) ((val>>22) & 0x3F)
-#define M32R_ICUISTS_PIML(val) ((val>>16) & 0x7)
-
-#define M32R_ICUIMASK_IMSK0 (0UL<<16) /* b13-b15: Disable interrupt */
-#define M32R_ICUIMASK_IMSK1 (1UL<<16) /* b13-b15: Enable level 0 interrupt */
-#define M32R_ICUIMASK_IMSK2 (2UL<<16) /* b13-b15: Enable level 0,1 interrupt */
-#define M32R_ICUIMASK_IMSK3 (3UL<<16) /* b13-b15: Enable level 0-2 interrupt */
-#define M32R_ICUIMASK_IMSK4 (4UL<<16) /* b13-b15: Enable level 0-3 interrupt */
-#define M32R_ICUIMASK_IMSK5 (5UL<<16) /* b13-b15: Enable level 0-4 interrupt */
-#define M32R_ICUIMASK_IMSK6 (6UL<<16) /* b13-b15: Enable level 0-5 interrupt */
-#define M32R_ICUIMASK_IMSK7 (7UL<<16) /* b13-b15: Enable level 0-6 interrupt */
-
-#define M32R_ICUCR_IEN (1UL<<12) /* b19: Interrupt enable */
-#define M32R_ICUCR_IRQ (1UL<<8) /* b23: Interrupt request */
-#define M32R_ICUCR_ISMOD00 (0UL<<4) /* b26-b27: Interrupt sense mode Edge HtoL */
-#define M32R_ICUCR_ISMOD01 (1UL<<4) /* b26-b27: Interrupt sense mode Level L */
-#define M32R_ICUCR_ISMOD10 (2UL<<4) /* b26-b27: Interrupt sense mode Edge LtoH*/
-#define M32R_ICUCR_ISMOD11 (3UL<<4) /* b26-b27: Interrupt sense mode Level H */
-#define M32R_ICUCR_ILEVEL0 (0UL<<0) /* b29-b31: Interrupt priority level 0 */
-#define M32R_ICUCR_ILEVEL1 (1UL<<0) /* b29-b31: Interrupt priority level 1 */
-#define M32R_ICUCR_ILEVEL2 (2UL<<0) /* b29-b31: Interrupt priority level 2 */
-#define M32R_ICUCR_ILEVEL3 (3UL<<0) /* b29-b31: Interrupt priority level 3 */
-#define M32R_ICUCR_ILEVEL4 (4UL<<0) /* b29-b31: Interrupt priority level 4 */
-#define M32R_ICUCR_ILEVEL5 (5UL<<0) /* b29-b31: Interrupt priority level 5 */
-#define M32R_ICUCR_ILEVEL6 (6UL<<0) /* b29-b31: Interrupt priority level 6 */
-#define M32R_ICUCR_ILEVEL7 (7UL<<0) /* b29-b31: Disable interrupt */
-#define M32R_ICUCR_ILEVEL_MASK (7UL)
-
-#define M32R_IRQ_INT0 (1) /* INT0 */
-#define M32R_IRQ_INT1 (2) /* INT1 */
-#define M32R_IRQ_INT2 (3) /* INT2 */
-#define M32R_IRQ_INT3 (4) /* INT3 */
-#define M32R_IRQ_INT4 (5) /* INT4 */
-#define M32R_IRQ_INT5 (6) /* INT5 */
-#define M32R_IRQ_INT6 (7) /* INT6 */
-#define M32R_IRQ_INT7 (8) /* INT7 */
-#define M32R_IRQ_MFT0 (16) /* MFT0 */
-#define M32R_IRQ_MFT1 (17) /* MFT1 */
-#define M32R_IRQ_MFT2 (18) /* MFT2 */
-#define M32R_IRQ_MFT3 (19) /* MFT3 */
-#define M32R_IRQ_MFT4 (20) /* MFT4 */
-#define M32R_IRQ_MFT5 (21) /* MFT5 */
-#define M32R_IRQ_DMAC0 (32) /* DMAC0 */
-#define M32R_IRQ_DMAC1 (33) /* DMAC1 */
-#define M32R_IRQ_SIO0_R (48) /* SIO0 receive */
-#define M32R_IRQ_SIO0_S (49) /* SIO0 send */
-#define M32R_IRQ_SIO1_R (50) /* SIO1 send */
-#define M32R_IRQ_SIO1_S (51) /* SIO1 receive */
-#define M32R_IRQ_IPI0 (56) /* IPI0 */
-#define M32R_IRQ_IPI1 (57) /* IPI1 */
-#define M32R_IRQ_IPI2 (58) /* IPI2 */
-#define M32R_IRQ_IPI3 (59) /* IPI3 */
-#define M32R_IRQ_IPI4 (60) /* IPI4 */
-#define M32R_IRQ_IPI5 (61) /* IPI5 */
-#define M32R_IRQ_IPI6 (62) /* IPI6 */
-#define M32R_IRQ_IPI7 (63) /* IPI7 */
-
-/*======================================================================*
- * CPU
- *======================================================================*/
-
-#define M32R_CPUID_PORTL (0xFFFFFFE0)
-#define M32R_MCICAR_PORTL (0xFFFFFFF0)
-#define M32R_MCDCAR_PORTL (0xFFFFFFF4)
-#define M32R_MCCR_PORTL (0xFFFFFFFC)
-
-#endif /* _ASM_M32R_M32R_MP_FPGA_ */
+++ /dev/null
-#ifndef _MAPPI2_PLD_H
-#define _MAPPI2_PLD_H
-
-/*
- * include/asm-m32r/mappi2/mappi2_pld.h
- *
- * Definitions for Extended IO Logic on MAPPI2 board.
- * based on m32700ut_pld.h
- *
- * This file is subject to the terms and conditions of the GNU General
- * Public License. See the file "COPYING" in the main directory of
- * this archive for more details.
- */
-
-#ifndef __ASSEMBLY__
-/* FIXME:
- * Some C functions use non-cache address, so can't define non-cache address.
- */
-#define PLD_BASE (0x10c00000 /* + NONCACHE_OFFSET */)
-#define __reg8 (volatile unsigned char *)
-#define __reg16 (volatile unsigned short *)
-#define __reg32 (volatile unsigned int *)
-#else
-#define PLD_BASE (0x10c00000 + NONCACHE_OFFSET)
-#define __reg8
-#define __reg16
-#define __reg32
-#endif /* __ASSEMBLY__ */
-
-/* CFC */
-#define PLD_CFRSTCR __reg16(PLD_BASE + 0x0000)
-#define PLD_CFSTS __reg16(PLD_BASE + 0x0002)
-#define PLD_CFIMASK __reg16(PLD_BASE + 0x0004)
-#define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006)
-#define PLD_CFCR0 __reg16(PLD_BASE + 0x000a)
-#define PLD_CFCR1 __reg16(PLD_BASE + 0x000c)
-
-/* MMC */
-#define PLD_MMCCR __reg16(PLD_BASE + 0x4000)
-#define PLD_MMCMOD __reg16(PLD_BASE + 0x4002)
-#define PLD_MMCSTS __reg16(PLD_BASE + 0x4006)
-#define PLD_MMCBAUR __reg16(PLD_BASE + 0x400a)
-#define PLD_MMCCMDBCUT __reg16(PLD_BASE + 0x400c)
-#define PLD_MMCCDTBCUT __reg16(PLD_BASE + 0x400e)
-#define PLD_MMCDET __reg16(PLD_BASE + 0x4010)
-#define PLD_MMCWP __reg16(PLD_BASE + 0x4012)
-#define PLD_MMCWDATA __reg16(PLD_BASE + 0x5000)
-#define PLD_MMCRDATA __reg16(PLD_BASE + 0x6000)
-#define PLD_MMCCMDDATA __reg16(PLD_BASE + 0x7000)
-#define PLD_MMCRSPDATA __reg16(PLD_BASE + 0x7006)
-
-/* Power Control of MMC and CF */
-#define PLD_CPCR __reg16(PLD_BASE + 0x14000)
-
-
-/*==== ICU ====*/
-#define M32R_IRQ_PC104 (5) /* INT4(PC/104) */
-#define M32R_IRQ_I2C (28) /* I2C-BUS */
-#if 1
-#define PLD_IRQ_CFIREQ (40) /* CFC Card Interrupt */
-#define PLD_IRQ_CFC_INSERT (41) /* CFC Card Insert */
-#define PLD_IRQ_CFC_EJECT (42) /* CFC Card Eject */
-#define PLD_IRQ_MMCCARD (43) /* MMC Card Insert */
-#define PLD_IRQ_MMCIRQ (44) /* MMC Transfer Done */
-#else
-#define PLD_IRQ_CFIREQ (34) /* CFC Card Interrupt */
-#define PLD_IRQ_CFC_INSERT (35) /* CFC Card Insert */
-#define PLD_IRQ_CFC_EJECT (36) /* CFC Card Eject */
-#define PLD_IRQ_MMCCARD (37) /* MMC Card Insert */
-#define PLD_IRQ_MMCIRQ (38) /* MMC Transfer Done */
-#endif
-
-
-#if 0
-/* LED Control
- *
- * 1: DIP swich side
- * 2: Reset switch side
- */
-#define PLD_IOLEDCR __reg16(PLD_BASE + 0x14002)
-#define PLD_IOLED_1_ON 0x001
-#define PLD_IOLED_1_OFF 0x000
-#define PLD_IOLED_2_ON 0x002
-#define PLD_IOLED_2_OFF 0x000
-
-/* DIP Switch
- * 0: Write-protect of Flash Memory (0:protected, 1:non-protected)
- * 1: -
- * 2: -
- * 3: -
- */
-#define PLD_IOSWSTS __reg16(PLD_BASE + 0x14004)
-#define PLD_IOSWSTS_IOSW2 0x0200
-#define PLD_IOSWSTS_IOSW1 0x0100
-#define PLD_IOSWSTS_IOWP0 0x0001
-
-#endif
-
-/* CRC */
-#define PLD_CRC7DATA __reg16(PLD_BASE + 0x18000)
-#define PLD_CRC7INDATA __reg16(PLD_BASE + 0x18002)
-#define PLD_CRC16DATA __reg16(PLD_BASE + 0x18004)
-#define PLD_CRC16INDATA __reg16(PLD_BASE + 0x18006)
-#define PLD_CRC16ADATA __reg16(PLD_BASE + 0x18008)
-#define PLD_CRC16AINDATA __reg16(PLD_BASE + 0x1800a)
-
-
-#if 0
-/* RTC */
-#define PLD_RTCCR __reg16(PLD_BASE + 0x1c000)
-#define PLD_RTCBAUR __reg16(PLD_BASE + 0x1c002)
-#define PLD_RTCWRDATA __reg16(PLD_BASE + 0x1c004)
-#define PLD_RTCRDDATA __reg16(PLD_BASE + 0x1c006)
-#define PLD_RTCRSTODT __reg16(PLD_BASE + 0x1c008)
-
-/* SIO0 */
-#define PLD_ESIO0CR __reg16(PLD_BASE + 0x20000)
-#define PLD_ESIO0CR_TXEN 0x0001
-#define PLD_ESIO0CR_RXEN 0x0002
-#define PLD_ESIO0MOD0 __reg16(PLD_BASE + 0x20002)
-#define PLD_ESIO0MOD0_CTSS 0x0040
-#define PLD_ESIO0MOD0_RTSS 0x0080
-#define PLD_ESIO0MOD1 __reg16(PLD_BASE + 0x20004)
-#define PLD_ESIO0MOD1_LMFS 0x0010
-#define PLD_ESIO0STS __reg16(PLD_BASE + 0x20006)
-#define PLD_ESIO0STS_TEMP 0x0001
-#define PLD_ESIO0STS_TXCP 0x0002
-#define PLD_ESIO0STS_RXCP 0x0004
-#define PLD_ESIO0STS_TXSC 0x0100
-#define PLD_ESIO0STS_RXSC 0x0200
-#define PLD_ESIO0STS_TXREADY (PLD_ESIO0STS_TXCP | PLD_ESIO0STS_TEMP)
-#define PLD_ESIO0INTCR __reg16(PLD_BASE + 0x20008)
-#define PLD_ESIO0INTCR_TXIEN 0x0002
-#define PLD_ESIO0INTCR_RXCEN 0x0004
-#define PLD_ESIO0BAUR __reg16(PLD_BASE + 0x2000a)
-#define PLD_ESIO0TXB __reg16(PLD_BASE + 0x2000c)
-#define PLD_ESIO0RXB __reg16(PLD_BASE + 0x2000e)
-
-/* SIM Card */
-#define PLD_SCCR __reg16(PLD_BASE + 0x38000)
-#define PLD_SCMOD __reg16(PLD_BASE + 0x38004)
-#define PLD_SCSTS __reg16(PLD_BASE + 0x38006)
-#define PLD_SCINTCR __reg16(PLD_BASE + 0x38008)
-#define PLD_SCBAUR __reg16(PLD_BASE + 0x3800a)
-#define PLD_SCTXB __reg16(PLD_BASE + 0x3800c)
-#define PLD_SCRXB __reg16(PLD_BASE + 0x3800e)
-
-#endif
-
-#endif /* _MAPPI2_PLD.H */
+++ /dev/null
-#ifndef _MAPPI3_PLD_H
-#define _MAPPI3_PLD_H
-
-/*
- * include/asm-m32r/mappi3/mappi3_pld.h
- *
- * Definitions for Extended IO Logic on MAPPI3 board.
- * based on m32700ut_pld.h
- *
- * This file is subject to the terms and conditions of the GNU General
- * Public License. See the file "COPYING" in the main directory of
- * this archive for more details.
- */
-
-#ifndef __ASSEMBLY__
-/* FIXME:
- * Some C functions use non-cache address, so can't define non-cache address.
- */
-#define PLD_BASE (0x1c000000 /* + NONCACHE_OFFSET */)
-#define __reg8 (volatile unsigned char *)
-#define __reg16 (volatile unsigned short *)
-#define __reg32 (volatile unsigned int *)
-#else
-#define PLD_BASE (0x1c000000 + NONCACHE_OFFSET)
-#define __reg8
-#define __reg16
-#define __reg32
-#endif /* __ASSEMBLY__ */
-
-/* CFC */
-#define PLD_CFRSTCR __reg16(PLD_BASE + 0x0000)
-#define PLD_CFSTS __reg16(PLD_BASE + 0x0002)
-#define PLD_CFIMASK __reg16(PLD_BASE + 0x0004)
-#define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006)
-#define PLD_CFCR0 __reg16(PLD_BASE + 0x000a)
-#define PLD_CFCR1 __reg16(PLD_BASE + 0x000c)
-
-/* MMC */
-#define PLD_MMCCR __reg16(PLD_BASE + 0x4000)
-#define PLD_MMCMOD __reg16(PLD_BASE + 0x4002)
-#define PLD_MMCSTS __reg16(PLD_BASE + 0x4006)
-#define PLD_MMCBAUR __reg16(PLD_BASE + 0x400a)
-#define PLD_MMCCMDBCUT __reg16(PLD_BASE + 0x400c)
-#define PLD_MMCCDTBCUT __reg16(PLD_BASE + 0x400e)
-#define PLD_MMCDET __reg16(PLD_BASE + 0x4010)
-#define PLD_MMCWP __reg16(PLD_BASE + 0x4012)
-#define PLD_MMCWDATA __reg16(PLD_BASE + 0x5000)
-#define PLD_MMCRDATA __reg16(PLD_BASE + 0x6000)
-#define PLD_MMCCMDDATA __reg16(PLD_BASE + 0x7000)
-#define PLD_MMCRSPDATA __reg16(PLD_BASE + 0x7006)
-
-/* Power Control of MMC and CF */
-#define PLD_CPCR __reg16(PLD_BASE + 0x14000)
-
-/* ICU */
-#define M32R_IRQ_PC104 (5) /* INT4(PC/104) */
-#define M32R_IRQ_I2C (28) /* I2C-BUS */
-#define PLD_IRQ_CFIREQ (6) /* INT5 CFC Card Interrupt */
-#define PLD_IRQ_CFC_INSERT (7) /* INT6 CFC Card Insert & Eject */
-#define PLD_IRQ_IDEIREQ (8) /* INT7 IDE Interrupt */
-#define PLD_IRQ_MMCCARD (43) /* MMC Card Insert */
-#define PLD_IRQ_MMCIRQ (44) /* MMC Transfer Done */
-
-#if 0
-/* LED Control
- *
- * 1: DIP swich side
- * 2: Reset switch side
- */
-#define PLD_IOLEDCR __reg16(PLD_BASE + 0x14002)
-#define PLD_IOLED_1_ON 0x001
-#define PLD_IOLED_1_OFF 0x000
-#define PLD_IOLED_2_ON 0x002
-#define PLD_IOLED_2_OFF 0x000
-
-/* DIP Switch
- * 0: Write-protect of Flash Memory (0:protected, 1:non-protected)
- * 1: -
- * 2: -
- * 3: -
- */
-#define PLD_IOSWSTS __reg16(PLD_BASE + 0x14004)
-#define PLD_IOSWSTS_IOSW2 0x0200
-#define PLD_IOSWSTS_IOSW1 0x0100
-#define PLD_IOSWSTS_IOWP0 0x0001
-
-#endif
-
-/* CRC */
-#define PLD_CRC7DATA __reg16(PLD_BASE + 0x18000)
-#define PLD_CRC7INDATA __reg16(PLD_BASE + 0x18002)
-#define PLD_CRC16DATA __reg16(PLD_BASE + 0x18004)
-#define PLD_CRC16INDATA __reg16(PLD_BASE + 0x18006)
-#define PLD_CRC16ADATA __reg16(PLD_BASE + 0x18008)
-#define PLD_CRC16AINDATA __reg16(PLD_BASE + 0x1800a)
-
-#if 0
-/* RTC */
-#define PLD_RTCCR __reg16(PLD_BASE + 0x1c000)
-#define PLD_RTCBAUR __reg16(PLD_BASE + 0x1c002)
-#define PLD_RTCWRDATA __reg16(PLD_BASE + 0x1c004)
-#define PLD_RTCRDDATA __reg16(PLD_BASE + 0x1c006)
-#define PLD_RTCRSTODT __reg16(PLD_BASE + 0x1c008)
-
-/* SIO0 */
-#define PLD_ESIO0CR __reg16(PLD_BASE + 0x20000)
-#define PLD_ESIO0CR_TXEN 0x0001
-#define PLD_ESIO0CR_RXEN 0x0002
-#define PLD_ESIO0MOD0 __reg16(PLD_BASE + 0x20002)
-#define PLD_ESIO0MOD0_CTSS 0x0040
-#define PLD_ESIO0MOD0_RTSS 0x0080
-#define PLD_ESIO0MOD1 __reg16(PLD_BASE + 0x20004)
-#define PLD_ESIO0MOD1_LMFS 0x0010
-#define PLD_ESIO0STS __reg16(PLD_BASE + 0x20006)
-#define PLD_ESIO0STS_TEMP 0x0001
-#define PLD_ESIO0STS_TXCP 0x0002
-#define PLD_ESIO0STS_RXCP 0x0004
-#define PLD_ESIO0STS_TXSC 0x0100
-#define PLD_ESIO0STS_RXSC 0x0200
-#define PLD_ESIO0STS_TXREADY (PLD_ESIO0STS_TXCP | PLD_ESIO0STS_TEMP)
-#define PLD_ESIO0INTCR __reg16(PLD_BASE + 0x20008)
-#define PLD_ESIO0INTCR_TXIEN 0x0002
-#define PLD_ESIO0INTCR_RXCEN 0x0004
-#define PLD_ESIO0BAUR __reg16(PLD_BASE + 0x2000a)
-#define PLD_ESIO0TXB __reg16(PLD_BASE + 0x2000c)
-#define PLD_ESIO0RXB __reg16(PLD_BASE + 0x2000e)
-
-/* SIM Card */
-#define PLD_SCCR __reg16(PLD_BASE + 0x38000)
-#define PLD_SCMOD __reg16(PLD_BASE + 0x38004)
-#define PLD_SCSTS __reg16(PLD_BASE + 0x38006)
-#define PLD_SCINTCR __reg16(PLD_BASE + 0x38008)
-#define PLD_SCBAUR __reg16(PLD_BASE + 0x3800a)
-#define PLD_SCTXB __reg16(PLD_BASE + 0x3800c)
-#define PLD_SCRXB __reg16(PLD_BASE + 0x3800e)
-
-#endif
-
-/* Reset Control */
-#define PLD_REBOOT __reg16(PLD_BASE + 0x38000)
-
-#endif /* _MAPPI3_PLD.H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Machine dependent access functions for RTC registers.
- */
-#ifndef _ASM_MC146818RTC_H
-#define _ASM_MC146818RTC_H
-
-#include <asm/io.h>
-
-#ifndef RTC_PORT
-#define RTC_PORT(x) ((x))
-#define RTC_ALWAYS_BCD 1 /* RTC operates in binary mode */
-#endif
-
-/*
- * The yet supported machines all access the RTC index register via
- * an ISA port access but the way to access the date register differs ...
- */
-#define CMOS_READ(addr) ({ \
-outb_p((addr),RTC_PORT(0)); \
-inb_p(RTC_PORT(1)); \
-})
-#define CMOS_WRITE(val, addr) ({ \
-outb_p((addr),RTC_PORT(0)); \
-outb_p((val),RTC_PORT(1)); \
-})
-
-#define RTC_IRQ 8
-
-#endif /* _ASM_MC146818RTC_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_M32R_MMU_H
-#define _ASM_M32R_MMU_H
-
-#if !defined(CONFIG_MMU)
-
-typedef struct {
- unsigned long end_brk;
-} mm_context_t;
-
-#else /* CONFIG_MMU */
-
-/* Default "unsigned long" context */
-#ifndef CONFIG_SMP
-typedef unsigned long mm_context_t;
-#else
-typedef unsigned long mm_context_t[NR_CPUS];
-#endif
-
-#endif /* CONFIG_MMU */
-
-#endif /* _ASM_M32R_MMU_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_M32R_MMU_CONTEXT_H
-#define _ASM_M32R_MMU_CONTEXT_H
-#ifdef __KERNEL__
-
-#include <asm/m32r.h>
-
-#define MMU_CONTEXT_ASID_MASK (0x000000FF)
-#define MMU_CONTEXT_VERSION_MASK (0xFFFFFF00)
-#define MMU_CONTEXT_FIRST_VERSION (0x00000100)
-#define NO_CONTEXT (0x00000000)
-
-#ifndef __ASSEMBLY__
-
-#include <linux/atomic.h>
-#include <linux/mm_types.h>
-
-#include <asm/pgalloc.h>
-#include <asm/mmu.h>
-#include <asm/tlbflush.h>
-#include <asm-generic/mm_hooks.h>
-
-/*
- * Cache of MMU context last used.
- */
-#ifndef CONFIG_SMP
-extern unsigned long mmu_context_cache_dat;
-#define mmu_context_cache mmu_context_cache_dat
-#define mm_context(mm) mm->context
-#else /* not CONFIG_SMP */
-extern unsigned long mmu_context_cache_dat[];
-#define mmu_context_cache mmu_context_cache_dat[smp_processor_id()]
-#define mm_context(mm) mm->context[smp_processor_id()]
-#endif /* not CONFIG_SMP */
-
-#define set_tlb_tag(entry, tag) (*entry = (tag & PAGE_MASK)|get_asid())
-#define set_tlb_data(entry, data) (*entry = (data | _PAGE_PRESENT))
-
-#ifdef CONFIG_MMU
-#define enter_lazy_tlb(mm, tsk) do { } while (0)
-
-static inline void get_new_mmu_context(struct mm_struct *mm)
-{
- unsigned long mc = ++mmu_context_cache;
-
- if (!(mc & MMU_CONTEXT_ASID_MASK)) {
- /* We exhaust ASID of this version.
- Flush all TLB and start new cycle. */
- local_flush_tlb_all();
- /* Fix version if needed.
- Note that we avoid version #0 to distinguish NO_CONTEXT. */
- if (!mc)
- mmu_context_cache = mc = MMU_CONTEXT_FIRST_VERSION;
- }
- mm_context(mm) = mc;
-}
-
-/*
- * Get MMU context if needed.
- */
-static inline void get_mmu_context(struct mm_struct *mm)
-{
- if (mm) {
- unsigned long mc = mmu_context_cache;
-
- /* Check if we have old version of context.
- If it's old, we need to get new context with new version. */
- if ((mm_context(mm) ^ mc) & MMU_CONTEXT_VERSION_MASK)
- get_new_mmu_context(mm);
- }
-}
-
-/*
- * Initialize the context related info for a new mm_struct
- * instance.
- */
-static inline int init_new_context(struct task_struct *tsk,
- struct mm_struct *mm)
-{
-#ifndef CONFIG_SMP
- mm->context = NO_CONTEXT;
-#else /* CONFIG_SMP */
- int num_cpus = num_online_cpus();
- int i;
-
- for (i = 0 ; i < num_cpus ; i++)
- mm->context[i] = NO_CONTEXT;
-#endif /* CONFIG_SMP */
-
- return 0;
-}
-
-/*
- * Destroy context related info for an mm_struct that is about
- * to be put to rest.
- */
-#define destroy_context(mm) do { } while (0)
-
-static inline void set_asid(unsigned long asid)
-{
- *(volatile unsigned long *)MASID = (asid & MMU_CONTEXT_ASID_MASK);
-}
-
-static inline unsigned long get_asid(void)
-{
- unsigned long asid;
-
- asid = *(volatile long *)MASID;
- asid &= MMU_CONTEXT_ASID_MASK;
-
- return asid;
-}
-
-/*
- * After we have set current->mm to a new value, this activates
- * the context for the new mm so we see the new mappings.
- */
-static inline void activate_context(struct mm_struct *mm)
-{
- get_mmu_context(mm);
- set_asid(mm_context(mm) & MMU_CONTEXT_ASID_MASK);
-}
-
-static inline void switch_mm(struct mm_struct *prev,
- struct mm_struct *next, struct task_struct *tsk)
-{
-#ifdef CONFIG_SMP
- int cpu = smp_processor_id();
-#endif /* CONFIG_SMP */
-
- if (prev != next) {
-#ifdef CONFIG_SMP
- cpumask_set_cpu(cpu, mm_cpumask(next));
-#endif /* CONFIG_SMP */
- /* Set MPTB = next->pgd */
- *(volatile unsigned long *)MPTB = (unsigned long)next->pgd;
- activate_context(next);
- }
-#ifdef CONFIG_SMP
- else
- if (!cpumask_test_and_set_cpu(cpu, mm_cpumask(next)))
- activate_context(next);
-#endif /* CONFIG_SMP */
-}
-
-#define deactivate_mm(tsk, mm) do { } while (0)
-
-#define activate_mm(prev, next) \
- switch_mm((prev), (next), NULL)
-
-#else /* not CONFIG_MMU */
-#define get_mmu_context(mm) do { } while (0)
-#define init_new_context(tsk,mm) (0)
-#define destroy_context(mm) do { } while (0)
-#define set_asid(asid) do { } while (0)
-#define get_asid() (0)
-#define activate_context(mm) do { } while (0)
-#define switch_mm(prev,next,tsk) do { } while (0)
-#define deactivate_mm(mm,tsk) do { } while (0)
-#define activate_mm(prev,next) do { } while (0)
-#define enter_lazy_tlb(mm,tsk) do { } while (0)
-#endif /* not CONFIG_MMU */
-
-#endif /* not __ASSEMBLY__ */
-
-#endif /* __KERNEL__ */
-#endif /* _ASM_M32R_MMU_CONTEXT_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Written by Pat Gaughen (gone@us.ibm.com) Mar 2002
- *
- */
-
-#ifndef _ASM_MMZONE_H_
-#define _ASM_MMZONE_H_
-
-#include <asm/smp.h>
-
-#ifdef CONFIG_DISCONTIGMEM
-
-extern struct pglist_data *node_data[];
-#define NODE_DATA(nid) (node_data[nid])
-
-#define node_localnr(pfn, nid) ((pfn) - NODE_DATA(nid)->node_start_pfn)
-
-#define pmd_page(pmd) (pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT))
-/*
- * pfn_valid should be made as fast as possible, and the current definition
- * is valid for machines that are NUMA, but still contiguous, which is what
- * is currently supported. A more generalised, but slower definition would
- * be something like this - mbligh:
- * ( pfn_to_pgdat(pfn) && ((pfn) < node_end_pfn(pfn_to_nid(pfn))) )
- */
-#if 1 /* M32R_FIXME */
-#define pfn_valid(pfn) (1)
-#else
-#define pfn_valid(pfn) ((pfn) < num_physpages)
-#endif
-
-/*
- * generic node memory support, the following assumptions apply:
- */
-
-static __inline__ int pfn_to_nid(unsigned long pfn)
-{
- int node;
-
- for (node = 0 ; node < MAX_NUMNODES ; node++)
- if (pfn >= node_start_pfn(node) && pfn < node_end_pfn(node))
- break;
-
- return node;
-}
-
-static __inline__ struct pglist_data *pfn_to_pgdat(unsigned long pfn)
-{
- return(NODE_DATA(pfn_to_nid(pfn)));
-}
-
-#endif /* CONFIG_DISCONTIGMEM */
-#endif /* _ASM_MMZONE_H_ */
+++ /dev/null
-#ifndef _OPSPUT_OPSPUT_LAN_H
-#define _OPSPUT_OPSPUT_LAN_H
-
-/*
- * include/asm-m32r/opsput/opsput_lan.h
- *
- * OPSPUT-LAN board
- *
- * Copyright (c) 2002-2004 Takeo Takahashi, Mamoru Sakugawa
- *
- * This file is subject to the terms and conditions of the GNU General
- * Public License. See the file "COPYING" in the main directory of
- * this archive for more details.
- */
-
-#ifndef __ASSEMBLY__
-/*
- * C functions use non-cache address.
- */
-#define OPSPUT_LAN_BASE (0x10000000 /* + NONCACHE_OFFSET */)
-#else
-#define OPSPUT_LAN_BASE (0x10000000 + NONCACHE_OFFSET)
-#endif /* __ASSEMBLY__ */
-
-/* ICU
- * ICUISTS: status register
- * ICUIREQ0: request register
- * ICUIREQ1: request register
- * ICUCR3: control register for CFIREQ# interrupt
- * ICUCR4: control register for CFC Card insert interrupt
- * ICUCR5: control register for CFC Card eject interrupt
- * ICUCR6: control register for external interrupt
- * ICUCR11: control register for MMC Card insert/eject interrupt
- * ICUCR13: control register for SC error interrupt
- * ICUCR14: control register for SC receive interrupt
- * ICUCR15: control register for SC send interrupt
- * ICUCR16: control register for SIO0 receive interrupt
- * ICUCR17: control register for SIO0 send interrupt
- */
-#define OPSPUT_LAN_IRQ_LAN (OPSPUT_LAN_PLD_IRQ_BASE + 1) /* LAN */
-#define OPSPUT_LAN_IRQ_I2C (OPSPUT_LAN_PLD_IRQ_BASE + 3) /* I2C */
-
-#define OPSPUT_LAN_ICUISTS __reg16(OPSPUT_LAN_BASE + 0xc0002)
-#define OPSPUT_LAN_ICUISTS_VECB_MASK (0xf000)
-#define OPSPUT_LAN_VECB(x) ((x) & OPSPUT_LAN_ICUISTS_VECB_MASK)
-#define OPSPUT_LAN_ICUISTS_ISN_MASK (0x07c0)
-#define OPSPUT_LAN_ICUISTS_ISN(x) ((x) & OPSPUT_LAN_ICUISTS_ISN_MASK)
-#define OPSPUT_LAN_ICUIREQ0 __reg16(OPSPUT_LAN_BASE + 0xc0004)
-#define OPSPUT_LAN_ICUCR1 __reg16(OPSPUT_LAN_BASE + 0xc0010)
-#define OPSPUT_LAN_ICUCR3 __reg16(OPSPUT_LAN_BASE + 0xc0014)
-
-#endif /* _OPSPUT_OPSPUT_LAN_H */
+++ /dev/null
-#ifndef _OPSPUT_OPSPUT_LCD_H
-#define _OPSPUT_OPSPUT_LCD_H
-
-/*
- * include/asm-m32r/opsput/opsput_lcd.h
- *
- * OPSPUT-LCD board
- *
- * Copyright (c) 2002 Takeo Takahashi
- *
- * This file is subject to the terms and conditions of the GNU General
- * Public License. See the file "COPYING" in the main directory of
- * this archive for more details.
- */
-
-#ifndef __ASSEMBLY__
-/*
- * C functions use non-cache address.
- */
-#define OPSPUT_LCD_BASE (0x10000000 /* + NONCACHE_OFFSET */)
-#else
-#define OPSPUT_LCD_BASE (0x10000000 + NONCACHE_OFFSET)
-#endif /* __ASSEMBLY__ */
-
-/*
- * ICU
- */
-#define OPSPUT_LCD_IRQ_BAT_INT (OPSPUT_LCD_PLD_IRQ_BASE + 1)
-#define OPSPUT_LCD_IRQ_USB_INT1 (OPSPUT_LCD_PLD_IRQ_BASE + 2)
-#define OPSPUT_LCD_IRQ_AUDT0 (OPSPUT_LCD_PLD_IRQ_BASE + 3)
-#define OPSPUT_LCD_IRQ_AUDT2 (OPSPUT_LCD_PLD_IRQ_BASE + 4)
-#define OPSPUT_LCD_IRQ_BATSIO_RCV (OPSPUT_LCD_PLD_IRQ_BASE + 16)
-#define OPSPUT_LCD_IRQ_BATSIO_SND (OPSPUT_LCD_PLD_IRQ_BASE + 17)
-#define OPSPUT_LCD_IRQ_ASNDSIO_RCV (OPSPUT_LCD_PLD_IRQ_BASE + 18)
-#define OPSPUT_LCD_IRQ_ASNDSIO_SND (OPSPUT_LCD_PLD_IRQ_BASE + 19)
-#define OPSPUT_LCD_IRQ_ACNLSIO_SND (OPSPUT_LCD_PLD_IRQ_BASE + 21)
-
-#define OPSPUT_LCD_ICUISTS __reg16(OPSPUT_LCD_BASE + 0x300002)
-#define OPSPUT_LCD_ICUISTS_VECB_MASK (0xf000)
-#define OPSPUT_LCD_VECB(x) ((x) & OPSPUT_LCD_ICUISTS_VECB_MASK)
-#define OPSPUT_LCD_ICUISTS_ISN_MASK (0x07c0)
-#define OPSPUT_LCD_ICUISTS_ISN(x) ((x) & OPSPUT_LCD_ICUISTS_ISN_MASK)
-#define OPSPUT_LCD_ICUIREQ0 __reg16(OPSPUT_LCD_BASE + 0x300004)
-#define OPSPUT_LCD_ICUIREQ1 __reg16(OPSPUT_LCD_BASE + 0x300006)
-#define OPSPUT_LCD_ICUCR1 __reg16(OPSPUT_LCD_BASE + 0x300020)
-#define OPSPUT_LCD_ICUCR2 __reg16(OPSPUT_LCD_BASE + 0x300022)
-#define OPSPUT_LCD_ICUCR3 __reg16(OPSPUT_LCD_BASE + 0x300024)
-#define OPSPUT_LCD_ICUCR4 __reg16(OPSPUT_LCD_BASE + 0x300026)
-#define OPSPUT_LCD_ICUCR16 __reg16(OPSPUT_LCD_BASE + 0x300030)
-#define OPSPUT_LCD_ICUCR17 __reg16(OPSPUT_LCD_BASE + 0x300032)
-#define OPSPUT_LCD_ICUCR18 __reg16(OPSPUT_LCD_BASE + 0x300034)
-#define OPSPUT_LCD_ICUCR19 __reg16(OPSPUT_LCD_BASE + 0x300036)
-#define OPSPUT_LCD_ICUCR21 __reg16(OPSPUT_LCD_BASE + 0x30003a)
-
-#endif /* _OPSPUT_OPSPUT_LCD_H */
+++ /dev/null
-#ifndef _OPSPUT_OPSPUT_PLD_H
-#define _OPSPUT_OPSPUT_PLD_H
-
-/*
- * include/asm-m32r/opsput/opsput_pld.h
- *
- * Definitions for Programmable Logic Device(PLD) on OPSPUT board.
- *
- * Copyright (c) 2002 Takeo Takahashi
- *
- * This file is subject to the terms and conditions of the GNU General
- * Public License. See the file "COPYING" in the main directory of
- * this archive for more details.
- */
-
-#define PLD_PLAT_BASE 0x1cc00000
-
-#ifndef __ASSEMBLY__
-/*
- * C functions use non-cache address.
- */
-#define PLD_BASE (PLD_PLAT_BASE /* + NONCACHE_OFFSET */)
-#define __reg8 (volatile unsigned char *)
-#define __reg16 (volatile unsigned short *)
-#define __reg32 (volatile unsigned int *)
-#else
-#define PLD_BASE (PLD_PLAT_BASE + NONCACHE_OFFSET)
-#define __reg8
-#define __reg16
-#define __reg32
-#endif /* __ASSEMBLY__ */
-
-/* CFC */
-#define PLD_CFRSTCR __reg16(PLD_BASE + 0x0000)
-#define PLD_CFSTS __reg16(PLD_BASE + 0x0002)
-#define PLD_CFIMASK __reg16(PLD_BASE + 0x0004)
-#define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006)
-#define PLD_CFVENCR __reg16(PLD_BASE + 0x0008)
-#define PLD_CFCR0 __reg16(PLD_BASE + 0x000a)
-#define PLD_CFCR1 __reg16(PLD_BASE + 0x000c)
-#define PLD_IDERSTCR __reg16(PLD_BASE + 0x0010)
-
-/* MMC */
-#define PLD_MMCCR __reg16(PLD_BASE + 0x4000)
-#define PLD_MMCMOD __reg16(PLD_BASE + 0x4002)
-#define PLD_MMCSTS __reg16(PLD_BASE + 0x4006)
-#define PLD_MMCBAUR __reg16(PLD_BASE + 0x400a)
-#define PLD_MMCCMDBCUT __reg16(PLD_BASE + 0x400c)
-#define PLD_MMCCDTBCUT __reg16(PLD_BASE + 0x400e)
-#define PLD_MMCDET __reg16(PLD_BASE + 0x4010)
-#define PLD_MMCWP __reg16(PLD_BASE + 0x4012)
-#define PLD_MMCWDATA __reg16(PLD_BASE + 0x5000)
-#define PLD_MMCRDATA __reg16(PLD_BASE + 0x6000)
-#define PLD_MMCCMDDATA __reg16(PLD_BASE + 0x7000)
-#define PLD_MMCRSPDATA __reg16(PLD_BASE + 0x7006)
-
-/* ICU
- * ICUISTS: status register
- * ICUIREQ0: request register
- * ICUIREQ1: request register
- * ICUCR3: control register for CFIREQ# interrupt
- * ICUCR4: control register for CFC Card insert interrupt
- * ICUCR5: control register for CFC Card eject interrupt
- * ICUCR6: control register for external interrupt
- * ICUCR11: control register for MMC Card insert/eject interrupt
- * ICUCR13: control register for SC error interrupt
- * ICUCR14: control register for SC receive interrupt
- * ICUCR15: control register for SC send interrupt
- * ICUCR16: control register for SIO0 receive interrupt
- * ICUCR17: control register for SIO0 send interrupt
- */
-#if !defined(CONFIG_PLAT_USRV)
-#define PLD_IRQ_INT0 (OPSPUT_PLD_IRQ_BASE + 0) /* None */
-#define PLD_IRQ_INT1 (OPSPUT_PLD_IRQ_BASE + 1) /* reserved */
-#define PLD_IRQ_INT2 (OPSPUT_PLD_IRQ_BASE + 2) /* reserved */
-#define PLD_IRQ_CFIREQ (OPSPUT_PLD_IRQ_BASE + 3) /* CF IREQ */
-#define PLD_IRQ_CFC_INSERT (OPSPUT_PLD_IRQ_BASE + 4) /* CF Insert */
-#define PLD_IRQ_CFC_EJECT (OPSPUT_PLD_IRQ_BASE + 5) /* CF Eject */
-#define PLD_IRQ_EXINT (OPSPUT_PLD_IRQ_BASE + 6) /* EXINT */
-#define PLD_IRQ_INT7 (OPSPUT_PLD_IRQ_BASE + 7) /* reserved */
-#define PLD_IRQ_INT8 (OPSPUT_PLD_IRQ_BASE + 8) /* reserved */
-#define PLD_IRQ_INT9 (OPSPUT_PLD_IRQ_BASE + 9) /* reserved */
-#define PLD_IRQ_INT10 (OPSPUT_PLD_IRQ_BASE + 10) /* reserved */
-#define PLD_IRQ_MMCCARD (OPSPUT_PLD_IRQ_BASE + 11) /* MMC Insert/Eject */
-#define PLD_IRQ_INT12 (OPSPUT_PLD_IRQ_BASE + 12) /* reserved */
-#define PLD_IRQ_SC_ERROR (OPSPUT_PLD_IRQ_BASE + 13) /* SC error */
-#define PLD_IRQ_SC_RCV (OPSPUT_PLD_IRQ_BASE + 14) /* SC receive */
-#define PLD_IRQ_SC_SND (OPSPUT_PLD_IRQ_BASE + 15) /* SC send */
-#define PLD_IRQ_SIO0_RCV (OPSPUT_PLD_IRQ_BASE + 16) /* SIO receive */
-#define PLD_IRQ_SIO0_SND (OPSPUT_PLD_IRQ_BASE + 17) /* SIO send */
-#define PLD_IRQ_INT18 (OPSPUT_PLD_IRQ_BASE + 18) /* reserved */
-#define PLD_IRQ_INT19 (OPSPUT_PLD_IRQ_BASE + 19) /* reserved */
-#define PLD_IRQ_INT20 (OPSPUT_PLD_IRQ_BASE + 20) /* reserved */
-#define PLD_IRQ_INT21 (OPSPUT_PLD_IRQ_BASE + 21) /* reserved */
-#define PLD_IRQ_INT22 (OPSPUT_PLD_IRQ_BASE + 22) /* reserved */
-#define PLD_IRQ_INT23 (OPSPUT_PLD_IRQ_BASE + 23) /* reserved */
-#define PLD_IRQ_INT24 (OPSPUT_PLD_IRQ_BASE + 24) /* reserved */
-#define PLD_IRQ_INT25 (OPSPUT_PLD_IRQ_BASE + 25) /* reserved */
-#define PLD_IRQ_INT26 (OPSPUT_PLD_IRQ_BASE + 26) /* reserved */
-#define PLD_IRQ_INT27 (OPSPUT_PLD_IRQ_BASE + 27) /* reserved */
-#define PLD_IRQ_INT28 (OPSPUT_PLD_IRQ_BASE + 28) /* reserved */
-#define PLD_IRQ_INT29 (OPSPUT_PLD_IRQ_BASE + 29) /* reserved */
-#define PLD_IRQ_INT30 (OPSPUT_PLD_IRQ_BASE + 30) /* reserved */
-#define PLD_IRQ_INT31 (OPSPUT_PLD_IRQ_BASE + 31) /* reserved */
-
-#else /* CONFIG_PLAT_USRV */
-
-#define PLD_IRQ_INT0 (OPSPUT_PLD_IRQ_BASE + 0) /* None */
-#define PLD_IRQ_INT1 (OPSPUT_PLD_IRQ_BASE + 1) /* reserved */
-#define PLD_IRQ_INT2 (OPSPUT_PLD_IRQ_BASE + 2) /* reserved */
-#define PLD_IRQ_CF0 (OPSPUT_PLD_IRQ_BASE + 3) /* CF0# */
-#define PLD_IRQ_CF1 (OPSPUT_PLD_IRQ_BASE + 4) /* CF1# */
-#define PLD_IRQ_CF2 (OPSPUT_PLD_IRQ_BASE + 5) /* CF2# */
-#define PLD_IRQ_CF3 (OPSPUT_PLD_IRQ_BASE + 6) /* CF3# */
-#define PLD_IRQ_CF4 (OPSPUT_PLD_IRQ_BASE + 7) /* CF4# */
-#define PLD_IRQ_INT8 (OPSPUT_PLD_IRQ_BASE + 8) /* reserved */
-#define PLD_IRQ_INT9 (OPSPUT_PLD_IRQ_BASE + 9) /* reserved */
-#define PLD_IRQ_INT10 (OPSPUT_PLD_IRQ_BASE + 10) /* reserved */
-#define PLD_IRQ_INT11 (OPSPUT_PLD_IRQ_BASE + 11) /* reserved */
-#define PLD_IRQ_UART0 (OPSPUT_PLD_IRQ_BASE + 12) /* UARTIRQ0 */
-#define PLD_IRQ_UART1 (OPSPUT_PLD_IRQ_BASE + 13) /* UARTIRQ1 */
-#define PLD_IRQ_INT14 (OPSPUT_PLD_IRQ_BASE + 14) /* reserved */
-#define PLD_IRQ_INT15 (OPSPUT_PLD_IRQ_BASE + 15) /* reserved */
-#define PLD_IRQ_SNDINT (OPSPUT_PLD_IRQ_BASE + 16) /* SNDINT# */
-#define PLD_IRQ_INT17 (OPSPUT_PLD_IRQ_BASE + 17) /* reserved */
-#define PLD_IRQ_INT18 (OPSPUT_PLD_IRQ_BASE + 18) /* reserved */
-#define PLD_IRQ_INT19 (OPSPUT_PLD_IRQ_BASE + 19) /* reserved */
-#define PLD_IRQ_INT20 (OPSPUT_PLD_IRQ_BASE + 20) /* reserved */
-#define PLD_IRQ_INT21 (OPSPUT_PLD_IRQ_BASE + 21) /* reserved */
-#define PLD_IRQ_INT22 (OPSPUT_PLD_IRQ_BASE + 22) /* reserved */
-#define PLD_IRQ_INT23 (OPSPUT_PLD_IRQ_BASE + 23) /* reserved */
-#define PLD_IRQ_INT24 (OPSPUT_PLD_IRQ_BASE + 24) /* reserved */
-#define PLD_IRQ_INT25 (OPSPUT_PLD_IRQ_BASE + 25) /* reserved */
-#define PLD_IRQ_INT26 (OPSPUT_PLD_IRQ_BASE + 26) /* reserved */
-#define PLD_IRQ_INT27 (OPSPUT_PLD_IRQ_BASE + 27) /* reserved */
-#define PLD_IRQ_INT28 (OPSPUT_PLD_IRQ_BASE + 28) /* reserved */
-#define PLD_IRQ_INT29 (OPSPUT_PLD_IRQ_BASE + 29) /* reserved */
-#define PLD_IRQ_INT30 (OPSPUT_PLD_IRQ_BASE + 30) /* reserved */
-
-#endif /* CONFIG_PLAT_USRV */
-
-#define PLD_ICUISTS __reg16(PLD_BASE + 0x8002)
-#define PLD_ICUISTS_VECB_MASK (0xf000)
-#define PLD_ICUISTS_VECB(x) ((x) & PLD_ICUISTS_VECB_MASK)
-#define PLD_ICUISTS_ISN_MASK (0x07c0)
-#define PLD_ICUISTS_ISN(x) ((x) & PLD_ICUISTS_ISN_MASK)
-#define PLD_ICUIREQ0 __reg16(PLD_BASE + 0x8004)
-#define PLD_ICUIREQ1 __reg16(PLD_BASE + 0x8006)
-#define PLD_ICUCR1 __reg16(PLD_BASE + 0x8100)
-#define PLD_ICUCR2 __reg16(PLD_BASE + 0x8102)
-#define PLD_ICUCR3 __reg16(PLD_BASE + 0x8104)
-#define PLD_ICUCR4 __reg16(PLD_BASE + 0x8106)
-#define PLD_ICUCR5 __reg16(PLD_BASE + 0x8108)
-#define PLD_ICUCR6 __reg16(PLD_BASE + 0x810a)
-#define PLD_ICUCR7 __reg16(PLD_BASE + 0x810c)
-#define PLD_ICUCR8 __reg16(PLD_BASE + 0x810e)
-#define PLD_ICUCR9 __reg16(PLD_BASE + 0x8110)
-#define PLD_ICUCR10 __reg16(PLD_BASE + 0x8112)
-#define PLD_ICUCR11 __reg16(PLD_BASE + 0x8114)
-#define PLD_ICUCR12 __reg16(PLD_BASE + 0x8116)
-#define PLD_ICUCR13 __reg16(PLD_BASE + 0x8118)
-#define PLD_ICUCR14 __reg16(PLD_BASE + 0x811a)
-#define PLD_ICUCR15 __reg16(PLD_BASE + 0x811c)
-#define PLD_ICUCR16 __reg16(PLD_BASE + 0x811e)
-#define PLD_ICUCR17 __reg16(PLD_BASE + 0x8120)
-#define PLD_ICUCR_IEN (0x1000)
-#define PLD_ICUCR_IREQ (0x0100)
-#define PLD_ICUCR_ISMOD00 (0x0000) /* Low edge */
-#define PLD_ICUCR_ISMOD01 (0x0010) /* Low level */
-#define PLD_ICUCR_ISMOD02 (0x0020) /* High edge */
-#define PLD_ICUCR_ISMOD03 (0x0030) /* High level */
-#define PLD_ICUCR_ILEVEL0 (0x0000)
-#define PLD_ICUCR_ILEVEL1 (0x0001)
-#define PLD_ICUCR_ILEVEL2 (0x0002)
-#define PLD_ICUCR_ILEVEL3 (0x0003)
-#define PLD_ICUCR_ILEVEL4 (0x0004)
-#define PLD_ICUCR_ILEVEL5 (0x0005)
-#define PLD_ICUCR_ILEVEL6 (0x0006)
-#define PLD_ICUCR_ILEVEL7 (0x0007)
-
-/* Power Control of MMC and CF */
-#define PLD_CPCR __reg16(PLD_BASE + 0x14000)
-#define PLD_CPCR_CF 0x0001
-#define PLD_CPCR_MMC 0x0002
-
-/* LED Control
- *
- * 1: DIP swich side
- * 2: Reset switch side
- */
-#define PLD_IOLEDCR __reg16(PLD_BASE + 0x14002)
-#define PLD_IOLED_1_ON 0x001
-#define PLD_IOLED_1_OFF 0x000
-#define PLD_IOLED_2_ON 0x002
-#define PLD_IOLED_2_OFF 0x000
-
-/* DIP Switch
- * 0: Write-protect of Flash Memory (0:protected, 1:non-protected)
- * 1: -
- * 2: -
- * 3: -
- */
-#define PLD_IOSWSTS __reg16(PLD_BASE + 0x14004)
-#define PLD_IOSWSTS_IOSW2 0x0200
-#define PLD_IOSWSTS_IOSW1 0x0100
-#define PLD_IOSWSTS_IOWP0 0x0001
-
-/* CRC */
-#define PLD_CRC7DATA __reg16(PLD_BASE + 0x18000)
-#define PLD_CRC7INDATA __reg16(PLD_BASE + 0x18002)
-#define PLD_CRC16DATA __reg16(PLD_BASE + 0x18004)
-#define PLD_CRC16INDATA __reg16(PLD_BASE + 0x18006)
-#define PLD_CRC16ADATA __reg16(PLD_BASE + 0x18008)
-#define PLD_CRC16AINDATA __reg16(PLD_BASE + 0x1800a)
-
-/* RTC */
-#define PLD_RTCCR __reg16(PLD_BASE + 0x1c000)
-#define PLD_RTCBAUR __reg16(PLD_BASE + 0x1c002)
-#define PLD_RTCWRDATA __reg16(PLD_BASE + 0x1c004)
-#define PLD_RTCRDDATA __reg16(PLD_BASE + 0x1c006)
-#define PLD_RTCRSTODT __reg16(PLD_BASE + 0x1c008)
-
-/* SIO0 */
-#define PLD_ESIO0CR __reg16(PLD_BASE + 0x20000)
-#define PLD_ESIO0CR_TXEN 0x0001
-#define PLD_ESIO0CR_RXEN 0x0002
-#define PLD_ESIO0MOD0 __reg16(PLD_BASE + 0x20002)
-#define PLD_ESIO0MOD0_CTSS 0x0040
-#define PLD_ESIO0MOD0_RTSS 0x0080
-#define PLD_ESIO0MOD1 __reg16(PLD_BASE + 0x20004)
-#define PLD_ESIO0MOD1_LMFS 0x0010
-#define PLD_ESIO0STS __reg16(PLD_BASE + 0x20006)
-#define PLD_ESIO0STS_TEMP 0x0001
-#define PLD_ESIO0STS_TXCP 0x0002
-#define PLD_ESIO0STS_RXCP 0x0004
-#define PLD_ESIO0STS_TXSC 0x0100
-#define PLD_ESIO0STS_RXSC 0x0200
-#define PLD_ESIO0STS_TXREADY (PLD_ESIO0STS_TXCP | PLD_ESIO0STS_TEMP)
-#define PLD_ESIO0INTCR __reg16(PLD_BASE + 0x20008)
-#define PLD_ESIO0INTCR_TXIEN 0x0002
-#define PLD_ESIO0INTCR_RXCEN 0x0004
-#define PLD_ESIO0BAUR __reg16(PLD_BASE + 0x2000a)
-#define PLD_ESIO0TXB __reg16(PLD_BASE + 0x2000c)
-#define PLD_ESIO0RXB __reg16(PLD_BASE + 0x2000e)
-
-/* SIM Card */
-#define PLD_SCCR __reg16(PLD_BASE + 0x38000)
-#define PLD_SCMOD __reg16(PLD_BASE + 0x38004)
-#define PLD_SCSTS __reg16(PLD_BASE + 0x38006)
-#define PLD_SCINTCR __reg16(PLD_BASE + 0x38008)
-#define PLD_SCBAUR __reg16(PLD_BASE + 0x3800a)
-#define PLD_SCTXB __reg16(PLD_BASE + 0x3800c)
-#define PLD_SCRXB __reg16(PLD_BASE + 0x3800e)
-
-#endif /* _OPSPUT_OPSPUT_PLD.H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_M32R_PAGE_H
-#define _ASM_M32R_PAGE_H
-
-#include <linux/const.h>
-
-/* PAGE_SHIFT determines the page size */
-#define PAGE_SHIFT 12
-#define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT)
-#define PAGE_MASK (~(PAGE_SIZE-1))
-
-#ifndef __ASSEMBLY__
-
-extern void clear_page(void *to);
-extern void copy_page(void *to, void *from);
-
-#define clear_user_page(page, vaddr, pg) clear_page(page)
-#define copy_user_page(to, from, vaddr, pg) copy_page(to, from)
-
-#define __alloc_zeroed_user_highpage(movableflags, vma, vaddr) \
- alloc_page_vma(GFP_HIGHUSER | __GFP_ZERO | movableflags, vma, vaddr)
-#define __HAVE_ARCH_ALLOC_ZEROED_USER_HIGHPAGE
-
-/*
- * These are used to make use of C type-checking..
- */
-typedef struct { unsigned long pte; } pte_t;
-typedef struct { unsigned long pmd; } pmd_t;
-typedef struct { unsigned long pgd; } pgd_t;
-#define pte_val(x) ((x).pte)
-#define PTE_MASK PAGE_MASK
-
-typedef struct { unsigned long pgprot; } pgprot_t;
-typedef struct page *pgtable_t;
-
-#define pmd_val(x) ((x).pmd)
-#define pgd_val(x) ((x).pgd)
-#define pgprot_val(x) ((x).pgprot)
-
-#define __pte(x) ((pte_t) { (x) } )
-#define __pmd(x) ((pmd_t) { (x) } )
-#define __pgd(x) ((pgd_t) { (x) } )
-#define __pgprot(x) ((pgprot_t) { (x) } )
-
-#endif /* !__ASSEMBLY__ */
-
-/*
- * This handles the memory map.. We could make this a config
- * option, but too many people screw it up, and too few need
- * it.
- *
- * A __PAGE_OFFSET of 0xC0000000 means that the kernel has
- * a virtual address space of one gigabyte, which limits the
- * amount of physical memory you can use to about 950MB.
- *
- * If you want more physical memory than this then see the CONFIG_HIGHMEM4G
- * and CONFIG_HIGHMEM64G options in the kernel configuration.
- */
-
-#define __MEMORY_START CONFIG_MEMORY_START
-#define __MEMORY_SIZE CONFIG_MEMORY_SIZE
-
-#ifdef CONFIG_MMU
-#define __PAGE_OFFSET (0x80000000)
-#else
-#define __PAGE_OFFSET (0x00000000)
-#endif
-
-#define PAGE_OFFSET ((unsigned long)__PAGE_OFFSET)
-#define __pa(x) ((unsigned long)(x) - PAGE_OFFSET)
-#define __va(x) ((void *)((unsigned long)(x) + PAGE_OFFSET))
-
-#ifndef CONFIG_DISCONTIGMEM
-#define PFN_BASE (CONFIG_MEMORY_START >> PAGE_SHIFT)
-#define ARCH_PFN_OFFSET PFN_BASE
-#define pfn_valid(pfn) (((pfn) - PFN_BASE) < max_mapnr)
-#endif /* !CONFIG_DISCONTIGMEM */
-
-#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
-#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
-
-#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
- VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC )
-
-#define devmem_is_allowed(x) 1
-
-#include <asm-generic/memory_model.h>
-#include <asm-generic/getorder.h>
-
-#endif /* _ASM_M32R_PAGE_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_M32R_PCI_H
-#define _ASM_M32R_PCI_H
-
-#include <asm-generic/pci.h>
-
-#endif /* _ASM_M32R_PCI_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __ARCH_M32R_PERCPU__
-#define __ARCH_M32R_PERCPU__
-
-#include <asm-generic/percpu.h>
-
-#endif /* __ARCH_M32R_PERCPU__ */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_M32R_PGALLOC_H
-#define _ASM_M32R_PGALLOC_H
-
-#include <linux/mm.h>
-
-#include <asm/io.h>
-
-#define pmd_populate_kernel(mm, pmd, pte) \
- set_pmd(pmd, __pmd(_PAGE_TABLE + __pa(pte)))
-
-static __inline__ void pmd_populate(struct mm_struct *mm, pmd_t *pmd,
- pgtable_t pte)
-{
- set_pmd(pmd, __pmd(_PAGE_TABLE + page_to_phys(pte)));
-}
-#define pmd_pgtable(pmd) pmd_page(pmd)
-
-/*
- * Allocate and free page tables.
- */
-static __inline__ pgd_t *pgd_alloc(struct mm_struct *mm)
-{
- pgd_t *pgd = (pgd_t *)__get_free_page(GFP_KERNEL|__GFP_ZERO);
-
- return pgd;
-}
-
-static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd)
-{
- free_page((unsigned long)pgd);
-}
-
-static __inline__ pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
- unsigned long address)
-{
- pte_t *pte = (pte_t *)__get_free_page(GFP_KERNEL|__GFP_ZERO);
-
- return pte;
-}
-
-static __inline__ pgtable_t pte_alloc_one(struct mm_struct *mm,
- unsigned long address)
-{
- struct page *pte = alloc_page(GFP_KERNEL|__GFP_ZERO);
-
- if (!pte)
- return NULL;
- if (!pgtable_page_ctor(pte)) {
- __free_page(pte);
- return NULL;
- }
- return pte;
-}
-
-static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
-{
- free_page((unsigned long)pte);
-}
-
-static inline void pte_free(struct mm_struct *mm, pgtable_t pte)
-{
- pgtable_page_dtor(pte);
- __free_page(pte);
-}
-
-#define __pte_free_tlb(tlb, pte, addr) pte_free((tlb)->mm, (pte))
-
-/*
- * allocating and freeing a pmd is trivial: the 1-entry pmd is
- * inside the pgd, so has no extra memory associated with it.
- * (In the PAE case we free the pmds as part of the pgd.)
- */
-
-#define pmd_alloc_one(mm, addr) ({ BUG(); ((pmd_t *)2); })
-#define pmd_free(mm, x) do { } while (0)
-#define __pmd_free_tlb(tlb, x, addr) do { } while (0)
-#define pgd_populate(mm, pmd, pte) BUG()
-
-#define check_pgt_cache() do { } while (0)
-
-#endif /* _ASM_M32R_PGALLOC_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_M32R_PGTABLE_2LEVEL_H
-#define _ASM_M32R_PGTABLE_2LEVEL_H
-#ifdef __KERNEL__
-
-/*
- * traditional M32R two-level paging structure:
- */
-
-#define PGDIR_SHIFT 22
-#define PTRS_PER_PGD 1024
-
-/*
- * the M32R is two-level, so we don't really have any
- * PMD directory physically.
- */
-#define __PAGETABLE_PMD_FOLDED
-#define PMD_SHIFT 22
-#define PTRS_PER_PMD 1
-
-#define PTRS_PER_PTE 1024
-
-#define pte_ERROR(e) \
- printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
-#define pmd_ERROR(e) \
- printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
-#define pgd_ERROR(e) \
- printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
-
-/*
- * The "pgd_xxx()" functions here are trivial for a folded two-level
- * setup: the pgd is never bad, and a pmd always exists (as it's folded
- * into the pgd entry)
- */
-static inline int pgd_none(pgd_t pgd) { return 0; }
-static inline int pgd_bad(pgd_t pgd) { return 0; }
-static inline int pgd_present(pgd_t pgd) { return 1; }
-#define pgd_clear(xp) do { } while (0)
-
-/*
- * Certain architectures need to do special things when PTEs
- * within a page table are directly modified. Thus, the following
- * hook is made available.
- */
-#define set_pte(pteptr, pteval) (*(pteptr) = pteval)
-#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
-
-/*
- * (pmds are folded into pgds so this doesn't get actually called,
- * but the define is needed for a generic inline function.)
- */
-#define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval)
-#define set_pgd(pgdptr, pgdval) (*(pgdptr) = pgdval)
-
-#define pgd_page_vaddr(pgd) \
-((unsigned long) __va(pgd_val(pgd) & PAGE_MASK))
-
-#ifndef CONFIG_DISCONTIGMEM
-#define pgd_page(pgd) (mem_map + ((pgd_val(pgd) >> PAGE_SHIFT) - PFN_BASE))
-#endif /* !CONFIG_DISCONTIGMEM */
-
-static inline pmd_t *pmd_offset(pgd_t * dir, unsigned long address)
-{
- return (pmd_t *) dir;
-}
-
-#define ptep_get_and_clear(mm,addr,xp) __pte(xchg(&(xp)->pte, 0))
-#define pte_same(a, b) (pte_val(a) == pte_val(b))
-#define pte_page(x) pfn_to_page(pte_pfn(x))
-#define pte_none(x) (!pte_val(x))
-#define pte_pfn(x) (pte_val(x) >> PAGE_SHIFT)
-#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
-#define pfn_pmd(pfn, prot) __pmd(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
-
-#endif /* __KERNEL__ */
-#endif /* _ASM_M32R_PGTABLE_2LEVEL_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_M32R_PGTABLE_H
-#define _ASM_M32R_PGTABLE_H
-
-#include <asm-generic/4level-fixup.h>
-
-#ifdef __KERNEL__
-/*
- * The Linux memory management assumes a three-level page table setup. On
- * the M32R, we use that, but "fold" the mid level into the top-level page
- * table, so that we physically have the same two-level page table as the
- * M32R mmu expects.
- *
- * This file contains the functions and defines necessary to modify and use
- * the M32R page table tree.
- */
-
-/* CAUTION!: If you change macro definitions in this file, you might have to
- * change arch/m32r/mmu.S manually.
- */
-
-#ifndef __ASSEMBLY__
-
-#include <linux/threads.h>
-#include <linux/bitops.h>
-#include <asm/processor.h>
-#include <asm/addrspace.h>
-#include <asm/page.h>
-
-struct mm_struct;
-struct vm_area_struct;
-
-extern pgd_t swapper_pg_dir[1024];
-extern void paging_init(void);
-
-/*
- * ZERO_PAGE is a global shared page that is always zero: used
- * for zero-mapped memory areas etc..
- */
-extern unsigned long empty_zero_page[1024];
-#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
-
-#endif /* !__ASSEMBLY__ */
-
-#ifndef __ASSEMBLY__
-#include <asm/pgtable-2level.h>
-#endif
-
-#define pgtable_cache_init() do { } while (0)
-
-#define PMD_SIZE (1UL << PMD_SHIFT)
-#define PMD_MASK (~(PMD_SIZE - 1))
-#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
-#define PGDIR_MASK (~(PGDIR_SIZE - 1))
-
-#define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE)
-#define FIRST_USER_ADDRESS 0UL
-
-#ifndef __ASSEMBLY__
-/* Just any arbitrary offset to the start of the vmalloc VM area: the
- * current 8MB value just means that there will be a 8MB "hole" after the
- * physical memory until the kernel virtual memory starts. That means that
- * any out-of-bounds memory accesses will hopefully be caught.
- * The vmalloc() routines leaves a hole of 4kB between each vmalloced
- * area for the same reason. ;)
- */
-#define VMALLOC_START KSEG2
-#define VMALLOC_END KSEG3
-
-/*
- * M32R TLB format
- *
- * [0] [1:19] [20:23] [24:31]
- * +-----------------------+----+-------------+
- * | VPN |0000| ASID |
- * +-----------------------+----+-------------+
- * +-+---------------------+----+-+---+-+-+-+-+
- * |0 PPN |0000|N|AC |L|G|V| |
- * +-+---------------------+----+-+---+-+-+-+-+
- * RWX
- */
-
-#define _PAGE_BIT_DIRTY 0 /* software: page changed */
-#define _PAGE_BIT_PRESENT 1 /* Valid: page is valid */
-#define _PAGE_BIT_GLOBAL 2 /* Global */
-#define _PAGE_BIT_LARGE 3 /* Large */
-#define _PAGE_BIT_EXEC 4 /* Execute */
-#define _PAGE_BIT_WRITE 5 /* Write */
-#define _PAGE_BIT_READ 6 /* Read */
-#define _PAGE_BIT_NONCACHABLE 7 /* Non cachable */
-#define _PAGE_BIT_ACCESSED 8 /* software: page referenced */
-#define _PAGE_BIT_PROTNONE 9 /* software: if not present */
-
-#define _PAGE_DIRTY (1UL << _PAGE_BIT_DIRTY)
-#define _PAGE_PRESENT (1UL << _PAGE_BIT_PRESENT)
-#define _PAGE_GLOBAL (1UL << _PAGE_BIT_GLOBAL)
-#define _PAGE_LARGE (1UL << _PAGE_BIT_LARGE)
-#define _PAGE_EXEC (1UL << _PAGE_BIT_EXEC)
-#define _PAGE_WRITE (1UL << _PAGE_BIT_WRITE)
-#define _PAGE_READ (1UL << _PAGE_BIT_READ)
-#define _PAGE_NONCACHABLE (1UL << _PAGE_BIT_NONCACHABLE)
-#define _PAGE_ACCESSED (1UL << _PAGE_BIT_ACCESSED)
-#define _PAGE_PROTNONE (1UL << _PAGE_BIT_PROTNONE)
-
-#define _PAGE_TABLE \
- ( _PAGE_PRESENT | _PAGE_WRITE | _PAGE_READ | _PAGE_ACCESSED \
- | _PAGE_DIRTY )
-#define _KERNPG_TABLE \
- ( _PAGE_PRESENT | _PAGE_WRITE | _PAGE_READ | _PAGE_ACCESSED \
- | _PAGE_DIRTY )
-#define _PAGE_CHG_MASK \
- ( PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY )
-
-#ifdef CONFIG_MMU
-#define PAGE_NONE \
- __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED)
-#define PAGE_SHARED \
- __pgprot(_PAGE_PRESENT | _PAGE_WRITE | _PAGE_READ | _PAGE_ACCESSED)
-#define PAGE_SHARED_EXEC \
- __pgprot(_PAGE_PRESENT | _PAGE_EXEC | _PAGE_WRITE | _PAGE_READ \
- | _PAGE_ACCESSED)
-#define PAGE_COPY \
- __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_ACCESSED)
-#define PAGE_COPY_EXEC \
- __pgprot(_PAGE_PRESENT | _PAGE_EXEC | _PAGE_READ | _PAGE_ACCESSED)
-#define PAGE_READONLY \
- __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_ACCESSED)
-#define PAGE_READONLY_EXEC \
- __pgprot(_PAGE_PRESENT | _PAGE_EXEC | _PAGE_READ | _PAGE_ACCESSED)
-
-#define __PAGE_KERNEL \
- ( _PAGE_PRESENT | _PAGE_EXEC | _PAGE_WRITE | _PAGE_READ | _PAGE_DIRTY \
- | _PAGE_ACCESSED )
-#define __PAGE_KERNEL_RO ( __PAGE_KERNEL & ~_PAGE_WRITE )
-#define __PAGE_KERNEL_NOCACHE ( __PAGE_KERNEL | _PAGE_NONCACHABLE)
-
-#define MAKE_GLOBAL(x) __pgprot((x) | _PAGE_GLOBAL)
-
-#define PAGE_KERNEL MAKE_GLOBAL(__PAGE_KERNEL)
-#define PAGE_KERNEL_RO MAKE_GLOBAL(__PAGE_KERNEL_RO)
-#define PAGE_KERNEL_NOCACHE MAKE_GLOBAL(__PAGE_KERNEL_NOCACHE)
-
-#else
-#define PAGE_NONE __pgprot(0)
-#define PAGE_SHARED __pgprot(0)
-#define PAGE_SHARED_EXEC __pgprot(0)
-#define PAGE_COPY __pgprot(0)
-#define PAGE_COPY_EXEC __pgprot(0)
-#define PAGE_READONLY __pgprot(0)
-#define PAGE_READONLY_EXEC __pgprot(0)
-
-#define PAGE_KERNEL __pgprot(0)
-#define PAGE_KERNEL_RO __pgprot(0)
-#define PAGE_KERNEL_NOCACHE __pgprot(0)
-#endif /* CONFIG_MMU */
-
- /* xwr */
-#define __P000 PAGE_NONE
-#define __P001 PAGE_READONLY
-#define __P010 PAGE_COPY
-#define __P011 PAGE_COPY
-#define __P100 PAGE_READONLY_EXEC
-#define __P101 PAGE_READONLY_EXEC
-#define __P110 PAGE_COPY_EXEC
-#define __P111 PAGE_COPY_EXEC
-
-#define __S000 PAGE_NONE
-#define __S001 PAGE_READONLY
-#define __S010 PAGE_SHARED
-#define __S011 PAGE_SHARED
-#define __S100 PAGE_READONLY_EXEC
-#define __S101 PAGE_READONLY_EXEC
-#define __S110 PAGE_SHARED_EXEC
-#define __S111 PAGE_SHARED_EXEC
-
-/* page table for 0-4MB for everybody */
-
-#define pte_present(x) (pte_val(x) & (_PAGE_PRESENT | _PAGE_PROTNONE))
-#define pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0)
-
-#define pmd_none(x) (!pmd_val(x))
-#define pmd_present(x) (pmd_val(x) & _PAGE_PRESENT)
-#define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0)
-#define pmd_bad(x) ((pmd_val(x) & ~PAGE_MASK) != _KERNPG_TABLE)
-
-#define pages_to_mb(x) ((x) >> (20 - PAGE_SHIFT))
-
-/*
- * The following only work if pte_present() is true.
- * Undefined behaviour if not..
- */
-static inline int pte_dirty(pte_t pte)
-{
- return pte_val(pte) & _PAGE_DIRTY;
-}
-
-static inline int pte_young(pte_t pte)
-{
- return pte_val(pte) & _PAGE_ACCESSED;
-}
-
-static inline int pte_write(pte_t pte)
-{
- return pte_val(pte) & _PAGE_WRITE;
-}
-
-static inline int pte_special(pte_t pte)
-{
- return 0;
-}
-
-static inline pte_t pte_mkclean(pte_t pte)
-{
- pte_val(pte) &= ~_PAGE_DIRTY;
- return pte;
-}
-
-static inline pte_t pte_mkold(pte_t pte)
-{
- pte_val(pte) &= ~_PAGE_ACCESSED;
- return pte;
-}
-
-static inline pte_t pte_wrprotect(pte_t pte)
-{
- pte_val(pte) &= ~_PAGE_WRITE;
- return pte;
-}
-
-static inline pte_t pte_mkdirty(pte_t pte)
-{
- pte_val(pte) |= _PAGE_DIRTY;
- return pte;
-}
-
-static inline pte_t pte_mkyoung(pte_t pte)
-{
- pte_val(pte) |= _PAGE_ACCESSED;
- return pte;
-}
-
-static inline pte_t pte_mkwrite(pte_t pte)
-{
- pte_val(pte) |= _PAGE_WRITE;
- return pte;
-}
-
-static inline pte_t pte_mkspecial(pte_t pte)
-{
- return pte;
-}
-
-static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
-{
- return test_and_clear_bit(_PAGE_BIT_ACCESSED, ptep);
-}
-
-static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
-{
- clear_bit(_PAGE_BIT_WRITE, ptep);
-}
-
-/*
- * Macro and implementation to make a page protection as uncachable.
- */
-static inline pgprot_t pgprot_noncached(pgprot_t _prot)
-{
- unsigned long prot = pgprot_val(_prot);
-
- prot |= _PAGE_NONCACHABLE;
- return __pgprot(prot);
-}
-
-#define pgprot_writecombine(prot) pgprot_noncached(prot)
-
-/*
- * Conversion functions: convert a page and protection to a page entry,
- * and a page entry and page directory to the page they refer to.
- */
-#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), pgprot)
-
-static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
-{
- set_pte(&pte, __pte((pte_val(pte) & _PAGE_CHG_MASK) \
- | pgprot_val(newprot)));
-
- return pte;
-}
-
-/*
- * Conversion functions: convert a page and protection to a page entry,
- * and a page entry and page directory to the page they refer to.
- */
-
-static inline void pmd_set(pmd_t * pmdp, pte_t * ptep)
-{
- pmd_val(*pmdp) = (((unsigned long) ptep) & PAGE_MASK);
-}
-
-#define pmd_page_vaddr(pmd) \
- ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
-
-#ifndef CONFIG_DISCONTIGMEM
-#define pmd_page(pmd) (mem_map + ((pmd_val(pmd) >> PAGE_SHIFT) - PFN_BASE))
-#endif /* !CONFIG_DISCONTIGMEM */
-
-/* to find an entry in a page-table-directory. */
-#define pgd_index(address) \
- (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
-
-#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
-
-/* to find an entry in a kernel page-table-directory */
-#define pgd_offset_k(address) pgd_offset(&init_mm, address)
-
-#define pmd_index(address) \
- (((address) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
-
-#define pte_index(address) \
- (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
-#define pte_offset_kernel(dir, address) \
- ((pte_t *)pmd_page_vaddr(*(dir)) + pte_index(address))
-#define pte_offset_map(dir, address) \
- ((pte_t *)page_address(pmd_page(*(dir))) + pte_index(address))
-#define pte_unmap(pte) do { } while (0)
-
-/* Encode and de-code a swap entry */
-#define __swp_type(x) (((x).val >> 2) & 0x1f)
-#define __swp_offset(x) ((x).val >> 10)
-#define __swp_entry(type, offset) \
- ((swp_entry_t) { ((type) << 2) | ((offset) << 10) })
-#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
-#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
-
-#endif /* !__ASSEMBLY__ */
-
-/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
-#define kern_addr_valid(addr) (1)
-
-#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
-#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
-#define __HAVE_ARCH_PTEP_SET_WRPROTECT
-#define __HAVE_ARCH_PTE_SAME
-#include <asm-generic/pgtable.h>
-
-#endif /* __KERNEL__ */
-
-#endif /* _ASM_M32R_PGTABLE_H */
+++ /dev/null
-#ifndef _ASM_M32R_PROCESSOR_H
-#define _ASM_M32R_PROCESSOR_H
-
-/*
- * include/asm-m32r/processor.h
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1994 Linus Torvalds
- * Copyright (C) 2001 Hiroyuki Kondo, Hirokazu Takata, and Hitoshi Yamamoto
- * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org>
- */
-
-#include <linux/kernel.h>
-#include <asm/cache.h>
-#include <asm/ptrace.h> /* pt_regs */
-
-/*
- * Default implementation of macro that returns current
- * instruction pointer ("program counter").
- */
-#define current_text_addr() ({ __label__ _l; _l: &&_l; })
-
-/*
- * CPU type and hardware bug flags. Kept separately for each CPU.
- * Members of this structure are referenced in head.S, so think twice
- * before touching them. [mj]
- */
-
-struct cpuinfo_m32r {
- unsigned long pgtable_cache_sz;
- unsigned long cpu_clock;
- unsigned long bus_clock;
- unsigned long timer_divide;
- unsigned long loops_per_jiffy;
-};
-
-/*
- * capabilities of CPUs
- */
-
-extern struct cpuinfo_m32r boot_cpu_data;
-
-#ifdef CONFIG_SMP
-extern struct cpuinfo_m32r cpu_data[];
-#define current_cpu_data cpu_data[smp_processor_id()]
-#else
-#define cpu_data (&boot_cpu_data)
-#define current_cpu_data boot_cpu_data
-#endif
-
-/*
- * User space process size: 2GB (default).
- */
-#ifdef CONFIG_MMU
-#define TASK_SIZE (0x80000000UL)
-#else
-#define TASK_SIZE (0x00400000UL)
-#endif
-
-#ifdef __KERNEL__
-#define STACK_TOP TASK_SIZE
-#define STACK_TOP_MAX STACK_TOP
-#endif
-
-/* This decides where the kernel will search for a free chunk of vm
- * space during mmap's.
- */
-#define TASK_UNMAPPED_BASE PAGE_ALIGN(TASK_SIZE / 3)
-
-typedef struct {
- unsigned long seg;
-} mm_segment_t;
-
-#define MAX_TRAPS 10
-
-struct debug_trap {
- int nr_trap;
- unsigned long addr[MAX_TRAPS];
- unsigned long insn[MAX_TRAPS];
-};
-
-struct thread_struct {
- unsigned long address;
- unsigned long trap_no; /* Trap number */
- unsigned long error_code; /* Error code of trap */
- unsigned long lr; /* saved pc */
- unsigned long sp; /* user stack pointer */
- struct debug_trap debug_trap;
-};
-
-#define INIT_SP (sizeof(init_stack) + (unsigned long) &init_stack)
-
-#define INIT_THREAD { \
- .sp = INIT_SP, \
-}
-
-/*
- * Do necessary setup to start up a newly executed thread.
- */
-
-/* User process Backup PSW */
-#define USERPS_BPSW (M32R_PSW_BSM|M32R_PSW_BIE|M32R_PSW_BPM)
-
-#define start_thread(regs, new_pc, new_spu) \
- do { \
- regs->psw = (regs->psw | USERPS_BPSW) & 0x0000FFFFUL; \
- regs->bpc = new_pc; \
- regs->spu = new_spu; \
- } while (0)
-
-/* Forward declaration, a strange C thing */
-struct task_struct;
-struct mm_struct;
-
-/* Free all resources held by a thread. */
-extern void release_thread(struct task_struct *);
-
-unsigned long get_wchan(struct task_struct *p);
-#define KSTK_EIP(tsk) ((tsk)->thread.lr)
-#define KSTK_ESP(tsk) ((tsk)->thread.sp)
-
-#define cpu_relax() barrier()
-
-#endif /* _ASM_M32R_PROCESSOR_H */
+++ /dev/null
-/*
- * linux/include/asm-m32r/ptrace.h
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * M32R version:
- * Copyright (C) 2001-2002, 2004 Hirokazu Takata <takata at linux-m32r.org>
- */
-#ifndef _ASM_M32R_PTRACE_H
-#define _ASM_M32R_PTRACE_H
-
-
-#include <asm/m32r.h> /* M32R_PSW_BSM, M32R_PSW_BPM */
-#include <uapi/asm/ptrace.h>
-
-#define arch_has_single_step() (1)
-
-struct task_struct;
-extern void init_debug_traps(struct task_struct *);
-#define arch_ptrace_attach(child) \
- init_debug_traps(child)
-
-#if defined(CONFIG_ISA_M32R2) || defined(CONFIG_CHIP_VDEC2)
-#define user_mode(regs) ((M32R_PSW_BPM & (regs)->psw) != 0)
-#elif defined(CONFIG_ISA_M32R)
-#define user_mode(regs) ((M32R_PSW_BSM & (regs)->psw) != 0)
-#else
-#error unknown isa configuration
-#endif
-
-#define instruction_pointer(regs) ((regs)->bpc)
-#define profile_pc(regs) instruction_pointer(regs)
-#define user_stack_pointer(regs) ((regs)->spu)
-
-extern void withdraw_debug_trap(struct pt_regs *regs);
-
-#define task_pt_regs(task) \
- ((struct pt_regs *)(task_stack_page(task) + THREAD_SIZE) - 1)
-#define current_pt_regs() ((struct pt_regs *) \
- ((unsigned long)current_thread_info() + THREAD_SIZE) - 1)
-
-#endif /* _ASM_M32R_PTRACE_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __RTC_H__
-#define __RTC_H__
-
- /* Dallas DS1302 clock/calendar register numbers. */
-# define RTC_SECONDS 0
-# define RTC_MINUTES 1
-# define RTC_HOURS 2
-# define RTC_DAY_OF_MONTH 3
-# define RTC_MONTH 4
-# define RTC_WEEKDAY 5
-# define RTC_YEAR 6
-# define RTC_CONTROL 7
-
- /* Bits in CONTROL register. */
-# define RTC_CONTROL_WRITEPROTECT 0x80
-# define RTC_TRICKLECHARGER 8
-
- /* Bits in TRICKLECHARGER register TCS TCS TCS TCS DS DS RS RS. */
-# define RTC_TCR_PATTERN 0xA0 /* 1010xxxx */
-# define RTC_TCR_1DIOD 0x04 /* xxxx01xx */
-# define RTC_TCR_2DIOD 0x08 /* xxxx10xx */
-# define RTC_TCR_DISABLED 0x00 /* xxxxxx00 Disabled */
-# define RTC_TCR_2KOHM 0x01 /* xxxxxx01 2KOhm */
-# define RTC_TCR_4KOHM 0x02 /* xxxxxx10 4kOhm */
-# define RTC_TCR_8KOHM 0x03 /* xxxxxx11 8kOhm */
-
-#ifdef CONFIG_DS1302
-extern unsigned char ds1302_readreg(int reg);
-extern void ds1302_writereg(int reg, unsigned char val);
-extern int ds1302_init(void);
-# define CMOS_READ(x) ds1302_readreg(x)
-# define CMOS_WRITE(val,reg) ds1302_writereg(reg,val)
-# define RTC_INIT() ds1302_init()
-#else
- /* No RTC configured so we shouldn't try to access any. */
-# define CMOS_READ(x) 42
-# define CMOS_WRITE(x,y)
-# define RTC_INIT() (-1)
-#endif
-
-/*
- * The struct used to pass data via the following ioctl. Similar to the
- * struct tm in <time.h>, but it needs to be here so that the kernel
- * source is self contained, allowing cross-compiles, etc. etc.
- */
-struct rtc_time {
- int tm_sec;
- int tm_min;
- int tm_hour;
- int tm_mday;
- int tm_mon;
- int tm_year;
- int tm_wday;
- int tm_yday;
- int tm_isdst;
-};
-
-/* ioctl() calls that are permitted to the /dev/rtc interface. */
-#define RTC_MAGIC 'p'
-#define RTC_RD_TIME _IOR(RTC_MAGIC, 0x09, struct rtc_time) /* Read RTC time. */
-#define RTC_SET_TIME _IOW(RTC_MAGIC, 0x0a, struct rtc_time) /* Set RTC time. */
-#define RTC_SET_CHARGE _IOW(RTC_MAGIC, 0x0b, int)
-#define RTC_MAX_IOCTL 0x0b
-
-#endif /* __RTC_H__ */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-//----------------------------------------------------------------------------
-//
-// File generated by S1D13806CFG.EXE
-//
-// Copyright (c) 2000,2001 Epson Research and Development, Inc.
-// All rights reserved.
-//
-//----------------------------------------------------------------------------
-
-// Panel: (active) 640x480 77Hz STN Single 8-bit (PCLK=CLKI=25.175MHz)
-// Memory: Embedded SDRAM (MCLK=CLKI3=50.000MHz) (BUSCLK=33.333MHz)
-
-#define SWIVEL_VIEW 0 /* 0:none, 1:90 not completed */
-
-static struct s1d13xxxfb_regval s1d13xxxfb_initregs[] = {
-
- {0x0001,0x00}, // Miscellaneous Register
- {0x01FC,0x00}, // Display Mode Register
-#if defined(CONFIG_PLAT_MAPPI)
- {0x0004,0x00}, // General IO Pins Configuration Register 0
- {0x0005,0x00}, // General IO Pins Configuration Register 1
- {0x0008,0x00}, // General IO Pins Control Register 0
- {0x0009,0x00}, // General IO Pins Control Register 1
- {0x0010,0x00}, // Memory Clock Configuration Register
- {0x0014,0x00}, // LCD Pixel Clock Configuration Register
- {0x0018,0x00}, // CRT/TV Pixel Clock Configuration Register
- {0x001C,0x00}, // MediaPlug Clock Configuration Register
-/*
- * .. 10MHz: 0x00
- * .. 30MHz: 0x01
- * 30MHz ..: 0x02
- */
- {0x001E,0x02}, // CPU To Memory Wait State Select Register
- {0x0021,0x02}, // DRAM Refresh Rate Register
- {0x002A,0x11}, // DRAM Timings Control Register 0
- {0x002B,0x13}, // DRAM Timings Control Register 1
- {0x0020,0x80}, // Memory Configuration Register
- {0x0030,0x25}, // Panel Type Register
- {0x0031,0x00}, // MOD Rate Register
- {0x0032,0x4F}, // LCD Horizontal Display Width Register
- {0x0034,0x12}, // LCD Horizontal Non-Display Period Register
- {0x0035,0x01}, // TFT FPLINE Start Position Register
- {0x0036,0x0B}, // TFT FPLINE Pulse Width Register
- {0x0038,0xDF}, // LCD Vertical Display Height Register 0
- {0x0039,0x01}, // LCD Vertical Display Height Register 1
- {0x003A,0x2C}, // LCD Vertical Non-Display Period Register
- {0x003B,0x0A}, // TFT FPFRAME Start Position Register
- {0x003C,0x01}, // TFT FPFRAME Pulse Width Register
-
- {0x0041,0x00}, // LCD Miscellaneous Register
- {0x0042,0x00}, // LCD Display Start Address Register 0
- {0x0043,0x00}, // LCD Display Start Address Register 1
- {0x0044,0x00}, // LCD Display Start Address Register 2
-
-#elif defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_OPSPUT) || defined(CONFIG_PLAT_MAPPI3)
- {0x0004,0x07}, // GPIO[0:7] direction
- {0x0005,0x00}, // GPIO[8:12] direction
- {0x0008,0x00}, // GPIO[0:7] data
- {0x0009,0x00}, // GPIO[8:12] data
- {0x0008,0x04}, // LCD panel Vcc on
- {0x0008,0x05}, // LCD panel reset
- {0x0010,0x01}, // Memory Clock Configuration Register
- {0x0014,0x30}, // LCD Pixel Clock Configuration Register (CLKI 22MHz/4)
- {0x0018,0x00}, // CRT/TV Pixel Clock Configuration Register
- {0x001C,0x00}, // MediaPlug Clock Configuration Register(10MHz)
- {0x001E,0x00}, // CPU To Memory Wait State Select Register
- {0x0020,0x80}, // Memory Configuration Register
- {0x0021,0x03}, // DRAM Refresh Rate Register
- {0x002A,0x00}, // DRAM Timings Control Register 0
- {0x002B,0x01}, // DRAM Timings Control Register 1
- {0x0030,0x25}, // Panel Type Register
- {0x0031,0x00}, // MOD Rate Register
- {0x0032,0x1d}, // LCD Horizontal Display Width Register
- {0x0034,0x05}, // LCD Horizontal Non-Display Period Register
- {0x0035,0x01}, // TFT FPLINE Start Position Register
- {0x0036,0x01}, // TFT FPLINE Pulse Width Register
- {0x0038,0x3F}, // LCD Vertical Display Height Register 0
- {0x0039,0x01}, // LCD Vertical Display Height Register 1
- {0x003A,0x0b}, // LCD Vertical Non-Display Period Register
- {0x003B,0x07}, // TFT FPFRAME Start Position Register
- {0x003C,0x02}, // TFT FPFRAME Pulse Width Register
-
- {0x0041,0x00}, // LCD Miscellaneous Register
-#if (SWIVEL_VIEW == 0)
- {0x0042,0x00}, // LCD Display Start Address Register 0
- {0x0043,0x00}, // LCD Display Start Address Register 1
- {0x0044,0x00}, // LCD Display Start Address Register 2
-
-#elif (SWIVEL_VIEW == 1)
- // 1024 - W(320) = 0x2C0
- {0x0042,0xC0}, // LCD Display Start Address Register 0
- {0x0043,0x02}, // LCD Display Start Address Register 1
- {0x0044,0x00}, // LCD Display Start Address Register 2
- // 1024
- {0x0046,0x00}, // LCD Memory Address Offset Register 0
- {0x0047,0x02}, // LCD Memory Address Offset Register 1
-#else
-#error unsupported SWIVEL_VIEW mode
-#endif
-#else
-#error no platform configuration
-#endif /* CONFIG_PLAT_XXX */
-
- {0x0048,0x00}, // LCD Pixel Panning Register
- {0x004A,0x00}, // LCD Display FIFO High Threshold Control Register
- {0x004B,0x00}, // LCD Display FIFO Low Threshold Control Register
- {0x0050,0x4F}, // CRT/TV Horizontal Display Width Register
- {0x0052,0x13}, // CRT/TV Horizontal Non-Display Period Register
- {0x0053,0x01}, // CRT/TV HRTC Start Position Register
- {0x0054,0x0B}, // CRT/TV HRTC Pulse Width Register
- {0x0056,0xDF}, // CRT/TV Vertical Display Height Register 0
- {0x0057,0x01}, // CRT/TV Vertical Display Height Register 1
- {0x0058,0x2B}, // CRT/TV Vertical Non-Display Period Register
- {0x0059,0x09}, // CRT/TV VRTC Start Position Register
- {0x005A,0x01}, // CRT/TV VRTC Pulse Width Register
- {0x005B,0x10}, // TV Output Control Register
-
- {0x0062,0x00}, // CRT/TV Display Start Address Register 0
- {0x0063,0x00}, // CRT/TV Display Start Address Register 1
- {0x0064,0x00}, // CRT/TV Display Start Address Register 2
-
- {0x0068,0x00}, // CRT/TV Pixel Panning Register
- {0x006A,0x00}, // CRT/TV Display FIFO High Threshold Control Register
- {0x006B,0x00}, // CRT/TV Display FIFO Low Threshold Control Register
- {0x0070,0x00}, // LCD Ink/Cursor Control Register
- {0x0071,0x01}, // LCD Ink/Cursor Start Address Register
- {0x0072,0x00}, // LCD Cursor X Position Register 0
- {0x0073,0x00}, // LCD Cursor X Position Register 1
- {0x0074,0x00}, // LCD Cursor Y Position Register 0
- {0x0075,0x00}, // LCD Cursor Y Position Register 1
- {0x0076,0x00}, // LCD Ink/Cursor Blue Color 0 Register
- {0x0077,0x00}, // LCD Ink/Cursor Green Color 0 Register
- {0x0078,0x00}, // LCD Ink/Cursor Red Color 0 Register
- {0x007A,0x1F}, // LCD Ink/Cursor Blue Color 1 Register
- {0x007B,0x3F}, // LCD Ink/Cursor Green Color 1 Register
- {0x007C,0x1F}, // LCD Ink/Cursor Red Color 1 Register
- {0x007E,0x00}, // LCD Ink/Cursor FIFO Threshold Register
- {0x0080,0x00}, // CRT/TV Ink/Cursor Control Register
- {0x0081,0x01}, // CRT/TV Ink/Cursor Start Address Register
- {0x0082,0x00}, // CRT/TV Cursor X Position Register 0
- {0x0083,0x00}, // CRT/TV Cursor X Position Register 1
- {0x0084,0x00}, // CRT/TV Cursor Y Position Register 0
- {0x0085,0x00}, // CRT/TV Cursor Y Position Register 1
- {0x0086,0x00}, // CRT/TV Ink/Cursor Blue Color 0 Register
- {0x0087,0x00}, // CRT/TV Ink/Cursor Green Color 0 Register
- {0x0088,0x00}, // CRT/TV Ink/Cursor Red Color 0 Register
- {0x008A,0x1F}, // CRT/TV Ink/Cursor Blue Color 1 Register
- {0x008B,0x3F}, // CRT/TV Ink/Cursor Green Color 1 Register
- {0x008C,0x1F}, // CRT/TV Ink/Cursor Red Color 1 Register
- {0x008E,0x00}, // CRT/TV Ink/Cursor FIFO Threshold Register
- {0x0100,0x00}, // BitBlt Control Register 0
- {0x0101,0x00}, // BitBlt Control Register 1
- {0x0102,0x00}, // BitBlt ROP Code/Color Expansion Register
- {0x0103,0x00}, // BitBlt Operation Register
- {0x0104,0x00}, // BitBlt Source Start Address Register 0
- {0x0105,0x00}, // BitBlt Source Start Address Register 1
- {0x0106,0x00}, // BitBlt Source Start Address Register 2
- {0x0108,0x00}, // BitBlt Destination Start Address Register 0
- {0x0109,0x00}, // BitBlt Destination Start Address Register 1
- {0x010A,0x00}, // BitBlt Destination Start Address Register 2
- {0x010C,0x00}, // BitBlt Memory Address Offset Register 0
- {0x010D,0x00}, // BitBlt Memory Address Offset Register 1
- {0x0110,0x00}, // BitBlt Width Register 0
- {0x0111,0x00}, // BitBlt Width Register 1
- {0x0112,0x00}, // BitBlt Height Register 0
- {0x0113,0x00}, // BitBlt Height Register 1
- {0x0114,0x00}, // BitBlt Background Color Register 0
- {0x0115,0x00}, // BitBlt Background Color Register 1
- {0x0118,0x00}, // BitBlt Foreground Color Register 0
- {0x0119,0x00}, // BitBlt Foreground Color Register 1
- {0x01E0,0x00}, // Look-Up Table Mode Register
- {0x01E2,0x00}, // Look-Up Table Address Register
- {0x01F0,0x10}, // Power Save Configuration Register
- {0x01F1,0x00}, // Power Save Status Register
- {0x01F4,0x00}, // CPU-to-Memory Access Watchdog Timer Register
-#if (SWIVEL_VIEW == 0)
- {0x01FC,0x01}, // Display Mode Register(0x01:LCD, 0x02:CRT, 0x03:LCD&CRT)
-#elif (SWIVEL_VIEW == 1)
- {0x01FC,0x41}, // Display Mode Register(0x01:LCD, 0x02:CRT, 0x03:LCD&CRT)
-#else
-#error unsupported SWIVEL_VIEW mode
-#endif /* SWIVEL_VIEW */
-
-#if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_OPSPUT) || defined(CONFIG_PLAT_MAPPI3)
- {0x0008,0x07}, // LCD panel Vdd & Vg on
-#endif
-
- {0x0040,0x05}, // LCD Display Mode Register (2:4bpp,3:8bpp,5:16bpp)
-#if defined(CONFIG_PLAT_MAPPI)
- {0x0046,0x80}, // LCD Memory Address Offset Register 0
- {0x0047,0x02}, // LCD Memory Address Offset Register 1
-#elif defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_OPSPUT) || defined(CONFIG_PLAT_MAPPI3)
- {0x0046,0xf0}, // LCD Memory Address Offset Register 0
- {0x0047,0x00}, // LCD Memory Address Offset Register 1
-#endif
- {0x0060,0x05}, // CRT/TV Display Mode Register (2:4bpp,3:8bpp,5:16bpp)
- {0x0066,0x80}, // CRT/TV Memory Address Offset Register 0 // takeo
- {0x0067,0x02}, // CRT/TV Memory Address Offset Register 1
-};
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_M32R_SEGMENT_H
-#define _ASM_M32R_SEGMENT_H
-
-#define __KERNEL_CS 0x10
-#define __KERNEL_DS 0x18
-
-#define __USER_CS 0x23
-#define __USER_DS 0x2B
-
-#endif /* _ASM_M32R_SEGMENT_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_M32R_SERIAL_H
-#define _ASM_M32R_SERIAL_H
-
-/* include/asm-m32r/serial.h */
-
-
-#define BASE_BAUD 115200
-
-#endif /* _ASM_M32R_SERIAL_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_M32R_SETUP_H
-#define _ASM_M32R_SETUP_H
-
-#include <uapi/asm/setup.h>
-
-
-#define PARAM ((unsigned char *)empty_zero_page)
-
-#define MOUNT_ROOT_RDONLY (*(unsigned long *) (PARAM+0x000))
-#define RAMDISK_FLAGS (*(unsigned long *) (PARAM+0x004))
-#define ORIG_ROOT_DEV (*(unsigned long *) (PARAM+0x008))
-#define LOADER_TYPE (*(unsigned long *) (PARAM+0x00c))
-#define INITRD_START (*(unsigned long *) (PARAM+0x010))
-#define INITRD_SIZE (*(unsigned long *) (PARAM+0x014))
-
-#define M32R_CPUCLK (*(unsigned long *) (PARAM+0x018))
-#define M32R_BUSCLK (*(unsigned long *) (PARAM+0x01c))
-#define M32R_TIMER_DIVIDE (*(unsigned long *) (PARAM+0x020))
-
-#define COMMAND_LINE ((char *) (PARAM+0x100))
-
-#define SCREEN_INFO (*(struct screen_info *) (PARAM+0x200))
-
-#define RAMDISK_IMAGE_START_MASK (0x07FF)
-#define RAMDISK_PROMPT_FLAG (0x8000)
-#define RAMDISK_LOAD_FLAG (0x4000)
-
-extern unsigned long memory_start;
-extern unsigned long memory_end;
-
-#endif /* _ASM_M32R_SETUP_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_M32R_SHMPARAM_H
-#define _ASM_M32R_SHMPARAM_H
-
-#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */
-
-#endif /* _ASM_M32R_SHMPARAM_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_M32R_SIGNAL_H
-#define _ASM_M32R_SIGNAL_H
-
-#include <uapi/asm/signal.h>
-
-/* Most things should be clean enough to redefine this at will, if care
- is taken to make libc match. */
-
-#define _NSIG 64
-#define _NSIG_BPW 32
-#define _NSIG_WORDS (_NSIG / _NSIG_BPW)
-
-typedef unsigned long old_sigset_t; /* at least 32 bits */
-
-typedef struct {
- unsigned long sig[_NSIG_WORDS];
-} sigset_t;
-
-#define __ARCH_HAS_SA_RESTORER
-#include <asm/sigcontext.h>
-
-#undef __HAVE_ARCH_SIG_BITOPS
-
-#endif /* _ASM_M32R_SIGNAL_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_M32R_SMP_H
-#define _ASM_M32R_SMP_H
-
-#ifdef CONFIG_SMP
-#ifndef __ASSEMBLY__
-
-#include <linux/cpumask.h>
-#include <linux/spinlock.h>
-#include <linux/threads.h>
-#include <asm/m32r.h>
-
-#define PHYSID_ARRAY_SIZE 1
-
-struct physid_mask
-{
- unsigned long mask[PHYSID_ARRAY_SIZE];
-};
-
-typedef struct physid_mask physid_mask_t;
-
-#define physid_set(physid, map) set_bit(physid, (map).mask)
-#define physid_clear(physid, map) clear_bit(physid, (map).mask)
-#define physid_isset(physid, map) test_bit(physid, (map).mask)
-#define physid_test_and_set(physid, map) test_and_set_bit(physid, (map).mask)
-
-#define physids_and(dst, src1, src2) bitmap_and((dst).mask, (src1).mask, (src2).mask, MAX_APICS)
-#define physids_or(dst, src1, src2) bitmap_or((dst).mask, (src1).mask, (src2).mask, MAX_APICS)
-#define physids_clear(map) bitmap_zero((map).mask, MAX_APICS)
-#define physids_complement(dst, src) bitmap_complement((dst).mask,(src).mask, MAX_APICS)
-#define physids_empty(map) bitmap_empty((map).mask, MAX_APICS)
-#define physids_equal(map1, map2) bitmap_equal((map1).mask, (map2).mask, MAX_APICS)
-#define physids_weight(map) bitmap_weight((map).mask, MAX_APICS)
-#define physids_shift_right(d, s, n) bitmap_shift_right((d).mask, (s).mask, n, MAX_APICS)
-#define physids_shift_left(d, s, n) bitmap_shift_left((d).mask, (s).mask, n, MAX_APICS)
-#define physids_coerce(map) ((map).mask[0])
-
-#define physids_promote(physids) \
- ({ \
- physid_mask_t __physid_mask = PHYSID_MASK_NONE; \
- __physid_mask.mask[0] = physids; \
- __physid_mask; \
- })
-
-#define physid_mask_of_physid(physid) \
- ({ \
- physid_mask_t __physid_mask = PHYSID_MASK_NONE; \
- physid_set(physid, __physid_mask); \
- __physid_mask; \
- })
-
-#define PHYSID_MASK_ALL { {[0 ... PHYSID_ARRAY_SIZE-1] = ~0UL} }
-#define PHYSID_MASK_NONE { {[0 ... PHYSID_ARRAY_SIZE-1] = 0UL} }
-
-extern physid_mask_t phys_cpu_present_map;
-
-/*
- * Some lowlevel functions might want to know about
- * the real CPU ID <-> CPU # mapping.
- */
-extern volatile int cpu_2_physid[NR_CPUS];
-#define cpu_to_physid(cpu_id) cpu_2_physid[cpu_id]
-
-#define raw_smp_processor_id() (current_thread_info()->cpu)
-
-extern cpumask_t cpu_callout_map;
-
-static __inline__ int hard_smp_processor_id(void)
-{
- return (int)*(volatile long *)M32R_CPUID_PORTL;
-}
-
-static __inline__ int cpu_logical_map(int cpu)
-{
- return cpu;
-}
-
-static __inline__ int cpu_number_map(int cpu)
-{
- return cpu;
-}
-
-extern void smp_send_timer(void);
-extern unsigned long send_IPI_mask_phys(const cpumask_t*, int, int);
-
-extern void arch_send_call_function_single_ipi(int cpu);
-extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
-
-#endif /* not __ASSEMBLY__ */
-
-#define NO_PROC_ID (0xff) /* No processor magic marker */
-
-/*
- * M32R-mp IPI
- */
-#define RESCHEDULE_IPI (M32R_IRQ_IPI0-M32R_IRQ_IPI0)
-#define INVALIDATE_TLB_IPI (M32R_IRQ_IPI1-M32R_IRQ_IPI0)
-#define CALL_FUNCTION_IPI (M32R_IRQ_IPI2-M32R_IRQ_IPI0)
-#define LOCAL_TIMER_IPI (M32R_IRQ_IPI3-M32R_IRQ_IPI0)
-#define INVALIDATE_CACHE_IPI (M32R_IRQ_IPI4-M32R_IRQ_IPI0)
-#define CPU_BOOT_IPI (M32R_IRQ_IPI5-M32R_IRQ_IPI0)
-#define CALL_FUNC_SINGLE_IPI (M32R_IRQ_IPI6-M32R_IRQ_IPI0)
-
-#define IPI_SHIFT (0)
-#define NR_IPIS (8)
-
-#else /* CONFIG_SMP */
-
-#define hard_smp_processor_id() 0
-
-#endif /* CONFIG_SMP */
-
-#endif /* _ASM_M32R_SMP_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_M32R_SPINLOCK_H
-#define _ASM_M32R_SPINLOCK_H
-
-/*
- * linux/include/asm-m32r/spinlock.h
- *
- * M32R version:
- * Copyright (C) 2001, 2002 Hitoshi Yamamoto
- * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org>
- */
-
-#include <linux/compiler.h>
-#include <linux/atomic.h>
-#include <asm/dcache_clear.h>
-#include <asm/page.h>
-#include <asm/barrier.h>
-#include <asm/processor.h>
-
-/*
- * Your basic SMP spinlocks, allowing only a single CPU anywhere
- *
- * (the type definitions are in asm/spinlock_types.h)
- *
- * Simple spin lock operations. There are two variants, one clears IRQ's
- * on the local processor, one does not.
- *
- * We make no fairness assumptions. They have a cost.
- */
-
-#define arch_spin_is_locked(x) (*(volatile int *)(&(x)->slock) <= 0)
-
-/**
- * arch_spin_trylock - Try spin lock and return a result
- * @lock: Pointer to the lock variable
- *
- * arch_spin_trylock() tries to get the lock and returns a result.
- * On the m32r, the result value is 1 (= Success) or 0 (= Failure).
- */
-static inline int arch_spin_trylock(arch_spinlock_t *lock)
-{
- int oldval;
- unsigned long tmp1, tmp2;
-
- /*
- * lock->slock : =1 : unlock
- * : <=0 : lock
- * {
- * oldval = lock->slock; <--+ need atomic operation
- * lock->slock = 0; <--+
- * }
- */
- __asm__ __volatile__ (
- "# arch_spin_trylock \n\t"
- "ldi %1, #0; \n\t"
- "mvfc %2, psw; \n\t"
- "clrpsw #0x40 -> nop; \n\t"
- DCACHE_CLEAR("%0", "r6", "%3")
- "lock %0, @%3; \n\t"
- "unlock %1, @%3; \n\t"
- "mvtc %2, psw; \n\t"
- : "=&r" (oldval), "=&r" (tmp1), "=&r" (tmp2)
- : "r" (&lock->slock)
- : "memory"
-#ifdef CONFIG_CHIP_M32700_TS1
- , "r6"
-#endif /* CONFIG_CHIP_M32700_TS1 */
- );
-
- return (oldval > 0);
-}
-
-static inline void arch_spin_lock(arch_spinlock_t *lock)
-{
- unsigned long tmp0, tmp1;
-
- /*
- * lock->slock : =1 : unlock
- * : <=0 : lock
- *
- * for ( ; ; ) {
- * lock->slock -= 1; <-- need atomic operation
- * if (lock->slock == 0) break;
- * for ( ; lock->slock <= 0 ; );
- * }
- */
- __asm__ __volatile__ (
- "# arch_spin_lock \n\t"
- ".fillinsn \n"
- "1: \n\t"
- "mvfc %1, psw; \n\t"
- "clrpsw #0x40 -> nop; \n\t"
- DCACHE_CLEAR("%0", "r6", "%2")
- "lock %0, @%2; \n\t"
- "addi %0, #-1; \n\t"
- "unlock %0, @%2; \n\t"
- "mvtc %1, psw; \n\t"
- "bltz %0, 2f; \n\t"
- LOCK_SECTION_START(".balign 4 \n\t")
- ".fillinsn \n"
- "2: \n\t"
- "ld %0, @%2; \n\t"
- "bgtz %0, 1b; \n\t"
- "bra 2b; \n\t"
- LOCK_SECTION_END
- : "=&r" (tmp0), "=&r" (tmp1)
- : "r" (&lock->slock)
- : "memory"
-#ifdef CONFIG_CHIP_M32700_TS1
- , "r6"
-#endif /* CONFIG_CHIP_M32700_TS1 */
- );
-}
-
-static inline void arch_spin_unlock(arch_spinlock_t *lock)
-{
- mb();
- lock->slock = 1;
-}
-
-/*
- * Read-write spinlocks, allowing multiple readers
- * but only one writer.
- *
- * NOTE! it is quite common to have readers in interrupts
- * but no interrupt writers. For those circumstances we
- * can "mix" irq-safe locks - any writer needs to get a
- * irq-safe write-lock, but readers can get non-irqsafe
- * read-locks.
- *
- * On x86, we implement read-write locks as a 32-bit counter
- * with the high bit (sign) being the "contended" bit.
- *
- * The inline assembly is non-obvious. Think about it.
- *
- * Changed to use the same technique as rw semaphores. See
- * semaphore.h for details. -ben
- */
-
-static inline void arch_read_lock(arch_rwlock_t *rw)
-{
- unsigned long tmp0, tmp1;
-
- /*
- * rw->lock : >0 : unlock
- * : <=0 : lock
- *
- * for ( ; ; ) {
- * rw->lock -= 1; <-- need atomic operation
- * if (rw->lock >= 0) break;
- * rw->lock += 1; <-- need atomic operation
- * for ( ; rw->lock <= 0 ; );
- * }
- */
- __asm__ __volatile__ (
- "# read_lock \n\t"
- ".fillinsn \n"
- "1: \n\t"
- "mvfc %1, psw; \n\t"
- "clrpsw #0x40 -> nop; \n\t"
- DCACHE_CLEAR("%0", "r6", "%2")
- "lock %0, @%2; \n\t"
- "addi %0, #-1; \n\t"
- "unlock %0, @%2; \n\t"
- "mvtc %1, psw; \n\t"
- "bltz %0, 2f; \n\t"
- LOCK_SECTION_START(".balign 4 \n\t")
- ".fillinsn \n"
- "2: \n\t"
- "clrpsw #0x40 -> nop; \n\t"
- DCACHE_CLEAR("%0", "r6", "%2")
- "lock %0, @%2; \n\t"
- "addi %0, #1; \n\t"
- "unlock %0, @%2; \n\t"
- "mvtc %1, psw; \n\t"
- ".fillinsn \n"
- "3: \n\t"
- "ld %0, @%2; \n\t"
- "bgtz %0, 1b; \n\t"
- "bra 3b; \n\t"
- LOCK_SECTION_END
- : "=&r" (tmp0), "=&r" (tmp1)
- : "r" (&rw->lock)
- : "memory"
-#ifdef CONFIG_CHIP_M32700_TS1
- , "r6"
-#endif /* CONFIG_CHIP_M32700_TS1 */
- );
-}
-
-static inline void arch_write_lock(arch_rwlock_t *rw)
-{
- unsigned long tmp0, tmp1, tmp2;
-
- /*
- * rw->lock : =RW_LOCK_BIAS_STR : unlock
- * : !=RW_LOCK_BIAS_STR : lock
- *
- * for ( ; ; ) {
- * rw->lock -= RW_LOCK_BIAS_STR; <-- need atomic operation
- * if (rw->lock == 0) break;
- * rw->lock += RW_LOCK_BIAS_STR; <-- need atomic operation
- * for ( ; rw->lock != RW_LOCK_BIAS_STR ; ) ;
- * }
- */
- __asm__ __volatile__ (
- "# write_lock \n\t"
- "seth %1, #high(" RW_LOCK_BIAS_STR "); \n\t"
- "or3 %1, %1, #low(" RW_LOCK_BIAS_STR "); \n\t"
- ".fillinsn \n"
- "1: \n\t"
- "mvfc %2, psw; \n\t"
- "clrpsw #0x40 -> nop; \n\t"
- DCACHE_CLEAR("%0", "r7", "%3")
- "lock %0, @%3; \n\t"
- "sub %0, %1; \n\t"
- "unlock %0, @%3; \n\t"
- "mvtc %2, psw; \n\t"
- "bnez %0, 2f; \n\t"
- LOCK_SECTION_START(".balign 4 \n\t")
- ".fillinsn \n"
- "2: \n\t"
- "clrpsw #0x40 -> nop; \n\t"
- DCACHE_CLEAR("%0", "r7", "%3")
- "lock %0, @%3; \n\t"
- "add %0, %1; \n\t"
- "unlock %0, @%3; \n\t"
- "mvtc %2, psw; \n\t"
- ".fillinsn \n"
- "3: \n\t"
- "ld %0, @%3; \n\t"
- "beq %0, %1, 1b; \n\t"
- "bra 3b; \n\t"
- LOCK_SECTION_END
- : "=&r" (tmp0), "=&r" (tmp1), "=&r" (tmp2)
- : "r" (&rw->lock)
- : "memory"
-#ifdef CONFIG_CHIP_M32700_TS1
- , "r7"
-#endif /* CONFIG_CHIP_M32700_TS1 */
- );
-}
-
-static inline void arch_read_unlock(arch_rwlock_t *rw)
-{
- unsigned long tmp0, tmp1;
-
- __asm__ __volatile__ (
- "# read_unlock \n\t"
- "mvfc %1, psw; \n\t"
- "clrpsw #0x40 -> nop; \n\t"
- DCACHE_CLEAR("%0", "r6", "%2")
- "lock %0, @%2; \n\t"
- "addi %0, #1; \n\t"
- "unlock %0, @%2; \n\t"
- "mvtc %1, psw; \n\t"
- : "=&r" (tmp0), "=&r" (tmp1)
- : "r" (&rw->lock)
- : "memory"
-#ifdef CONFIG_CHIP_M32700_TS1
- , "r6"
-#endif /* CONFIG_CHIP_M32700_TS1 */
- );
-}
-
-static inline void arch_write_unlock(arch_rwlock_t *rw)
-{
- unsigned long tmp0, tmp1, tmp2;
-
- __asm__ __volatile__ (
- "# write_unlock \n\t"
- "seth %1, #high(" RW_LOCK_BIAS_STR "); \n\t"
- "or3 %1, %1, #low(" RW_LOCK_BIAS_STR "); \n\t"
- "mvfc %2, psw; \n\t"
- "clrpsw #0x40 -> nop; \n\t"
- DCACHE_CLEAR("%0", "r7", "%3")
- "lock %0, @%3; \n\t"
- "add %0, %1; \n\t"
- "unlock %0, @%3; \n\t"
- "mvtc %2, psw; \n\t"
- : "=&r" (tmp0), "=&r" (tmp1), "=&r" (tmp2)
- : "r" (&rw->lock)
- : "memory"
-#ifdef CONFIG_CHIP_M32700_TS1
- , "r7"
-#endif /* CONFIG_CHIP_M32700_TS1 */
- );
-}
-
-static inline int arch_read_trylock(arch_rwlock_t *lock)
-{
- atomic_t *count = (atomic_t*)lock;
- if (atomic_dec_return(count) >= 0)
- return 1;
- atomic_inc(count);
- return 0;
-}
-
-static inline int arch_write_trylock(arch_rwlock_t *lock)
-{
- atomic_t *count = (atomic_t *)lock;
- if (atomic_sub_and_test(RW_LOCK_BIAS, count))
- return 1;
- atomic_add(RW_LOCK_BIAS, count);
- return 0;
-}
-
-#endif /* _ASM_M32R_SPINLOCK_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_M32R_SPINLOCK_TYPES_H
-#define _ASM_M32R_SPINLOCK_TYPES_H
-
-#ifndef __LINUX_SPINLOCK_TYPES_H
-# error "please don't include this file directly"
-#endif
-
-typedef struct {
- volatile int slock;
-} arch_spinlock_t;
-
-#define __ARCH_SPIN_LOCK_UNLOCKED { 1 }
-
-typedef struct {
- volatile int lock;
-} arch_rwlock_t;
-
-#define RW_LOCK_BIAS 0x01000000
-#define RW_LOCK_BIAS_STR "0x01000000"
-
-#define __ARCH_RW_LOCK_UNLOCKED { RW_LOCK_BIAS }
-
-#endif /* _ASM_M32R_SPINLOCK_TYPES_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_M32R_STRING_H
-#define _ASM_M32R_STRING_H
-
-#define __HAVE_ARCH_STRLEN
-extern size_t strlen(const char * s);
-
-#define __HAVE_ARCH_MEMCPY
-extern void *memcpy(void *__to, __const__ void *__from, size_t __n);
-
-#define __HAVE_ARCH_MEMSET
-extern void *memset(void *__s, int __c, size_t __count);
-
-#endif /* _ASM_M32R_STRING_H */
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2001 Hiroyuki Kondo, Hirokazu Takata, and Hitoshi Yamamoto
- * Copyright (C) 2004, 2006 Hirokazu Takata <takata at linux-m32r.org>
- */
-#ifndef _ASM_M32R_SWITCH_TO_H
-#define _ASM_M32R_SWITCH_TO_H
-
-/*
- * switch_to(prev, next) should switch from task `prev' to `next'
- * `prev' will never be the same as `next'.
- *
- * `next' and `prev' should be struct task_struct, but it isn't always defined
- */
-
-#if defined(CONFIG_FRAME_POINTER) || \
- !defined(CONFIG_SCHED_OMIT_FRAME_POINTER)
-#define M32R_PUSH_FP " push fp\n"
-#define M32R_POP_FP " pop fp\n"
-#else
-#define M32R_PUSH_FP ""
-#define M32R_POP_FP ""
-#endif
-
-#define switch_to(prev, next, last) do { \
- __asm__ __volatile__ ( \
- " seth lr, #high(1f) \n" \
- " or3 lr, lr, #low(1f) \n" \
- " st lr, @%4 ; store old LR \n" \
- " ld lr, @%5 ; load new LR \n" \
- M32R_PUSH_FP \
- " st sp, @%2 ; store old SP \n" \
- " ld sp, @%3 ; load new SP \n" \
- " push %1 ; store `prev' on new stack \n" \
- " jmp lr \n" \
- " .fillinsn \n" \
- "1: \n" \
- " pop %0 ; restore `__last' from new stack \n" \
- M32R_POP_FP \
- : "=r" (last) \
- : "0" (prev), \
- "r" (&(prev->thread.sp)), "r" (&(next->thread.sp)), \
- "r" (&(prev->thread.lr)), "r" (&(next->thread.lr)) \
- : "memory", "lr" \
- ); \
-} while(0)
-
-#endif /* _ASM_M32R_SWITCH_TO_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_M32R_SYSCALL_H
-#define _ASM_M32R_SYSCALL_H
-
-/* Definitions for the system call vector. */
-#define SYSCALL_VECTOR "2"
-#define SYSCALL_VECTOR_ADDRESS "0xa0"
-
-#endif /* _ASM_M32R_SYSCALL_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _M32R_TERMIOS_H
-#define _M32R_TERMIOS_H
-
-#include <linux/module.h>
-#include <uapi/asm/termios.h>
-
-/* intr=^C quit=^\ erase=del kill=^U
- eof=^D vtime=\0 vmin=\1 sxtc=\0
- start=^Q stop=^S susp=^Z eol=\0
- reprint=^R discard=^U werase=^W lnext=^V
- eol2=\0
-*/
-#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0"
-
-/*
- * Translate a "termio" structure into a "termios". Ugh.
- */
-#define SET_LOW_TERMIOS_BITS(termios, termio, x) { \
- unsigned short __tmp; \
- get_user(__tmp,&(termio)->x); \
- *(unsigned short *) &(termios)->x = __tmp; \
-}
-
-#define user_termio_to_kernel_termios(termios, termio) \
-({ \
- SET_LOW_TERMIOS_BITS(termios, termio, c_iflag); \
- SET_LOW_TERMIOS_BITS(termios, termio, c_oflag); \
- SET_LOW_TERMIOS_BITS(termios, termio, c_cflag); \
- SET_LOW_TERMIOS_BITS(termios, termio, c_lflag); \
- copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \
-})
-
-/*
- * Translate a "termios" structure into a "termio". Ugh.
- */
-#define kernel_termios_to_user_termio(termio, termios) \
-({ \
- put_user((termios)->c_iflag, &(termio)->c_iflag); \
- put_user((termios)->c_oflag, &(termio)->c_oflag); \
- put_user((termios)->c_cflag, &(termio)->c_cflag); \
- put_user((termios)->c_lflag, &(termio)->c_lflag); \
- put_user((termios)->c_line, &(termio)->c_line); \
- copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \
-})
-
-#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios2))
-#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios2))
-#define user_termios_to_kernel_termios_1(k, u) copy_from_user(k, u, sizeof(struct termios))
-#define kernel_termios_to_user_termios_1(u, k) copy_to_user(u, k, sizeof(struct termios))
-
-#endif /* _M32R_TERMIOS_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_M32R_THREAD_INFO_H
-#define _ASM_M32R_THREAD_INFO_H
-
-/* thread_info.h: m32r low-level thread information
- *
- * Copyright (C) 2002 David Howells (dhowells@redhat.com)
- * - Incorporating suggestions made by Linus Torvalds and Dave Miller
- * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org>
- */
-
-#ifdef __KERNEL__
-
-#ifndef __ASSEMBLY__
-#include <asm/processor.h>
-#endif
-
-/*
- * low level task data that entry.S needs immediate access to
- * - this struct should fit entirely inside of one cache line
- * - this struct shares the supervisor stack pages
- * - if the contents of this structure are changed, the assembly constants must also be changed
- */
-#ifndef __ASSEMBLY__
-
-struct thread_info {
- struct task_struct *task; /* main task structure */
- unsigned long flags; /* low level flags */
- unsigned long status; /* thread-synchronous flags */
- __u32 cpu; /* current CPU */
- int preempt_count; /* 0 => preemptable, <0 => BUG */
-
- mm_segment_t addr_limit; /* thread address space:
- 0-0xBFFFFFFF for user-thread
- 0-0xFFFFFFFF for kernel-thread
- */
-
- __u8 supervisor_stack[0];
-};
-
-#endif /* !__ASSEMBLY__ */
-
-#define THREAD_SIZE (PAGE_SIZE << 1)
-#define THREAD_SIZE_ORDER 1
-/*
- * macros/functions for gaining access to the thread information structure
- */
-#ifndef __ASSEMBLY__
-
-#define INIT_THREAD_INFO(tsk) \
-{ \
- .task = &tsk, \
- .flags = 0, \
- .cpu = 0, \
- .preempt_count = INIT_PREEMPT_COUNT, \
- .addr_limit = KERNEL_DS, \
-}
-
-/* how to get the thread information struct from C */
-static inline struct thread_info *current_thread_info(void)
-{
- struct thread_info *ti;
-
- __asm__ __volatile__ (
- "ldi %0, #%1 \n\t"
- "and %0, sp \n\t"
- : "=r" (ti) : "i" (~(THREAD_SIZE - 1))
- );
-
- return ti;
-}
-
-#define TI_FLAG_FAULT_CODE_SHIFT 28
-
-static inline void set_thread_fault_code(unsigned int val)
-{
- struct thread_info *ti = current_thread_info();
- ti->flags = (ti->flags & (~0 >> (32 - TI_FLAG_FAULT_CODE_SHIFT)))
- | (val << TI_FLAG_FAULT_CODE_SHIFT);
-}
-
-static inline unsigned int get_thread_fault_code(void)
-{
- struct thread_info *ti = current_thread_info();
- return ti->flags >> TI_FLAG_FAULT_CODE_SHIFT;
-}
-
-#endif
-
-/*
- * thread information flags
- * - these are process state flags that various assembly files may need to access
- * - pending work-to-be-done flags are in LSW
- * - other flags in MSW
- */
-#define TIF_SYSCALL_TRACE 0 /* syscall trace active */
-#define TIF_SIGPENDING 1 /* signal pending */
-#define TIF_NEED_RESCHED 2 /* rescheduling necessary */
-#define TIF_SINGLESTEP 3 /* restore singlestep on return to user mode */
-#define TIF_NOTIFY_RESUME 5 /* callback before returning to user */
-#define TIF_RESTORE_SIGMASK 8 /* restore signal mask in do_signal() */
-#define TIF_USEDFPU 16 /* FPU was used by this task this quantum (SMP) */
-#define TIF_MEMDIE 18 /* is terminating due to OOM killer */
-
-#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
-#define _TIF_SIGPENDING (1<<TIF_SIGPENDING)
-#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
-#define _TIF_SINGLESTEP (1<<TIF_SINGLESTEP)
-#define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME)
-#define _TIF_USEDFPU (1<<TIF_USEDFPU)
-
-#define _TIF_WORK_MASK (_TIF_SIGPENDING | _TIF_NEED_RESCHED | _TIF_NOTIFY_RESUME)
-#define _TIF_ALLWORK_MASK (_TIF_WORK_MASK | _TIF_SYSCALL_TRACE)
-
-/*
- * Thread-synchronous status.
- *
- * This is different from the flags in that nobody else
- * ever touches our thread-synchronous status, so we don't
- * have to worry about atomic accesses.
- */
-#define TS_USEDFPU 0x0001 /* FPU was used by this task this quantum (SMP) */
-
-#endif /* __KERNEL__ */
-
-#endif /* _ASM_M32R_THREAD_INFO_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_M32R_TIMEX_H
-#define _ASM_M32R_TIMEX_H
-
-/*
- * linux/include/asm-m32r/timex.h
- *
- * m32r architecture timex specifications
- */
-
-#define CLOCK_TICK_RATE (CONFIG_BUS_CLOCK / CONFIG_TIMER_DIVIDE)
-#define CLOCK_TICK_FACTOR 20 /* Factor of both 1000000 and CLOCK_TICK_RATE */
-
-#ifdef __KERNEL__
-/*
- * Standard way to access the cycle counter.
- * Currently only used on SMP.
- */
-
-typedef unsigned long long cycles_t;
-
-static __inline__ cycles_t get_cycles (void)
-{
- return 0;
-}
-#endif /* __KERNEL__ */
-
-#endif /* _ASM_M32R_TIMEX_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _M32R_TLB_H
-#define _M32R_TLB_H
-
-/*
- * x86 doesn't need any special per-pte or
- * per-vma handling..
- */
-#define tlb_start_vma(tlb, vma) do { } while (0)
-#define tlb_end_vma(tlb, vma) do { } while (0)
-#define __tlb_remove_tlb_entry(tlb, pte, address) do { } while (0)
-
-/*
- * .. because we flush the whole mm when it
- * fills up.
- */
-#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
-
-#include <asm-generic/tlb.h>
-
-#endif /* _M32R_TLB_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_M32R_TLBFLUSH_H
-#define _ASM_M32R_TLBFLUSH_H
-
-#include <asm/m32r.h>
-
-/*
- * TLB flushing:
- *
- * - flush_tlb() flushes the current mm struct TLBs
- * - flush_tlb_all() flushes all processes TLBs
- * - flush_tlb_mm(mm) flushes the specified mm context TLB's
- * - flush_tlb_page(vma, vmaddr) flushes one page
- * - flush_tlb_range(vma, start, end) flushes a range of pages
- * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
- */
-
-extern void local_flush_tlb_all(void);
-extern void local_flush_tlb_mm(struct mm_struct *);
-extern void local_flush_tlb_page(struct vm_area_struct *, unsigned long);
-extern void local_flush_tlb_range(struct vm_area_struct *, unsigned long,
- unsigned long);
-
-#ifndef CONFIG_SMP
-#ifdef CONFIG_MMU
-#define flush_tlb_all() local_flush_tlb_all()
-#define flush_tlb_mm(mm) local_flush_tlb_mm(mm)
-#define flush_tlb_page(vma, page) local_flush_tlb_page(vma, page)
-#define flush_tlb_range(vma, start, end) \
- local_flush_tlb_range(vma, start, end)
-#define flush_tlb_kernel_range(start, end) local_flush_tlb_all()
-#else /* CONFIG_MMU */
-#define flush_tlb_all() do { } while (0)
-#define flush_tlb_mm(mm) do { } while (0)
-#define flush_tlb_page(vma, vmaddr) do { } while (0)
-#define flush_tlb_range(vma, start, end) do { } while (0)
-#endif /* CONFIG_MMU */
-#else /* CONFIG_SMP */
-extern void smp_flush_tlb_all(void);
-extern void smp_flush_tlb_mm(struct mm_struct *);
-extern void smp_flush_tlb_page(struct vm_area_struct *, unsigned long);
-extern void smp_flush_tlb_range(struct vm_area_struct *, unsigned long,
- unsigned long);
-
-#define flush_tlb_all() smp_flush_tlb_all()
-#define flush_tlb_mm(mm) smp_flush_tlb_mm(mm)
-#define flush_tlb_page(vma, page) smp_flush_tlb_page(vma, page)
-#define flush_tlb_range(vma, start, end) \
- smp_flush_tlb_range(vma, start, end)
-#define flush_tlb_kernel_range(start, end) smp_flush_tlb_all()
-#endif /* CONFIG_SMP */
-
-static __inline__ void __flush_tlb_page(unsigned long page)
-{
- unsigned int tmpreg0, tmpreg1, tmpreg2;
-
- __asm__ __volatile__ (
- "seth %0, #high(%4) \n\t"
- "st %3, @(%5, %0) \n\t"
- "ldi %1, #1 \n\t"
- "st %1, @(%6, %0) \n\t"
- "add3 %1, %0, %7 \n\t"
- ".fillinsn \n"
- "1: \n\t"
- "ld %2, @(%6, %0) \n\t"
- "bnez %2, 1b \n\t"
- "ld %0, @%1+ \n\t"
- "ld %1, @%1 \n\t"
- "st %2, @+%0 \n\t"
- "st %2, @+%1 \n\t"
- : "=&r" (tmpreg0), "=&r" (tmpreg1), "=&r" (tmpreg2)
- : "r" (page), "i" (MMU_REG_BASE), "i" (MSVA_offset),
- "i" (MTOP_offset), "i" (MIDXI_offset)
- : "memory"
- );
-}
-
-static __inline__ void __flush_tlb_all(void)
-{
- unsigned int tmpreg0, tmpreg1;
-
- __asm__ __volatile__ (
- "seth %0, #high(%2) \n\t"
- "or3 %0, %0, #low(%2) \n\t"
- "ldi %1, #0xc \n\t"
- "st %1, @%0 \n\t"
- ".fillinsn \n"
- "1: \n\t"
- "ld %1, @%0 \n\t"
- "bnez %1, 1b \n\t"
- : "=&r" (tmpreg0), "=&r" (tmpreg1)
- : "i" (MTOP) : "memory"
- );
-}
-
-extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t *);
-
-#endif /* _ASM_M32R_TLBFLUSH_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_M32R_TOPOLOGY_H
-#define _ASM_M32R_TOPOLOGY_H
-
-#include <asm-generic/topology.h>
-
-#endif /* _ASM_M32R_TOPOLOGY_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_M32R_TYPES_H
-#define _ASM_M32R_TYPES_H
-
-#include <uapi/asm/types.h>
-
-/*
- * These aren't exported outside the kernel to avoid name space clashes
- */
-
-#define BITS_PER_LONG 32
-
-#endif /* _ASM_M32R_TYPES_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_M32R_UACCESS_H
-#define _ASM_M32R_UACCESS_H
-
-/*
- * linux/include/asm-m32r/uaccess.h
- *
- * M32R version.
- * Copyright (C) 2004, 2006 Hirokazu Takata <takata at linux-m32r.org>
- */
-
-/*
- * User space memory access functions
- */
-#include <asm/page.h>
-#include <asm/setup.h>
-#include <linux/prefetch.h>
-
-/*
- * The fs value determines whether argument validity checking should be
- * performed or not. If get_fs() == USER_DS, checking is performed, with
- * get_fs() == KERNEL_DS, checking is bypassed.
- *
- * For historical reasons, these macros are grossly misnamed.
- */
-
-#define MAKE_MM_SEG(s) ((mm_segment_t) { (s) })
-
-#ifdef CONFIG_MMU
-
-#define KERNEL_DS MAKE_MM_SEG(0xFFFFFFFF)
-#define USER_DS MAKE_MM_SEG(PAGE_OFFSET)
-#define get_ds() (KERNEL_DS)
-#define get_fs() (current_thread_info()->addr_limit)
-#define set_fs(x) (current_thread_info()->addr_limit = (x))
-
-#else /* not CONFIG_MMU */
-
-#define KERNEL_DS MAKE_MM_SEG(0xFFFFFFFF)
-#define USER_DS MAKE_MM_SEG(0xFFFFFFFF)
-#define get_ds() (KERNEL_DS)
-
-static inline mm_segment_t get_fs(void)
-{
- return USER_DS;
-}
-
-static inline void set_fs(mm_segment_t s)
-{
-}
-
-#endif /* not CONFIG_MMU */
-
-#define segment_eq(a, b) ((a).seg == (b).seg)
-
-#define __addr_ok(addr) \
- ((unsigned long)(addr) < (current_thread_info()->addr_limit.seg))
-
-/*
- * Test whether a block of memory is a valid user space address.
- * Returns 0 if the range is valid, nonzero otherwise.
- *
- * This is equivalent to the following test:
- * (u33)addr + (u33)size >= (u33)current->addr_limit.seg
- *
- * This needs 33-bit arithmetic. We have a carry...
- */
-#define __range_ok(addr, size) ({ \
- unsigned long flag, roksum; \
- __chk_user_ptr(addr); \
- asm ( \
- " cmpu %1, %1 ; clear cbit\n" \
- " addx %1, %3 ; set cbit if overflow\n" \
- " subx %0, %0\n" \
- " cmpu %4, %1\n" \
- " subx %0, %5\n" \
- : "=&r" (flag), "=r" (roksum) \
- : "1" (addr), "r" ((int)(size)), \
- "r" (current_thread_info()->addr_limit.seg), "r" (0) \
- : "cbit" ); \
- flag; })
-
-/**
- * access_ok: - Checks if a user space pointer is valid
- * @type: Type of access: %VERIFY_READ or %VERIFY_WRITE. Note that
- * %VERIFY_WRITE is a superset of %VERIFY_READ - if it is safe
- * to write to a block, it is always safe to read from it.
- * @addr: User space pointer to start of block to check
- * @size: Size of block to check
- *
- * Context: User context only. This function may sleep if pagefaults are
- * enabled.
- *
- * Checks if a pointer to a block of memory in user space is valid.
- *
- * Returns true (nonzero) if the memory block may be valid, false (zero)
- * if it is definitely invalid.
- *
- * Note that, depending on architecture, this function probably just
- * checks that the pointer is in the user space range - after calling
- * this function, memory access functions may still return -EFAULT.
- */
-#ifdef CONFIG_MMU
-#define access_ok(type, addr, size) (likely(__range_ok(addr, size) == 0))
-#else
-static inline int access_ok(int type, const void *addr, unsigned long size)
-{
- unsigned long val = (unsigned long)addr;
-
- return ((val >= memory_start) && ((val + size) < memory_end));
-}
-#endif /* CONFIG_MMU */
-
-#include <asm/extable.h>
-
-/*
- * These are the main single-value transfer routines. They automatically
- * use the right size if we just have the right pointer type.
- *
- * This gets kind of ugly. We want to return _two_ values in "get_user()"
- * and yet we don't want to do any pointers, because that is too much
- * of a performance impact. Thus we have a few rather ugly macros here,
- * and hide all the uglyness from the user.
- *
- * The "__xxx" versions of the user access functions are versions that
- * do not verify the address space, that must have been done previously
- * with a separate "access_ok()" call (this is used when we do multiple
- * accesses to the same area of user memory).
- */
-
-/* Careful: we have to cast the result to the type of the pointer for sign
- reasons */
-/**
- * get_user: - Get a simple variable from user space.
- * @x: Variable to store result.
- * @ptr: Source address, in user space.
- *
- * Context: User context only. This function may sleep if pagefaults are
- * enabled.
- *
- * This macro copies a single simple variable from user space to kernel
- * space. It supports simple types like char and int, but not larger
- * data types like structures or arrays.
- *
- * @ptr must have pointer-to-simple-variable type, and the result of
- * dereferencing @ptr must be assignable to @x without a cast.
- *
- * Returns zero on success, or -EFAULT on error.
- * On error, the variable @x is set to zero.
- */
-#define get_user(x, ptr) \
- __get_user_check((x), (ptr), sizeof(*(ptr)))
-
-/**
- * put_user: - Write a simple value into user space.
- * @x: Value to copy to user space.
- * @ptr: Destination address, in user space.
- *
- * Context: User context only. This function may sleep if pagefaults are
- * enabled.
- *
- * This macro copies a single simple value from kernel space to user
- * space. It supports simple types like char and int, but not larger
- * data types like structures or arrays.
- *
- * @ptr must have pointer-to-simple-variable type, and @x must be assignable
- * to the result of dereferencing @ptr.
- *
- * Returns zero on success, or -EFAULT on error.
- */
-#define put_user(x, ptr) \
- __put_user_check((__typeof__(*(ptr)))(x), (ptr), sizeof(*(ptr)))
-
-/**
- * __get_user: - Get a simple variable from user space, with less checking.
- * @x: Variable to store result.
- * @ptr: Source address, in user space.
- *
- * Context: User context only. This function may sleep if pagefaults are
- * enabled.
- *
- * This macro copies a single simple variable from user space to kernel
- * space. It supports simple types like char and int, but not larger
- * data types like structures or arrays.
- *
- * @ptr must have pointer-to-simple-variable type, and the result of
- * dereferencing @ptr must be assignable to @x without a cast.
- *
- * Caller must check the pointer with access_ok() before calling this
- * function.
- *
- * Returns zero on success, or -EFAULT on error.
- * On error, the variable @x is set to zero.
- */
-#define __get_user(x, ptr) \
- __get_user_nocheck((x), (ptr), sizeof(*(ptr)))
-
-#define __get_user_nocheck(x, ptr, size) \
-({ \
- long __gu_err = 0; \
- unsigned long __gu_val = 0; \
- might_fault(); \
- __get_user_size(__gu_val, (ptr), (size), __gu_err); \
- (x) = (__force __typeof__(*(ptr)))__gu_val; \
- __gu_err; \
-})
-
-#define __get_user_check(x, ptr, size) \
-({ \
- long __gu_err = -EFAULT; \
- unsigned long __gu_val = 0; \
- const __typeof__(*(ptr)) __user *__gu_addr = (ptr); \
- might_fault(); \
- if (access_ok(VERIFY_READ, __gu_addr, size)) \
- __get_user_size(__gu_val, __gu_addr, (size), __gu_err); \
- (x) = (__force __typeof__(*(ptr)))__gu_val; \
- __gu_err; \
-})
-
-extern long __get_user_bad(void);
-
-#define __get_user_size(x, ptr, size, retval) \
-do { \
- retval = 0; \
- __chk_user_ptr(ptr); \
- switch (size) { \
- case 1: __get_user_asm(x, ptr, retval, "ub"); break; \
- case 2: __get_user_asm(x, ptr, retval, "uh"); break; \
- case 4: __get_user_asm(x, ptr, retval, ""); break; \
- default: (x) = __get_user_bad(); \
- } \
-} while (0)
-
-#define __get_user_asm(x, addr, err, itype) \
- __asm__ __volatile__( \
- " .fillinsn\n" \
- "1: ld"itype" %1,@%2\n" \
- " .fillinsn\n" \
- "2:\n" \
- ".section .fixup,\"ax\"\n" \
- " .balign 4\n" \
- "3: ldi %0,%3\n" \
- " seth r14,#high(2b)\n" \
- " or3 r14,r14,#low(2b)\n" \
- " jmp r14\n" \
- ".previous\n" \
- ".section __ex_table,\"a\"\n" \
- " .balign 4\n" \
- " .long 1b,3b\n" \
- ".previous" \
- : "=&r" (err), "=&r" (x) \
- : "r" (addr), "i" (-EFAULT), "0" (err) \
- : "r14", "memory")
-
-/**
- * __put_user: - Write a simple value into user space, with less checking.
- * @x: Value to copy to user space.
- * @ptr: Destination address, in user space.
- *
- * Context: User context only. This function may sleep if pagefaults are
- * enabled.
- *
- * This macro copies a single simple value from kernel space to user
- * space. It supports simple types like char and int, but not larger
- * data types like structures or arrays.
- *
- * @ptr must have pointer-to-simple-variable type, and @x must be assignable
- * to the result of dereferencing @ptr.
- *
- * Caller must check the pointer with access_ok() before calling this
- * function.
- *
- * Returns zero on success, or -EFAULT on error.
- */
-#define __put_user(x, ptr) \
- __put_user_nocheck((__typeof__(*(ptr)))(x), (ptr), sizeof(*(ptr)))
-
-
-#define __put_user_nocheck(x, ptr, size) \
-({ \
- long __pu_err; \
- might_fault(); \
- __put_user_size((x), (ptr), (size), __pu_err); \
- __pu_err; \
-})
-
-
-#define __put_user_check(x, ptr, size) \
-({ \
- long __pu_err = -EFAULT; \
- __typeof__(*(ptr)) __user *__pu_addr = (ptr); \
- might_fault(); \
- if (access_ok(VERIFY_WRITE, __pu_addr, size)) \
- __put_user_size((x), __pu_addr, (size), __pu_err); \
- __pu_err; \
-})
-
-#if defined(__LITTLE_ENDIAN__)
-#define __put_user_u64(x, addr, err) \
- __asm__ __volatile__( \
- " .fillinsn\n" \
- "1: st %L1,@%2\n" \
- " .fillinsn\n" \
- "2: st %H1,@(4,%2)\n" \
- " .fillinsn\n" \
- "3:\n" \
- ".section .fixup,\"ax\"\n" \
- " .balign 4\n" \
- "4: ldi %0,%3\n" \
- " seth r14,#high(3b)\n" \
- " or3 r14,r14,#low(3b)\n" \
- " jmp r14\n" \
- ".previous\n" \
- ".section __ex_table,\"a\"\n" \
- " .balign 4\n" \
- " .long 1b,4b\n" \
- " .long 2b,4b\n" \
- ".previous" \
- : "=&r" (err) \
- : "r" (x), "r" (addr), "i" (-EFAULT), "0" (err) \
- : "r14", "memory")
-
-#elif defined(__BIG_ENDIAN__)
-#define __put_user_u64(x, addr, err) \
- __asm__ __volatile__( \
- " .fillinsn\n" \
- "1: st %H1,@%2\n" \
- " .fillinsn\n" \
- "2: st %L1,@(4,%2)\n" \
- " .fillinsn\n" \
- "3:\n" \
- ".section .fixup,\"ax\"\n" \
- " .balign 4\n" \
- "4: ldi %0,%3\n" \
- " seth r14,#high(3b)\n" \
- " or3 r14,r14,#low(3b)\n" \
- " jmp r14\n" \
- ".previous\n" \
- ".section __ex_table,\"a\"\n" \
- " .balign 4\n" \
- " .long 1b,4b\n" \
- " .long 2b,4b\n" \
- ".previous" \
- : "=&r" (err) \
- : "r" (x), "r" (addr), "i" (-EFAULT), "0" (err) \
- : "r14", "memory")
-#else
-#error no endian defined
-#endif
-
-extern void __put_user_bad(void);
-
-#define __put_user_size(x, ptr, size, retval) \
-do { \
- retval = 0; \
- __chk_user_ptr(ptr); \
- switch (size) { \
- case 1: __put_user_asm(x, ptr, retval, "b"); break; \
- case 2: __put_user_asm(x, ptr, retval, "h"); break; \
- case 4: __put_user_asm(x, ptr, retval, ""); break; \
- case 8: __put_user_u64((__typeof__(*ptr))(x), ptr, retval); break;\
- default: __put_user_bad(); \
- } \
-} while (0)
-
-struct __large_struct { unsigned long buf[100]; };
-#define __m(x) (*(struct __large_struct *)(x))
-
-/*
- * Tell gcc we read from memory instead of writing: this is because
- * we do not write to any memory gcc knows about, so there are no
- * aliasing issues.
- */
-#define __put_user_asm(x, addr, err, itype) \
- __asm__ __volatile__( \
- " .fillinsn\n" \
- "1: st"itype" %1,@%2\n" \
- " .fillinsn\n" \
- "2:\n" \
- ".section .fixup,\"ax\"\n" \
- " .balign 4\n" \
- "3: ldi %0,%3\n" \
- " seth r14,#high(2b)\n" \
- " or3 r14,r14,#low(2b)\n" \
- " jmp r14\n" \
- ".previous\n" \
- ".section __ex_table,\"a\"\n" \
- " .balign 4\n" \
- " .long 1b,3b\n" \
- ".previous" \
- : "=&r" (err) \
- : "r" (x), "r" (addr), "i" (-EFAULT), "0" (err) \
- : "r14", "memory")
-
-/*
- * Here we special-case 1, 2 and 4-byte copy_*_user invocations. On a fault
- * we return the initial request size (1, 2 or 4), as copy_*_user should do.
- * If a store crosses a page boundary and gets a fault, the m32r will not write
- * anything, so this is accurate.
- */
-
-/*
- * Copy To/From Userspace
- */
-
-/* Generic arbitrary sized copy. */
-/* Return the number of bytes NOT copied. */
-#define __copy_user(to, from, size) \
-do { \
- unsigned long __dst, __src, __c; \
- __asm__ __volatile__ ( \
- " mv r14, %0\n" \
- " or r14, %1\n" \
- " beq %0, %1, 9f\n" \
- " beqz %2, 9f\n" \
- " and3 r14, r14, #3\n" \
- " bnez r14, 2f\n" \
- " and3 %2, %2, #3\n" \
- " beqz %3, 2f\n" \
- " addi %0, #-4 ; word_copy \n" \
- " .fillinsn\n" \
- "0: ld r14, @%1+\n" \
- " addi %3, #-1\n" \
- " .fillinsn\n" \
- "1: st r14, @+%0\n" \
- " bnez %3, 0b\n" \
- " beqz %2, 9f\n" \
- " addi %0, #4\n" \
- " .fillinsn\n" \
- "2: ldb r14, @%1 ; byte_copy \n" \
- " .fillinsn\n" \
- "3: stb r14, @%0\n" \
- " addi %1, #1\n" \
- " addi %2, #-1\n" \
- " addi %0, #1\n" \
- " bnez %2, 2b\n" \
- " .fillinsn\n" \
- "9:\n" \
- ".section .fixup,\"ax\"\n" \
- " .balign 4\n" \
- "5: addi %3, #1\n" \
- " addi %1, #-4\n" \
- " .fillinsn\n" \
- "6: slli %3, #2\n" \
- " add %2, %3\n" \
- " addi %0, #4\n" \
- " .fillinsn\n" \
- "7: seth r14, #high(9b)\n" \
- " or3 r14, r14, #low(9b)\n" \
- " jmp r14\n" \
- ".previous\n" \
- ".section __ex_table,\"a\"\n" \
- " .balign 4\n" \
- " .long 0b,6b\n" \
- " .long 1b,5b\n" \
- " .long 2b,9b\n" \
- " .long 3b,9b\n" \
- ".previous\n" \
- : "=&r" (__dst), "=&r" (__src), "=&r" (size), \
- "=&r" (__c) \
- : "0" (to), "1" (from), "2" (size), "3" (size / 4) \
- : "r14", "memory"); \
-} while (0)
-
-/* We let the __ versions of copy_from/to_user inline, because they're often
- * used in fast paths and have only a small space overhead.
- */
-static inline unsigned long
-raw_copy_from_user(void *to, const void __user *from, unsigned long n)
-{
- prefetchw(to);
- __copy_user(to, from, n);
- return n;
-}
-
-static inline unsigned long
-raw_copy_to_user(void __user *to, const void *from, unsigned long n)
-{
- prefetch(from);
- __copy_user(to, from, n);
- return n;
-}
-
-long __must_check strncpy_from_user(char *dst, const char __user *src,
- long count);
-
-/**
- * __clear_user: - Zero a block of memory in user space, with less checking.
- * @to: Destination address, in user space.
- * @n: Number of bytes to zero.
- *
- * Zero a block of memory in user space. Caller must check
- * the specified block with access_ok() before calling this function.
- *
- * Returns number of bytes that could not be cleared.
- * On success, this will be zero.
- */
-unsigned long __clear_user(void __user *mem, unsigned long len);
-
-/**
- * clear_user: - Zero a block of memory in user space.
- * @to: Destination address, in user space.
- * @n: Number of bytes to zero.
- *
- * Zero a block of memory in user space. Caller must check
- * the specified block with access_ok() before calling this function.
- *
- * Returns number of bytes that could not be cleared.
- * On success, this will be zero.
- */
-unsigned long clear_user(void __user *mem, unsigned long len);
-
-long strnlen_user(const char __user *str, long n);
-
-#endif /* _ASM_M32R_UACCESS_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_M32R_UCONTEXT_H
-#define _ASM_M32R_UCONTEXT_H
-
-struct ucontext {
- unsigned long uc_flags;
- struct ucontext *uc_link;
- stack_t uc_stack;
- struct sigcontext uc_mcontext;
- sigset_t uc_sigmask; /* mask last for extensibility */
-};
-
-#endif /* _ASM_M32R_UCONTEXT_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_M32R_UNALIGNED_H
-#define _ASM_M32R_UNALIGNED_H
-
-#if defined(__LITTLE_ENDIAN__)
-# include <linux/unaligned/le_memmove.h>
-# include <linux/unaligned/be_byteshift.h>
-# include <linux/unaligned/generic.h>
-# define get_unaligned __get_unaligned_le
-# define put_unaligned __put_unaligned_le
-#else
-# include <linux/unaligned/be_memmove.h>
-# include <linux/unaligned/le_byteshift.h>
-# include <linux/unaligned/generic.h>
-# define get_unaligned __get_unaligned_be
-# define put_unaligned __put_unaligned_be
-#endif
-
-#endif /* _ASM_M32R_UNALIGNED_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_M32R_UNISTD_H
-#define _ASM_M32R_UNISTD_H
-
-#include <uapi/asm/unistd.h>
-
-
-#define NR_syscalls 326
-
-#define __ARCH_WANT_STAT64
-#define __ARCH_WANT_SYS_ALARM
-#define __ARCH_WANT_SYS_GETHOSTNAME
-#define __ARCH_WANT_SYS_IPC
-#define __ARCH_WANT_SYS_PAUSE
-#define __ARCH_WANT_SYS_TIME
-#define __ARCH_WANT_SYS_UTIME
-#define __ARCH_WANT_SYS_WAITPID
-#define __ARCH_WANT_SYS_SOCKETCALL
-#define __ARCH_WANT_SYS_FADVISE64
-#define __ARCH_WANT_SYS_GETPGRP
-#define __ARCH_WANT_SYS_LLSEEK
-#define __ARCH_WANT_SYS_OLDUMOUNT
-#define __ARCH_WANT_SYS_CLONE
-#define __ARCH_WANT_SYS_FORK
-#define __ARCH_WANT_SYS_VFORK
-
-#define __IGNORE_lchown
-#define __IGNORE_setuid
-#define __IGNORE_getuid
-#define __IGNORE_setgid
-#define __IGNORE_getgid
-#define __IGNORE_geteuid
-#define __IGNORE_getegid
-#define __IGNORE_fcntl
-#define __IGNORE_setreuid
-#define __IGNORE_setregid
-#define __IGNORE_getrlimit
-#define __IGNORE_getgroups
-#define __IGNORE_setgroups
-#define __IGNORE_select
-#define __IGNORE_mmap
-#define __IGNORE_fchown
-#define __IGNORE_setfsuid
-#define __IGNORE_setfsgid
-#define __IGNORE_setresuid
-#define __IGNORE_getresuid
-#define __IGNORE_setresgid
-#define __IGNORE_getresgid
-#define __IGNORE_chown
-
-#endif /* _ASM_M32R_UNISTD_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_M32R_USER_H
-#define _ASM_M32R_USER_H
-
-#include <linux/types.h>
-#include <asm/ptrace.h>
-#include <asm/page.h>
-
-/*
- * Core file format: The core file is written in such a way that gdb
- * can understand it and provide useful information to the user (under
- * linux we use the `trad-core' bfd).
- *
- * The actual file contents are as follows:
- * UPAGE: 1 page consisting of a user struct that tells gdb
- * what is present in the file. Directly after this is a
- * copy of the task_struct, which is currently not used by gdb,
- * but it may come in handy at some point. All of the registers
- * are stored as part of the upage. The upage should always be
- * only one page.
- * DATA: The data area is stored. We use current->end_text to
- * current->brk to pick up all of the user variables, plus any memory
- * that may have been sbrk'ed. No attempt is made to determine if a
- * page is demand-zero or if a page is totally unused, we just cover
- * the entire range. All of the addresses are rounded in such a way
- * that an integral number of pages is written.
- * STACK: We need the stack information in order to get a meaningful
- * backtrace. We need to write the data from usp to
- * current->start_stack, so we round each of these off in order to be
- * able to write an integer number of pages.
- */
-
-struct user {
- struct pt_regs regs; /* entire machine state */
- size_t u_tsize; /* text size (pages) */
- size_t u_dsize; /* data size (pages) */
- size_t u_ssize; /* stack size (pages) */
- unsigned long start_code; /* text starting address */
- unsigned long start_data; /* data starting address */
- unsigned long start_stack; /* stack starting address */
- long int signal; /* signal causing core dump */
- unsigned long u_ar0; /* help gdb find registers */
- unsigned long magic; /* identifies a core file */
- char u_comm[32]; /* user command name */
-};
-
-#define NBPG PAGE_SIZE
-#define UPAGES 1
-#define HOST_TEXT_START_ADDR (u.start_code)
-#define HOST_DATA_START_ADDR (u.start_data)
-#define HOST_STACK_END_ADDR (u.start_stack + u.u_ssize * NBPG)
-
-#endif /* _ASM_M32R_USER_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_M32R_VGA_H
-#define _ASM_M32R_VGA_H
-
-/*
- * Access to VGA videoram
- *
- * (c) 1998 Martin Mares <mj@ucw.cz>
- */
-
-/*
- * On the PC, we can just recalculate addresses and then
- * access the videoram directly without any black magic.
- */
-
-#define VGA_MAP_MEM(x,s) (unsigned long)phys_to_virt(x)
-
-#define vga_readb(x) (*(x))
-#define vga_writeb(x,y) (*(y) = (x))
-
-#endif /* _ASM_M32R_VGA_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _ASM_M32R_XOR_H
-#define _ASM_M32R_XOR_H
-
-#include <asm-generic/xor.h>
-
-#endif /* _ASM_M32R_XOR_H */
+++ /dev/null
-# UAPI Header export list
-include include/uapi/asm-generic/Kbuild.asm
-
-generic-y += bpf_perf_event.h
-generic-y += kvm_para.h
-generic-y += poll.h
-generic-y += siginfo.h
+++ /dev/null
-#ifndef _ASM_M32R__AUXVEC_H
-#define _ASM_M32R__AUXVEC_H
-
-#endif /* _ASM_M32R__AUXVEC_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
-#include <asm-generic/bitsperlong.h>
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
-#ifndef _ASM_M32R_BYTEORDER_H
-#define _ASM_M32R_BYTEORDER_H
-
-#if defined(__LITTLE_ENDIAN__)
-# include <linux/byteorder/little_endian.h>
-#else
-# include <linux/byteorder/big_endian.h>
-#endif
-
-#endif /* _ASM_M32R_BYTEORDER_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
-#ifndef _ASM_M32R_ERRNO_H
-#define _ASM_M32R_ERRNO_H
-
-#include <asm-generic/errno.h>
-
-#endif /* _ASM_M32R_ERRNO_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
-#include <asm-generic/fcntl.h>
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
-#include <asm-generic/ioctl.h>
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
-#ifndef __ARCH_M32R_IOCTLS_H__
-#define __ARCH_M32R_IOCTLS_H__
-
-#include <asm-generic/ioctls.h>
-
-#endif /* __ARCH_M32R_IOCTLS_H__ */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
-#include <asm-generic/ipcbuf.h>
+++ /dev/null
-#include <asm-generic/mman.h>
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
-#ifndef _ASM_M32R_MSGBUF_H
-#define _ASM_M32R_MSGBUF_H
-
-/*
- * The msqid64_ds structure for m32r architecture.
- * Note extra padding because this structure is passed back and forth
- * between kernel and user space.
- *
- * Pad space is left for:
- * - 64-bit time_t to solve y2038 problem
- * - 2 miscellaneous 32-bit values
- */
-
-struct msqid64_ds {
- struct ipc64_perm msg_perm;
- __kernel_time_t msg_stime; /* last msgsnd time */
- unsigned long __unused1;
- __kernel_time_t msg_rtime; /* last msgrcv time */
- unsigned long __unused2;
- __kernel_time_t msg_ctime; /* last change time */
- unsigned long __unused3;
- unsigned long msg_cbytes; /* current number of bytes on queue */
- unsigned long msg_qnum; /* number of messages in queue */
- unsigned long msg_qbytes; /* max number of bytes on queue */
- __kernel_pid_t msg_lspid; /* pid of last msgsnd */
- __kernel_pid_t msg_lrpid; /* last receive pid */
- unsigned long __unused4;
- unsigned long __unused5;
-};
-
-#endif /* _ASM_M32R_MSGBUF_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
-#ifndef _ASM_M32R_PARAM_H
-#define _ASM_M32R_PARAM_H
-
-#include <asm-generic/param.h>
-
-#endif /* _ASM_M32R_PARAM_H */
-
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
-#ifndef _ASM_M32R_POSIX_TYPES_H
-#define _ASM_M32R_POSIX_TYPES_H
-
-/*
- * This file is generally used by user-level software, so you need to
- * be a little careful about namespace pollution etc. Also, we cannot
- * assume GCC is being used.
- */
-
-typedef unsigned short __kernel_mode_t;
-#define __kernel_mode_t __kernel_mode_t
-
-typedef unsigned short __kernel_ipc_pid_t;
-#define __kernel_ipc_pid_t __kernel_ipc_pid_t
-
-typedef unsigned short __kernel_uid_t;
-typedef unsigned short __kernel_gid_t;
-#define __kernel_uid_t __kernel_uid_t
-
-typedef unsigned short __kernel_old_dev_t;
-#define __kernel_old_dev_t __kernel_old_dev_t
-
-#include <asm-generic/posix_types.h>
-
-#endif /* _ASM_M32R_POSIX_TYPES_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
-/*
- * linux/include/asm-m32r/ptrace.h
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * M32R version:
- * Copyright (C) 2001-2002, 2004 Hirokazu Takata <takata at linux-m32r.org>
- */
-#ifndef _UAPI_ASM_M32R_PTRACE_H
-#define _UAPI_ASM_M32R_PTRACE_H
-
-
-/* 0 - 13 are integer registers (general purpose registers). */
-#define PT_R4 0
-#define PT_R5 1
-#define PT_R6 2
-#define PT_REGS 3
-#define PT_R0 4
-#define PT_R1 5
-#define PT_R2 6
-#define PT_R3 7
-#define PT_R7 8
-#define PT_R8 9
-#define PT_R9 10
-#define PT_R10 11
-#define PT_R11 12
-#define PT_R12 13
-#define PT_SYSCNR 14
-#define PT_R13 PT_FP
-#define PT_R14 PT_LR
-#define PT_R15 PT_SP
-
-/* processor status and miscellaneous context registers. */
-#define PT_ACC0H 15
-#define PT_ACC0L 16
-#define PT_ACC1H 17 /* ISA_DSP_LEVEL2 only */
-#define PT_ACC1L 18 /* ISA_DSP_LEVEL2 only */
-#define PT_PSW 19
-#define PT_BPC 20
-#define PT_BBPSW 21
-#define PT_BBPC 22
-#define PT_SPU 23
-#define PT_FP 24
-#define PT_LR 25
-#define PT_SPI 26
-#define PT_ORIGR0 27
-
-/* virtual pt_reg entry for gdb */
-#define PT_PC 30
-#define PT_CBR 31
-#define PT_EVB 32
-
-
-/* Control registers. */
-#define SPR_CR0 PT_PSW
-#define SPR_CR1 PT_CBR /* read only */
-#define SPR_CR2 PT_SPI
-#define SPR_CR3 PT_SPU
-#define SPR_CR4
-#define SPR_CR5 PT_EVB /* part of M32R/E, M32R/I core only */
-#define SPR_CR6 PT_BPC
-#define SPR_CR7
-#define SPR_CR8 PT_BBPSW
-#define SPR_CR9
-#define SPR_CR10
-#define SPR_CR11
-#define SPR_CR12
-#define SPR_CR13 PT_WR
-#define SPR_CR14 PT_BBPC
-#define SPR_CR15
-
-/* this struct defines the way the registers are stored on the
- stack during a system call. */
-struct pt_regs {
- /* Saved main processor registers. */
- unsigned long r4;
- unsigned long r5;
- unsigned long r6;
- struct pt_regs *pt_regs;
- unsigned long r0;
- unsigned long r1;
- unsigned long r2;
- unsigned long r3;
- unsigned long r7;
- unsigned long r8;
- unsigned long r9;
- unsigned long r10;
- unsigned long r11;
- unsigned long r12;
- long syscall_nr;
-
- /* Saved main processor status and miscellaneous context registers. */
- unsigned long acc0h;
- unsigned long acc0l;
- unsigned long acc1h; /* ISA_DSP_LEVEL2 only */
- unsigned long acc1l; /* ISA_DSP_LEVEL2 only */
- unsigned long psw;
- unsigned long bpc; /* saved PC for TRAP syscalls */
- unsigned long bbpsw;
- unsigned long bbpc;
- unsigned long spu; /* saved user stack */
- unsigned long fp;
- unsigned long lr; /* saved PC for JL syscalls */
- unsigned long spi; /* saved kernel stack */
- unsigned long orig_r0;
-};
-
-/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
-#define PTRACE_GETREGS 12
-#define PTRACE_SETREGS 13
-
-#define PTRACE_OLDSETOPTIONS 21
-
-
-#endif /* _UAPI_ASM_M32R_PTRACE_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
-#ifndef _ASM_M32R_RESOURCE_H
-#define _ASM_M32R_RESOURCE_H
-
-#include <asm-generic/resource.h>
-
-#endif /* _ASM_M32R_RESOURCE_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
-#ifndef _ASM_M32R_SEMBUF_H
-#define _ASM_M32R_SEMBUF_H
-
-/*
- * The semid64_ds structure for m32r architecture.
- * Note extra padding because this structure is passed back and forth
- * between kernel and user space.
- *
- * Pad space is left for:
- * - 64-bit time_t to solve y2038 problem
- * - 2 miscellaneous 32-bit values
- */
-
-struct semid64_ds {
- struct ipc64_perm sem_perm; /* permissions .. see ipc.h */
- __kernel_time_t sem_otime; /* last semop time */
- unsigned long __unused1;
- __kernel_time_t sem_ctime; /* last change time */
- unsigned long __unused2;
- unsigned long sem_nsems; /* no. of semaphores in array */
- unsigned long __unused3;
- unsigned long __unused4;
-};
-
-#endif /* _ASM_M32R_SEMBUF_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
-#ifndef _UAPI_ASM_M32R_SETUP_H
-#define _UAPI_ASM_M32R_SETUP_H
-
-/*
- * This is set up by the setup-routine at boot-time
- */
-
-#define COMMAND_LINE_SIZE 512
-
-
-#endif /* _UAPI_ASM_M32R_SETUP_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
-#ifndef _ASM_M32R_SHMBUF_H
-#define _ASM_M32R_SHMBUF_H
-
-/*
- * The shmid64_ds structure for M32R architecture.
- * Note extra padding because this structure is passed back and forth
- * between kernel and user space.
- *
- * Pad space is left for:
- * - 64-bit time_t to solve y2038 problem
- * - 2 miscellaneous 32-bit values
- */
-
-struct shmid64_ds {
- struct ipc64_perm shm_perm; /* operation perms */
- size_t shm_segsz; /* size of segment (bytes) */
- __kernel_time_t shm_atime; /* last attach time */
- unsigned long __unused1;
- __kernel_time_t shm_dtime; /* last detach time */
- unsigned long __unused2;
- __kernel_time_t shm_ctime; /* last change time */
- unsigned long __unused3;
- __kernel_pid_t shm_cpid; /* pid of creator */
- __kernel_pid_t shm_lpid; /* pid of last operator */
- unsigned long shm_nattch; /* no. of current attaches */
- unsigned long __unused4;
- unsigned long __unused5;
-};
-
-struct shminfo64 {
- unsigned long shmmax;
- unsigned long shmmin;
- unsigned long shmmni;
- unsigned long shmseg;
- unsigned long shmall;
- unsigned long __unused1;
- unsigned long __unused2;
- unsigned long __unused3;
- unsigned long __unused4;
-};
-
-#endif /* _ASM_M32R_SHMBUF_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
-#ifndef _ASM_M32R_SIGCONTEXT_H
-#define _ASM_M32R_SIGCONTEXT_H
-
-struct sigcontext {
- /* CPU registers */
- /* Saved main processor registers. */
- unsigned long sc_r4;
- unsigned long sc_r5;
- unsigned long sc_r6;
- struct pt_regs *sc_pt_regs;
- unsigned long sc_r0;
- unsigned long sc_r1;
- unsigned long sc_r2;
- unsigned long sc_r3;
- unsigned long sc_r7;
- unsigned long sc_r8;
- unsigned long sc_r9;
- unsigned long sc_r10;
- unsigned long sc_r11;
- unsigned long sc_r12;
-
- /* Saved main processor status and miscellaneous context registers. */
- unsigned long sc_acc0h;
- unsigned long sc_acc0l;
- unsigned long sc_acc1h; /* ISA_DSP_LEVEL2 only */
- unsigned long sc_acc1l; /* ISA_DSP_LEVEL2 only */
- unsigned long sc_psw;
- unsigned long sc_bpc; /* saved PC for TRAP syscalls */
- unsigned long sc_bbpsw;
- unsigned long sc_bbpc;
- unsigned long sc_spu; /* saved user stack */
- unsigned long sc_fp;
- unsigned long sc_lr; /* saved PC for JL syscalls */
- unsigned long sc_spi; /* saved kernel stack */
-
- unsigned long oldmask;
-};
-
-#endif /* _ASM_M32R_SIGCONTEXT_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
-#ifndef _UAPI_ASM_M32R_SIGNAL_H
-#define _UAPI_ASM_M32R_SIGNAL_H
-
-#include <linux/types.h>
-#include <linux/time.h>
-#include <linux/compiler.h>
-
-/* Avoid too many header ordering problems. */
-struct siginfo;
-
-#ifndef __KERNEL__
-/* Here we must cater to libcs that poke about in kernel headers. */
-
-#define NSIG 32
-typedef unsigned long sigset_t;
-
-#endif /* __KERNEL__ */
-
-#define SIGHUP 1
-#define SIGINT 2
-#define SIGQUIT 3
-#define SIGILL 4
-#define SIGTRAP 5
-#define SIGABRT 6
-#define SIGIOT 6
-#define SIGBUS 7
-#define SIGFPE 8
-#define SIGKILL 9
-#define SIGUSR1 10
-#define SIGSEGV 11
-#define SIGUSR2 12
-#define SIGPIPE 13
-#define SIGALRM 14
-#define SIGTERM 15
-#define SIGSTKFLT 16
-#define SIGCHLD 17
-#define SIGCONT 18
-#define SIGSTOP 19
-#define SIGTSTP 20
-#define SIGTTIN 21
-#define SIGTTOU 22
-#define SIGURG 23
-#define SIGXCPU 24
-#define SIGXFSZ 25
-#define SIGVTALRM 26
-#define SIGPROF 27
-#define SIGWINCH 28
-#define SIGIO 29
-#define SIGPOLL SIGIO
-/*
-#define SIGLOST 29
-*/
-#define SIGPWR 30
-#define SIGSYS 31
-#define SIGUNUSED 31
-
-/* These should not be considered constants from userland. */
-#define SIGRTMIN 32
-#define SIGRTMAX _NSIG
-
-/*
- * SA_FLAGS values:
- *
- * SA_ONSTACK indicates that a registered stack_t will be used.
- * SA_RESTART flag to get restarting signals (which were the default long ago)
- * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
- * SA_RESETHAND clears the handler when the signal is delivered.
- * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
- * SA_NODEFER prevents the current signal from being masked in the handler.
- *
- * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
- * Unix names RESETHAND and NODEFER respectively.
- */
-#define SA_NOCLDSTOP 0x00000001u
-#define SA_NOCLDWAIT 0x00000002u
-#define SA_SIGINFO 0x00000004u
-#define SA_ONSTACK 0x08000000u
-#define SA_RESTART 0x10000000u
-#define SA_NODEFER 0x40000000u
-#define SA_RESETHAND 0x80000000u
-
-#define SA_NOMASK SA_NODEFER
-#define SA_ONESHOT SA_RESETHAND
-
-#define SA_RESTORER 0x04000000
-
-#define MINSIGSTKSZ 2048
-#define SIGSTKSZ 8192
-
-#include <asm-generic/signal-defs.h>
-
-#ifndef __KERNEL__
-/* Here we must cater to libcs that poke about in kernel headers. */
-
-struct sigaction {
- union {
- __sighandler_t _sa_handler;
- void (*_sa_sigaction)(int, struct siginfo *, void *);
- } _u;
- sigset_t sa_mask;
- unsigned long sa_flags;
- void (*sa_restorer)(void);
-};
-
-#define sa_handler _u._sa_handler
-#define sa_sigaction _u._sa_sigaction
-
-#endif /* __KERNEL__ */
-
-typedef struct sigaltstack {
- void __user *ss_sp;
- int ss_flags;
- size_t ss_size;
-} stack_t;
-
-
-#endif /* _UAPI_ASM_M32R_SIGNAL_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
-#ifndef _ASM_M32R_SOCKET_H
-#define _ASM_M32R_SOCKET_H
-
-#include <asm/sockios.h>
-
-/* For setsockoptions(2) */
-#define SOL_SOCKET 1
-
-#define SO_DEBUG 1
-#define SO_REUSEADDR 2
-#define SO_TYPE 3
-#define SO_ERROR 4
-#define SO_DONTROUTE 5
-#define SO_BROADCAST 6
-#define SO_SNDBUF 7
-#define SO_RCVBUF 8
-#define SO_SNDBUFFORCE 32
-#define SO_RCVBUFFORCE 33
-#define SO_KEEPALIVE 9
-#define SO_OOBINLINE 10
-#define SO_NO_CHECK 11
-#define SO_PRIORITY 12
-#define SO_LINGER 13
-#define SO_BSDCOMPAT 14
-#define SO_REUSEPORT 15
-#define SO_PASSCRED 16
-#define SO_PEERCRED 17
-#define SO_RCVLOWAT 18
-#define SO_SNDLOWAT 19
-#define SO_RCVTIMEO 20
-#define SO_SNDTIMEO 21
-
-/* Security levels - as per NRL IPv6 - don't actually do anything */
-#define SO_SECURITY_AUTHENTICATION 22
-#define SO_SECURITY_ENCRYPTION_TRANSPORT 23
-#define SO_SECURITY_ENCRYPTION_NETWORK 24
-
-#define SO_BINDTODEVICE 25
-
-/* Socket filtering */
-#define SO_ATTACH_FILTER 26
-#define SO_DETACH_FILTER 27
-#define SO_GET_FILTER SO_ATTACH_FILTER
-
-#define SO_PEERNAME 28
-#define SO_TIMESTAMP 29
-#define SCM_TIMESTAMP SO_TIMESTAMP
-
-#define SO_ACCEPTCONN 30
-
-#define SO_PEERSEC 31
-#define SO_PASSSEC 34
-#define SO_TIMESTAMPNS 35
-#define SCM_TIMESTAMPNS SO_TIMESTAMPNS
-
-#define SO_MARK 36
-
-#define SO_TIMESTAMPING 37
-#define SCM_TIMESTAMPING SO_TIMESTAMPING
-
-#define SO_PROTOCOL 38
-#define SO_DOMAIN 39
-
-#define SO_RXQ_OVFL 40
-
-#define SO_WIFI_STATUS 41
-#define SCM_WIFI_STATUS SO_WIFI_STATUS
-#define SO_PEEK_OFF 42
-
-/* Instruct lower device to use last 4-bytes of skb data as FCS */
-#define SO_NOFCS 43
-
-#define SO_LOCK_FILTER 44
-
-#define SO_SELECT_ERR_QUEUE 45
-
-#define SO_BUSY_POLL 46
-
-#define SO_MAX_PACING_RATE 47
-
-#define SO_BPF_EXTENSIONS 48
-
-#define SO_INCOMING_CPU 49
-
-#define SO_ATTACH_BPF 50
-#define SO_DETACH_BPF SO_DETACH_FILTER
-
-#define SO_ATTACH_REUSEPORT_CBPF 51
-#define SO_ATTACH_REUSEPORT_EBPF 52
-
-#define SO_CNX_ADVICE 53
-
-#define SCM_TIMESTAMPING_OPT_STATS 54
-
-#define SO_MEMINFO 55
-
-#define SO_INCOMING_NAPI_ID 56
-
-#define SO_COOKIE 57
-
-#define SCM_TIMESTAMPING_PKTINFO 58
-
-#define SO_PEERGROUPS 59
-
-#define SO_ZEROCOPY 60
-
-#endif /* _ASM_M32R_SOCKET_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
-#ifndef _ASM_M32R_SOCKIOS_H
-#define _ASM_M32R_SOCKIOS_H
-
-/* Socket-level I/O control calls. */
-#define FIOSETOWN 0x8901
-#define SIOCSPGRP 0x8902
-#define FIOGETOWN 0x8903
-#define SIOCGPGRP 0x8904
-#define SIOCATMARK 0x8905
-#define SIOCGSTAMP 0x8906 /* Get stamp (timeval) */
-#define SIOCGSTAMPNS 0x8907 /* Get stamp (timespec) */
-
-#endif /* _ASM_M32R_SOCKIOS_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
-#ifndef _ASM_M32R_STAT_H
-#define _ASM_M32R_STAT_H
-
-#include <asm/byteorder.h>
-
-struct __old_kernel_stat {
- unsigned short st_dev;
- unsigned short st_ino;
- unsigned short st_mode;
- unsigned short st_nlink;
- unsigned short st_uid;
- unsigned short st_gid;
- unsigned short st_rdev;
- unsigned long st_size;
- unsigned long st_atime;
- unsigned long st_mtime;
- unsigned long st_ctime;
-};
-
-#define STAT_HAVE_NSEC 1
-
-struct stat {
- unsigned short st_dev;
- unsigned short __pad1;
- unsigned long st_ino;
- unsigned short st_mode;
- unsigned short st_nlink;
- unsigned short st_uid;
- unsigned short st_gid;
- unsigned short st_rdev;
- unsigned short __pad2;
- unsigned long st_size;
- unsigned long st_blksize;
- unsigned long st_blocks;
- unsigned long st_atime;
- unsigned long st_atime_nsec;
- unsigned long st_mtime;
- unsigned long st_mtime_nsec;
- unsigned long st_ctime;
- unsigned long st_ctime_nsec;
- unsigned long __unused4;
- unsigned long __unused5;
-};
-
-/* This matches struct stat64 in glibc2.1, hence the absolutely
- * insane amounts of padding around dev_t's.
- */
-struct stat64 {
- unsigned long long st_dev;
- unsigned char __pad0[4];
-#define STAT64_HAS_BROKEN_ST_INO
- unsigned long __st_ino;
-
- unsigned int st_mode;
- unsigned int st_nlink;
-
- unsigned long st_uid;
- unsigned long st_gid;
-
- unsigned long long st_rdev;
- unsigned char __pad3[4];
-
- long long st_size;
- unsigned long st_blksize;
-
-#if defined(__BYTE_ORDER) ? __BYTE_ORDER == __BIG_ENDIAN : defined(__BIG_ENDIAN)
- unsigned long __pad4; /* future possible st_blocks high bits */
- unsigned long st_blocks; /* Number 512-byte blocks allocated. */
-#elif defined(__BYTE_ORDER) ? __BYTE_ORDER == __LITTLE_ENDIAN : defined(__LITTLE_ENDIAN)
- unsigned long st_blocks; /* Number 512-byte blocks allocated. */
- unsigned long __pad4; /* future possible st_blocks high bits */
-#else
-#error no endian defined
-#endif
- unsigned long st_atime;
- unsigned long st_atime_nsec;
-
- unsigned long st_mtime;
- unsigned long st_mtime_nsec;
-
- unsigned long st_ctime;
- unsigned long st_ctime_nsec;
-
- unsigned long long st_ino;
-};
-
-#endif /* _ASM_M32R_STAT_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
-#ifndef _ASM_M32R_STATFS_H
-#define _ASM_M32R_STATFS_H
-
-#include <asm-generic/statfs.h>
-
-#endif /* _ASM_M32R_STATFS_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
-#ifndef _ASM_M32R_SWAB_H
-#define _ASM_M32R_SWAB_H
-
-#include <linux/types.h>
-
-#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
-# define __SWAB_64_THRU_32__
-#endif
-
-#endif /* _ASM_M32R_SWAB_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
-#ifndef _ASM_M32R_TERMBITS_H
-#define _ASM_M32R_TERMBITS_H
-
-#include <linux/posix_types.h>
-
-typedef unsigned char cc_t;
-typedef unsigned int speed_t;
-typedef unsigned int tcflag_t;
-
-#define NCCS 19
-struct termios {
- tcflag_t c_iflag; /* input mode flags */
- tcflag_t c_oflag; /* output mode flags */
- tcflag_t c_cflag; /* control mode flags */
- tcflag_t c_lflag; /* local mode flags */
- cc_t c_line; /* line discipline */
- cc_t c_cc[NCCS]; /* control characters */
-};
-
-struct termios2 {
- tcflag_t c_iflag; /* input mode flags */
- tcflag_t c_oflag; /* output mode flags */
- tcflag_t c_cflag; /* control mode flags */
- tcflag_t c_lflag; /* local mode flags */
- cc_t c_line; /* line discipline */
- cc_t c_cc[NCCS]; /* control characters */
- speed_t c_ispeed; /* input speed */
- speed_t c_ospeed; /* output speed */
-};
-
-struct ktermios {
- tcflag_t c_iflag; /* input mode flags */
- tcflag_t c_oflag; /* output mode flags */
- tcflag_t c_cflag; /* control mode flags */
- tcflag_t c_lflag; /* local mode flags */
- cc_t c_line; /* line discipline */
- cc_t c_cc[NCCS]; /* control characters */
- speed_t c_ispeed; /* input speed */
- speed_t c_ospeed; /* output speed */
-};
-
-/* c_cc characters */
-#define VINTR 0
-#define VQUIT 1
-#define VERASE 2
-#define VKILL 3
-#define VEOF 4
-#define VTIME 5
-#define VMIN 6
-#define VSWTC 7
-#define VSTART 8
-#define VSTOP 9
-#define VSUSP 10
-#define VEOL 11
-#define VREPRINT 12
-#define VDISCARD 13
-#define VWERASE 14
-#define VLNEXT 15
-#define VEOL2 16
-
-/* c_iflag bits */
-#define IGNBRK 0000001
-#define BRKINT 0000002
-#define IGNPAR 0000004
-#define PARMRK 0000010
-#define INPCK 0000020
-#define ISTRIP 0000040
-#define INLCR 0000100
-#define IGNCR 0000200
-#define ICRNL 0000400
-#define IUCLC 0001000
-#define IXON 0002000
-#define IXANY 0004000
-#define IXOFF 0010000
-#define IMAXBEL 0020000
-#define IUTF8 0040000
-
-/* c_oflag bits */
-#define OPOST 0000001
-#define OLCUC 0000002
-#define ONLCR 0000004
-#define OCRNL 0000010
-#define ONOCR 0000020
-#define ONLRET 0000040
-#define OFILL 0000100
-#define OFDEL 0000200
-#define NLDLY 0000400
-#define NL0 0000000
-#define NL1 0000400
-#define CRDLY 0003000
-#define CR0 0000000
-#define CR1 0001000
-#define CR2 0002000
-#define CR3 0003000
-#define TABDLY 0014000
-#define TAB0 0000000
-#define TAB1 0004000
-#define TAB2 0010000
-#define TAB3 0014000
-#define XTABS 0014000
-#define BSDLY 0020000
-#define BS0 0000000
-#define BS1 0020000
-#define VTDLY 0040000
-#define VT0 0000000
-#define VT1 0040000
-#define FFDLY 0100000
-#define FF0 0000000
-#define FF1 0100000
-
-/* c_cflag bit meaning */
-#define CBAUD 0010017
-#define B0 0000000 /* hang up */
-#define B50 0000001
-#define B75 0000002
-#define B110 0000003
-#define B134 0000004
-#define B150 0000005
-#define B200 0000006
-#define B300 0000007
-#define B600 0000010
-#define B1200 0000011
-#define B1800 0000012
-#define B2400 0000013
-#define B4800 0000014
-#define B9600 0000015
-#define B19200 0000016
-#define B38400 0000017
-#define EXTA B19200
-#define EXTB B38400
-#define CSIZE 0000060
-#define CS5 0000000
-#define CS6 0000020
-#define CS7 0000040
-#define CS8 0000060
-#define CSTOPB 0000100
-#define CREAD 0000200
-#define PARENB 0000400
-#define PARODD 0001000
-#define HUPCL 0002000
-#define CLOCAL 0004000
-#define CBAUDEX 0010000
-#define BOTHER 0010000
-#define B57600 0010001
-#define B115200 0010002
-#define B230400 0010003
-#define B460800 0010004
-#define B500000 0010005
-#define B576000 0010006
-#define B921600 0010007
-#define B1000000 0010010
-#define B1152000 0010011
-#define B1500000 0010012
-#define B2000000 0010013
-#define B2500000 0010014
-#define B3000000 0010015
-#define B3500000 0010016
-#define B4000000 0010017
-#define CIBAUD 002003600000 /** input baud rate */
-#define CTVB 004000000000 /* VisioBraille Terminal flow control */
-#define CMSPAR 010000000000 /* mark or space (stick) parity */
-#define CRTSCTS 020000000000 /* flow control */
-
-#define IBSHIFT 16 /* Shift from CBAUD to CIBAUD */
-
-/* c_lflag bits */
-#define ISIG 0000001
-#define ICANON 0000002
-#define XCASE 0000004
-#define ECHO 0000010
-#define ECHOE 0000020
-#define ECHOK 0000040
-#define ECHONL 0000100
-#define NOFLSH 0000200
-#define TOSTOP 0000400
-#define ECHOCTL 0001000
-#define ECHOPRT 0002000
-#define ECHOKE 0004000
-#define FLUSHO 0010000
-#define PENDIN 0040000
-#define IEXTEN 0100000
-#define EXTPROC 0200000
-
-/* tcflow() and TCXONC use these */
-#define TCOOFF 0
-#define TCOON 1
-#define TCIOFF 2
-#define TCION 3
-
-/* tcflush() and TCFLSH use these */
-#define TCIFLUSH 0
-#define TCOFLUSH 1
-#define TCIOFLUSH 2
-
-/* tcsetattr uses these */
-#define TCSANOW 0
-#define TCSADRAIN 1
-#define TCSAFLUSH 2
-
-#endif /* _ASM_M32R_TERMBITS_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
-#ifndef _UAPI_M32R_TERMIOS_H
-#define _UAPI_M32R_TERMIOS_H
-
-#include <asm/termbits.h>
-#include <asm/ioctls.h>
-
-struct winsize {
- unsigned short ws_row;
- unsigned short ws_col;
- unsigned short ws_xpixel;
- unsigned short ws_ypixel;
-};
-
-#define NCC 8
-struct termio {
- unsigned short c_iflag; /* input mode flags */
- unsigned short c_oflag; /* output mode flags */
- unsigned short c_cflag; /* control mode flags */
- unsigned short c_lflag; /* local mode flags */
- unsigned char c_line; /* line discipline */
- unsigned char c_cc[NCC]; /* control characters */
-};
-
-/* modem lines */
-#define TIOCM_LE 0x001
-#define TIOCM_DTR 0x002
-#define TIOCM_RTS 0x004
-#define TIOCM_ST 0x008
-#define TIOCM_SR 0x010
-#define TIOCM_CTS 0x020
-#define TIOCM_CAR 0x040
-#define TIOCM_RNG 0x080
-#define TIOCM_DSR 0x100
-#define TIOCM_CD TIOCM_CAR
-#define TIOCM_RI TIOCM_RNG
-#define TIOCM_OUT1 0x2000
-#define TIOCM_OUT2 0x4000
-#define TIOCM_LOOP 0x8000
-
-/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
-
-
-#endif /* _UAPI_M32R_TERMIOS_H */
+++ /dev/null
-#include <asm-generic/int-ll64.h>
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
-#ifndef _UAPI_ASM_M32R_UNISTD_H
-#define _UAPI_ASM_M32R_UNISTD_H
-
-/*
- * This file contains the system call numbers.
- */
-
-#define __NR_restart_syscall 0
-#define __NR_exit 1
-#define __NR_fork 2
-#define __NR_read 3
-#define __NR_write 4
-#define __NR_open 5
-#define __NR_close 6
-#define __NR_waitpid 7
-#define __NR_creat 8
-#define __NR_link 9
-#define __NR_unlink 10
-#define __NR_execve 11
-#define __NR_chdir 12
-#define __NR_time 13
-#define __NR_mknod 14
-#define __NR_chmod 15
-/* 16 is unused */
-/* 17 is unused */
-/* 18 is unused */
-#define __NR_lseek 19
-#define __NR_getpid 20
-#define __NR_mount 21
-#define __NR_umount 22
-/* 23 is unused */
-/* 24 is unused */
-#define __NR_stime 25
-#define __NR_ptrace 26
-#define __NR_alarm 27
-/* 28 is unused */
-#define __NR_pause 29
-#define __NR_utime 30
-/* 31 is unused */
-#define __NR_cachectl 32 /* old #define __NR_gtty 32*/
-#define __NR_access 33
-/* 34 is unused */
-/* 35 is unused */
-#define __NR_sync 36
-#define __NR_kill 37
-#define __NR_rename 38
-#define __NR_mkdir 39
-#define __NR_rmdir 40
-#define __NR_dup 41
-#define __NR_pipe 42
-#define __NR_times 43
-/* 44 is unused */
-#define __NR_brk 45
-/* 46 is unused */
-/* 47 is unused (getgid16) */
-/* 48 is unused */
-/* 49 is unused */
-/* 50 is unused */
-#define __NR_acct 51
-#define __NR_umount2 52
-/* 53 is unused */
-#define __NR_ioctl 54
-/* 55 is unused (fcntl) */
-/* 56 is unused */
-#define __NR_setpgid 57
-/* 58 is unused */
-/* 59 is unused */
-#define __NR_umask 60
-#define __NR_chroot 61
-#define __NR_ustat 62
-#define __NR_dup2 63
-#define __NR_getppid 64
-#define __NR_getpgrp 65
-#define __NR_setsid 66
-/* 67 is unused */
-/* 68 is unused*/
-/* 69 is unused*/
-/* 70 is unused */
-/* 71 is unused */
-/* 72 is unused */
-/* 73 is unused */
-#define __NR_sethostname 74
-#define __NR_setrlimit 75
-/* 76 is unused (old getrlimit) */
-#define __NR_getrusage 77
-#define __NR_gettimeofday 78
-#define __NR_settimeofday 79
-/* 80 is unused */
-/* 81 is unused */
-/* 82 is unused */
-#define __NR_symlink 83
-/* 84 is unused */
-#define __NR_readlink 85
-#define __NR_uselib 86
-#define __NR_swapon 87
-#define __NR_reboot 88
-/* 89 is unused */
-/* 90 is unused */
-#define __NR_munmap 91
-#define __NR_truncate 92
-#define __NR_ftruncate 93
-#define __NR_fchmod 94
-/* 95 is unused */
-#define __NR_getpriority 96
-#define __NR_setpriority 97
-/* 98 is unused */
-#define __NR_statfs 99
-#define __NR_fstatfs 100
-/* 101 is unused */
-#define __NR_socketcall 102
-#define __NR_syslog 103
-#define __NR_setitimer 104
-#define __NR_getitimer 105
-#define __NR_stat 106
-#define __NR_lstat 107
-#define __NR_fstat 108
-/* 109 is unused */
-/* 110 is unused */
-#define __NR_vhangup 111
-/* 112 is unused */
-/* 113 is unused */
-#define __NR_wait4 114
-#define __NR_swapoff 115
-#define __NR_sysinfo 116
-#define __NR_ipc 117
-#define __NR_fsync 118
-/* 119 is unused */
-#define __NR_clone 120
-#define __NR_setdomainname 121
-#define __NR_uname 122
-/* 123 is unused */
-#define __NR_adjtimex 124
-#define __NR_mprotect 125
-/* 126 is unused */
-/* 127 is unused */
-#define __NR_init_module 128
-#define __NR_delete_module 129
-/* 130 is unused */
-#define __NR_quotactl 131
-#define __NR_getpgid 132
-#define __NR_fchdir 133
-#define __NR_bdflush 134
-#define __NR_sysfs 135
-#define __NR_personality 136
-/* 137 is unused */
-/* 138 is unused */
-/* 139 is unused */
-#define __NR__llseek 140
-#define __NR_getdents 141
-#define __NR__newselect 142
-#define __NR_flock 143
-#define __NR_msync 144
-#define __NR_readv 145
-#define __NR_writev 146
-#define __NR_getsid 147
-#define __NR_fdatasync 148
-#define __NR__sysctl 149
-#define __NR_mlock 150
-#define __NR_munlock 151
-#define __NR_mlockall 152
-#define __NR_munlockall 153
-#define __NR_sched_setparam 154
-#define __NR_sched_getparam 155
-#define __NR_sched_setscheduler 156
-#define __NR_sched_getscheduler 157
-#define __NR_sched_yield 158
-#define __NR_sched_get_priority_max 159
-#define __NR_sched_get_priority_min 160
-#define __NR_sched_rr_get_interval 161
-#define __NR_nanosleep 162
-#define __NR_mremap 163
-/* 164 is unused */
-/* 165 is unused */
-#define __NR_tas 166
-/* 167 is unused */
-#define __NR_poll 168
-#define __NR_nfsservctl 169
-/* 170 is unused */
-/* 171 is unused */
-#define __NR_prctl 172
-#define __NR_rt_sigreturn 173
-#define __NR_rt_sigaction 174
-#define __NR_rt_sigprocmask 175
-#define __NR_rt_sigpending 176
-#define __NR_rt_sigtimedwait 177
-#define __NR_rt_sigqueueinfo 178
-#define __NR_rt_sigsuspend 179
-#define __NR_pread64 180
-#define __NR_pwrite64 181
-/* 182 is unused */
-#define __NR_getcwd 183
-#define __NR_capget 184
-#define __NR_capset 185
-#define __NR_sigaltstack 186
-#define __NR_sendfile 187
-/* 188 is unused */
-/* 189 is unused */
-#define __NR_vfork 190
-#define __NR_ugetrlimit 191 /* SuS compliant getrlimit */
-#define __NR_mmap2 192
-#define __NR_truncate64 193
-#define __NR_ftruncate64 194
-#define __NR_stat64 195
-#define __NR_lstat64 196
-#define __NR_fstat64 197
-#define __NR_lchown32 198
-#define __NR_getuid32 199
-#define __NR_getgid32 200
-#define __NR_geteuid32 201
-#define __NR_getegid32 202
-#define __NR_setreuid32 203
-#define __NR_setregid32 204
-#define __NR_getgroups32 205
-#define __NR_setgroups32 206
-#define __NR_fchown32 207
-#define __NR_setresuid32 208
-#define __NR_getresuid32 209
-#define __NR_setresgid32 210
-#define __NR_getresgid32 211
-#define __NR_chown32 212
-#define __NR_setuid32 213
-#define __NR_setgid32 214
-#define __NR_setfsuid32 215
-#define __NR_setfsgid32 216
-#define __NR_pivot_root 217
-#define __NR_mincore 218
-#define __NR_madvise 219
-#define __NR_getdents64 220
-#define __NR_fcntl64 221
-/* 222 is unused */
-/* 223 is unused */
-#define __NR_gettid 224
-#define __NR_readahead 225
-#define __NR_setxattr 226
-#define __NR_lsetxattr 227
-#define __NR_fsetxattr 228
-#define __NR_getxattr 229
-#define __NR_lgetxattr 230
-#define __NR_fgetxattr 231
-#define __NR_listxattr 232
-#define __NR_llistxattr 233
-#define __NR_flistxattr 234
-#define __NR_removexattr 235
-#define __NR_lremovexattr 236
-#define __NR_fremovexattr 237
-#define __NR_tkill 238
-#define __NR_sendfile64 239
-#define __NR_futex 240
-#define __NR_sched_setaffinity 241
-#define __NR_sched_getaffinity 242
-#define __NR_set_thread_area 243
-#define __NR_get_thread_area 244
-#define __NR_io_setup 245
-#define __NR_io_destroy 246
-#define __NR_io_getevents 247
-#define __NR_io_submit 248
-#define __NR_io_cancel 249
-#define __NR_fadvise64 250
-/* 251 is unused */
-#define __NR_exit_group 252
-#define __NR_lookup_dcookie 253
-#define __NR_epoll_create 254
-#define __NR_epoll_ctl 255
-#define __NR_epoll_wait 256
-#define __NR_remap_file_pages 257
-#define __NR_set_tid_address 258
-#define __NR_timer_create 259
-#define __NR_timer_settime (__NR_timer_create+1)
-#define __NR_timer_gettime (__NR_timer_create+2)
-#define __NR_timer_getoverrun (__NR_timer_create+3)
-#define __NR_timer_delete (__NR_timer_create+4)
-#define __NR_clock_settime (__NR_timer_create+5)
-#define __NR_clock_gettime (__NR_timer_create+6)
-#define __NR_clock_getres (__NR_timer_create+7)
-#define __NR_clock_nanosleep (__NR_timer_create+8)
-#define __NR_statfs64 268
-#define __NR_fstatfs64 269
-#define __NR_tgkill 270
-#define __NR_utimes 271
-#define __NR_fadvise64_64 272
-#define __NR_vserver 273
-#define __NR_mbind 274
-#define __NR_get_mempolicy 275
-#define __NR_set_mempolicy 276
-#define __NR_mq_open 277
-#define __NR_mq_unlink (__NR_mq_open+1)
-#define __NR_mq_timedsend (__NR_mq_open+2)
-#define __NR_mq_timedreceive (__NR_mq_open+3)
-#define __NR_mq_notify (__NR_mq_open+4)
-#define __NR_mq_getsetattr (__NR_mq_open+5)
-#define __NR_kexec_load 283
-#define __NR_waitid 284
-/* 285 is unused */
-#define __NR_add_key 286
-#define __NR_request_key 287
-#define __NR_keyctl 288
-#define __NR_ioprio_set 289
-#define __NR_ioprio_get 290
-#define __NR_inotify_init 291
-#define __NR_inotify_add_watch 292
-#define __NR_inotify_rm_watch 293
-#define __NR_migrate_pages 294
-#define __NR_openat 295
-#define __NR_mkdirat 296
-#define __NR_mknodat 297
-#define __NR_fchownat 298
-#define __NR_futimesat 299
-#define __NR_fstatat64 300
-#define __NR_unlinkat 301
-#define __NR_renameat 302
-#define __NR_linkat 303
-#define __NR_symlinkat 304
-#define __NR_readlinkat 305
-#define __NR_fchmodat 306
-#define __NR_faccessat 307
-#define __NR_pselect6 308
-#define __NR_ppoll 309
-#define __NR_unshare 310
-#define __NR_set_robust_list 311
-#define __NR_get_robust_list 312
-#define __NR_splice 313
-#define __NR_sync_file_range 314
-#define __NR_tee 315
-#define __NR_vmsplice 316
-#define __NR_move_pages 317
-#define __NR_getcpu 318
-#define __NR_epoll_pwait 319
-#define __NR_utimensat 320
-#define __NR_signalfd 321
-/* #define __NR_timerfd 322 removed */
-#define __NR_eventfd 323
-#define __NR_fallocate 324
-#define __NR_setns 325
-
-#endif /* _UAPI_ASM_M32R_UNISTD_H */
+++ /dev/null
-vmlinux.lds
+++ /dev/null
-# SPDX-License-Identifier: GPL-2.0
-#
-# Makefile for the Linux/M32R kernel.
-#
-
-extra-y := head.o vmlinux.lds
-
-obj-y := process.o entry.o traps.o align.o irq.o setup.o time.o \
- m32r_ksyms.o sys_m32r.o signal.o ptrace.o
-
-obj-$(CONFIG_SMP) += smp.o smpboot.o
-obj-$(CONFIG_MODULES) += module.o
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0
-/*
- * align.c - address exception handler for M32R
- *
- * Copyright (c) 2003 Hitoshi Yamamoto
- */
-
-#include <asm/ptrace.h>
-#include <linux/uaccess.h>
-
-static int get_reg(struct pt_regs *regs, int nr)
-{
- int val;
-
- if (nr < 4)
- val = *(unsigned long *)(®s->r0 + nr);
- else if (nr < 7)
- val = *(unsigned long *)(®s->r4 + (nr - 4));
- else if (nr < 13)
- val = *(unsigned long *)(®s->r7 + (nr - 7));
- else
- val = *(unsigned long *)(®s->fp + (nr - 13));
-
- return val;
-}
-
-static void set_reg(struct pt_regs *regs, int nr, int val)
-{
- if (nr < 4)
- *(unsigned long *)(®s->r0 + nr) = val;
- else if (nr < 7)
- *(unsigned long *)(®s->r4 + (nr - 4)) = val;
- else if (nr < 13)
- *(unsigned long *)(®s->r7 + (nr - 7)) = val;
- else
- *(unsigned long *)(®s->fp + (nr - 13)) = val;
-}
-
-#define REG1(insn) (((insn) & 0x0f00) >> 8)
-#define REG2(insn) ((insn) & 0x000f)
-#define PSW_BC 0x100
-
-/* O- instruction */
-#define ISA_LD1 0x20c0 /* ld Rdest, @Rsrc */
-#define ISA_LD2 0x20e0 /* ld Rdest, @Rsrc+ */
-#define ISA_LDH 0x20a0 /* ldh Rdest, @Rsrc */
-#define ISA_LDUH 0x20b0 /* lduh Rdest, @Rsrc */
-#define ISA_ST1 0x2040 /* st Rsrc1, @Rsrc2 */
-#define ISA_ST2 0x2060 /* st Rsrc1, @+Rsrc2 */
-#define ISA_ST3 0x2070 /* st Rsrc1, @-Rsrc2 */
-#define ISA_STH1 0x2020 /* sth Rsrc1, @Rsrc2 */
-#define ISA_STH2 0x2030 /* sth Rsrc1, @Rsrc2+ */
-
-#ifdef CONFIG_ISA_DUAL_ISSUE
-
-/* OS instruction */
-#define ISA_ADD 0x00a0 /* add Rdest, Rsrc */
-#define ISA_ADDI 0x4000 /* addi Rdest, #imm8 */
-#define ISA_ADDX 0x0090 /* addx Rdest, Rsrc */
-#define ISA_AND 0x00c0 /* and Rdest, Rsrc */
-#define ISA_CMP 0x0040 /* cmp Rsrc1, Rsrc2 */
-#define ISA_CMPEQ 0x0060 /* cmpeq Rsrc1, Rsrc2 */
-#define ISA_CMPU 0x0050 /* cmpu Rsrc1, Rsrc2 */
-#define ISA_CMPZ 0x0070 /* cmpz Rsrc */
-#define ISA_LDI 0x6000 /* ldi Rdest, #imm8 */
-#define ISA_MV 0x1080 /* mv Rdest, Rsrc */
-#define ISA_NEG 0x0030 /* neg Rdest, Rsrc */
-#define ISA_NOP 0x7000 /* nop */
-#define ISA_NOT 0x00b0 /* not Rdest, Rsrc */
-#define ISA_OR 0x00e0 /* or Rdest, Rsrc */
-#define ISA_SUB 0x0020 /* sub Rdest, Rsrc */
-#define ISA_SUBX 0x0010 /* subx Rdest, Rsrc */
-#define ISA_XOR 0x00d0 /* xor Rdest, Rsrc */
-
-/* -S instruction */
-#define ISA_MUL 0x1060 /* mul Rdest, Rsrc */
-#define ISA_MULLO_A0 0x3010 /* mullo Rsrc1, Rsrc2, A0 */
-#define ISA_MULLO_A1 0x3090 /* mullo Rsrc1, Rsrc2, A1 */
-#define ISA_MVFACMI_A0 0x50f2 /* mvfacmi Rdest, A0 */
-#define ISA_MVFACMI_A1 0x50f6 /* mvfacmi Rdest, A1 */
-
-static int emu_addi(unsigned short insn, struct pt_regs *regs)
-{
- char imm = (char)(insn & 0xff);
- int dest = REG1(insn);
- int val;
-
- val = get_reg(regs, dest);
- val += imm;
- set_reg(regs, dest, val);
-
- return 0;
-}
-
-static int emu_ldi(unsigned short insn, struct pt_regs *regs)
-{
- char imm = (char)(insn & 0xff);
-
- set_reg(regs, REG1(insn), (int)imm);
-
- return 0;
-}
-
-static int emu_add(unsigned short insn, struct pt_regs *regs)
-{
- int dest = REG1(insn);
- int src = REG2(insn);
- int val;
-
- val = get_reg(regs, dest);
- val += get_reg(regs, src);
- set_reg(regs, dest, val);
-
- return 0;
-}
-
-static int emu_addx(unsigned short insn, struct pt_regs *regs)
-{
- int dest = REG1(insn);
- unsigned int val, tmp;
-
- val = regs->psw & PSW_BC ? 1 : 0;
- tmp = get_reg(regs, dest);
- val += tmp;
- val += (unsigned int)get_reg(regs, REG2(insn));
- set_reg(regs, dest, val);
-
- /* C bit set */
- if (val < tmp)
- regs->psw |= PSW_BC;
- else
- regs->psw &= ~(PSW_BC);
-
- return 0;
-}
-
-static int emu_and(unsigned short insn, struct pt_regs *regs)
-{
- int dest = REG1(insn);
- int val;
-
- val = get_reg(regs, dest);
- val &= get_reg(regs, REG2(insn));
- set_reg(regs, dest, val);
-
- return 0;
-}
-
-static int emu_cmp(unsigned short insn, struct pt_regs *regs)
-{
- if (get_reg(regs, REG1(insn)) < get_reg(regs, REG2(insn)))
- regs->psw |= PSW_BC;
- else
- regs->psw &= ~(PSW_BC);
-
- return 0;
-}
-
-static int emu_cmpeq(unsigned short insn, struct pt_regs *regs)
-{
- if (get_reg(regs, REG1(insn)) == get_reg(regs, REG2(insn)))
- regs->psw |= PSW_BC;
- else
- regs->psw &= ~(PSW_BC);
-
- return 0;
-}
-
-static int emu_cmpu(unsigned short insn, struct pt_regs *regs)
-{
- if ((unsigned int)get_reg(regs, REG1(insn))
- < (unsigned int)get_reg(regs, REG2(insn)))
- regs->psw |= PSW_BC;
- else
- regs->psw &= ~(PSW_BC);
-
- return 0;
-}
-
-static int emu_cmpz(unsigned short insn, struct pt_regs *regs)
-{
- if (!get_reg(regs, REG2(insn)))
- regs->psw |= PSW_BC;
- else
- regs->psw &= ~(PSW_BC);
-
- return 0;
-}
-
-static int emu_mv(unsigned short insn, struct pt_regs *regs)
-{
- int val;
-
- val = get_reg(regs, REG2(insn));
- set_reg(regs, REG1(insn), val);
-
- return 0;
-}
-
-static int emu_neg(unsigned short insn, struct pt_regs *regs)
-{
- int val;
-
- val = get_reg(regs, REG2(insn));
- set_reg(regs, REG1(insn), 0 - val);
-
- return 0;
-}
-
-static int emu_not(unsigned short insn, struct pt_regs *regs)
-{
- int val;
-
- val = get_reg(regs, REG2(insn));
- set_reg(regs, REG1(insn), ~val);
-
- return 0;
-}
-
-static int emu_or(unsigned short insn, struct pt_regs *regs)
-{
- int dest = REG1(insn);
- int val;
-
- val = get_reg(regs, dest);
- val |= get_reg(regs, REG2(insn));
- set_reg(regs, dest, val);
-
- return 0;
-}
-
-static int emu_sub(unsigned short insn, struct pt_regs *regs)
-{
- int dest = REG1(insn);
- int val;
-
- val = get_reg(regs, dest);
- val -= get_reg(regs, REG2(insn));
- set_reg(regs, dest, val);
-
- return 0;
-}
-
-static int emu_subx(unsigned short insn, struct pt_regs *regs)
-{
- int dest = REG1(insn);
- unsigned int val, tmp;
-
- val = tmp = get_reg(regs, dest);
- val -= (unsigned int)get_reg(regs, REG2(insn));
- val -= regs->psw & PSW_BC ? 1 : 0;
- set_reg(regs, dest, val);
-
- /* C bit set */
- if (val > tmp)
- regs->psw |= PSW_BC;
- else
- regs->psw &= ~(PSW_BC);
-
- return 0;
-}
-
-static int emu_xor(unsigned short insn, struct pt_regs *regs)
-{
- int dest = REG1(insn);
- unsigned int val;
-
- val = (unsigned int)get_reg(regs, dest);
- val ^= (unsigned int)get_reg(regs, REG2(insn));
- set_reg(regs, dest, val);
-
- return 0;
-}
-
-static int emu_mul(unsigned short insn, struct pt_regs *regs)
-{
- int dest = REG1(insn);
- int reg1, reg2;
-
- reg1 = get_reg(regs, dest);
- reg2 = get_reg(regs, REG2(insn));
-
- __asm__ __volatile__ (
- "mul %0, %1; \n\t"
- : "+r" (reg1) : "r" (reg2)
- );
-
- set_reg(regs, dest, reg1);
-
- return 0;
-}
-
-static int emu_mullo_a0(unsigned short insn, struct pt_regs *regs)
-{
- int reg1, reg2;
-
- reg1 = get_reg(regs, REG1(insn));
- reg2 = get_reg(regs, REG2(insn));
-
- __asm__ __volatile__ (
- "mullo %0, %1, a0; \n\t"
- "mvfachi %0, a0; \n\t"
- "mvfaclo %1, a0; \n\t"
- : "+r" (reg1), "+r" (reg2)
- );
-
- regs->acc0h = reg1;
- regs->acc0l = reg2;
-
- return 0;
-}
-
-static int emu_mullo_a1(unsigned short insn, struct pt_regs *regs)
-{
- int reg1, reg2;
-
- reg1 = get_reg(regs, REG1(insn));
- reg2 = get_reg(regs, REG2(insn));
-
- __asm__ __volatile__ (
- "mullo %0, %1, a0; \n\t"
- "mvfachi %0, a0; \n\t"
- "mvfaclo %1, a0; \n\t"
- : "+r" (reg1), "+r" (reg2)
- );
-
- regs->acc1h = reg1;
- regs->acc1l = reg2;
-
- return 0;
-}
-
-static int emu_mvfacmi_a0(unsigned short insn, struct pt_regs *regs)
-{
- unsigned long val;
-
- val = (regs->acc0h << 16) | (regs->acc0l >> 16);
- set_reg(regs, REG1(insn), (int)val);
-
- return 0;
-}
-
-static int emu_mvfacmi_a1(unsigned short insn, struct pt_regs *regs)
-{
- unsigned long val;
-
- val = (regs->acc1h << 16) | (regs->acc1l >> 16);
- set_reg(regs, REG1(insn), (int)val);
-
- return 0;
-}
-
-static int emu_m32r2(unsigned short insn, struct pt_regs *regs)
-{
- int res = -1;
-
- if ((insn & 0x7fff) == ISA_NOP) /* nop */
- return 0;
-
- switch(insn & 0x7000) {
- case ISA_ADDI: /* addi Rdest, #imm8 */
- res = emu_addi(insn, regs);
- break;
- case ISA_LDI: /* ldi Rdest, #imm8 */
- res = emu_ldi(insn, regs);
- break;
- default:
- break;
- }
-
- if (!res)
- return 0;
-
- switch(insn & 0x70f0) {
- case ISA_ADD: /* add Rdest, Rsrc */
- res = emu_add(insn, regs);
- break;
- case ISA_ADDX: /* addx Rdest, Rsrc */
- res = emu_addx(insn, regs);
- break;
- case ISA_AND: /* and Rdest, Rsrc */
- res = emu_and(insn, regs);
- break;
- case ISA_CMP: /* cmp Rsrc1, Rsrc2 */
- res = emu_cmp(insn, regs);
- break;
- case ISA_CMPEQ: /* cmpeq Rsrc1, Rsrc2 */
- res = emu_cmpeq(insn, regs);
- break;
- case ISA_CMPU: /* cmpu Rsrc1, Rsrc2 */
- res = emu_cmpu(insn, regs);
- break;
- case ISA_CMPZ: /* cmpz Rsrc */
- res = emu_cmpz(insn, regs);
- break;
- case ISA_MV: /* mv Rdest, Rsrc */
- res = emu_mv(insn, regs);
- break;
- case ISA_NEG: /* neg Rdest, Rsrc */
- res = emu_neg(insn, regs);
- break;
- case ISA_NOT: /* not Rdest, Rsrc */
- res = emu_not(insn, regs);
- break;
- case ISA_OR: /* or Rdest, Rsrc */
- res = emu_or(insn, regs);
- break;
- case ISA_SUB: /* sub Rdest, Rsrc */
- res = emu_sub(insn, regs);
- break;
- case ISA_SUBX: /* subx Rdest, Rsrc */
- res = emu_subx(insn, regs);
- break;
- case ISA_XOR: /* xor Rdest, Rsrc */
- res = emu_xor(insn, regs);
- break;
- case ISA_MUL: /* mul Rdest, Rsrc */
- res = emu_mul(insn, regs);
- break;
- case ISA_MULLO_A0: /* mullo Rsrc1, Rsrc2 */
- res = emu_mullo_a0(insn, regs);
- break;
- case ISA_MULLO_A1: /* mullo Rsrc1, Rsrc2 */
- res = emu_mullo_a1(insn, regs);
- break;
- default:
- break;
- }
-
- if (!res)
- return 0;
-
- switch(insn & 0x70ff) {
- case ISA_MVFACMI_A0: /* mvfacmi Rdest */
- res = emu_mvfacmi_a0(insn, regs);
- break;
- case ISA_MVFACMI_A1: /* mvfacmi Rdest */
- res = emu_mvfacmi_a1(insn, regs);
- break;
- default:
- break;
- }
-
- return res;
-}
-
-#endif /* CONFIG_ISA_DUAL_ISSUE */
-
-/*
- * ld : ?010 dest 1100 src
- * 0010 dest 1110 src : ld Rdest, @Rsrc+
- * ldh : ?010 dest 1010 src
- * lduh : ?010 dest 1011 src
- * st : ?010 src1 0100 src2
- * 0010 src1 0110 src2 : st Rsrc1, @+Rsrc2
- * 0010 src1 0111 src2 : st Rsrc1, @-Rsrc2
- * sth : ?010 src1 0010 src2
- */
-
-static int insn_check(unsigned long insn, struct pt_regs *regs,
- unsigned char **ucp)
-{
- int res = 0;
-
- /*
- * 32bit insn
- * ld Rdest, @(disp16, Rsrc)
- * st Rdest, @(disp16, Rsrc)
- */
- if (insn & 0x80000000) { /* 32bit insn */
- *ucp += (short)(insn & 0x0000ffff);
- regs->bpc += 4;
- } else { /* 16bit insn */
-#ifdef CONFIG_ISA_DUAL_ISSUE
- /* parallel exec check */
- if (!(regs->bpc & 0x2) && insn & 0x8000) {
- res = emu_m32r2((unsigned short)insn, regs);
- regs->bpc += 4;
- } else
-#endif /* CONFIG_ISA_DUAL_ISSUE */
- regs->bpc += 2;
- }
-
- return res;
-}
-
-static int emu_ld(unsigned long insn32, struct pt_regs *regs)
-{
- unsigned char *ucp;
- unsigned long val;
- unsigned short insn16;
- int size, src;
-
- insn16 = insn32 >> 16;
- src = REG2(insn16);
- ucp = (unsigned char *)get_reg(regs, src);
-
- if (insn_check(insn32, regs, &ucp))
- return -1;
-
- size = insn16 & 0x0040 ? 4 : 2;
- if (copy_from_user(&val, ucp, size))
- return -1;
-
- if (size == 2)
- val >>= 16;
-
- /* ldh sign check */
- if ((insn16 & 0x00f0) == 0x00a0 && (val & 0x8000))
- val |= 0xffff0000;
-
- set_reg(regs, REG1(insn16), val);
-
- /* ld increment check */
- if ((insn16 & 0xf0f0) == ISA_LD2) /* ld Rdest, @Rsrc+ */
- set_reg(regs, src, (unsigned long)(ucp + 4));
-
- return 0;
-}
-
-static int emu_st(unsigned long insn32, struct pt_regs *regs)
-{
- unsigned char *ucp;
- unsigned long val;
- unsigned short insn16;
- int size, src2;
-
- insn16 = insn32 >> 16;
- src2 = REG2(insn16);
-
- ucp = (unsigned char *)get_reg(regs, src2);
-
- if (insn_check(insn32, regs, &ucp))
- return -1;
-
- size = insn16 & 0x0040 ? 4 : 2;
- val = get_reg(regs, REG1(insn16));
- if (size == 2)
- val <<= 16;
-
- /* st inc/dec check */
- if ((insn16 & 0xf0e0) == 0x2060) {
- if (insn16 & 0x0010)
- ucp -= 4;
- else
- ucp += 4;
-
- set_reg(regs, src2, (unsigned long)ucp);
- }
-
- if (copy_to_user(ucp, &val, size))
- return -1;
-
- /* sth inc check */
- if ((insn16 & 0xf0f0) == ISA_STH2) {
- ucp += 2;
- set_reg(regs, src2, (unsigned long)ucp);
- }
-
- return 0;
-}
-
-int handle_unaligned_access(unsigned long insn32, struct pt_regs *regs)
-{
- unsigned short insn16;
- int res;
-
- insn16 = insn32 >> 16;
-
- /* ld or st check */
- if ((insn16 & 0x7000) != 0x2000)
- return -1;
-
- /* insn alignment check */
- if ((insn16 & 0x8000) && (regs->bpc & 3))
- return -1;
-
- if (insn16 & 0x0080) /* ld */
- res = emu_ld(insn32, regs);
- else /* st */
- res = emu_st(insn32, regs);
-
- return res;
-}
-
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0
-#include <linux/thread_info.h>
-#include <linux/kbuild.h>
-
-int foo(void)
-{
- OFFSET(TI_TASK, thread_info, task);
- OFFSET(TI_FLAGS, thread_info, flags);
- OFFSET(TI_STATUS, thread_info, status);
- OFFSET(TI_CPU, thread_info, cpu);
- OFFSET(TI_PRE_COUNT, thread_info, preempt_count);
- OFFSET(TI_ADDR_LIMIT, thread_info, addr_limit);
-
- return 0;
-}
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * linux/arch/m32r/kernel/entry.S
- *
- * Copyright (c) 2001, 2002 Hirokazu Takata, Hitoshi Yamamoto, H. Kondo
- * Copyright (c) 2003 Hitoshi Yamamoto
- * Copyright (c) 2004 Hirokazu Takata <takata at linux-m32r.org>
- *
- * Taken from i386 version.
- * Copyright (C) 1991, 1992 Linus Torvalds
- */
-
-/*
- * entry.S contains the system-call and fault low-level handling routines.
- * This also contains the timer-interrupt handler, as well as all interrupts
- * and faults that can result in a task-switch.
- *
- * NOTE: This code handles signal-recognition, which happens every time
- * after a timer-interrupt and after each system call.
- *
- * Stack layout in 'ret_from_system_call':
- * ptrace needs to have all regs on the stack.
- * if the order here is changed, it needs to be
- * updated in fork.c:copy_thread, signal.c:do_signal,
- * ptrace.c and ptrace.h
- *
- * M32R/M32Rx/M32R2
- * @(sp) - r4
- * @(0x04,sp) - r5
- * @(0x08,sp) - r6
- * @(0x0c,sp) - *pt_regs
- * @(0x10,sp) - r0
- * @(0x14,sp) - r1
- * @(0x18,sp) - r2
- * @(0x1c,sp) - r3
- * @(0x20,sp) - r7
- * @(0x24,sp) - r8
- * @(0x28,sp) - r9
- * @(0x2c,sp) - r10
- * @(0x30,sp) - r11
- * @(0x34,sp) - r12
- * @(0x38,sp) - syscall_nr
- * @(0x3c,sp) - acc0h
- * @(0x40,sp) - acc0l
- * @(0x44,sp) - acc1h ; ISA_DSP_LEVEL2 only
- * @(0x48,sp) - acc1l ; ISA_DSP_LEVEL2 only
- * @(0x4c,sp) - psw
- * @(0x50,sp) - bpc
- * @(0x54,sp) - bbpsw
- * @(0x58,sp) - bbpc
- * @(0x5c,sp) - spu (cr3)
- * @(0x60,sp) - fp (r13)
- * @(0x64,sp) - lr (r14)
- * @(0x68,sp) - spi (cr2)
- * @(0x6c,sp) - orig_r0
- */
-
-#include <linux/linkage.h>
-#include <asm/irq.h>
-#include <asm/unistd.h>
-#include <asm/assembler.h>
-#include <asm/thread_info.h>
-#include <asm/errno.h>
-#include <asm/segment.h>
-#include <asm/smp.h>
-#include <asm/page.h>
-#include <asm/m32r.h>
-#include <asm/mmu_context.h>
-#include <asm/asm-offsets.h>
-
-#if !defined(CONFIG_MMU)
-#define sys_madvise sys_ni_syscall
-#define sys_readahead sys_ni_syscall
-#define sys_mprotect sys_ni_syscall
-#define sys_msync sys_ni_syscall
-#define sys_mlock sys_ni_syscall
-#define sys_munlock sys_ni_syscall
-#define sys_mlockall sys_ni_syscall
-#define sys_munlockall sys_ni_syscall
-#define sys_mremap sys_ni_syscall
-#define sys_mincore sys_ni_syscall
-#define sys_remap_file_pages sys_ni_syscall
-#endif /* CONFIG_MMU */
-
-#define R4(reg) @reg
-#define R5(reg) @(0x04,reg)
-#define R6(reg) @(0x08,reg)
-#define PTREGS(reg) @(0x0C,reg)
-#define R0(reg) @(0x10,reg)
-#define R1(reg) @(0x14,reg)
-#define R2(reg) @(0x18,reg)
-#define R3(reg) @(0x1C,reg)
-#define R7(reg) @(0x20,reg)
-#define R8(reg) @(0x24,reg)
-#define R9(reg) @(0x28,reg)
-#define R10(reg) @(0x2C,reg)
-#define R11(reg) @(0x30,reg)
-#define R12(reg) @(0x34,reg)
-#define SYSCALL_NR(reg) @(0x38,reg)
-#define ACC0H(reg) @(0x3C,reg)
-#define ACC0L(reg) @(0x40,reg)
-#define ACC1H(reg) @(0x44,reg)
-#define ACC1L(reg) @(0x48,reg)
-#define PSW(reg) @(0x4C,reg)
-#define BPC(reg) @(0x50,reg)
-#define BBPSW(reg) @(0x54,reg)
-#define BBPC(reg) @(0x58,reg)
-#define SPU(reg) @(0x5C,reg)
-#define FP(reg) @(0x60,reg) /* FP = R13 */
-#define LR(reg) @(0x64,reg)
-#define SP(reg) @(0x68,reg)
-#define ORIG_R0(reg) @(0x6C,reg)
-
-#define nr_syscalls ((syscall_table_size)/4)
-
-#ifdef CONFIG_PREEMPT
-#define preempt_stop(x) DISABLE_INTERRUPTS(x)
-#else
-#define preempt_stop(x)
-#define resume_kernel restore_all
-#endif
-
-/* how to get the thread information struct from ASM */
-#define GET_THREAD_INFO(reg) GET_THREAD_INFO reg
- .macro GET_THREAD_INFO reg
- ldi \reg, #-THREAD_SIZE
- and \reg, sp
- .endm
-
-ENTRY(ret_from_kernel_thread)
- pop r0
- bl schedule_tail
- GET_THREAD_INFO(r8)
- ld r0, R0(r8)
- ld r1, R1(r8)
- jl r1
- bra syscall_exit
-
-ENTRY(ret_from_fork)
- pop r0
- bl schedule_tail
- GET_THREAD_INFO(r8)
- bra syscall_exit
-
-/*
- * Return to user mode is not as complex as all this looks,
- * but we want the default path for a system call return to
- * go as quickly as possible which is why some of this is
- * less clear than it otherwise should be.
- */
-
- ; userspace resumption stub bypassing syscall exit tracing
- ALIGN
-ret_from_exception:
- preempt_stop(r4)
-ret_from_intr:
- ld r4, PSW(sp)
-#ifdef CONFIG_ISA_M32R2
- and3 r4, r4, #0x8800 ; check BSM and BPM bits
-#else
- and3 r4, r4, #0x8000 ; check BSM bit
-#endif
- beqz r4, resume_kernel
-resume_userspace:
- DISABLE_INTERRUPTS(r4) ; make sure we don't miss an interrupt
- ; setting need_resched or sigpending
- ; between sampling and the iret
- GET_THREAD_INFO(r8)
- ld r9, @(TI_FLAGS, r8)
- and3 r4, r9, #_TIF_WORK_MASK ; is there any work to be done on
- ; int/exception return?
- bnez r4, work_pending
- bra restore_all
-
-#ifdef CONFIG_PREEMPT
-ENTRY(resume_kernel)
- GET_THREAD_INFO(r8)
- ld r9, @(TI_PRE_COUNT, r8) ; non-zero preempt_count ?
- bnez r9, restore_all
-need_resched:
- ld r9, @(TI_FLAGS, r8) ; need_resched set ?
- and3 r4, r9, #_TIF_NEED_RESCHED
- beqz r4, restore_all
- ld r4, PSW(sp) ; interrupts off (exception path) ?
- and3 r4, r4, #0x4000
- beqz r4, restore_all
- bl preempt_schedule_irq
- bra need_resched
-#endif
-
- ; system call handler stub
-ENTRY(system_call)
- SWITCH_TO_KERNEL_STACK
- SAVE_ALL
- ENABLE_INTERRUPTS(r4) ; Enable interrupt
- st sp, PTREGS(sp) ; implicit pt_regs parameter
- cmpui r7, #NR_syscalls
- bnc syscall_badsys
- st r7, SYSCALL_NR(sp) ; syscall_nr
- ; system call tracing in operation
- GET_THREAD_INFO(r8)
- ld r9, @(TI_FLAGS, r8)
- and3 r4, r9, #_TIF_SYSCALL_TRACE
- bnez r4, syscall_trace_entry
-syscall_call:
- slli r7, #2 ; table jump for the system call
- LDIMM (r4, sys_call_table)
- add r7, r4
- ld r7, @r7
- jl r7 ; execute system call
- st r0, R0(sp) ; save the return value
-syscall_exit:
- DISABLE_INTERRUPTS(r4) ; make sure we don't miss an interrupt
- ; setting need_resched or sigpending
- ; between sampling and the iret
- ld r9, @(TI_FLAGS, r8)
- and3 r4, r9, #_TIF_ALLWORK_MASK ; current->work
- bnez r4, syscall_exit_work
-restore_all:
- RESTORE_ALL
-
- # perform work that needs to be done immediately before resumption
- # r9 : flags
- ALIGN
-work_pending:
- and3 r4, r9, #_TIF_NEED_RESCHED
- beqz r4, work_notifysig
-work_resched:
- bl schedule
- DISABLE_INTERRUPTS(r4) ; make sure we don't miss an interrupt
- ; setting need_resched or sigpending
- ; between sampling and the iret
- ld r9, @(TI_FLAGS, r8)
- and3 r4, r9, #_TIF_WORK_MASK ; is there any work to be done other
- ; than syscall tracing?
- beqz r4, restore_all
- and3 r4, r4, #_TIF_NEED_RESCHED
- bnez r4, work_resched
-
-work_notifysig: ; deal with pending signals and
- ; notify-resume requests
- mv r0, sp ; arg1 : struct pt_regs *regs
- mv r1, r9 ; arg2 : __u32 thread_info_flags
- bl do_notify_resume
- bra resume_userspace
-
- ; perform syscall exit tracing
- ALIGN
-syscall_trace_entry:
- ldi r4, #-ENOSYS
- st r4, R0(sp)
- bl do_syscall_trace
- ld r0, ORIG_R0(sp)
- ld r1, R1(sp)
- ld r2, R2(sp)
- ld r3, R3(sp)
- ld r4, R4(sp)
- ld r5, R5(sp)
- ld r6, R6(sp)
- ld r7, SYSCALL_NR(sp)
- cmpui r7, #NR_syscalls
- bc syscall_call
- bra syscall_exit
-
- ; perform syscall exit tracing
- ALIGN
-syscall_exit_work:
- ld r9, @(TI_FLAGS, r8)
- and3 r4, r9, #_TIF_SYSCALL_TRACE
- beqz r4, work_pending
- ENABLE_INTERRUPTS(r4) ; could let do_syscall_trace() call
- ; schedule() instead
- bl do_syscall_trace
- bra resume_userspace
-
- ALIGN
-syscall_fault:
- SAVE_ALL
- GET_THREAD_INFO(r8)
- ldi r4, #-EFAULT
- st r4, R0(sp)
- bra resume_userspace
-
- ALIGN
-syscall_badsys:
- ldi r4, #-ENOSYS
- st r4, R0(sp)
- bra resume_userspace
-
- .global eit_vector
-
- .equ ei_vec_table, eit_vector + 0x0200
-
-/*
- * EI handler routine
- */
-ENTRY(ei_handler)
-#if defined(CONFIG_CHIP_M32700)
- ; WORKAROUND: force to clear SM bit and use the kernel stack (SPI).
- SWITCH_TO_KERNEL_STACK
-#endif
- SAVE_ALL
- mv r1, sp ; arg1(regs)
- ; get ICU status
- seth r0, #shigh(M32R_ICU_ISTS_ADDR)
- ld r0, @(low(M32R_ICU_ISTS_ADDR),r0)
- push r0
-#if defined(CONFIG_SMP)
- /*
- * If IRQ == 0 --> Nothing to do, Not write IMASK
- * If IRQ == IPI --> Do IPI handler, Not write IMASK
- * If IRQ != 0, IPI --> Do do_IRQ(), Write IMASK
- */
- slli r0, #4
- srli r0, #24 ; r0(irq_num<<2)
- ;; IRQ exist check
-#if defined(CONFIG_CHIP_M32700)
- /* WORKAROUND: IMASK bug M32700-TS1, TS2 chip. */
- bnez r0, 0f
- ld24 r14, #0x00070000
- seth r0, #shigh(M32R_ICU_IMASK_ADDR)
- st r14, @(low(M32R_ICU_IMASK_ADDR),r0)
- bra 1f
- .fillinsn
-0:
-#endif /* CONFIG_CHIP_M32700 */
- beqz r0, 1f ; if (!irq_num) goto exit
- ;; IPI check
- cmpi r0, #(M32R_IRQ_IPI0<<2) ; ISN < IPI0 check
- bc 2f
- cmpi r0, #((M32R_IRQ_IPI7+1)<<2) ; ISN > IPI7 check
- bnc 2f
- LDIMM (r2, ei_vec_table)
- add r2, r0
- ld r2, @r2
- beqz r2, 1f ; if (no IPI handler) goto exit
- mv r0, r1 ; arg0(regs)
- jl r2
- .fillinsn
-1:
- addi sp, #4
- bra restore_all
- .fillinsn
-2:
- srli r0, #2
-#else /* not CONFIG_SMP */
- srli r0, #22 ; r0(irq)
-#endif /* not CONFIG_SMP */
-
-#if defined(CONFIG_PLAT_HAS_INT1ICU)
- add3 r2, r0, #-(M32R_IRQ_INT1) ; INT1# interrupt
- bnez r2, 3f
- seth r0, #shigh(M32R_INT1ICU_ISTS)
- lduh r0, @(low(M32R_INT1ICU_ISTS),r0) ; bit10-6 : ISN
- slli r0, #21
- srli r0, #27 ; ISN
- addi r0, #(M32R_INT1ICU_IRQ_BASE)
- bra check_end
- .fillinsn
-3:
-#endif /* CONFIG_PLAT_HAS_INT1ICU */
-#if defined(CONFIG_PLAT_HAS_INT0ICU)
- add3 r2, r0, #-(M32R_IRQ_INT0) ; INT0# interrupt
- bnez r2, 4f
- seth r0, #shigh(M32R_INT0ICU_ISTS)
- lduh r0, @(low(M32R_INT0ICU_ISTS),r0) ; bit10-6 : ISN
- slli r0, #21
- srli r0, #27 ; ISN
- add3 r0, r0, #(M32R_INT0ICU_IRQ_BASE)
- bra check_end
- .fillinsn
-4:
-#endif /* CONFIG_PLAT_HAS_INT0ICU */
-#if defined(CONFIG_PLAT_HAS_INT2ICU)
- add3 r2, r0, #-(M32R_IRQ_INT2) ; INT2# interrupt
- bnez r2, 5f
- seth r0, #shigh(M32R_INT2ICU_ISTS)
- lduh r0, @(low(M32R_INT2ICU_ISTS),r0) ; bit10-6 : ISN
- slli r0, #21
- srli r0, #27 ; ISN
- add3 r0, r0, #(M32R_INT2ICU_IRQ_BASE)
- ; bra check_end
- .fillinsn
-5:
-#endif /* CONFIG_PLAT_HAS_INT2ICU */
-
-check_end:
- bl do_IRQ
- pop r14
- seth r0, #shigh(M32R_ICU_IMASK_ADDR)
- st r14, @(low(M32R_ICU_IMASK_ADDR),r0)
- bra ret_from_intr
-
-/*
- * Default EIT handler
- */
- ALIGN
-int_msg:
- .asciz "Unknown interrupt\n"
- .byte 0
-
-ENTRY(default_eit_handler)
- push r0
- mvfc r0, psw
- push r1
- push r2
- push r3
- push r0
- LDIMM (r0, __KERNEL_DS)
- mv r0, r1
- mv r0, r2
- LDIMM (r0, int_msg)
- bl printk
- pop r0
- pop r3
- pop r2
- pop r1
- mvtc r0, psw
- pop r0
-infinit:
- bra infinit
-
-#ifdef CONFIG_MMU
-/*
- * Access Exception handler
- */
-ENTRY(ace_handler)
- SWITCH_TO_KERNEL_STACK
- SAVE_ALL
-
- seth r2, #shigh(MMU_REG_BASE) /* Check status register */
- ld r4, @(low(MESTS_offset),r2)
- st r4, @(low(MESTS_offset),r2)
- srl3 r1, r4, #4
-#ifdef CONFIG_CHIP_M32700
- and3 r1, r1, #0x0000ffff
- ; WORKAROUND: ignore TME bit for the M32700(TS1).
-#endif /* CONFIG_CHIP_M32700 */
- beqz r1, inst
-oprand:
- ld r2, @(low(MDEVA_offset),r2) ; set address
- srli r1, #1
- bra 1f
-inst:
- and3 r1, r4, #2
- srli r1, #1
- or3 r1, r1, #8
- mvfc r2, bpc ; set address
- .fillinsn
-1:
- mvfc r3, psw
- mv r0, sp
- and3 r3, r3, 0x800
- srli r3, #9
- or r1, r3
- /*
- * do_page_fault():
- * r0 : struct pt_regs *regs
- * r1 : unsigned long error-code
- * r2 : unsigned long address
- * error-code:
- * +------+------+------+------+
- * | bit3 | bit2 | bit1 | bit0 |
- * +------+------+------+------+
- * bit 3 == 0:means data, 1:means instruction
- * bit 2 == 0:means kernel, 1:means user-mode
- * bit 1 == 0:means read, 1:means write
- * bit 0 == 0:means no page found 1:means protection fault
- *
- */
- bl do_page_fault
- bra ret_from_intr
-#endif /* CONFIG_MMU */
-
-
-ENTRY(alignment_check)
- /* void alignment_check(int error_code) */
- SWITCH_TO_KERNEL_STACK
- SAVE_ALL
- ldi r1, #0x30 ; error_code
- mv r0, sp ; pt_regs
- bl do_alignment_check
-error_code:
- bra ret_from_exception
-
-ENTRY(rie_handler)
- /* void rie_handler(int error_code) */
- SWITCH_TO_KERNEL_STACK
- SAVE_ALL
- ldi r1, #0x20 ; error_code
- mv r0, sp ; pt_regs
- bl do_rie_handler
- bra error_code
-
-ENTRY(pie_handler)
- /* void pie_handler(int error_code) */
- SWITCH_TO_KERNEL_STACK
- SAVE_ALL
- ldi r1, #0 ; error_code ; FIXME
- mv r0, sp ; pt_regs
- bl do_pie_handler
- bra error_code
-
-ENTRY(debug_trap)
- /* void debug_trap(void) */
- .global withdraw_debug_trap
- SWITCH_TO_KERNEL_STACK
- SAVE_ALL
- mv r0, sp ; pt_regs
- bl withdraw_debug_trap
- ldi r1, #0 ; error_code
- mv r0, sp ; pt_regs
- bl do_debug_trap
- bra error_code
-
-ENTRY(ill_trap)
- /* void ill_trap(void) */
- SWITCH_TO_KERNEL_STACK
- SAVE_ALL
- ldi r1, #0 ; error_code ; FIXME
- mv r0, sp ; pt_regs
- bl do_ill_trap
- bra error_code
-
-ENTRY(cache_flushing_handler)
- /* void _flush_cache_all(void); */
- .global _flush_cache_all
- SWITCH_TO_KERNEL_STACK
- push r0
- push r1
- push r2
- push r3
- push r4
- push r5
- push r6
- push r7
- push lr
- bl _flush_cache_all
- pop lr
- pop r7
- pop r6
- pop r5
- pop r4
- pop r3
- pop r2
- pop r1
- pop r0
- rte
-
- .section .rodata,"a"
-#include "syscall_table.S"
-
-syscall_table_size=(.-sys_call_table)
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * linux/arch/m32r/kernel/head.S
- *
- * M32R startup code.
- *
- * Copyright (c) 2001, 2002 Hiroyuki Kondo, Hirokazu Takata,
- * Hitoshi Yamamoto
- */
-
-#include <linux/init.h>
-__INIT
-__INITDATA
-
- .text
-#include <linux/linkage.h>
-#include <asm/segment.h>
-#include <asm/page.h>
-#include <asm/pgtable.h>
-#include <asm/assembler.h>
-#include <asm/m32r.h>
-#include <asm/mmu_context.h>
-
-/*
- * References to members of the boot_cpu_data structure.
- */
-__HEAD
- .global start_kernel
- .global __bss_start
- .global _end
-ENTRY(stext)
-ENTRY(_stext)
- /* Setup up the stack pointer */
- LDIMM (r0, spi_stack_top)
- LDIMM (r1, spu_stack_top)
- mvtc r0, spi
- mvtc r1, spu
-
- /* Initilalize PSW */
- ldi r0, #0x0000 /* use SPI, disable EI */
- mvtc r0, psw
-
- /* Set up the stack pointer */
- LDIMM (r0, stack_start)
- ld r0, @r0
- mvtc r0, spi
-
-/*
- * Clear BSS first so that there are no surprises...
- */
-#ifdef CONFIG_ISA_DUAL_ISSUE
-
- LDIMM (r2, __bss_start)
- LDIMM (r3, _end)
- sub r3, r2 ; BSS size in bytes
- ; R4 = BSS size in longwords (rounded down)
- mv r4, r3 || ldi r1, #0
- srli r4, #4 || addi r2, #-4
- beqz r4, .Lendloop1
-.Lloop1:
-#ifndef CONFIG_CHIP_M32310
- ; Touch memory for the no-write-allocating cache.
- ld r0, @(4,r2)
-#endif
- st r1, @+r2 || addi r4, #-1
- st r1, @+r2
- st r1, @+r2
- st r1, @+r2 || cmpeq r1, r4 ; R4 = 0?
- bnc .Lloop1
-.Lendloop1:
- and3 r4, r3, #15
- addi r2, #4
- beqz r4, .Lendloop2
-.Lloop2:
- stb r1, @r2 || addi r4, #-1
- addi r2, #1
- bnez r4, .Lloop2
-.Lendloop2:
-
-#else /* not CONFIG_ISA_DUAL_ISSUE */
-
- LDIMM (r2, __bss_start)
- LDIMM (r3, _end)
- sub r3, r2 ; BSS size in bytes
- mv r4, r3
- srli r4, #2 ; R4 = BSS size in longwords (rounded down)
- ldi r1, #0 ; clear R1 for longwords store
- addi r2, #-4 ; account for pre-inc store
- beqz r4, .Lendloop1 ; any more to go?
-.Lloop1:
- st r1, @+r2 ; yep, zero out another longword
- addi r4, #-1 ; decrement count
- bnez r4, .Lloop1 ; go do some more
-.Lendloop1:
- and3 r4, r3, #3 ; get no. of remaining BSS bytes to clear
- addi r2, #4 ; account for pre-inc store
- beqz r4, .Lendloop2 ; any more to go?
-.Lloop2:
- stb r1, @r2 ; yep, zero out another byte
- addi r2, #1 ; bump address
- addi r4, #-1 ; decrement count
- bnez r4, .Lloop2 ; go do some more
-.Lendloop2:
-
-#endif /* not CONFIG_ISA_DUAL_ISSUE */
-
-#if 0 /* M32R_FIXME */
-/*
- * Copy data segment from ROM to RAM.
- */
- .global ROM_D, TOP_DATA, END_DATA
-
- LDIMM (r1, ROM_D)
- LDIMM (r2, TOP_DATA)
- LDIMM (r3, END_DATA)
- addi r2, #-4
- addi r3, #-4
-loop1:
- ld r0, @r1+
- st r0, @+r2
- cmp r2, r3
- bc loop1
-#endif /* 0 */
-
-/* Jump to kernel */
- LDIMM (r2, start_kernel)
- jl r2
- .fillinsn
-1:
- bra 1b ; main should never return here, but
- ; just in case, we know what happens.
-
-#ifdef CONFIG_SMP
-/*
- * AP startup routine
- */
- .global eit_vector
-ENTRY(startup_AP)
-;; setup EVB
- LDIMM (r4, eit_vector)
- mvtc r4, cr5
-
-;; enable MMU
- LDIMM (r2, init_tlb)
- jl r2
- seth r4, #high(MATM)
- or3 r4, r4, #low(MATM)
- ldi r5, #0x01
- st r5, @r4 ; Set MATM Reg(T bit ON)
- ld r6, @r4 ; MATM Check
- LDIMM (r5, 1f)
- jmp r5 ; enable MMU
- nop
- .fillinsn
-1:
-;; ISN check
- ld r6, @r4 ; MATM Check
- seth r4, #high(M32R_ICU_ISTS_ADDR)
- or3 r4, r4, #low(M32R_ICU_ISTS_ADDR)
- ld r5, @r4 ; Read ISTSi reg.
- mv r6, r5
- slli r5, #13 ; PIML check
- srli r5, #13 ;
- seth r4, #high(M32R_ICU_IMASK_ADDR)
- or3 r4, r4, #low(M32R_ICU_IMASK_ADDR)
- st r5, @r4 ; Write IMASKi reg.
- slli r6, #4 ; ISN check
- srli r6, #26 ;
- seth r4, #high(M32R_IRQ_IPI5)
- or3 r4, r4, #low(M32R_IRQ_IPI5)
- bne r4, r6, 2f ; if (ISN != CPU_BOOT_IPI) goto sleep;
-
-;; check cpu_bootout_map and set cpu_bootin_map
- LDIMM (r4, cpu_bootout_map)
- ld r4, @r4
- seth r5, #high(M32R_CPUID_PORTL)
- or3 r5, r5, #low(M32R_CPUID_PORTL)
- ld r5, @r5
- ldi r6, #1
- sll r6, r5
- and r4, r6
- beqz r4, 2f
- LDIMM (r4, cpu_bootin_map)
- ld r5, @r4
- or r5, r6
- st r6, @r4
-
-;; clear PSW
- ldi r4, #0
- mvtc r4, psw
-
-;; setup SPI
- LDIMM (r4, stack_start)
- ld r4, @r4
- mvtc r4, spi
-
-;; setup BPC (start_secondary)
- LDIMM (r4, start_secondary)
- mvtc r4, bpc
-
- rte ; goto startup_secondary
- nop
- nop
-
- .fillinsn
-2:
- ;; disable MMU
- seth r4, #high(MATM)
- or3 r4, r4, #low(MATM)
- ldi r5, #0
- st r5, @r4 ; Set MATM Reg(T bit OFF)
- ld r6, @r4 ; MATM Check
- LDIMM (r4, 3f)
- seth r5, #high(__PAGE_OFFSET)
- or3 r5, r5, #low(__PAGE_OFFSET)
- not r5, r5
- and r4, r5
- jmp r4 ; disable MMU
- nop
- .fillinsn
-3:
- ;; SLEEP and wait IPI
- LDIMM (r4, AP_loop)
- seth r5, #high(__PAGE_OFFSET)
- or3 r5, r5, #low(__PAGE_OFFSET)
- not r5, r5
- and r4, r5
- jmp r4
- nop
- nop
-#endif /* CONFIG_SMP */
-
- .text
-ENTRY(stack_start)
- .long init_thread_union+8192
- .long __KERNEL_DS
-
-/*
- * This is initialized to create a identity-mapping at 0-4M (for bootup
- * purposes) and another mapping of the 0-4M area at virtual address
- * PAGE_OFFSET.
- */
- .text
-
-#define MOUNT_ROOT_RDONLY 1
-#define RAMDISK_FLAGS 0 ; 1024KB
-#define ORIG_ROOT_DEV 0x0100 ; /dev/ram0 (major:01, minor:00)
-#define LOADER_TYPE 1 ; (??? - non-zero value seems
- ; to be needed to boot from initrd)
-
-#define COMMAND_LINE ""
-
- .section .empty_zero_page, "aw"
-ENTRY(empty_zero_page)
- .long MOUNT_ROOT_RDONLY /* offset: +0x00 */
- .long RAMDISK_FLAGS
- .long ORIG_ROOT_DEV
- .long LOADER_TYPE
- .long 0 /* INITRD_START */ /* +0x10 */
- .long 0 /* INITRD_SIZE */
- .long 0 /* CPU_CLOCK */
- .long 0 /* BUS_CLOCK */
- .long 0 /* TIMER_DIVIDE */ /* +0x20 */
- .balign 256,0
- .asciz COMMAND_LINE
- .byte 0
- .balign 4096,0,4096
-
-/*------------------------------------------------------------------------
- * Stack area
- */
- .section .init.data, "aw"
- ALIGN
- .global spi_stack_top
- .zero 1024
-spi_stack_top:
-
- .section .init.data, "aw"
- ALIGN
- .global spu_stack_top
- .zero 1024
-spu_stack_top:
-
- .end
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0
-/*
- * linux/arch/m32r/kernel/irq.c
- *
- * Copyright (c) 2003, 2004 Hitoshi Yamamoto
- * Copyright (c) 2004 Hirokazu Takata <takata at linux-m32r.org>
- */
-
-/*
- * linux/arch/i386/kernel/irq.c
- *
- * Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar
- *
- * This file contains the lowest level m32r-specific interrupt
- * entry and irq statistics code. All the remaining irq logic is
- * done by the generic kernel/irq/ code and in the
- * m32r-specific irq controller code.
- */
-
-#include <linux/kernel_stat.h>
-#include <linux/interrupt.h>
-#include <linux/module.h>
-#include <linux/uaccess.h>
-
-/*
- * do_IRQ handles all normal device IRQs (the special
- * SMP cross-CPU interrupts have their own specific
- * handlers).
- */
-asmlinkage unsigned int do_IRQ(int irq, struct pt_regs *regs)
-{
- struct pt_regs *old_regs;
- old_regs = set_irq_regs(regs);
- irq_enter();
-
-#ifdef CONFIG_DEBUG_STACKOVERFLOW
- /* FIXME M32R */
-#endif
- generic_handle_irq(irq);
- irq_exit();
- set_irq_regs(old_regs);
-
- return 1;
-}
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0
-#include <linux/module.h>
-#include <linux/smp.h>
-#include <linux/user.h>
-#include <linux/elfcore.h>
-#include <linux/sched.h>
-#include <linux/in6.h>
-#include <linux/interrupt.h>
-#include <linux/string.h>
-
-#include <asm/processor.h>
-#include <linux/uaccess.h>
-#include <asm/checksum.h>
-#include <asm/io.h>
-#include <asm/delay.h>
-#include <asm/irq.h>
-#include <asm/tlbflush.h>
-#include <asm/pgtable.h>
-
-/* platform dependent support */
-EXPORT_SYMBOL(boot_cpu_data);
-EXPORT_SYMBOL(dump_fpu);
-EXPORT_SYMBOL(__ioremap);
-EXPORT_SYMBOL(iounmap);
-
-EXPORT_SYMBOL(strncpy_from_user);
-EXPORT_SYMBOL(clear_user);
-EXPORT_SYMBOL(__clear_user);
-EXPORT_SYMBOL(strnlen_user);
-
-#ifdef CONFIG_SMP
-#ifdef CONFIG_CHIP_M32700_TS1
-extern void *dcache_dummy;
-EXPORT_SYMBOL(dcache_dummy);
-#endif
-EXPORT_SYMBOL(cpu_data);
-
-/* TLB flushing */
-EXPORT_SYMBOL(smp_flush_tlb_page);
-#endif
-
-extern int __ucmpdi2(unsigned long long a, unsigned long long b);
-EXPORT_SYMBOL(__ucmpdi2);
-
-/* compiler generated symbol */
-extern void __ashldi3(void);
-extern void __ashrdi3(void);
-extern void __lshldi3(void);
-extern void __lshrdi3(void);
-extern void __muldi3(void);
-EXPORT_SYMBOL(__ashldi3);
-EXPORT_SYMBOL(__ashrdi3);
-EXPORT_SYMBOL(__lshldi3);
-EXPORT_SYMBOL(__lshrdi3);
-EXPORT_SYMBOL(__muldi3);
-
-/* memory and string operations */
-EXPORT_SYMBOL(memcpy);
-EXPORT_SYMBOL(memset);
-EXPORT_SYMBOL(copy_page);
-EXPORT_SYMBOL(clear_page);
-EXPORT_SYMBOL(strlen);
-EXPORT_SYMBOL(empty_zero_page);
-
-EXPORT_SYMBOL(_inb);
-EXPORT_SYMBOL(_inw);
-EXPORT_SYMBOL(_inl);
-EXPORT_SYMBOL(_outb);
-EXPORT_SYMBOL(_outw);
-EXPORT_SYMBOL(_outl);
-EXPORT_SYMBOL(_inb_p);
-EXPORT_SYMBOL(_inw_p);
-EXPORT_SYMBOL(_inl_p);
-EXPORT_SYMBOL(_outb_p);
-EXPORT_SYMBOL(_outw_p);
-EXPORT_SYMBOL(_outl_p);
-EXPORT_SYMBOL(_insb);
-EXPORT_SYMBOL(_insw);
-EXPORT_SYMBOL(_insl);
-EXPORT_SYMBOL(_outsb);
-EXPORT_SYMBOL(_outsw);
-EXPORT_SYMBOL(_outsl);
-EXPORT_SYMBOL(_readb);
-EXPORT_SYMBOL(_readw);
-EXPORT_SYMBOL(_readl);
-EXPORT_SYMBOL(_writeb);
-EXPORT_SYMBOL(_writew);
-EXPORT_SYMBOL(_writel);
-
+++ /dev/null
-/* Kernel module help for M32R.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-*/
-
-#include <linux/moduleloader.h>
-#include <linux/elf.h>
-#include <linux/vmalloc.h>
-#include <linux/fs.h>
-#include <linux/string.h>
-#include <linux/kernel.h>
-
-#if 0
-#define DEBUGP printk
-#else
-#define DEBUGP(fmt...)
-#endif
-
-#define COPY_UNALIGNED_WORD(sw, tw, align) \
-{ \
- void *__s = &(sw), *__t = &(tw); \
- unsigned short *__s2 = __s, *__t2 =__t; \
- unsigned char *__s1 = __s, *__t1 =__t; \
- switch ((align)) \
- { \
- case 0: \
- *(unsigned long *) __t = *(unsigned long *) __s; \
- break; \
- case 2: \
- *__t2++ = *__s2++; \
- *__t2 = *__s2; \
- break; \
- default: \
- *__t1++ = *__s1++; \
- *__t1++ = *__s1++; \
- *__t1++ = *__s1++; \
- *__t1 = *__s1; \
- break; \
- } \
-}
-
-#define COPY_UNALIGNED_HWORD(sw, tw, align) \
- { \
- void *__s = &(sw), *__t = &(tw); \
- unsigned short *__s2 = __s, *__t2 =__t; \
- unsigned char *__s1 = __s, *__t1 =__t; \
- switch ((align)) \
- { \
- case 0: \
- *__t2 = *__s2; \
- break; \
- default: \
- *__t1++ = *__s1++; \
- *__t1 = *__s1; \
- break; \
- } \
- }
-
-int apply_relocate_add(Elf32_Shdr *sechdrs,
- const char *strtab,
- unsigned int symindex,
- unsigned int relsec,
- struct module *me)
-{
- unsigned int i;
- Elf32_Rela *rel = (void *)sechdrs[relsec].sh_addr;
- Elf32_Sym *sym;
- Elf32_Addr relocation;
- uint32_t *location;
- uint32_t value;
- unsigned short *hlocation;
- unsigned short hvalue;
- int svalue;
- int align;
-
- DEBUGP("Applying relocate section %u to %u\n", relsec,
- sechdrs[relsec].sh_info);
- for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
- /* This is where to make the change */
- location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr
- + rel[i].r_offset;
- /* This is the symbol it is referring to. Note that all
- undefined symbols have been resolved. */
- sym = (Elf32_Sym *)sechdrs[symindex].sh_addr
- + ELF32_R_SYM(rel[i].r_info);
- relocation = sym->st_value + rel[i].r_addend;
- align = (int)location & 3;
-
- switch (ELF32_R_TYPE(rel[i].r_info)) {
- case R_M32R_32_RELA:
- COPY_UNALIGNED_WORD (*location, value, align);
- value += relocation;
- COPY_UNALIGNED_WORD (value, *location, align);
- break;
- case R_M32R_HI16_ULO_RELA:
- COPY_UNALIGNED_WORD (*location, value, align);
- relocation = (relocation >>16) & 0xffff;
- /* RELA must has 0 at relocation field. */
- value += relocation;
- COPY_UNALIGNED_WORD (value, *location, align);
- break;
- case R_M32R_HI16_SLO_RELA:
- COPY_UNALIGNED_WORD (*location, value, align);
- if (relocation & 0x8000) relocation += 0x10000;
- relocation = (relocation >>16) & 0xffff;
- /* RELA must has 0 at relocation field. */
- value += relocation;
- COPY_UNALIGNED_WORD (value, *location, align);
- break;
- case R_M32R_16_RELA:
- hlocation = (unsigned short *)location;
- relocation = relocation & 0xffff;
- /* RELA must has 0 at relocation field. */
- hvalue = relocation;
- COPY_UNALIGNED_WORD (hvalue, *hlocation, align);
- break;
- case R_M32R_SDA16_RELA:
- case R_M32R_LO16_RELA:
- COPY_UNALIGNED_WORD (*location, value, align);
- relocation = relocation & 0xffff;
- /* RELA must has 0 at relocation field. */
- value += relocation;
- COPY_UNALIGNED_WORD (value, *location, align);
- break;
- case R_M32R_24_RELA:
- COPY_UNALIGNED_WORD (*location, value, align);
- relocation = relocation & 0xffffff;
- /* RELA must has 0 at relocation field. */
- value += relocation;
- COPY_UNALIGNED_WORD (value, *location, align);
- break;
- case R_M32R_18_PCREL_RELA:
- relocation = (relocation - (Elf32_Addr) location);
- if (relocation < -0x20000 || 0x1fffc < relocation)
- {
- printk(KERN_ERR "module %s: relocation overflow: %u\n",
- me->name, relocation);
- return -ENOEXEC;
- }
- COPY_UNALIGNED_WORD (*location, value, align);
- if (value & 0xffff)
- {
- /* RELA must has 0 at relocation field. */
- printk(KERN_ERR "module %s: illegal relocation field: %u\n",
- me->name, value);
- return -ENOEXEC;
- }
- relocation = (relocation >> 2) & 0xffff;
- value += relocation;
- COPY_UNALIGNED_WORD (value, *location, align);
- break;
- case R_M32R_10_PCREL_RELA:
- hlocation = (unsigned short *)location;
- relocation = (relocation - (Elf32_Addr) location);
- COPY_UNALIGNED_HWORD (*hlocation, hvalue, align);
- svalue = (int)hvalue;
- svalue = (signed char)svalue << 2;
- relocation += svalue;
- relocation = (relocation >> 2) & 0xff;
- hvalue = hvalue & 0xff00;
- hvalue += relocation;
- COPY_UNALIGNED_HWORD (hvalue, *hlocation, align);
- break;
- case R_M32R_26_PCREL_RELA:
- relocation = (relocation - (Elf32_Addr) location);
- if (relocation < -0x2000000 || 0x1fffffc < relocation)
- {
- printk(KERN_ERR "module %s: relocation overflow: %u\n",
- me->name, relocation);
- return -ENOEXEC;
- }
- COPY_UNALIGNED_WORD (*location, value, align);
- if (value & 0xffffff)
- {
- /* RELA must has 0 at relocation field. */
- printk(KERN_ERR "module %s: illegal relocation field: %u\n",
- me->name, value);
- return -ENOEXEC;
- }
- relocation = (relocation >> 2) & 0xffffff;
- value += relocation;
- COPY_UNALIGNED_WORD (value, *location, align);
- break;
- default:
- printk(KERN_ERR "module %s: Unknown relocation: %u\n",
- me->name, ELF32_R_TYPE(rel[i].r_info));
- return -ENOEXEC;
- }
- }
- return 0;
-}
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0
-/*
- * linux/arch/m32r/kernel/process.c
- *
- * Copyright (c) 2001, 2002 Hiroyuki Kondo, Hirokazu Takata,
- * Hitoshi Yamamoto
- * Taken from sh version.
- * Copyright (C) 1995 Linus Torvalds
- * SuperH version: Copyright (C) 1999, 2000 Niibe Yutaka & Kaz Kojima
- */
-
-#undef DEBUG_PROCESS
-#ifdef DEBUG_PROCESS
-#define DPRINTK(fmt, args...) printk("%s:%d:%s: " fmt, __FILE__, __LINE__, \
- __func__, ##args)
-#else
-#define DPRINTK(fmt, args...)
-#endif
-
-/*
- * This file handles the architecture-dependent parts of process handling..
- */
-
-#include <linux/fs.h>
-#include <linux/slab.h>
-#include <linux/sched/debug.h>
-#include <linux/sched/task.h>
-#include <linux/sched/task_stack.h>
-#include <linux/module.h>
-#include <linux/ptrace.h>
-#include <linux/unistd.h>
-#include <linux/hardirq.h>
-#include <linux/rcupdate.h>
-
-#include <asm/io.h>
-#include <linux/uaccess.h>
-#include <asm/mmu_context.h>
-#include <asm/elf.h>
-#include <asm/m32r.h>
-
-#include <linux/err.h>
-
-void (*pm_power_off)(void) = NULL;
-EXPORT_SYMBOL(pm_power_off);
-
-void machine_restart(char *__unused)
-{
-#if defined(CONFIG_PLAT_MAPPI3)
- outw(1, (unsigned long)PLD_REBOOT);
-#endif
-
- printk("Please push reset button!\n");
- while (1)
- cpu_relax();
-}
-
-void machine_halt(void)
-{
- printk("Please push reset button!\n");
- while (1)
- cpu_relax();
-}
-
-void machine_power_off(void)
-{
- /* M32R_FIXME */
-}
-
-void show_regs(struct pt_regs * regs)
-{
- printk("\n");
- show_regs_print_info(KERN_DEFAULT);
-
- printk("BPC[%08lx]:PSW[%08lx]:LR [%08lx]:FP [%08lx]\n", \
- regs->bpc, regs->psw, regs->lr, regs->fp);
- printk("BBPC[%08lx]:BBPSW[%08lx]:SPU[%08lx]:SPI[%08lx]\n", \
- regs->bbpc, regs->bbpsw, regs->spu, regs->spi);
- printk("R0 [%08lx]:R1 [%08lx]:R2 [%08lx]:R3 [%08lx]\n", \
- regs->r0, regs->r1, regs->r2, regs->r3);
- printk("R4 [%08lx]:R5 [%08lx]:R6 [%08lx]:R7 [%08lx]\n", \
- regs->r4, regs->r5, regs->r6, regs->r7);
- printk("R8 [%08lx]:R9 [%08lx]:R10[%08lx]:R11[%08lx]\n", \
- regs->r8, regs->r9, regs->r10, regs->r11);
- printk("R12[%08lx]\n", \
- regs->r12);
-
-#if defined(CONFIG_ISA_M32R2) && defined(CONFIG_ISA_DSP_LEVEL2)
- printk("ACC0H[%08lx]:ACC0L[%08lx]\n", \
- regs->acc0h, regs->acc0l);
- printk("ACC1H[%08lx]:ACC1L[%08lx]\n", \
- regs->acc1h, regs->acc1l);
-#elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R)
- printk("ACCH[%08lx]:ACCL[%08lx]\n", \
- regs->acc0h, regs->acc0l);
-#else
-#error unknown isa configuration
-#endif
-}
-
-void flush_thread(void)
-{
- DPRINTK("pid = %d\n", current->pid);
- memset(¤t->thread.debug_trap, 0, sizeof(struct debug_trap));
-}
-
-void release_thread(struct task_struct *dead_task)
-{
- /* do nothing */
- DPRINTK("pid = %d\n", dead_task->pid);
-}
-
-/* Fill in the fpu structure for a core dump.. */
-int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpu)
-{
- return 0; /* Task didn't use the fpu at all. */
-}
-
-int copy_thread(unsigned long clone_flags, unsigned long spu,
- unsigned long arg, struct task_struct *tsk)
-{
- struct pt_regs *childregs = task_pt_regs(tsk);
- extern void ret_from_fork(void);
- extern void ret_from_kernel_thread(void);
-
- if (unlikely(tsk->flags & PF_KTHREAD)) {
- memset(childregs, 0, sizeof(struct pt_regs));
- childregs->psw = M32R_PSW_BIE;
- childregs->r1 = spu; /* fn */
- childregs->r0 = arg;
- tsk->thread.lr = (unsigned long)ret_from_kernel_thread;
- } else {
- /* Copy registers */
- *childregs = *current_pt_regs();
- if (spu)
- childregs->spu = spu;
- childregs->r0 = 0; /* Child gets zero as return value */
- tsk->thread.lr = (unsigned long)ret_from_fork;
- }
- tsk->thread.sp = (unsigned long)childregs;
-
- return 0;
-}
-
-/*
- * These bracket the sleeping functions..
- */
-#define first_sched ((unsigned long) scheduling_functions_start_here)
-#define last_sched ((unsigned long) scheduling_functions_end_here)
-
-unsigned long get_wchan(struct task_struct *p)
-{
- /* M32R_FIXME */
- return (0);
-}
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0
-/*
- * linux/arch/m32r/kernel/ptrace.c
- *
- * Copyright (C) 2002 Hirokazu Takata, Takeo Takahashi
- * Copyright (C) 2004 Hirokazu Takata, Kei Sakamoto
- *
- * Original x86 implementation:
- * By Ross Biro 1/23/92
- * edited by Linus Torvalds
- *
- * Some code taken from sh version:
- * Copyright (C) 1999, 2000 Kaz Kojima & Niibe Yutaka
- * Some code taken from arm version:
- * Copyright (C) 2000 Russell King
- */
-
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/sched/task_stack.h>
-#include <linux/mm.h>
-#include <linux/err.h>
-#include <linux/smp.h>
-#include <linux/errno.h>
-#include <linux/ptrace.h>
-#include <linux/user.h>
-#include <linux/string.h>
-#include <linux/signal.h>
-
-#include <asm/cacheflush.h>
-#include <asm/io.h>
-#include <linux/uaccess.h>
-#include <asm/pgtable.h>
-#include <asm/processor.h>
-#include <asm/mmu_context.h>
-
-/*
- * This routine will get a word off of the process kernel stack.
- */
-static inline unsigned long int
-get_stack_long(struct task_struct *task, int offset)
-{
- unsigned long *stack;
-
- stack = (unsigned long *)task_pt_regs(task);
-
- return stack[offset];
-}
-
-/*
- * This routine will put a word on the process kernel stack.
- */
-static inline int
-put_stack_long(struct task_struct *task, int offset, unsigned long data)
-{
- unsigned long *stack;
-
- stack = (unsigned long *)task_pt_regs(task);
- stack[offset] = data;
-
- return 0;
-}
-
-static int reg_offset[] = {
- PT_R0, PT_R1, PT_R2, PT_R3, PT_R4, PT_R5, PT_R6, PT_R7,
- PT_R8, PT_R9, PT_R10, PT_R11, PT_R12, PT_FP, PT_LR, PT_SPU,
-};
-
-/*
- * Read the word at offset "off" into the "struct user". We
- * actually access the pt_regs stored on the kernel stack.
- */
-static int ptrace_read_user(struct task_struct *tsk, unsigned long off,
- unsigned long __user *data)
-{
- unsigned long tmp;
-#ifndef NO_FPU
- struct user * dummy = NULL;
-#endif
-
- if ((off & 3) || off > sizeof(struct user) - 3)
- return -EIO;
-
- off >>= 2;
- switch (off) {
- case PT_EVB:
- __asm__ __volatile__ (
- "mvfc %0, cr5 \n\t"
- : "=r" (tmp)
- );
- break;
- case PT_CBR: {
- unsigned long psw;
- psw = get_stack_long(tsk, PT_PSW);
- tmp = ((psw >> 8) & 1);
- }
- break;
- case PT_PSW: {
- unsigned long psw, bbpsw;
- psw = get_stack_long(tsk, PT_PSW);
- bbpsw = get_stack_long(tsk, PT_BBPSW);
- tmp = ((psw >> 8) & 0xff) | ((bbpsw & 0xff) << 8);
- }
- break;
- case PT_PC:
- tmp = get_stack_long(tsk, PT_BPC);
- break;
- case PT_BPC:
- off = PT_BBPC;
- /* fall through */
- default:
- if (off < (sizeof(struct pt_regs) >> 2))
- tmp = get_stack_long(tsk, off);
-#ifndef NO_FPU
- else if (off >= (long)(&dummy->fpu >> 2) &&
- off < (long)(&dummy->u_fpvalid >> 2)) {
- if (!tsk_used_math(tsk)) {
- if (off == (long)(&dummy->fpu.fpscr >> 2))
- tmp = FPSCR_INIT;
- else
- tmp = 0;
- } else
- tmp = ((long *)(&tsk->thread.fpu >> 2))
- [off - (long)&dummy->fpu];
- } else if (off == (long)(&dummy->u_fpvalid >> 2))
- tmp = !!tsk_used_math(tsk);
-#endif /* not NO_FPU */
- else
- tmp = 0;
- }
-
- return put_user(tmp, data);
-}
-
-static int ptrace_write_user(struct task_struct *tsk, unsigned long off,
- unsigned long data)
-{
- int ret = -EIO;
-#ifndef NO_FPU
- struct user * dummy = NULL;
-#endif
-
- if ((off & 3) || off > sizeof(struct user) - 3)
- return -EIO;
-
- off >>= 2;
- switch (off) {
- case PT_EVB:
- case PT_BPC:
- case PT_SPI:
- /* We don't allow to modify evb. */
- ret = 0;
- break;
- case PT_PSW:
- case PT_CBR: {
- /* We allow to modify only cbr in psw */
- unsigned long psw;
- psw = get_stack_long(tsk, PT_PSW);
- psw = (psw & ~0x100) | ((data & 1) << 8);
- ret = put_stack_long(tsk, PT_PSW, psw);
- }
- break;
- case PT_PC:
- off = PT_BPC;
- data &= ~1;
- /* fall through */
- default:
- if (off < (sizeof(struct pt_regs) >> 2))
- ret = put_stack_long(tsk, off, data);
-#ifndef NO_FPU
- else if (off >= (long)(&dummy->fpu >> 2) &&
- off < (long)(&dummy->u_fpvalid >> 2)) {
- set_stopped_child_used_math(tsk);
- ((long *)&tsk->thread.fpu)
- [off - (long)&dummy->fpu] = data;
- ret = 0;
- } else if (off == (long)(&dummy->u_fpvalid >> 2)) {
- conditional_stopped_child_used_math(data, tsk);
- ret = 0;
- }
-#endif /* not NO_FPU */
- break;
- }
-
- return ret;
-}
-
-/*
- * Get all user integer registers.
- */
-static int ptrace_getregs(struct task_struct *tsk, void __user *uregs)
-{
- struct pt_regs *regs = task_pt_regs(tsk);
-
- return copy_to_user(uregs, regs, sizeof(struct pt_regs)) ? -EFAULT : 0;
-}
-
-/*
- * Set all user integer registers.
- */
-static int ptrace_setregs(struct task_struct *tsk, void __user *uregs)
-{
- struct pt_regs newregs;
- int ret;
-
- ret = -EFAULT;
- if (copy_from_user(&newregs, uregs, sizeof(struct pt_regs)) == 0) {
- struct pt_regs *regs = task_pt_regs(tsk);
- *regs = newregs;
- ret = 0;
- }
-
- return ret;
-}
-
-
-static inline int
-check_condition_bit(struct task_struct *child)
-{
- return (int)((get_stack_long(child, PT_PSW) >> 8) & 1);
-}
-
-static int
-check_condition_src(unsigned long op, unsigned long regno1,
- unsigned long regno2, struct task_struct *child)
-{
- unsigned long reg1, reg2;
-
- reg2 = get_stack_long(child, reg_offset[regno2]);
-
- switch (op) {
- case 0x0: /* BEQ */
- reg1 = get_stack_long(child, reg_offset[regno1]);
- return reg1 == reg2;
- case 0x1: /* BNE */
- reg1 = get_stack_long(child, reg_offset[regno1]);
- return reg1 != reg2;
- case 0x8: /* BEQZ */
- return reg2 == 0;
- case 0x9: /* BNEZ */
- return reg2 != 0;
- case 0xa: /* BLTZ */
- return (int)reg2 < 0;
- case 0xb: /* BGEZ */
- return (int)reg2 >= 0;
- case 0xc: /* BLEZ */
- return (int)reg2 <= 0;
- case 0xd: /* BGTZ */
- return (int)reg2 > 0;
- default:
- /* never reached */
- return 0;
- }
-}
-
-static void
-compute_next_pc_for_16bit_insn(unsigned long insn, unsigned long pc,
- unsigned long *next_pc,
- struct task_struct *child)
-{
- unsigned long op, op2, op3;
- unsigned long disp;
- unsigned long regno;
- int parallel = 0;
-
- if (insn & 0x00008000)
- parallel = 1;
- if (pc & 3)
- insn &= 0x7fff; /* right slot */
- else
- insn >>= 16; /* left slot */
-
- op = (insn >> 12) & 0xf;
- op2 = (insn >> 8) & 0xf;
- op3 = (insn >> 4) & 0xf;
-
- if (op == 0x7) {
- switch (op2) {
- case 0xd: /* BNC */
- case 0x9: /* BNCL */
- if (!check_condition_bit(child)) {
- disp = (long)(insn << 24) >> 22;
- *next_pc = (pc & ~0x3) + disp;
- return;
- }
- break;
- case 0x8: /* BCL */
- case 0xc: /* BC */
- if (check_condition_bit(child)) {
- disp = (long)(insn << 24) >> 22;
- *next_pc = (pc & ~0x3) + disp;
- return;
- }
- break;
- case 0xe: /* BL */
- case 0xf: /* BRA */
- disp = (long)(insn << 24) >> 22;
- *next_pc = (pc & ~0x3) + disp;
- return;
- break;
- }
- } else if (op == 0x1) {
- switch (op2) {
- case 0x0:
- if (op3 == 0xf) { /* TRAP */
-#if 1
- /* pass through */
-#else
- /* kernel space is not allowed as next_pc */
- unsigned long evb;
- unsigned long trapno;
- trapno = insn & 0xf;
- __asm__ __volatile__ (
- "mvfc %0, cr5\n"
- :"=r"(evb)
- :
- );
- *next_pc = evb + (trapno << 2);
- return;
-#endif
- } else if (op3 == 0xd) { /* RTE */
- *next_pc = get_stack_long(child, PT_BPC);
- return;
- }
- break;
- case 0xc: /* JC */
- if (op3 == 0xc && check_condition_bit(child)) {
- regno = insn & 0xf;
- *next_pc = get_stack_long(child,
- reg_offset[regno]);
- return;
- }
- break;
- case 0xd: /* JNC */
- if (op3 == 0xc && !check_condition_bit(child)) {
- regno = insn & 0xf;
- *next_pc = get_stack_long(child,
- reg_offset[regno]);
- return;
- }
- break;
- case 0xe: /* JL */
- case 0xf: /* JMP */
- if (op3 == 0xc) { /* JMP */
- regno = insn & 0xf;
- *next_pc = get_stack_long(child,
- reg_offset[regno]);
- return;
- }
- break;
- }
- }
- if (parallel)
- *next_pc = pc + 4;
- else
- *next_pc = pc + 2;
-}
-
-static void
-compute_next_pc_for_32bit_insn(unsigned long insn, unsigned long pc,
- unsigned long *next_pc,
- struct task_struct *child)
-{
- unsigned long op;
- unsigned long op2;
- unsigned long disp;
- unsigned long regno1, regno2;
-
- op = (insn >> 28) & 0xf;
- if (op == 0xf) { /* branch 24-bit relative */
- op2 = (insn >> 24) & 0xf;
- switch (op2) {
- case 0xd: /* BNC */
- case 0x9: /* BNCL */
- if (!check_condition_bit(child)) {
- disp = (long)(insn << 8) >> 6;
- *next_pc = (pc & ~0x3) + disp;
- return;
- }
- break;
- case 0x8: /* BCL */
- case 0xc: /* BC */
- if (check_condition_bit(child)) {
- disp = (long)(insn << 8) >> 6;
- *next_pc = (pc & ~0x3) + disp;
- return;
- }
- break;
- case 0xe: /* BL */
- case 0xf: /* BRA */
- disp = (long)(insn << 8) >> 6;
- *next_pc = (pc & ~0x3) + disp;
- return;
- }
- } else if (op == 0xb) { /* branch 16-bit relative */
- op2 = (insn >> 20) & 0xf;
- switch (op2) {
- case 0x0: /* BEQ */
- case 0x1: /* BNE */
- case 0x8: /* BEQZ */
- case 0x9: /* BNEZ */
- case 0xa: /* BLTZ */
- case 0xb: /* BGEZ */
- case 0xc: /* BLEZ */
- case 0xd: /* BGTZ */
- regno1 = ((insn >> 24) & 0xf);
- regno2 = ((insn >> 16) & 0xf);
- if (check_condition_src(op2, regno1, regno2, child)) {
- disp = (long)(insn << 16) >> 14;
- *next_pc = (pc & ~0x3) + disp;
- return;
- }
- break;
- }
- }
- *next_pc = pc + 4;
-}
-
-static inline void
-compute_next_pc(unsigned long insn, unsigned long pc,
- unsigned long *next_pc, struct task_struct *child)
-{
- if (insn & 0x80000000)
- compute_next_pc_for_32bit_insn(insn, pc, next_pc, child);
- else
- compute_next_pc_for_16bit_insn(insn, pc, next_pc, child);
-}
-
-static int
-register_debug_trap(struct task_struct *child, unsigned long next_pc,
- unsigned long next_insn, unsigned long *code)
-{
- struct debug_trap *p = &child->thread.debug_trap;
- unsigned long addr = next_pc & ~3;
-
- if (p->nr_trap == MAX_TRAPS) {
- printk("kernel BUG at %s %d: p->nr_trap = %d\n",
- __FILE__, __LINE__, p->nr_trap);
- return -1;
- }
- p->addr[p->nr_trap] = addr;
- p->insn[p->nr_trap] = next_insn;
- p->nr_trap++;
- if (next_pc & 3) {
- *code = (next_insn & 0xffff0000) | 0x10f1;
- /* xxx --> TRAP1 */
- } else {
- if ((next_insn & 0x80000000) || (next_insn & 0x8000)) {
- *code = 0x10f17000;
- /* TRAP1 --> NOP */
- } else {
- *code = (next_insn & 0xffff) | 0x10f10000;
- /* TRAP1 --> xxx */
- }
- }
- return 0;
-}
-
-static int
-unregister_debug_trap(struct task_struct *child, unsigned long addr,
- unsigned long *code)
-{
- struct debug_trap *p = &child->thread.debug_trap;
- int i;
-
- /* Search debug trap entry. */
- for (i = 0; i < p->nr_trap; i++) {
- if (p->addr[i] == addr)
- break;
- }
- if (i >= p->nr_trap) {
- /* The trap may be requested from debugger.
- * ptrace should do nothing in this case.
- */
- return 0;
- }
-
- /* Recover original instruction code. */
- *code = p->insn[i];
-
- /* Shift debug trap entries. */
- while (i < p->nr_trap - 1) {
- p->insn[i] = p->insn[i + 1];
- p->addr[i] = p->addr[i + 1];
- i++;
- }
- p->nr_trap--;
- return 1;
-}
-
-static void
-unregister_all_debug_traps(struct task_struct *child)
-{
- struct debug_trap *p = &child->thread.debug_trap;
- int i;
-
- for (i = 0; i < p->nr_trap; i++)
- access_process_vm(child, p->addr[i], &p->insn[i], sizeof(p->insn[i]),
- FOLL_FORCE | FOLL_WRITE);
- p->nr_trap = 0;
-}
-
-static inline void
-invalidate_cache(void)
-{
-#if defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_OPSP)
-
- _flush_cache_copyback_all();
-
-#else /* ! CONFIG_CHIP_M32700 */
-
- /* Invalidate cache */
- __asm__ __volatile__ (
- "ldi r0, #-1 \n\t"
- "ldi r1, #0 \n\t"
- "stb r1, @r0 ; cache off \n\t"
- "; \n\t"
- "ldi r0, #-2 \n\t"
- "ldi r1, #1 \n\t"
- "stb r1, @r0 ; cache invalidate \n\t"
- ".fillinsn \n"
- "0: \n\t"
- "ldb r1, @r0 ; invalidate check \n\t"
- "bnez r1, 0b \n\t"
- "; \n\t"
- "ldi r0, #-1 \n\t"
- "ldi r1, #1 \n\t"
- "stb r1, @r0 ; cache on \n\t"
- : : : "r0", "r1", "memory"
- );
- /* FIXME: copying-back d-cache and invalidating i-cache are needed.
- */
-#endif /* CONFIG_CHIP_M32700 */
-}
-
-/* Embed a debug trap (TRAP1) code */
-static int
-embed_debug_trap(struct task_struct *child, unsigned long next_pc)
-{
- unsigned long next_insn, code;
- unsigned long addr = next_pc & ~3;
-
- if (access_process_vm(child, addr, &next_insn, sizeof(next_insn),
- FOLL_FORCE)
- != sizeof(next_insn)) {
- return -1; /* error */
- }
-
- /* Set a trap code. */
- if (register_debug_trap(child, next_pc, next_insn, &code)) {
- return -1; /* error */
- }
- if (access_process_vm(child, addr, &code, sizeof(code),
- FOLL_FORCE | FOLL_WRITE)
- != sizeof(code)) {
- return -1; /* error */
- }
- return 0; /* success */
-}
-
-void
-withdraw_debug_trap(struct pt_regs *regs)
-{
- unsigned long addr;
- unsigned long code;
-
- addr = (regs->bpc - 2) & ~3;
- regs->bpc -= 2;
- if (unregister_debug_trap(current, addr, &code)) {
- access_process_vm(current, addr, &code, sizeof(code),
- FOLL_FORCE | FOLL_WRITE);
- invalidate_cache();
- }
-}
-
-void
-init_debug_traps(struct task_struct *child)
-{
- struct debug_trap *p = &child->thread.debug_trap;
- int i;
- p->nr_trap = 0;
- for (i = 0; i < MAX_TRAPS; i++) {
- p->addr[i] = 0;
- p->insn[i] = 0;
- }
-}
-
-void user_enable_single_step(struct task_struct *child)
-{
- unsigned long next_pc;
- unsigned long pc, insn;
-
- clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-
- /* Compute next pc. */
- pc = get_stack_long(child, PT_BPC);
-
- if (access_process_vm(child, pc&~3, &insn, sizeof(insn),
- FOLL_FORCE)
- != sizeof(insn))
- return;
-
- compute_next_pc(insn, pc, &next_pc, child);
- if (next_pc & 0x80000000)
- return;
-
- if (embed_debug_trap(child, next_pc))
- return;
-
- invalidate_cache();
-}
-
-void user_disable_single_step(struct task_struct *child)
-{
- unregister_all_debug_traps(child);
- invalidate_cache();
-}
-
-/*
- * Called by kernel/ptrace.c when detaching..
- *
- * Make sure single step bits etc are not set.
- */
-void ptrace_disable(struct task_struct *child)
-{
- /* nothing to do.. */
-}
-
-long
-arch_ptrace(struct task_struct *child, long request,
- unsigned long addr, unsigned long data)
-{
- int ret;
- unsigned long __user *datap = (unsigned long __user *) data;
-
- switch (request) {
- /*
- * read word at location "addr" in the child process.
- */
- case PTRACE_PEEKTEXT:
- case PTRACE_PEEKDATA:
- ret = generic_ptrace_peekdata(child, addr, data);
- break;
-
- /*
- * read the word at location addr in the USER area.
- */
- case PTRACE_PEEKUSR:
- ret = ptrace_read_user(child, addr, datap);
- break;
-
- /*
- * write the word at location addr.
- */
- case PTRACE_POKETEXT:
- case PTRACE_POKEDATA:
- ret = generic_ptrace_pokedata(child, addr, data);
- if (ret == 0 && request == PTRACE_POKETEXT)
- invalidate_cache();
- break;
-
- /*
- * write the word at location addr in the USER area.
- */
- case PTRACE_POKEUSR:
- ret = ptrace_write_user(child, addr, data);
- break;
-
- case PTRACE_GETREGS:
- ret = ptrace_getregs(child, datap);
- break;
-
- case PTRACE_SETREGS:
- ret = ptrace_setregs(child, datap);
- break;
-
- default:
- ret = ptrace_request(child, request, addr, data);
- break;
- }
-
- return ret;
-}
-
-/* notification of system call entry/exit
- * - triggered by current->work.syscall_trace
- */
-void do_syscall_trace(void)
-{
- if (!test_thread_flag(TIF_SYSCALL_TRACE))
- return;
- if (!(current->ptrace & PT_PTRACED))
- return;
- /* the 0x80 provides a way for the tracing parent to distinguish
- between a syscall stop and SIGTRAP delivery */
- ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
- ? 0x80 : 0));
-
- /*
- * this isn't the same as continuing with a signal, but it will do
- * for normal use. strace only continues with a signal if the
- * stopping signal is not SIGTRAP. -brl
- */
- if (current->exit_code) {
- send_sig(current->exit_code, current, 1);
- current->exit_code = 0;
- }
-}
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0
-/*
- * linux/arch/m32r/kernel/setup.c
- *
- * Setup routines for Renesas M32R
- *
- * Copyright (c) 2001, 2002 Hiroyuki Kondo, Hirokazu Takata,
- * Hitoshi Yamamoto
- */
-
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/stddef.h>
-#include <linux/fs.h>
-#include <linux/sched/mm.h>
-#include <linux/ioport.h>
-#include <linux/mm.h>
-#include <linux/bootmem.h>
-#include <linux/console.h>
-#include <linux/initrd.h>
-#include <linux/major.h>
-#include <linux/root_dev.h>
-#include <linux/seq_file.h>
-#include <linux/timex.h>
-#include <linux/screen_info.h>
-#include <linux/cpu.h>
-#include <linux/nodemask.h>
-#include <linux/pfn.h>
-
-#include <asm/processor.h>
-#include <asm/pgtable.h>
-#include <asm/io.h>
-#include <asm/mmu_context.h>
-#include <asm/m32r.h>
-#include <asm/setup.h>
-#include <asm/sections.h>
-
-#ifdef CONFIG_MMU
-extern void init_mmu(void);
-#endif
-
-extern char _end[];
-
-/*
- * Machine setup..
- */
-struct cpuinfo_m32r boot_cpu_data;
-
-#ifdef CONFIG_BLK_DEV_RAM
-extern int rd_doload; /* 1 = load ramdisk, 0 = don't load */
-extern int rd_prompt; /* 1 = prompt for ramdisk, 0 = don't prompt */
-extern int rd_image_start; /* starting block # of image */
-#endif
-
-#if defined(CONFIG_VGA_CONSOLE)
-struct screen_info screen_info = {
- .orig_video_lines = 25,
- .orig_video_cols = 80,
- .orig_video_mode = 0,
- .orig_video_ega_bx = 0,
- .orig_video_isVGA = 1,
- .orig_video_points = 8
-};
-#endif
-
-extern int root_mountflags;
-
-static char __initdata command_line[COMMAND_LINE_SIZE];
-
-static struct resource data_resource = {
- .name = "Kernel data",
- .start = 0,
- .end = 0,
- .flags = IORESOURCE_BUSY | IORESOURCE_SYSTEM_RAM
-};
-
-static struct resource code_resource = {
- .name = "Kernel code",
- .start = 0,
- .end = 0,
- .flags = IORESOURCE_BUSY | IORESOURCE_SYSTEM_RAM
-};
-
-unsigned long memory_start;
-EXPORT_SYMBOL(memory_start);
-
-unsigned long memory_end;
-EXPORT_SYMBOL(memory_end);
-
-void __init setup_arch(char **);
-int get_cpuinfo(char *);
-
-static __inline__ void parse_mem_cmdline(char ** cmdline_p)
-{
- char c = ' ';
- char *to = command_line;
- char *from = COMMAND_LINE;
- int len = 0;
- int usermem = 0;
-
- /* Save unparsed command line copy for /proc/cmdline */
- memcpy(boot_command_line, COMMAND_LINE, COMMAND_LINE_SIZE);
- boot_command_line[COMMAND_LINE_SIZE-1] = '\0';
-
- memory_start = (unsigned long)CONFIG_MEMORY_START+PAGE_OFFSET;
- memory_end = memory_start+(unsigned long)CONFIG_MEMORY_SIZE;
-
- for ( ; ; ) {
- if (c == ' ' && !memcmp(from, "mem=", 4)) {
- if (to != command_line)
- to--;
-
- {
- unsigned long mem_size;
-
- usermem = 1;
- mem_size = memparse(from+4, &from);
- memory_end = memory_start + mem_size;
- }
- }
- c = *(from++);
- if (!c)
- break;
-
- if (COMMAND_LINE_SIZE <= ++len)
- break;
-
- *(to++) = c;
- }
- *to = '\0';
- *cmdline_p = command_line;
- if (usermem)
- printk(KERN_INFO "user-defined physical RAM map:\n");
-}
-
-#ifndef CONFIG_DISCONTIGMEM
-static unsigned long __init setup_memory(void)
-{
- unsigned long start_pfn, max_low_pfn, bootmap_size;
-
- start_pfn = PFN_UP( __pa(_end) );
- max_low_pfn = PFN_DOWN( __pa(memory_end) );
-
- /*
- * Initialize the boot-time allocator (with low memory only):
- */
- bootmap_size = init_bootmem_node(NODE_DATA(0), start_pfn,
- CONFIG_MEMORY_START>>PAGE_SHIFT, max_low_pfn);
-
- /*
- * Register fully available low RAM pages with the bootmem allocator.
- */
- {
- unsigned long curr_pfn;
- unsigned long last_pfn;
- unsigned long pages;
-
- /*
- * We are rounding up the start address of usable memory:
- */
- curr_pfn = PFN_UP(__pa(memory_start));
-
- /*
- * ... and at the end of the usable range downwards:
- */
- last_pfn = PFN_DOWN(__pa(memory_end));
-
- if (last_pfn > max_low_pfn)
- last_pfn = max_low_pfn;
-
- pages = last_pfn - curr_pfn;
- free_bootmem(PFN_PHYS(curr_pfn), PFN_PHYS(pages));
- }
-
- /*
- * Reserve the kernel text and
- * Reserve the bootmem bitmap. We do this in two steps (first step
- * was init_bootmem()), because this catches the (definitely buggy)
- * case of us accidentally initializing the bootmem allocator with
- * an invalid RAM area.
- */
- reserve_bootmem(CONFIG_MEMORY_START + PAGE_SIZE,
- (PFN_PHYS(start_pfn) + bootmap_size + PAGE_SIZE - 1)
- - CONFIG_MEMORY_START,
- BOOTMEM_DEFAULT);
-
- /*
- * reserve physical page 0 - it's a special BIOS page on many boxes,
- * enabling clean reboots, SMP operation, laptop functions.
- */
- reserve_bootmem(CONFIG_MEMORY_START, PAGE_SIZE, BOOTMEM_DEFAULT);
-
- /*
- * reserve memory hole
- */
-#ifdef CONFIG_MEMHOLE
- reserve_bootmem(CONFIG_MEMHOLE_START, CONFIG_MEMHOLE_SIZE,
- BOOTMEM_DEFAULT);
-#endif
-
-#ifdef CONFIG_BLK_DEV_INITRD
- if (LOADER_TYPE && INITRD_START) {
- if (INITRD_START + INITRD_SIZE <= (max_low_pfn << PAGE_SHIFT)) {
- reserve_bootmem(INITRD_START, INITRD_SIZE,
- BOOTMEM_DEFAULT);
- initrd_start = INITRD_START + PAGE_OFFSET;
- initrd_end = initrd_start + INITRD_SIZE;
- printk("initrd:start[%08lx],size[%08lx]\n",
- initrd_start, INITRD_SIZE);
- } else {
- printk("initrd extends beyond end of memory "
- "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
- INITRD_START + INITRD_SIZE,
- max_low_pfn << PAGE_SHIFT);
-
- initrd_start = 0;
- }
- }
-#endif
-
- return max_low_pfn;
-}
-#else /* CONFIG_DISCONTIGMEM */
-extern unsigned long setup_memory(void);
-#endif /* CONFIG_DISCONTIGMEM */
-
-void __init setup_arch(char **cmdline_p)
-{
- ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
-
- boot_cpu_data.cpu_clock = M32R_CPUCLK;
- boot_cpu_data.bus_clock = M32R_BUSCLK;
- boot_cpu_data.timer_divide = M32R_TIMER_DIVIDE;
-
-#ifdef CONFIG_BLK_DEV_RAM
- rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK;
- rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0);
- rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0);
-#endif
-
- if (!MOUNT_ROOT_RDONLY)
- root_mountflags &= ~MS_RDONLY;
-
-#ifdef CONFIG_VT
-#if defined(CONFIG_VGA_CONSOLE)
- conswitchp = &vga_con;
-#elif defined(CONFIG_DUMMY_CONSOLE)
- conswitchp = &dummy_con;
-#endif
-#endif
-
-#ifdef CONFIG_DISCONTIGMEM
- nodes_clear(node_online_map);
- node_set_online(0);
- node_set_online(1);
-#endif /* CONFIG_DISCONTIGMEM */
-
- init_mm.start_code = (unsigned long) _text;
- init_mm.end_code = (unsigned long) _etext;
- init_mm.end_data = (unsigned long) _edata;
- init_mm.brk = (unsigned long) _end;
-
- code_resource.start = virt_to_phys(_text);
- code_resource.end = virt_to_phys(_etext)-1;
- data_resource.start = virt_to_phys(_etext);
- data_resource.end = virt_to_phys(_edata)-1;
-
- parse_mem_cmdline(cmdline_p);
-
- setup_memory();
-
- paging_init();
-}
-
-static struct cpu cpu_devices[NR_CPUS];
-
-static int __init topology_init(void)
-{
- int i;
-
- for_each_present_cpu(i)
- register_cpu(&cpu_devices[i], i);
-
- return 0;
-}
-
-subsys_initcall(topology_init);
-
-#ifdef CONFIG_PROC_FS
-/*
- * Get CPU information for use by the procfs.
- */
-static int show_cpuinfo(struct seq_file *m, void *v)
-{
- struct cpuinfo_m32r *c = v;
- unsigned long cpu = c - cpu_data;
-
-#ifdef CONFIG_SMP
- if (!cpu_online(cpu))
- return 0;
-#endif /* CONFIG_SMP */
-
- seq_printf(m, "processor\t: %ld\n", cpu);
-
-#if defined(CONFIG_CHIP_VDEC2)
- seq_printf(m, "cpu family\t: VDEC2\n"
- "cache size\t: Unknown\n");
-#elif defined(CONFIG_CHIP_M32700)
- seq_printf(m,"cpu family\t: M32700\n"
- "cache size\t: I-8KB/D-8KB\n");
-#elif defined(CONFIG_CHIP_M32102)
- seq_printf(m,"cpu family\t: M32102\n"
- "cache size\t: I-8KB\n");
-#elif defined(CONFIG_CHIP_OPSP)
- seq_printf(m,"cpu family\t: OPSP\n"
- "cache size\t: I-8KB/D-8KB\n");
-#elif defined(CONFIG_CHIP_MP)
- seq_printf(m, "cpu family\t: M32R-MP\n"
- "cache size\t: I-xxKB/D-xxKB\n");
-#elif defined(CONFIG_CHIP_M32104)
- seq_printf(m,"cpu family\t: M32104\n"
- "cache size\t: I-8KB/D-8KB\n");
-#else
- seq_printf(m, "cpu family\t: Unknown\n");
-#endif
- seq_printf(m, "bogomips\t: %lu.%02lu\n",
- c->loops_per_jiffy/(500000/HZ),
- (c->loops_per_jiffy/(5000/HZ)) % 100);
-#if defined(CONFIG_PLAT_MAPPI)
- seq_printf(m, "Machine\t\t: Mappi Evaluation board\n");
-#elif defined(CONFIG_PLAT_MAPPI2)
- seq_printf(m, "Machine\t\t: Mappi-II Evaluation board\n");
-#elif defined(CONFIG_PLAT_MAPPI3)
- seq_printf(m, "Machine\t\t: Mappi-III Evaluation board\n");
-#elif defined(CONFIG_PLAT_M32700UT)
- seq_printf(m, "Machine\t\t: M32700UT Evaluation board\n");
-#elif defined(CONFIG_PLAT_OPSPUT)
- seq_printf(m, "Machine\t\t: OPSPUT Evaluation board\n");
-#elif defined(CONFIG_PLAT_USRV)
- seq_printf(m, "Machine\t\t: uServer\n");
-#elif defined(CONFIG_PLAT_OAKS32R)
- seq_printf(m, "Machine\t\t: OAKS32R\n");
-#elif defined(CONFIG_PLAT_M32104UT)
- seq_printf(m, "Machine\t\t: M3T-M32104UT uT Engine board\n");
-#else
- seq_printf(m, "Machine\t\t: Unknown\n");
-#endif
-
-#define PRINT_CLOCK(name, value) \
- seq_printf(m, name " clock\t: %d.%02dMHz\n", \
- ((value) / 1000000), ((value) % 1000000)/10000)
-
- PRINT_CLOCK("CPU", (int)c->cpu_clock);
- PRINT_CLOCK("Bus", (int)c->bus_clock);
-
- seq_printf(m, "\n");
-
- return 0;
-}
-
-static void *c_start(struct seq_file *m, loff_t *pos)
-{
- return *pos < NR_CPUS ? cpu_data + *pos : NULL;
-}
-
-static void *c_next(struct seq_file *m, void *v, loff_t *pos)
-{
- ++*pos;
- return c_start(m, pos);
-}
-
-static void c_stop(struct seq_file *m, void *v)
-{
-}
-
-const struct seq_operations cpuinfo_op = {
- .start = c_start,
- .next = c_next,
- .stop = c_stop,
- .show = show_cpuinfo,
-};
-#endif /* CONFIG_PROC_FS */
-
-unsigned long cpu_initialized __initdata = 0;
-
-/*
- * cpu_init() initializes state that is per-CPU. Some data is already
- * initialized (naturally) in the bootstrap process.
- * We reload them nevertheless, this function acts as a
- * 'CPU state barrier', nothing should get across.
- */
-#if defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_XNUX2) \
- || defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_M32102) \
- || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104)
-void __init cpu_init (void)
-{
- int cpu_id = smp_processor_id();
-
- if (test_and_set_bit(cpu_id, &cpu_initialized)) {
- printk(KERN_WARNING "CPU#%d already initialized!\n", cpu_id);
- for ( ; ; )
- local_irq_enable();
- }
- printk(KERN_INFO "Initializing CPU#%d\n", cpu_id);
-
- /* Set up and load the per-CPU TSS and LDT */
- mmgrab(&init_mm);
- current->active_mm = &init_mm;
- if (current->mm)
- BUG();
-
- /* Force FPU initialization */
- current_thread_info()->status = 0;
- clear_used_math();
-
-#ifdef CONFIG_MMU
- /* Set up MMU */
- init_mmu();
-#endif
-
- /* Set up ICUIMASK */
- outl(0x00070000, M32R_ICU_IMASK_PORTL); /* imask=111 */
-}
-#endif /* defined(CONFIG_CHIP_VDEC2) ... */
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0
-/*
- * linux/arch/m32r/kernel/signal.c
- *
- * Copyright (c) 2003 Hitoshi Yamamoto
- *
- * Taken from i386 version.
- * Copyright (C) 1991, 1992 Linus Torvalds
- *
- * 1997-11-28 Modified for POSIX.1b signals by Richard Henderson
- * 2000-06-20 Pentium III FXSR, SSE support by Gareth Hughes
- */
-
-#include <linux/sched.h>
-#include <linux/mm.h>
-#include <linux/smp.h>
-#include <linux/kernel.h>
-#include <linux/signal.h>
-#include <linux/errno.h>
-#include <linux/wait.h>
-#include <linux/unistd.h>
-#include <linux/stddef.h>
-#include <linux/personality.h>
-#include <linux/tracehook.h>
-#include <asm/cacheflush.h>
-#include <asm/ucontext.h>
-#include <linux/uaccess.h>
-
-#define DEBUG_SIG 0
-
-/*
- * Do a signal return; undo the signal stack.
- */
-
-struct rt_sigframe
-{
- int sig;
- struct siginfo __user *pinfo;
- void __user *puc;
- struct siginfo info;
- struct ucontext uc;
-// struct _fpstate fpstate;
-};
-
-static int
-restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc,
- int *r0_p)
-{
- unsigned int err = 0;
-
- /* Always make any pending restarted system calls return -EINTR */
- current->restart_block.fn = do_no_restart_syscall;
-
-#define COPY(x) err |= __get_user(regs->x, &sc->sc_##x)
- COPY(r4);
- COPY(r5);
- COPY(r6);
- COPY(pt_regs);
- /* COPY(r0); Skip r0 */
- COPY(r1);
- COPY(r2);
- COPY(r3);
- COPY(r7);
- COPY(r8);
- COPY(r9);
- COPY(r10);
- COPY(r11);
- COPY(r12);
- COPY(acc0h);
- COPY(acc0l);
- COPY(acc1h); /* ISA_DSP_LEVEL2 only */
- COPY(acc1l); /* ISA_DSP_LEVEL2 only */
- COPY(psw);
- COPY(bpc);
- COPY(bbpsw);
- COPY(bbpc);
- COPY(spu);
- COPY(fp);
- COPY(lr);
- COPY(spi);
-#undef COPY
-
- regs->syscall_nr = -1; /* disable syscall checks */
- err |= __get_user(*r0_p, &sc->sc_r0);
-
- return err;
-}
-
-asmlinkage int
-sys_rt_sigreturn(unsigned long r0, unsigned long r1,
- unsigned long r2, unsigned long r3, unsigned long r4,
- unsigned long r5, unsigned long r6, struct pt_regs *regs)
-{
- struct rt_sigframe __user *frame = (struct rt_sigframe __user *)regs->spu;
- sigset_t set;
- int result;
-
- if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
- goto badframe;
- if (__copy_from_user(&set, &frame->uc.uc_sigmask, sizeof(set)))
- goto badframe;
-
- set_current_blocked(&set);
-
- if (restore_sigcontext(regs, &frame->uc.uc_mcontext, &result))
- goto badframe;
-
- if (restore_altstack(&frame->uc.uc_stack))
- goto badframe;
-
- return result;
-
-badframe:
- force_sig(SIGSEGV, current);
- return 0;
-}
-
-/*
- * Set up a signal frame.
- */
-
-static int
-setup_sigcontext(struct sigcontext __user *sc, struct pt_regs *regs,
- unsigned long mask)
-{
- int err = 0;
-
-#define COPY(x) err |= __put_user(regs->x, &sc->sc_##x)
- COPY(r4);
- COPY(r5);
- COPY(r6);
- COPY(pt_regs);
- COPY(r0);
- COPY(r1);
- COPY(r2);
- COPY(r3);
- COPY(r7);
- COPY(r8);
- COPY(r9);
- COPY(r10);
- COPY(r11);
- COPY(r12);
- COPY(acc0h);
- COPY(acc0l);
- COPY(acc1h); /* ISA_DSP_LEVEL2 only */
- COPY(acc1l); /* ISA_DSP_LEVEL2 only */
- COPY(psw);
- COPY(bpc);
- COPY(bbpsw);
- COPY(bbpc);
- COPY(spu);
- COPY(fp);
- COPY(lr);
- COPY(spi);
-#undef COPY
-
- err |= __put_user(mask, &sc->oldmask);
-
- return err;
-}
-
-/*
- * Determine which stack to use..
- */
-static inline void __user *
-get_sigframe(struct ksignal *ksig, unsigned long sp, size_t frame_size)
-{
- return (void __user *)((sigsp(sp, ksig) - frame_size) & -8ul);
-}
-
-static int setup_rt_frame(struct ksignal *ksig, sigset_t *set,
- struct pt_regs *regs)
-{
- struct rt_sigframe __user *frame;
- int err = 0;
- int sig = ksig->sig;
-
- frame = get_sigframe(ksig, regs->spu, sizeof(*frame));
-
- if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame)))
- return -EFAULT;
-
- err |= __put_user(sig, &frame->sig);
- if (err)
- return -EFAULT;
-
- err |= __put_user(&frame->info, &frame->pinfo);
- err |= __put_user(&frame->uc, &frame->puc);
- err |= copy_siginfo_to_user(&frame->info, &ksig->info);
- if (err)
- return -EFAULT;
-
- /* Create the ucontext. */
- err |= __put_user(0, &frame->uc.uc_flags);
- err |= __put_user(0, &frame->uc.uc_link);
- err |= __save_altstack(&frame->uc.uc_stack, regs->spu);
- err |= setup_sigcontext(&frame->uc.uc_mcontext, regs, set->sig[0]);
- err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set));
- if (err)
- return -EFAULT;
-
- /* Set up to return from userspace. */
- regs->lr = (unsigned long)ksig->ka.sa.sa_restorer;
-
- /* Set up registers for signal handler */
- regs->spu = (unsigned long)frame;
- regs->r0 = sig; /* Arg for signal handler */
- regs->r1 = (unsigned long)&frame->info;
- regs->r2 = (unsigned long)&frame->uc;
- regs->bpc = (unsigned long)ksig->ka.sa.sa_handler;
-
-#if DEBUG_SIG
- printk("SIG deliver (%s:%d): sp=%p pc=%p\n",
- current->comm, current->pid, frame, regs->pc);
-#endif
-
- return 0;
-}
-
-static int prev_insn(struct pt_regs *regs)
-{
- u16 inst;
- if (get_user(inst, (u16 __user *)(regs->bpc - 2)))
- return -EFAULT;
- if ((inst & 0xfff0) == 0x10f0) /* trap ? */
- regs->bpc -= 2;
- else
- regs->bpc -= 4;
- regs->syscall_nr = -1;
- return 0;
-}
-
-/*
- * OK, we're invoking a handler
- */
-
-static void
-handle_signal(struct ksignal *ksig, struct pt_regs *regs)
-{
- int ret;
-
- /* Are we from a system call? */
- if (regs->syscall_nr >= 0) {
- /* If so, check system call restarting.. */
- switch (regs->r0) {
- case -ERESTART_RESTARTBLOCK:
- case -ERESTARTNOHAND:
- regs->r0 = -EINTR;
- break;
-
- case -ERESTARTSYS:
- if (!(ksig->ka.sa.sa_flags & SA_RESTART)) {
- regs->r0 = -EINTR;
- break;
- }
- /* fallthrough */
- case -ERESTARTNOINTR:
- regs->r0 = regs->orig_r0;
- if (prev_insn(regs) < 0)
- return;
- }
- }
-
- /* Set up the stack frame */
- ret = setup_rt_frame(ksig, sigmask_to_save(), regs);
-
- signal_setup_done(ret, ksig, 0);
-}
-
-/*
- * Note that 'init' is a special process: it doesn't get signals it doesn't
- * want to handle. Thus you cannot kill init even with a SIGKILL even by
- * mistake.
- */
-static void do_signal(struct pt_regs *regs)
-{
- struct ksignal ksig;
-
- /*
- * We want the common case to go fast, which
- * is why we may in certain cases get here from
- * kernel mode. Just return without doing anything
- * if so.
- */
- if (!user_mode(regs))
- return;
-
- if (get_signal(&ksig)) {
- /* Re-enable any watchpoints before delivering the
- * signal to user space. The processor register will
- * have been cleared if the watchpoint triggered
- * inside the kernel.
- */
-
- /* Whee! Actually deliver the signal. */
- handle_signal(&ksig, regs);
-
- return;
- }
-
- /* Did we come from a system call? */
- if (regs->syscall_nr >= 0) {
- /* Restart the system call - no handlers present */
- if (regs->r0 == -ERESTARTNOHAND ||
- regs->r0 == -ERESTARTSYS ||
- regs->r0 == -ERESTARTNOINTR) {
- regs->r0 = regs->orig_r0;
- prev_insn(regs);
- } else if (regs->r0 == -ERESTART_RESTARTBLOCK){
- regs->r0 = regs->orig_r0;
- regs->r7 = __NR_restart_syscall;
- prev_insn(regs);
- }
- }
- restore_saved_sigmask();
-}
-
-/*
- * notification of userspace execution resumption
- * - triggered by current->work.notify_resume
- */
-void do_notify_resume(struct pt_regs *regs, __u32 thread_info_flags)
-{
- /* Pending single-step? */
- if (thread_info_flags & _TIF_SINGLESTEP)
- clear_thread_flag(TIF_SINGLESTEP);
-
- /* deal with pending signal delivery */
- if (thread_info_flags & _TIF_SIGPENDING)
- do_signal(regs);
-
- if (thread_info_flags & _TIF_NOTIFY_RESUME) {
- clear_thread_flag(TIF_NOTIFY_RESUME);
- tracehook_notify_resume(regs);
- }
-}
+++ /dev/null
-/*
- * linux/arch/m32r/kernel/smp.c
- *
- * M32R SMP support routines.
- *
- * Copyright (c) 2001, 2002 Hitoshi Yamamoto
- *
- * Taken from i386 version.
- * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
- * (c) 1998-99, 2000 Ingo Molnar <mingo@redhat.com>
- *
- * This code is released under the GNU General Public License version 2 or
- * later.
- */
-
-#undef DEBUG_SMP
-
-#include <linux/irq.h>
-#include <linux/interrupt.h>
-#include <linux/sched.h>
-#include <linux/spinlock.h>
-#include <linux/mm.h>
-#include <linux/smp.h>
-#include <linux/profile.h>
-#include <linux/cpu.h>
-
-#include <asm/cacheflush.h>
-#include <asm/pgalloc.h>
-#include <linux/atomic.h>
-#include <asm/io.h>
-#include <asm/mmu_context.h>
-#include <asm/m32r.h>
-#include <asm/tlbflush.h>
-
-/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
-/* Data structures and variables */
-/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
-
-/*
- * For flush_cache_all()
- */
-static DEFINE_SPINLOCK(flushcache_lock);
-static volatile unsigned long flushcache_cpumask = 0;
-
-/*
- * For flush_tlb_others()
- */
-static cpumask_t flush_cpumask;
-static struct mm_struct *flush_mm;
-static struct vm_area_struct *flush_vma;
-static volatile unsigned long flush_va;
-static DEFINE_SPINLOCK(tlbstate_lock);
-#define FLUSH_ALL 0xffffffff
-
-DECLARE_PER_CPU(int, prof_multiplier);
-DECLARE_PER_CPU(int, prof_old_multiplier);
-DECLARE_PER_CPU(int, prof_counter);
-
-extern spinlock_t ipi_lock[];
-
-/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
-/* Function Prototypes */
-/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
-
-void smp_reschedule_interrupt(void);
-void smp_flush_cache_all_interrupt(void);
-
-static void flush_tlb_all_ipi(void *);
-static void flush_tlb_others(cpumask_t, struct mm_struct *,
- struct vm_area_struct *, unsigned long);
-
-void smp_invalidate_interrupt(void);
-
-static void stop_this_cpu(void *);
-
-void smp_ipi_timer_interrupt(struct pt_regs *);
-void smp_local_timer_interrupt(void);
-
-static void send_IPI_allbutself(int, int);
-static void send_IPI_mask(const struct cpumask *, int, int);
-
-/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
-/* Rescheduling request Routines */
-/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
-
-/*==========================================================================*
- * Name: smp_send_reschedule
- *
- * Description: This routine requests other CPU to execute rescheduling.
- * 1.Send 'RESCHEDULE_IPI' to other CPU.
- * Request other CPU to execute 'smp_reschedule_interrupt()'.
- *
- * Born on Date: 2002.02.05
- *
- * Arguments: cpu_id - Target CPU ID
- *
- * Returns: void (cannot fail)
- *
- * Modification log:
- * Date Who Description
- * ---------- --- --------------------------------------------------------
- *
- *==========================================================================*/
-void smp_send_reschedule(int cpu_id)
-{
- WARN_ON(cpu_is_offline(cpu_id));
- send_IPI_mask(cpumask_of(cpu_id), RESCHEDULE_IPI, 1);
-}
-
-/*==========================================================================*
- * Name: smp_reschedule_interrupt
- *
- * Description: This routine executes on CPU which received
- * 'RESCHEDULE_IPI'.
- *
- * Born on Date: 2002.02.05
- *
- * Arguments: NONE
- *
- * Returns: void (cannot fail)
- *
- * Modification log:
- * Date Who Description
- * ---------- --- --------------------------------------------------------
- *
- *==========================================================================*/
-void smp_reschedule_interrupt(void)
-{
- scheduler_ipi();
-}
-
-/*==========================================================================*
- * Name: smp_flush_cache_all
- *
- * Description: This routine sends a 'INVALIDATE_CACHE_IPI' to all other
- * CPUs in the system.
- *
- * Born on Date: 2003-05-28
- *
- * Arguments: NONE
- *
- * Returns: void (cannot fail)
- *
- * Modification log:
- * Date Who Description
- * ---------- --- --------------------------------------------------------
- *
- *==========================================================================*/
-void smp_flush_cache_all(void)
-{
- cpumask_t cpumask;
- unsigned long *mask;
-
- preempt_disable();
- cpumask_copy(&cpumask, cpu_online_mask);
- cpumask_clear_cpu(smp_processor_id(), &cpumask);
- spin_lock(&flushcache_lock);
- mask=cpumask_bits(&cpumask);
- atomic_or(*mask, (atomic_t *)&flushcache_cpumask);
- send_IPI_mask(&cpumask, INVALIDATE_CACHE_IPI, 0);
- _flush_cache_copyback_all();
- while (flushcache_cpumask)
- mb();
- spin_unlock(&flushcache_lock);
- preempt_enable();
-}
-EXPORT_SYMBOL(smp_flush_cache_all);
-
-void smp_flush_cache_all_interrupt(void)
-{
- _flush_cache_copyback_all();
- clear_bit(smp_processor_id(), &flushcache_cpumask);
-}
-
-/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
-/* TLB flush request Routines */
-/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
-
-/*==========================================================================*
- * Name: smp_flush_tlb_all
- *
- * Description: This routine flushes all processes TLBs.
- * 1.Request other CPU to execute 'flush_tlb_all_ipi()'.
- * 2.Execute 'do_flush_tlb_all_local()'.
- *
- * Born on Date: 2002.02.05
- *
- * Arguments: NONE
- *
- * Returns: void (cannot fail)
- *
- * Modification log:
- * Date Who Description
- * ---------- --- --------------------------------------------------------
- *
- *==========================================================================*/
-void smp_flush_tlb_all(void)
-{
- unsigned long flags;
-
- preempt_disable();
- local_irq_save(flags);
- __flush_tlb_all();
- local_irq_restore(flags);
- smp_call_function(flush_tlb_all_ipi, NULL, 1);
- preempt_enable();
-}
-
-/*==========================================================================*
- * Name: flush_tlb_all_ipi
- *
- * Description: This routine flushes all local TLBs.
- * 1.Execute 'do_flush_tlb_all_local()'.
- *
- * Born on Date: 2002.02.05
- *
- * Arguments: *info - not used
- *
- * Returns: void (cannot fail)
- *
- * Modification log:
- * Date Who Description
- * ---------- --- --------------------------------------------------------
- *
- *==========================================================================*/
-static void flush_tlb_all_ipi(void *info)
-{
- __flush_tlb_all();
-}
-
-/*==========================================================================*
- * Name: smp_flush_tlb_mm
- *
- * Description: This routine flushes the specified mm context TLB's.
- *
- * Born on Date: 2002.02.05
- *
- * Arguments: *mm - a pointer to the mm struct for flush TLB
- *
- * Returns: void (cannot fail)
- *
- * Modification log:
- * Date Who Description
- * ---------- --- --------------------------------------------------------
- *
- *==========================================================================*/
-void smp_flush_tlb_mm(struct mm_struct *mm)
-{
- int cpu_id;
- cpumask_t cpu_mask;
- unsigned long *mmc;
- unsigned long flags;
-
- preempt_disable();
- cpu_id = smp_processor_id();
- mmc = &mm->context[cpu_id];
- cpumask_copy(&cpu_mask, mm_cpumask(mm));
- cpumask_clear_cpu(cpu_id, &cpu_mask);
-
- if (*mmc != NO_CONTEXT) {
- local_irq_save(flags);
- *mmc = NO_CONTEXT;
- if (mm == current->mm)
- activate_context(mm);
- else
- cpumask_clear_cpu(cpu_id, mm_cpumask(mm));
- local_irq_restore(flags);
- }
- if (!cpumask_empty(&cpu_mask))
- flush_tlb_others(cpu_mask, mm, NULL, FLUSH_ALL);
-
- preempt_enable();
-}
-
-/*==========================================================================*
- * Name: smp_flush_tlb_range
- *
- * Description: This routine flushes a range of pages.
- *
- * Born on Date: 2002.02.05
- *
- * Arguments: *mm - a pointer to the mm struct for flush TLB
- * start - not used
- * end - not used
- *
- * Returns: void (cannot fail)
- *
- * Modification log:
- * Date Who Description
- * ---------- --- --------------------------------------------------------
- *
- *==========================================================================*/
-void smp_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
- unsigned long end)
-{
- smp_flush_tlb_mm(vma->vm_mm);
-}
-
-/*==========================================================================*
- * Name: smp_flush_tlb_page
- *
- * Description: This routine flushes one page.
- *
- * Born on Date: 2002.02.05
- *
- * Arguments: *vma - a pointer to the vma struct include va
- * va - virtual address for flush TLB
- *
- * Returns: void (cannot fail)
- *
- * Modification log:
- * Date Who Description
- * ---------- --- --------------------------------------------------------
- *
- *==========================================================================*/
-void smp_flush_tlb_page(struct vm_area_struct *vma, unsigned long va)
-{
- struct mm_struct *mm = vma->vm_mm;
- int cpu_id;
- cpumask_t cpu_mask;
- unsigned long *mmc;
- unsigned long flags;
-
- preempt_disable();
- cpu_id = smp_processor_id();
- mmc = &mm->context[cpu_id];
- cpumask_copy(&cpu_mask, mm_cpumask(mm));
- cpumask_clear_cpu(cpu_id, &cpu_mask);
-
-#ifdef DEBUG_SMP
- if (!mm)
- BUG();
-#endif
-
- if (*mmc != NO_CONTEXT) {
- local_irq_save(flags);
- va &= PAGE_MASK;
- va |= (*mmc & MMU_CONTEXT_ASID_MASK);
- __flush_tlb_page(va);
- local_irq_restore(flags);
- }
- if (!cpumask_empty(&cpu_mask))
- flush_tlb_others(cpu_mask, mm, vma, va);
-
- preempt_enable();
-}
-
-/*==========================================================================*
- * Name: flush_tlb_others
- *
- * Description: This routine requests other CPU to execute flush TLB.
- * 1.Setup parameters.
- * 2.Send 'INVALIDATE_TLB_IPI' to other CPU.
- * Request other CPU to execute 'smp_invalidate_interrupt()'.
- * 3.Wait for other CPUs operation finished.
- *
- * Born on Date: 2002.02.05
- *
- * Arguments: cpumask - bitmap of target CPUs
- * *mm - a pointer to the mm struct for flush TLB
- * *vma - a pointer to the vma struct include va
- * va - virtual address for flush TLB
- *
- * Returns: void (cannot fail)
- *
- * Modification log:
- * Date Who Description
- * ---------- --- --------------------------------------------------------
- *
- *==========================================================================*/
-static void flush_tlb_others(cpumask_t cpumask, struct mm_struct *mm,
- struct vm_area_struct *vma, unsigned long va)
-{
- unsigned long *mask;
-#ifdef DEBUG_SMP
- unsigned long flags;
- __save_flags(flags);
- if (!(flags & 0x0040)) /* Interrupt Disable NONONO */
- BUG();
-#endif /* DEBUG_SMP */
-
- /*
- * A couple of (to be removed) sanity checks:
- *
- * - we do not send IPIs to not-yet booted CPUs.
- * - current CPU must not be in mask
- * - mask must exist :)
- */
- BUG_ON(cpumask_empty(&cpumask));
-
- BUG_ON(cpumask_test_cpu(smp_processor_id(), &cpumask));
- BUG_ON(!mm);
-
- /* If a CPU which we ran on has gone down, OK. */
- cpumask_and(&cpumask, &cpumask, cpu_online_mask);
- if (cpumask_empty(&cpumask))
- return;
-
- /*
- * i'm not happy about this global shared spinlock in the
- * MM hot path, but we'll see how contended it is.
- * Temporarily this turns IRQs off, so that lockups are
- * detected by the NMI watchdog.
- */
- spin_lock(&tlbstate_lock);
-
- flush_mm = mm;
- flush_vma = vma;
- flush_va = va;
- mask=cpumask_bits(&cpumask);
- atomic_or(*mask, (atomic_t *)&flush_cpumask);
-
- /*
- * We have to send the IPI only to
- * CPUs affected.
- */
- send_IPI_mask(&cpumask, INVALIDATE_TLB_IPI, 0);
-
- while (!cpumask_empty(&flush_cpumask)) {
- /* nothing. lockup detection does not belong here */
- mb();
- }
-
- flush_mm = NULL;
- flush_vma = NULL;
- flush_va = 0;
- spin_unlock(&tlbstate_lock);
-}
-
-/*==========================================================================*
- * Name: smp_invalidate_interrupt
- *
- * Description: This routine executes on CPU which received
- * 'INVALIDATE_TLB_IPI'.
- * 1.Flush local TLB.
- * 2.Report flush TLB process was finished.
- *
- * Born on Date: 2002.02.05
- *
- * Arguments: NONE
- *
- * Returns: void (cannot fail)
- *
- * Modification log:
- * Date Who Description
- * ---------- --- --------------------------------------------------------
- *
- *==========================================================================*/
-void smp_invalidate_interrupt(void)
-{
- int cpu_id = smp_processor_id();
- unsigned long *mmc = &flush_mm->context[cpu_id];
-
- if (!cpumask_test_cpu(cpu_id, &flush_cpumask))
- return;
-
- if (flush_va == FLUSH_ALL) {
- *mmc = NO_CONTEXT;
- if (flush_mm == current->active_mm)
- activate_context(flush_mm);
- else
- cpumask_clear_cpu(cpu_id, mm_cpumask(flush_mm));
- } else {
- unsigned long va = flush_va;
-
- if (*mmc != NO_CONTEXT) {
- va &= PAGE_MASK;
- va |= (*mmc & MMU_CONTEXT_ASID_MASK);
- __flush_tlb_page(va);
- }
- }
- cpumask_clear_cpu(cpu_id, &flush_cpumask);
-}
-
-/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
-/* Stop CPU request Routines */
-/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
-
-/*==========================================================================*
- * Name: smp_send_stop
- *
- * Description: This routine requests stop all CPUs.
- * 1.Request other CPU to execute 'stop_this_cpu()'.
- *
- * Born on Date: 2002.02.05
- *
- * Arguments: NONE
- *
- * Returns: void (cannot fail)
- *
- * Modification log:
- * Date Who Description
- * ---------- --- --------------------------------------------------------
- *
- *==========================================================================*/
-void smp_send_stop(void)
-{
- smp_call_function(stop_this_cpu, NULL, 0);
-}
-
-/*==========================================================================*
- * Name: stop_this_cpu
- *
- * Description: This routine halt CPU.
- *
- * Born on Date: 2002.02.05
- *
- * Arguments: NONE
- *
- * Returns: void (cannot fail)
- *
- * Modification log:
- * Date Who Description
- * ---------- --- --------------------------------------------------------
- *
- *==========================================================================*/
-static void stop_this_cpu(void *dummy)
-{
- int cpu_id = smp_processor_id();
-
- /*
- * Remove this CPU:
- */
- set_cpu_online(cpu_id, false);
-
- /*
- * PSW IE = 1;
- * IMASK = 0;
- * goto SLEEP
- */
- local_irq_disable();
- outl(0, M32R_ICU_IMASK_PORTL);
- inl(M32R_ICU_IMASK_PORTL); /* dummy read */
- local_irq_enable();
-
- for ( ; ; );
-}
-
-void arch_send_call_function_ipi_mask(const struct cpumask *mask)
-{
- send_IPI_mask(mask, CALL_FUNCTION_IPI, 0);
-}
-
-void arch_send_call_function_single_ipi(int cpu)
-{
- send_IPI_mask(cpumask_of(cpu), CALL_FUNC_SINGLE_IPI, 0);
-}
-
-/*==========================================================================*
- * Name: smp_call_function_interrupt
- *
- * Description: This routine executes on CPU which received
- * 'CALL_FUNCTION_IPI'.
- *
- * Born on Date: 2002.02.05
- *
- * Arguments: NONE
- *
- * Returns: void (cannot fail)
- *
- * Modification log:
- * Date Who Description
- * ---------- --- --------------------------------------------------------
- *
- *==========================================================================*/
-void smp_call_function_interrupt(void)
-{
- irq_enter();
- generic_smp_call_function_interrupt();
- irq_exit();
-}
-
-void smp_call_function_single_interrupt(void)
-{
- irq_enter();
- generic_smp_call_function_single_interrupt();
- irq_exit();
-}
-
-/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
-/* Timer Routines */
-/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
-
-/*==========================================================================*
- * Name: smp_send_timer
- *
- * Description: This routine sends a 'LOCAL_TIMER_IPI' to all other CPUs
- * in the system.
- *
- * Born on Date: 2002.02.05
- *
- * Arguments: NONE
- *
- * Returns: void (cannot fail)
- *
- * Modification log:
- * Date Who Description
- * ---------- --- --------------------------------------------------------
- *
- *==========================================================================*/
-void smp_send_timer(void)
-{
- send_IPI_allbutself(LOCAL_TIMER_IPI, 1);
-}
-
-/*==========================================================================*
- * Name: smp_send_timer
- *
- * Description: This routine executes on CPU which received
- * 'LOCAL_TIMER_IPI'.
- *
- * Born on Date: 2002.02.05
- *
- * Arguments: *regs - a pointer to the saved regster info
- *
- * Returns: void (cannot fail)
- *
- * Modification log:
- * Date Who Description
- * ---------- --- --------------------------------------------------------
- *
- *==========================================================================*/
-void smp_ipi_timer_interrupt(struct pt_regs *regs)
-{
- struct pt_regs *old_regs;
- old_regs = set_irq_regs(regs);
- irq_enter();
- smp_local_timer_interrupt();
- irq_exit();
- set_irq_regs(old_regs);
-}
-
-/*==========================================================================*
- * Name: smp_local_timer_interrupt
- *
- * Description: Local timer interrupt handler. It does both profiling and
- * process statistics/rescheduling.
- * We do profiling in every local tick, statistics/rescheduling
- * happen only every 'profiling multiplier' ticks. The default
- * multiplier is 1 and it can be changed by writing the new
- * multiplier value into /proc/profile.
- *
- * Born on Date: 2002.02.05
- *
- * Arguments: *regs - a pointer to the saved regster info
- *
- * Returns: void (cannot fail)
- *
- * Original: arch/i386/kernel/apic.c
- *
- * Modification log:
- * Date Who Description
- * ---------- --- --------------------------------------------------------
- * 2003-06-24 hy use per_cpu structure.
- *==========================================================================*/
-void smp_local_timer_interrupt(void)
-{
- int user = user_mode(get_irq_regs());
- int cpu_id = smp_processor_id();
-
- /*
- * The profiling function is SMP safe. (nothing can mess
- * around with "current", and the profiling counters are
- * updated with atomic operations). This is especially
- * useful with a profiling multiplier != 1
- */
-
- profile_tick(CPU_PROFILING);
-
- if (--per_cpu(prof_counter, cpu_id) <= 0) {
- /*
- * The multiplier may have changed since the last time we got
- * to this point as a result of the user writing to
- * /proc/profile. In this case we need to adjust the APIC
- * timer accordingly.
- *
- * Interrupts are already masked off at this point.
- */
- per_cpu(prof_counter, cpu_id)
- = per_cpu(prof_multiplier, cpu_id);
- if (per_cpu(prof_counter, cpu_id)
- != per_cpu(prof_old_multiplier, cpu_id))
- {
- per_cpu(prof_old_multiplier, cpu_id)
- = per_cpu(prof_counter, cpu_id);
- }
-
- update_process_times(user);
- }
-}
-
-/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
-/* Send IPI Routines */
-/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
-
-/*==========================================================================*
- * Name: send_IPI_allbutself
- *
- * Description: This routine sends a IPI to all other CPUs in the system.
- *
- * Born on Date: 2002.02.05
- *
- * Arguments: ipi_num - Number of IPI
- * try - 0 : Send IPI certainly.
- * !0 : The following IPI is not sent when Target CPU
- * has not received the before IPI.
- *
- * Returns: void (cannot fail)
- *
- * Modification log:
- * Date Who Description
- * ---------- --- --------------------------------------------------------
- *
- *==========================================================================*/
-static void send_IPI_allbutself(int ipi_num, int try)
-{
- cpumask_t cpumask;
-
- cpumask_copy(&cpumask, cpu_online_mask);
- cpumask_clear_cpu(smp_processor_id(), &cpumask);
-
- send_IPI_mask(&cpumask, ipi_num, try);
-}
-
-/*==========================================================================*
- * Name: send_IPI_mask
- *
- * Description: This routine sends a IPI to CPUs in the system.
- *
- * Born on Date: 2002.02.05
- *
- * Arguments: cpu_mask - Bitmap of target CPUs logical ID
- * ipi_num - Number of IPI
- * try - 0 : Send IPI certainly.
- * !0 : The following IPI is not sent when Target CPU
- * has not received the before IPI.
- *
- * Returns: void (cannot fail)
- *
- * Modification log:
- * Date Who Description
- * ---------- --- --------------------------------------------------------
- *
- *==========================================================================*/
-static void send_IPI_mask(const struct cpumask *cpumask, int ipi_num, int try)
-{
- cpumask_t physid_mask, tmp;
- int cpu_id, phys_id;
- int num_cpus = num_online_cpus();
-
- if (num_cpus <= 1) /* NO MP */
- return;
-
- cpumask_and(&tmp, cpumask, cpu_online_mask);
- BUG_ON(!cpumask_equal(cpumask, &tmp));
-
- cpumask_clear(&physid_mask);
- for_each_cpu(cpu_id, cpumask) {
- if ((phys_id = cpu_to_physid(cpu_id)) != -1)
- cpumask_set_cpu(phys_id, &physid_mask);
- }
-
- send_IPI_mask_phys(&physid_mask, ipi_num, try);
-}
-
-/*==========================================================================*
- * Name: send_IPI_mask_phys
- *
- * Description: This routine sends a IPI to other CPUs in the system.
- *
- * Born on Date: 2002.02.05
- *
- * Arguments: cpu_mask - Bitmap of target CPUs physical ID
- * ipi_num - Number of IPI
- * try - 0 : Send IPI certainly.
- * !0 : The following IPI is not sent when Target CPU
- * has not received the before IPI.
- *
- * Returns: IPICRi regster value.
- *
- * Modification log:
- * Date Who Description
- * ---------- --- --------------------------------------------------------
- *
- *==========================================================================*/
-unsigned long send_IPI_mask_phys(const cpumask_t *physid_mask, int ipi_num,
- int try)
-{
- spinlock_t *ipilock;
- volatile unsigned long *ipicr_addr;
- unsigned long ipicr_val;
- unsigned long my_physid_mask;
- unsigned long mask = cpumask_bits(physid_mask)[0];
-
-
- if (mask & ~physids_coerce(phys_cpu_present_map))
- BUG();
- if (ipi_num >= NR_IPIS || ipi_num < 0)
- BUG();
-
- mask <<= IPI_SHIFT;
- ipilock = &ipi_lock[ipi_num];
- ipicr_addr = (volatile unsigned long *)(M32R_ICU_IPICR_ADDR
- + (ipi_num << 2));
- my_physid_mask = ~(1 << smp_processor_id());
-
- /*
- * lock ipi_lock[i]
- * check IPICRi == 0
- * write IPICRi (send IPIi)
- * unlock ipi_lock[i]
- */
- spin_lock(ipilock);
- __asm__ __volatile__ (
- ";; CHECK IPICRi == 0 \n\t"
- ".fillinsn \n"
- "1: \n\t"
- "ld %0, @%1 \n\t"
- "and %0, %4 \n\t"
- "beqz %0, 2f \n\t"
- "bnez %3, 3f \n\t"
- "bra 1b \n\t"
- ";; WRITE IPICRi (send IPIi) \n\t"
- ".fillinsn \n"
- "2: \n\t"
- "st %2, @%1 \n\t"
- ".fillinsn \n"
- "3: \n\t"
- : "=&r"(ipicr_val)
- : "r"(ipicr_addr), "r"(mask), "r"(try), "r"(my_physid_mask)
- : "memory"
- );
- spin_unlock(ipilock);
-
- return ipicr_val;
-}
+++ /dev/null
-/*
- * linux/arch/m32r/kernel/smpboot.c
- * orig : i386 2.4.10
- *
- * M32R SMP booting functions
- *
- * Copyright (c) 2001, 2002, 2003 Hitoshi Yamamoto
- *
- * Taken from i386 version.
- * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
- * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
- *
- * Much of the core SMP work is based on previous work by Thomas Radke, to
- * whom a great many thanks are extended.
- *
- * Thanks to Intel for making available several different Pentium,
- * Pentium Pro and Pentium-II/Xeon MP machines.
- * Original development of Linux SMP code supported by Caldera.
- *
- * This code is released under the GNU General Public License version 2 or
- * later.
- *
- * Fixes
- * Felix Koop : NR_CPUS used properly
- * Jose Renau : Handle single CPU case.
- * Alan Cox : By repeated request
- * 8) - Total BogoMIP report.
- * Greg Wright : Fix for kernel stacks panic.
- * Erich Boleyn : MP v1.4 and additional changes.
- * Matthias Sattler : Changes for 2.1 kernel map.
- * Michel Lespinasse : Changes for 2.1 kernel map.
- * Michael Chastain : Change trampoline.S to gnu as.
- * Alan Cox : Dumb bug: 'B' step PPro's are fine
- * Ingo Molnar : Added APIC timers, based on code
- * from Jose Renau
- * Ingo Molnar : various cleanups and rewrites
- * Tigran Aivazian : fixed "0.00 in /proc/uptime on SMP" bug.
- * Maciej W. Rozycki : Bits for genuine 82489DX APICs
- * Martin J. Bligh : Added support for multi-quad systems
- */
-
-#include <linux/module.h>
-#include <linux/cpu.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/mm.h>
-#include <linux/sched.h>
-#include <linux/sched/task.h>
-#include <linux/err.h>
-#include <linux/irq.h>
-#include <linux/bootmem.h>
-#include <linux/delay.h>
-
-#include <asm/io.h>
-#include <asm/pgalloc.h>
-#include <asm/tlbflush.h>
-
-#define DEBUG_SMP
-#ifdef DEBUG_SMP
-#define Dprintk(x...) printk(x)
-#else
-#define Dprintk(x...)
-#endif
-
-extern cpumask_t cpu_initialized;
-
-/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
-/* Data structures and variables */
-/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
-
-/* Processor that is doing the boot up */
-static unsigned int bsp_phys_id = -1;
-
-/* Bitmask of physically existing CPUs */
-physid_mask_t phys_cpu_present_map;
-
-cpumask_t cpu_bootout_map;
-cpumask_t cpu_bootin_map;
-static cpumask_t cpu_callin_map;
-cpumask_t cpu_callout_map;
-EXPORT_SYMBOL(cpu_callout_map);
-
-/* Per CPU bogomips and other parameters */
-struct cpuinfo_m32r cpu_data[NR_CPUS] __cacheline_aligned;
-
-static int cpucount;
-static cpumask_t smp_commenced_mask;
-
-extern struct {
- void * spi;
- unsigned short ss;
-} stack_start;
-
-/* which physical physical ID maps to which logical CPU number */
-static volatile int physid_2_cpu[NR_CPUS];
-#define physid_to_cpu(physid) physid_2_cpu[physid]
-
-/* which logical CPU number maps to which physical ID */
-volatile int cpu_2_physid[NR_CPUS];
-
-DEFINE_PER_CPU(int, prof_multiplier) = 1;
-DEFINE_PER_CPU(int, prof_old_multiplier) = 1;
-DEFINE_PER_CPU(int, prof_counter) = 1;
-
-spinlock_t ipi_lock[NR_IPIS];
-
-static unsigned int calibration_result;
-
-/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
-/* Function Prototypes */
-/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
-
-static void init_ipi_lock(void);
-static void do_boot_cpu(int);
-
-int start_secondary(void *);
-static void smp_callin(void);
-static void smp_online(void);
-
-static void show_mp_info(int);
-static void smp_store_cpu_info(int);
-static void show_cpu_info(int);
-int setup_profiling_timer(unsigned int);
-static void init_cpu_to_physid(void);
-static void map_cpu_to_physid(int, int);
-static void unmap_cpu_to_physid(int, int);
-
-/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
-/* Boot up APs Routines : BSP */
-/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
-void smp_prepare_boot_cpu(void)
-{
- bsp_phys_id = hard_smp_processor_id();
- physid_set(bsp_phys_id, phys_cpu_present_map);
- set_cpu_online(0, true); /* BSP's cpu_id == 0 */
- cpumask_set_cpu(0, &cpu_callout_map);
- cpumask_set_cpu(0, &cpu_callin_map);
-
- /*
- * Initialize the logical to physical CPU number mapping
- */
- init_cpu_to_physid();
- map_cpu_to_physid(0, bsp_phys_id);
- current_thread_info()->cpu = 0;
-}
-
-/*==========================================================================*
- * Name: smp_prepare_cpus (old smp_boot_cpus)
- *
- * Description: This routine boot up APs.
- *
- * Born on Date: 2002.02.05
- *
- * Arguments: NONE
- *
- * Returns: void (cannot fail)
- *
- * Modification log:
- * Date Who Description
- * ---------- --- --------------------------------------------------------
- * 2003-06-24 hy modify for linux-2.5.69
- *
- *==========================================================================*/
-void __init smp_prepare_cpus(unsigned int max_cpus)
-{
- int phys_id;
- unsigned long nr_cpu;
-
- nr_cpu = inl(M32R_FPGA_NUM_OF_CPUS_PORTL);
- if (nr_cpu > NR_CPUS) {
- printk(KERN_INFO "NUM_OF_CPUS reg. value [%ld] > NR_CPU [%d]",
- nr_cpu, NR_CPUS);
- goto smp_done;
- }
- for (phys_id = 0 ; phys_id < nr_cpu ; phys_id++)
- physid_set(phys_id, phys_cpu_present_map);
-#ifndef CONFIG_HOTPLUG_CPU
- init_cpu_present(cpu_possible_mask);
-#endif
-
- show_mp_info(nr_cpu);
-
- init_ipi_lock();
-
- /*
- * Setup boot CPU information
- */
- smp_store_cpu_info(0); /* Final full version of the data */
-
- /*
- * If SMP should be disabled, then really disable it!
- */
- if (!max_cpus) {
- printk(KERN_INFO "SMP mode deactivated by commandline.\n");
- goto smp_done;
- }
-
- /*
- * Now scan the CPU present map and fire up the other CPUs.
- */
- Dprintk("CPU present map : %lx\n", physids_coerce(phys_cpu_present_map));
-
- for (phys_id = 0 ; phys_id < NR_CPUS ; phys_id++) {
- /*
- * Don't even attempt to start the boot CPU!
- */
- if (phys_id == bsp_phys_id)
- continue;
-
- if (!physid_isset(phys_id, phys_cpu_present_map))
- continue;
-
- if (max_cpus <= cpucount + 1)
- continue;
-
- do_boot_cpu(phys_id);
-
- /*
- * Make sure we unmap all failed CPUs
- */
- if (physid_to_cpu(phys_id) == -1) {
- physid_clear(phys_id, phys_cpu_present_map);
- printk("phys CPU#%d not responding - " \
- "cannot use it.\n", phys_id);
- }
- }
-
-smp_done:
- Dprintk("Boot done.\n");
-}
-
-/*
- * init_ipi_lock : Initialize IPI locks.
- */
-static void __init init_ipi_lock(void)
-{
- int ipi;
-
- for (ipi = 0 ; ipi < NR_IPIS ; ipi++)
- spin_lock_init(&ipi_lock[ipi]);
-}
-
-/*==========================================================================*
- * Name: do_boot_cpu
- *
- * Description: This routine boot up one AP.
- *
- * Born on Date: 2002.02.05
- *
- * Arguments: phys_id - Target CPU physical ID
- *
- * Returns: void (cannot fail)
- *
- * Modification log:
- * Date Who Description
- * ---------- --- --------------------------------------------------------
- * 2003-06-24 hy modify for linux-2.5.69
- *
- *==========================================================================*/
-static void __init do_boot_cpu(int phys_id)
-{
- struct task_struct *idle;
- unsigned long send_status, boot_status;
- int timeout, cpu_id;
-
- cpu_id = ++cpucount;
-
- /*
- * We can't use kernel_thread since we must avoid to
- * reschedule the child.
- */
- idle = fork_idle(cpu_id);
- if (IS_ERR(idle))
- panic("failed fork for CPU#%d.", cpu_id);
-
- idle->thread.lr = (unsigned long)start_secondary;
-
- map_cpu_to_physid(cpu_id, phys_id);
-
- /* So we see what's up */
- printk("Booting processor %d/%d\n", phys_id, cpu_id);
- stack_start.spi = (void *)idle->thread.sp;
- task_thread_info(idle)->cpu = cpu_id;
-
- /*
- * Send Startup IPI
- * 1.IPI received by CPU#(phys_id).
- * 2.CPU#(phys_id) enter startup_AP (arch/m32r/kernel/head.S)
- * 3.CPU#(phys_id) enter start_secondary()
- */
- send_status = 0;
- boot_status = 0;
-
- cpumask_set_cpu(phys_id, &cpu_bootout_map);
-
- /* Send Startup IPI */
- send_IPI_mask_phys(cpumask_of(phys_id), CPU_BOOT_IPI, 0);
-
- Dprintk("Waiting for send to finish...\n");
- timeout = 0;
-
- /* Wait 100[ms] */
- do {
- Dprintk("+");
- udelay(1000);
- send_status = !cpumask_test_cpu(phys_id, &cpu_bootin_map);
- } while (send_status && (timeout++ < 100));
-
- Dprintk("After Startup.\n");
-
- if (!send_status) {
- /*
- * allow APs to start initializing.
- */
- Dprintk("Before Callout %d.\n", cpu_id);
- cpumask_set_cpu(cpu_id, &cpu_callout_map);
- Dprintk("After Callout %d.\n", cpu_id);
-
- /*
- * Wait 5s total for a response
- */
- for (timeout = 0; timeout < 5000; timeout++) {
- if (cpumask_test_cpu(cpu_id, &cpu_callin_map))
- break; /* It has booted */
- udelay(1000);
- }
-
- if (cpumask_test_cpu(cpu_id, &cpu_callin_map)) {
- /* number CPUs logically, starting from 1 (BSP is 0) */
- Dprintk("OK.\n");
- } else {
- boot_status = 1;
- printk("Not responding.\n");
- }
- } else
- printk("IPI never delivered???\n");
-
- if (send_status || boot_status) {
- unmap_cpu_to_physid(cpu_id, phys_id);
- cpumask_clear_cpu(cpu_id, &cpu_callout_map);
- cpumask_clear_cpu(cpu_id, &cpu_callin_map);
- cpumask_clear_cpu(cpu_id, &cpu_initialized);
- cpucount--;
- }
-}
-
-int __cpu_up(unsigned int cpu_id, struct task_struct *tidle)
-{
- int timeout;
-
- cpumask_set_cpu(cpu_id, &smp_commenced_mask);
-
- /*
- * Wait 5s total for a response
- */
- for (timeout = 0; timeout < 5000; timeout++) {
- if (cpu_online(cpu_id))
- break;
- udelay(1000);
- }
- if (!cpu_online(cpu_id))
- BUG();
-
- return 0;
-}
-
-void __init smp_cpus_done(unsigned int max_cpus)
-{
- int cpu_id, timeout;
- unsigned long bogosum = 0;
-
- for (timeout = 0; timeout < 5000; timeout++) {
- if (cpumask_equal(&cpu_callin_map, cpu_online_mask))
- break;
- udelay(1000);
- }
- if (!cpumask_equal(&cpu_callin_map, cpu_online_mask))
- BUG();
-
- for_each_online_cpu(cpu_id)
- show_cpu_info(cpu_id);
-
- /*
- * Allow the user to impress friends.
- */
- Dprintk("Before bogomips.\n");
- if (cpucount) {
- for_each_cpu(cpu_id,cpu_online_mask)
- bogosum += cpu_data[cpu_id].loops_per_jiffy;
-
- printk(KERN_INFO "Total of %d processors activated " \
- "(%lu.%02lu BogoMIPS).\n", cpucount + 1,
- bogosum / (500000 / HZ),
- (bogosum / (5000 / HZ)) % 100);
- Dprintk("Before bogocount - setting activated=1.\n");
- }
-}
-
-/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
-/* Activate a secondary processor Routines */
-/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
-
-/*==========================================================================*
- * Name: start_secondary
- *
- * Description: This routine activate a secondary processor.
- *
- * Born on Date: 2002.02.05
- *
- * Arguments: *unused - currently unused.
- *
- * Returns: void (cannot fail)
- *
- * Modification log:
- * Date Who Description
- * ---------- --- --------------------------------------------------------
- * 2003-06-24 hy modify for linux-2.5.69
- *
- *==========================================================================*/
-int __init start_secondary(void *unused)
-{
- cpu_init();
- preempt_disable();
- smp_callin();
- while (!cpumask_test_cpu(smp_processor_id(), &smp_commenced_mask))
- cpu_relax();
-
- smp_online();
-
- /*
- * low-memory mappings have been cleared, flush them from
- * the local TLBs too.
- */
- local_flush_tlb_all();
-
- cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
- return 0;
-}
-
-/*==========================================================================*
- * Name: smp_callin
- *
- * Description: This routine activate a secondary processor.
- *
- * Born on Date: 2002.02.05
- *
- * Arguments: NONE
- *
- * Returns: void (cannot fail)
- *
- * Modification log:
- * Date Who Description
- * ---------- --- --------------------------------------------------------
- * 2003-06-24 hy modify for linux-2.5.69
- *
- *==========================================================================*/
-static void __init smp_callin(void)
-{
- int phys_id = hard_smp_processor_id();
- int cpu_id = smp_processor_id();
- unsigned long timeout;
-
- if (cpumask_test_cpu(cpu_id, &cpu_callin_map)) {
- printk("huh, phys CPU#%d, CPU#%d already present??\n",
- phys_id, cpu_id);
- BUG();
- }
- Dprintk("CPU#%d (phys ID: %d) waiting for CALLOUT\n", cpu_id, phys_id);
-
- /* Waiting 2s total for startup (udelay is not yet working) */
- timeout = jiffies + (2 * HZ);
- while (time_before(jiffies, timeout)) {
- /* Has the boot CPU finished it's STARTUP sequence ? */
- if (cpumask_test_cpu(cpu_id, &cpu_callout_map))
- break;
- cpu_relax();
- }
-
- if (!time_before(jiffies, timeout)) {
- printk("BUG: CPU#%d started up but did not get a callout!\n",
- cpu_id);
- BUG();
- }
-
- /* Allow the master to continue. */
- cpumask_set_cpu(cpu_id, &cpu_callin_map);
-}
-
-static void __init smp_online(void)
-{
- int cpu_id = smp_processor_id();
-
- notify_cpu_starting(cpu_id);
-
- local_irq_enable();
-
- /* Get our bogomips. */
- calibrate_delay();
-
- /* Save our processor parameters */
- smp_store_cpu_info(cpu_id);
-
- set_cpu_online(cpu_id, true);
-}
-
-/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
-/* Boot up CPUs common Routines */
-/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
-static void __init show_mp_info(int nr_cpu)
-{
- int i;
- char cpu_model0[17], cpu_model1[17], cpu_ver[9];
-
- strncpy(cpu_model0, (char *)M32R_FPGA_CPU_NAME_ADDR, 16);
- strncpy(cpu_model1, (char *)M32R_FPGA_MODEL_ID_ADDR, 16);
- strncpy(cpu_ver, (char *)M32R_FPGA_VERSION_ADDR, 8);
-
- cpu_model0[16] = '\0';
- for (i = 15 ; i >= 0 ; i--) {
- if (cpu_model0[i] != ' ')
- break;
- cpu_model0[i] = '\0';
- }
- cpu_model1[16] = '\0';
- for (i = 15 ; i >= 0 ; i--) {
- if (cpu_model1[i] != ' ')
- break;
- cpu_model1[i] = '\0';
- }
- cpu_ver[8] = '\0';
- for (i = 7 ; i >= 0 ; i--) {
- if (cpu_ver[i] != ' ')
- break;
- cpu_ver[i] = '\0';
- }
-
- printk(KERN_INFO "M32R-mp information\n");
- printk(KERN_INFO " On-chip CPUs : %d\n", nr_cpu);
- printk(KERN_INFO " CPU model : %s/%s(%s)\n", cpu_model0,
- cpu_model1, cpu_ver);
-}
-
-/*
- * The bootstrap kernel entry code has set these up. Save them for
- * a given CPU
- */
-static void __init smp_store_cpu_info(int cpu_id)
-{
- struct cpuinfo_m32r *ci = cpu_data + cpu_id;
-
- *ci = boot_cpu_data;
- ci->loops_per_jiffy = loops_per_jiffy;
-}
-
-static void __init show_cpu_info(int cpu_id)
-{
- struct cpuinfo_m32r *ci = &cpu_data[cpu_id];
-
- printk("CPU#%d : ", cpu_id);
-
-#define PRINT_CLOCK(name, value) \
- printk(name " clock %d.%02dMHz", \
- ((value) / 1000000), ((value) % 1000000) / 10000)
-
- PRINT_CLOCK("CPU", (int)ci->cpu_clock);
- PRINT_CLOCK(", Bus", (int)ci->bus_clock);
- printk(", loops_per_jiffy[%ld]\n", ci->loops_per_jiffy);
-}
-
-/*
- * the frequency of the profiling timer can be changed
- * by writing a multiplier value into /proc/profile.
- */
-int setup_profiling_timer(unsigned int multiplier)
-{
- int i;
-
- /*
- * Sanity check. [at least 500 APIC cycles should be
- * between APIC interrupts as a rule of thumb, to avoid
- * irqs flooding us]
- */
- if ( (!multiplier) || (calibration_result / multiplier < 500))
- return -EINVAL;
-
- /*
- * Set the new multiplier for each CPU. CPUs don't start using the
- * new values until the next timer interrupt in which they do process
- * accounting. At that time they also adjust their APIC timers
- * accordingly.
- */
- for_each_possible_cpu(i)
- per_cpu(prof_multiplier, i) = multiplier;
-
- return 0;
-}
-
-/* Initialize all maps between cpu number and apicids */
-static void __init init_cpu_to_physid(void)
-{
- int i;
-
- for (i = 0 ; i < NR_CPUS ; i++) {
- cpu_2_physid[i] = -1;
- physid_2_cpu[i] = -1;
- }
-}
-
-/*
- * set up a mapping between cpu and apicid. Uses logical apicids for multiquad,
- * else physical apic ids
- */
-static void __init map_cpu_to_physid(int cpu_id, int phys_id)
-{
- physid_2_cpu[phys_id] = cpu_id;
- cpu_2_physid[cpu_id] = phys_id;
-}
-
-/*
- * undo a mapping between cpu and apicid. Uses logical apicids for multiquad,
- * else physical apic ids
- */
-static void __init unmap_cpu_to_physid(int cpu_id, int phys_id)
-{
- physid_2_cpu[phys_id] = -1;
- cpu_2_physid[cpu_id] = -1;
-}
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0
-/*
- * linux/arch/m32r/kernel/sys_m32r.c
- *
- * This file contains various random system calls that
- * have a non-standard calling sequence on the Linux/M32R platform.
- *
- * Taken from i386 version.
- */
-
-#include <linux/errno.h>
-#include <linux/sched.h>
-#include <linux/mm.h>
-#include <linux/fs.h>
-#include <linux/smp.h>
-#include <linux/sem.h>
-#include <linux/msg.h>
-#include <linux/shm.h>
-#include <linux/stat.h>
-#include <linux/syscalls.h>
-#include <linux/mman.h>
-#include <linux/file.h>
-#include <linux/utsname.h>
-#include <linux/ipc.h>
-
-#include <linux/uaccess.h>
-#include <asm/cachectl.h>
-#include <asm/cacheflush.h>
-#include <asm/syscall.h>
-#include <asm/unistd.h>
-
-/*
- * sys_tas() - test-and-set
- */
-asmlinkage int sys_tas(int __user *addr)
-{
- int oldval;
-
- if (!access_ok(VERIFY_WRITE, addr, sizeof (int)))
- return -EFAULT;
-
- /* atomic operation:
- * oldval = *addr; *addr = 1;
- */
- __asm__ __volatile__ (
- DCACHE_CLEAR("%0", "r4", "%1")
- " .fillinsn\n"
- "1:\n"
- " lock %0, @%1 -> unlock %2, @%1\n"
- "2:\n"
- /* NOTE:
- * The m32r processor can accept interrupts only
- * at the 32-bit instruction boundary.
- * So, in the above code, the "unlock" instruction
- * can be executed continuously after the "lock"
- * instruction execution without any interruptions.
- */
- ".section .fixup,\"ax\"\n"
- " .balign 4\n"
- "3: ldi %0, #%3\n"
- " seth r14, #high(2b)\n"
- " or3 r14, r14, #low(2b)\n"
- " jmp r14\n"
- ".previous\n"
- ".section __ex_table,\"a\"\n"
- " .balign 4\n"
- " .long 1b,3b\n"
- ".previous\n"
- : "=&r" (oldval)
- : "r" (addr), "r" (1), "i"(-EFAULT)
- : "r14", "memory"
-#ifdef CONFIG_CHIP_M32700_TS1
- , "r4"
-#endif /* CONFIG_CHIP_M32700_TS1 */
- );
-
- return oldval;
-}
-
-asmlinkage int sys_cacheflush(void *addr, int bytes, int cache)
-{
- /* This should flush more selectively ... */
- _flush_cache_all();
- return 0;
-}
-
-asmlinkage int sys_cachectl(char *addr, int nbytes, int op)
-{
- /* Not implemented yet. */
- return -ENOSYS;
-}
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-ENTRY(sys_call_table)
- .long sys_restart_syscall /* 0 - old "setup()" system call*/
- .long sys_exit
- .long sys_fork
- .long sys_read
- .long sys_write
- .long sys_open /* 5 */
- .long sys_close
- .long sys_waitpid
- .long sys_creat
- .long sys_link
- .long sys_unlink /* 10 */
- .long sys_execve
- .long sys_chdir
- .long sys_time
- .long sys_mknod
- .long sys_chmod /* 15 */
- .long sys_ni_syscall /* lchown16 syscall holder */
- .long sys_ni_syscall /* old break syscall holder */
- .long sys_ni_syscall /* old stat syscall holder */
- .long sys_lseek
- .long sys_getpid /* 20 */
- .long sys_mount
- .long sys_oldumount
- .long sys_ni_syscall /* setuid16 syscall holder */
- .long sys_ni_syscall /* getuid16 syscall holder */
- .long sys_stime /* 25 */
- .long sys_ptrace
- .long sys_alarm
- .long sys_ni_syscall /* old fstat syscall holder */
- .long sys_pause
- .long sys_utime /* 30 */
- .long sys_ni_syscall /* old stty syscall holder */
- .long sys_cachectl /* for M32R */ /* old gtty syscall holder */
- .long sys_access
- .long sys_ni_syscall /* nice syscall holder */
- .long sys_ni_syscall /* 35 - old ftime syscall holder */
- .long sys_sync
- .long sys_kill
- .long sys_rename
- .long sys_mkdir
- .long sys_rmdir /* 40 */
- .long sys_dup
- .long sys_pipe
- .long sys_times
- .long sys_ni_syscall /* old prof syscall holder */
- .long sys_brk /* 45 */
- .long sys_ni_syscall /* setgid16 syscall holder */
- .long sys_getgid /* will be unused */
- .long sys_ni_syscall /* signal syscall holder */
- .long sys_ni_syscall /* geteuid16 syscall holder */
- .long sys_ni_syscall /* 50 - getegid16 syscall holder */
- .long sys_acct
- .long sys_umount /* recycled never used phys() */
- .long sys_ni_syscall /* old lock syscall holder */
- .long sys_ioctl
- .long sys_fcntl /* 55 - will be unused */
- .long sys_ni_syscall /* mpx syscall holder */
- .long sys_setpgid
- .long sys_ni_syscall /* old ulimit syscall holder */
- .long sys_ni_syscall /* sys_olduname */
- .long sys_umask /* 60 */
- .long sys_chroot
- .long sys_ustat
- .long sys_dup2
- .long sys_getppid
- .long sys_getpgrp /* 65 */
- .long sys_setsid
- .long sys_ni_syscall /* sigaction syscall holder */
- .long sys_ni_syscall /* sgetmask syscall holder */
- .long sys_ni_syscall /* ssetmask syscall holder */
- .long sys_ni_syscall /* 70 - setreuid16 syscall holder */
- .long sys_ni_syscall /* setregid16 syscall holder */
- .long sys_ni_syscall /* sigsuspend syscall holder */
- .long sys_ni_syscall /* sigpending syscall holder */
- .long sys_sethostname
- .long sys_setrlimit /* 75 */
- .long sys_getrlimit/*will be unused*/
- .long sys_getrusage
- .long sys_gettimeofday
- .long sys_settimeofday
- .long sys_ni_syscall /* 80 - getgroups16 syscall holder */
- .long sys_ni_syscall /* setgroups16 syscall holder */
- .long sys_ni_syscall /* sys_oldselect */
- .long sys_symlink
- .long sys_ni_syscall /* old lstat syscall holder */
- .long sys_readlink /* 85 */
- .long sys_uselib
- .long sys_swapon
- .long sys_reboot
- .long sys_ni_syscall /* readdir syscall holder */
- .long sys_ni_syscall /* 90 - old_mmap syscall holder */
- .long sys_munmap
- .long sys_truncate
- .long sys_ftruncate
- .long sys_fchmod
- .long sys_ni_syscall /* 95 - fchwon16 syscall holder */
- .long sys_getpriority
- .long sys_setpriority
- .long sys_ni_syscall /* old profil syscall holder */
- .long sys_statfs
- .long sys_fstatfs /* 100 */
- .long sys_ni_syscall /* ioperm syscall holder */
- .long sys_socketcall
- .long sys_syslog
- .long sys_setitimer
- .long sys_getitimer /* 105 */
- .long sys_newstat
- .long sys_newlstat
- .long sys_newfstat
- .long sys_ni_syscall /* old uname syscall holder */
- .long sys_ni_syscall /* 110 - iopl syscall holder */
- .long sys_vhangup
- .long sys_ni_syscall /* idle syscall holder */
- .long sys_ni_syscall /* vm86old syscall holder */
- .long sys_wait4
- .long sys_swapoff /* 115 */
- .long sys_sysinfo
- .long sys_ipc
- .long sys_fsync
- .long sys_ni_syscall /* sigreturn syscall holder */
- .long sys_clone /* 120 */
- .long sys_setdomainname
- .long sys_newuname
- .long sys_ni_syscall /* modify_ldt syscall holder */
- .long sys_adjtimex
- .long sys_mprotect /* 125 */
- .long sys_ni_syscall /* sigprocmask syscall holder */
- .long sys_ni_syscall /* create_module syscall holder */
- .long sys_init_module
- .long sys_delete_module
- .long sys_ni_syscall /* 130 - get_kernel_syms */
- .long sys_quotactl
- .long sys_getpgid
- .long sys_fchdir
- .long sys_bdflush
- .long sys_sysfs /* 135 */
- .long sys_personality
- .long sys_ni_syscall /* afs_syscall syscall holder */
- .long sys_ni_syscall /* setfsuid16 syscall holder */
- .long sys_ni_syscall /* setfsgid16 syscall holder */
- .long sys_llseek /* 140 */
- .long sys_getdents
- .long sys_select
- .long sys_flock
- .long sys_msync
- .long sys_readv /* 145 */
- .long sys_writev
- .long sys_getsid
- .long sys_fdatasync
- .long sys_sysctl
- .long sys_mlock /* 150 */
- .long sys_munlock
- .long sys_mlockall
- .long sys_munlockall
- .long sys_sched_setparam
- .long sys_sched_getparam /* 155 */
- .long sys_sched_setscheduler
- .long sys_sched_getscheduler
- .long sys_sched_yield
- .long sys_sched_get_priority_max
- .long sys_sched_get_priority_min /* 160 */
- .long sys_sched_rr_get_interval
- .long sys_nanosleep
- .long sys_mremap
- .long sys_ni_syscall /* setresuid16 syscall holder */
- .long sys_ni_syscall /* 165 - getresuid16 syscall holder */
- .long sys_tas /* vm86 syscall holder */
- .long sys_ni_syscall /* query_module syscall holder */
- .long sys_poll
- .long sys_ni_syscall /* was nfsservctl */
- .long sys_setresgid /* 170 */
- .long sys_getresgid
- .long sys_prctl
- .long sys_rt_sigreturn
- .long sys_rt_sigaction
- .long sys_rt_sigprocmask /* 175 */
- .long sys_rt_sigpending
- .long sys_rt_sigtimedwait
- .long sys_rt_sigqueueinfo
- .long sys_rt_sigsuspend
- .long sys_pread64 /* 180 */
- .long sys_pwrite64
- .long sys_ni_syscall /* chown16 syscall holder */
- .long sys_getcwd
- .long sys_capget
- .long sys_capset /* 185 */
- .long sys_sigaltstack
- .long sys_sendfile
- .long sys_ni_syscall /* streams1 */
- .long sys_ni_syscall /* streams2 */
- .long sys_vfork /* 190 */
- .long sys_getrlimit
- .long sys_mmap_pgoff
- .long sys_truncate64
- .long sys_ftruncate64
- .long sys_stat64 /* 195 */
- .long sys_lstat64
- .long sys_fstat64
- .long sys_lchown
- .long sys_getuid
- .long sys_getgid /* 200 */
- .long sys_geteuid
- .long sys_getegid
- .long sys_setreuid
- .long sys_setregid
- .long sys_getgroups /* 205 */
- .long sys_setgroups
- .long sys_fchown
- .long sys_setresuid
- .long sys_getresuid
- .long sys_setresgid /* 210 */
- .long sys_getresgid
- .long sys_chown
- .long sys_setuid
- .long sys_setgid
- .long sys_setfsuid /* 215 */
- .long sys_setfsgid
- .long sys_pivot_root
- .long sys_mincore
- .long sys_madvise
- .long sys_getdents64 /* 220 */
- .long sys_fcntl64
- .long sys_ni_syscall /* reserved for TUX */
- .long sys_ni_syscall /* Reserved for Security */
- .long sys_gettid
- .long sys_readahead /* 225 */
- .long sys_setxattr
- .long sys_lsetxattr
- .long sys_fsetxattr
- .long sys_getxattr
- .long sys_lgetxattr /* 230 */
- .long sys_fgetxattr
- .long sys_listxattr
- .long sys_llistxattr
- .long sys_flistxattr
- .long sys_removexattr /* 235 */
- .long sys_lremovexattr
- .long sys_fremovexattr
- .long sys_tkill
- .long sys_sendfile64
- .long sys_futex /* 240 */
- .long sys_sched_setaffinity
- .long sys_sched_getaffinity
- .long sys_ni_syscall /* reserved for "set_thread_area" system call */
- .long sys_ni_syscall /* reserved for "get_thread_area" system call */
- .long sys_io_setup /* 245 */
- .long sys_io_destroy
- .long sys_io_getevents
- .long sys_io_submit
- .long sys_io_cancel
- .long sys_fadvise64 /* 250 */
- .long sys_ni_syscall
- .long sys_exit_group
- .long sys_lookup_dcookie
- .long sys_epoll_create
- .long sys_epoll_ctl /* 255 */
- .long sys_epoll_wait
- .long sys_remap_file_pages
- .long sys_set_tid_address
- .long sys_timer_create
- .long sys_timer_settime /* 260 */
- .long sys_timer_gettime
- .long sys_timer_getoverrun
- .long sys_timer_delete
- .long sys_clock_settime
- .long sys_clock_gettime /* 265 */
- .long sys_clock_getres
- .long sys_clock_nanosleep
- .long sys_statfs64
- .long sys_fstatfs64
- .long sys_tgkill /* 270 */
- .long sys_utimes
- .long sys_fadvise64_64
- .long sys_ni_syscall /* Reserved for sys_vserver */
- .long sys_ni_syscall /* Reserved for sys_mbind */
- .long sys_ni_syscall /* Reserved for sys_get_mempolicy */
- .long sys_ni_syscall /* Reserved for sys_set_mempolicy */
- .long sys_mq_open
- .long sys_mq_unlink
- .long sys_mq_timedsend
- .long sys_mq_timedreceive /* 280 */
- .long sys_mq_notify
- .long sys_mq_getsetattr
- .long sys_ni_syscall /* reserved for kexec */
- .long sys_waitid
- .long sys_ni_syscall /* 285 */ /* available */
- .long sys_add_key
- .long sys_request_key
- .long sys_keyctl
- .long sys_ioprio_set
- .long sys_ioprio_get /* 290 */
- .long sys_inotify_init
- .long sys_inotify_add_watch
- .long sys_inotify_rm_watch
- .long sys_migrate_pages
- .long sys_openat /* 295 */
- .long sys_mkdirat
- .long sys_mknodat
- .long sys_fchownat
- .long sys_futimesat
- .long sys_fstatat64 /* 300 */
- .long sys_unlinkat
- .long sys_renameat
- .long sys_linkat
- .long sys_symlinkat
- .long sys_readlinkat /* 305 */
- .long sys_fchmodat
- .long sys_faccessat
- .long sys_pselect6
- .long sys_ppoll
- .long sys_unshare /* 310 */
- .long sys_set_robust_list
- .long sys_get_robust_list
- .long sys_splice
- .long sys_sync_file_range
- .long sys_tee /* 315 */
- .long sys_vmsplice
- .long sys_move_pages
- .long sys_getcpu
- .long sys_epoll_pwait
- .long sys_utimensat /* 320 */
- .long sys_signalfd
- .long sys_ni_syscall
- .long sys_eventfd
- .long sys_fallocate
- .long sys_setns /* 325 */
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0
-/*
- * linux/arch/m32r/kernel/time.c
- *
- * Copyright (c) 2001, 2002 Hiroyuki Kondo, Hirokazu Takata,
- * Hitoshi Yamamoto
- * Taken from i386 version.
- * Copyright (C) 1991, 1992, 1995 Linus Torvalds
- * Copyright (C) 1996, 1997, 1998 Ralf Baechle
- *
- * This file contains the time handling details for PC-style clocks as
- * found in some MIPS systems.
- *
- * Some code taken from sh version.
- * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka
- * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
- */
-
-#undef DEBUG_TIMER
-
-#include <linux/errno.h>
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/param.h>
-#include <linux/string.h>
-#include <linux/mm.h>
-#include <linux/interrupt.h>
-#include <linux/profile.h>
-
-#include <asm/io.h>
-#include <asm/m32r.h>
-
-#include <asm/hw_irq.h>
-
-#if defined(CONFIG_RTC_DRV_CMOS) || defined(CONFIG_RTC_DRV_CMOS_MODULE)
-/* this needs a better home */
-DEFINE_SPINLOCK(rtc_lock);
-
-#ifdef CONFIG_RTC_DRV_CMOS_MODULE
-EXPORT_SYMBOL(rtc_lock);
-#endif
-#endif /* pc-style 'CMOS' RTC support */
-
-#ifdef CONFIG_SMP
-extern void smp_local_timer_interrupt(void);
-#endif
-
-#define TICK_SIZE (tick_nsec / 1000)
-
-/*
- * Change this if you have some constant time drift
- */
-
-/* This is for machines which generate the exact clock. */
-#define USECS_PER_JIFFY (1000000/HZ)
-
-static unsigned long latch;
-
-static u32 m32r_gettimeoffset(void)
-{
- unsigned long elapsed_time = 0; /* [us] */
-
-#if defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_XNUX2) \
- || defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_M32700) \
- || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104)
-#ifndef CONFIG_SMP
-
- unsigned long count;
-
- /* timer count may underflow right here */
- count = inl(M32R_MFT2CUT_PORTL);
-
- if (inl(M32R_ICU_CR18_PORTL) & 0x00000100) /* underflow check */
- count = 0;
-
- count = (latch - count) * TICK_SIZE;
- elapsed_time = DIV_ROUND_CLOSEST(count, latch);
- /* NOTE: LATCH is equal to the "interval" value (= reload count). */
-
-#else /* CONFIG_SMP */
- unsigned long count;
- static unsigned long p_jiffies = -1;
- static unsigned long p_count = 0;
-
- /* timer count may underflow right here */
- count = inl(M32R_MFT2CUT_PORTL);
-
- if (jiffies == p_jiffies && count > p_count)
- count = 0;
-
- p_jiffies = jiffies;
- p_count = count;
-
- count = (latch - count) * TICK_SIZE;
- elapsed_time = DIV_ROUND_CLOSEST(count, latch);
- /* NOTE: LATCH is equal to the "interval" value (= reload count). */
-#endif /* CONFIG_SMP */
-#elif defined(CONFIG_CHIP_M32310)
-#warning do_gettimeoffse not implemented
-#else
-#error no chip configuration
-#endif
-
- return elapsed_time * 1000;
-}
-
-/*
- * timer_interrupt() needs to keep up the real-time clock,
- * as well as call the "xtime_update()" routine every clocktick
- */
-static irqreturn_t timer_interrupt(int irq, void *dev_id)
-{
-#ifndef CONFIG_SMP
- profile_tick(CPU_PROFILING);
-#endif
- xtime_update(1);
-
-#ifndef CONFIG_SMP
- update_process_times(user_mode(get_irq_regs()));
-#endif
- /* As we return to user mode fire off the other CPU schedulers..
- this is basically because we don't yet share IRQ's around.
- This message is rigged to be safe on the 386 - basically it's
- a hack, so don't look closely for now.. */
-
-#ifdef CONFIG_SMP
- smp_local_timer_interrupt();
- smp_send_timer();
-#endif
-
- return IRQ_HANDLED;
-}
-
-static struct irqaction irq0 = {
- .handler = timer_interrupt,
- .name = "MFT2",
-};
-
-void read_persistent_clock(struct timespec *ts)
-{
- unsigned int epoch, year, mon, day, hour, min, sec;
-
- sec = min = hour = day = mon = year = 0;
- epoch = 0;
-
- year = 23;
- mon = 4;
- day = 17;
-
- /* Attempt to guess the epoch. This is the same heuristic as in rtc.c
- so no stupid things will happen to timekeeping. Who knows, maybe
- Ultrix also uses 1952 as epoch ... */
- if (year > 10 && year < 44)
- epoch = 1980;
- else if (year < 96)
- epoch = 1952;
- year += epoch;
-
- ts->tv_sec = mktime(year, mon, day, hour, min, sec);
- ts->tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
-}
-
-
-void __init time_init(void)
-{
- arch_gettimeoffset = m32r_gettimeoffset;
-
-#if defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_XNUX2) \
- || defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_M32700) \
- || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104)
-
- /* M32102 MFT setup */
- setup_irq(M32R_IRQ_MFT2, &irq0);
- {
- unsigned long bus_clock;
- unsigned short divide;
-
- bus_clock = boot_cpu_data.bus_clock;
- divide = boot_cpu_data.timer_divide;
- latch = DIV_ROUND_CLOSEST(bus_clock/divide, HZ);
-
- printk("Timer start : latch = %ld\n", latch);
-
- outl((M32R_MFTMOD_CC_MASK | M32R_MFTMOD_TCCR \
- |M32R_MFTMOD_CSSEL011), M32R_MFT2MOD_PORTL);
- outl(latch, M32R_MFT2RLD_PORTL);
- outl(latch, M32R_MFT2CUT_PORTL);
- outl(0, M32R_MFT2CMPRLD_PORTL);
- outl((M32R_MFTCR_MFT2MSK|M32R_MFTCR_MFT2EN), M32R_MFTCR_PORTL);
- }
-
-#elif defined(CONFIG_CHIP_M32310)
-#warning time_init not implemented
-#else
-#error no chip configuration
-#endif
-}
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0
-/*
- * linux/arch/m32r/kernel/traps.c
- *
- * Copyright (C) 2001, 2002 Hirokazu Takata, Hiroyuki Kondo,
- * Hitoshi Yamamoto
- */
-
-/*
- * 'traps.c' handles hardware traps and faults after we have saved some
- * state in 'entry.S'.
- */
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/kallsyms.h>
-#include <linux/stddef.h>
-#include <linux/ptrace.h>
-#include <linux/sched/debug.h>
-#include <linux/sched/task_stack.h>
-#include <linux/mm.h>
-#include <linux/cpu.h>
-
-#include <asm/page.h>
-#include <asm/processor.h>
-
-#include <linux/uaccess.h>
-#include <asm/io.h>
-#include <linux/atomic.h>
-
-#include <asm/smp.h>
-
-#include <linux/module.h>
-
-asmlinkage void alignment_check(void);
-asmlinkage void ei_handler(void);
-asmlinkage void rie_handler(void);
-asmlinkage void debug_trap(void);
-asmlinkage void cache_flushing_handler(void);
-asmlinkage void ill_trap(void);
-
-#ifdef CONFIG_SMP
-extern void smp_reschedule_interrupt(void);
-extern void smp_invalidate_interrupt(void);
-extern void smp_call_function_interrupt(void);
-extern void smp_ipi_timer_interrupt(void);
-extern void smp_flush_cache_all_interrupt(void);
-extern void smp_call_function_single_interrupt(void);
-
-/*
- * for Boot AP function
- */
-asm (
- " .section .eit_vector4,\"ax\" \n"
- " .global _AP_RE \n"
- " .global startup_AP \n"
- "_AP_RE: \n"
- " .fill 32, 4, 0 \n"
- "_AP_EI: bra startup_AP \n"
- " .previous \n"
-);
-#endif /* CONFIG_SMP */
-
-extern unsigned long eit_vector[];
-#define BRA_INSN(func, entry) \
- ((unsigned long)func - (unsigned long)eit_vector - entry*4)/4 \
- + 0xff000000UL
-
-static void set_eit_vector_entries(void)
-{
- extern void default_eit_handler(void);
- extern void system_call(void);
- extern void pie_handler(void);
- extern void ace_handler(void);
- extern void tme_handler(void);
- extern void _flush_cache_copyback_all(void);
-
- eit_vector[0] = 0xd0c00001; /* seth r0, 0x01 */
- eit_vector[1] = BRA_INSN(default_eit_handler, 1);
- eit_vector[4] = 0xd0c00010; /* seth r0, 0x10 */
- eit_vector[5] = BRA_INSN(default_eit_handler, 5);
- eit_vector[8] = BRA_INSN(rie_handler, 8);
- eit_vector[12] = BRA_INSN(alignment_check, 12);
- eit_vector[16] = BRA_INSN(ill_trap, 16);
- eit_vector[17] = BRA_INSN(debug_trap, 17);
- eit_vector[18] = BRA_INSN(system_call, 18);
- eit_vector[19] = BRA_INSN(ill_trap, 19);
- eit_vector[20] = BRA_INSN(ill_trap, 20);
- eit_vector[21] = BRA_INSN(ill_trap, 21);
- eit_vector[22] = BRA_INSN(ill_trap, 22);
- eit_vector[23] = BRA_INSN(ill_trap, 23);
- eit_vector[24] = BRA_INSN(ill_trap, 24);
- eit_vector[25] = BRA_INSN(ill_trap, 25);
- eit_vector[26] = BRA_INSN(ill_trap, 26);
- eit_vector[27] = BRA_INSN(ill_trap, 27);
- eit_vector[28] = BRA_INSN(cache_flushing_handler, 28);
- eit_vector[29] = BRA_INSN(ill_trap, 29);
- eit_vector[30] = BRA_INSN(ill_trap, 30);
- eit_vector[31] = BRA_INSN(ill_trap, 31);
- eit_vector[32] = BRA_INSN(ei_handler, 32);
- eit_vector[64] = BRA_INSN(pie_handler, 64);
-#ifdef CONFIG_MMU
- eit_vector[68] = BRA_INSN(ace_handler, 68);
- eit_vector[72] = BRA_INSN(tme_handler, 72);
-#endif /* CONFIG_MMU */
-#ifdef CONFIG_SMP
- eit_vector[184] = (unsigned long)smp_reschedule_interrupt;
- eit_vector[185] = (unsigned long)smp_invalidate_interrupt;
- eit_vector[186] = (unsigned long)smp_call_function_interrupt;
- eit_vector[187] = (unsigned long)smp_ipi_timer_interrupt;
- eit_vector[188] = (unsigned long)smp_flush_cache_all_interrupt;
- eit_vector[189] = 0; /* CPU_BOOT_IPI */
- eit_vector[190] = (unsigned long)smp_call_function_single_interrupt;
- eit_vector[191] = 0;
-#endif
- _flush_cache_copyback_all();
-}
-
-void __init trap_init(void)
-{
- set_eit_vector_entries();
-
- /*
- * Should be a barrier for any external CPU state.
- */
- cpu_init();
-}
-
-static int kstack_depth_to_print = 24;
-
-static void show_trace(struct task_struct *task, unsigned long *stack)
-{
- unsigned long addr;
-
- if (!stack)
- stack = (unsigned long*)&stack;
-
- printk("Call Trace: ");
- while (!kstack_end(stack)) {
- addr = *stack++;
- if (__kernel_text_address(addr))
- printk("[<%08lx>] %pSR\n", addr, (void *)addr);
- }
- printk("\n");
-}
-
-void show_stack(struct task_struct *task, unsigned long *sp)
-{
- unsigned long *stack;
- int i;
-
- /*
- * debugging aid: "show_stack(NULL);" prints the
- * back trace for this cpu.
- */
-
- if(sp==NULL) {
- if (task)
- sp = (unsigned long *)task->thread.sp;
- else
- sp=(unsigned long*)&sp;
- }
-
- stack = sp;
- for(i=0; i < kstack_depth_to_print; i++) {
- if (kstack_end(stack))
- break;
- if (i && ((i % 4) == 0))
- printk("\n ");
- printk("%08lx ", *stack++);
- }
- printk("\n");
- show_trace(task, sp);
-}
-
-static void show_registers(struct pt_regs *regs)
-{
- int i = 0;
- int in_kernel = 1;
- unsigned long sp;
-
- printk("CPU: %d\n", smp_processor_id());
- show_regs(regs);
-
- sp = (unsigned long) (1+regs);
- if (user_mode(regs)) {
- in_kernel = 0;
- sp = regs->spu;
- printk("SPU: %08lx\n", sp);
- } else {
- printk("SPI: %08lx\n", sp);
- }
- printk("Process %s (pid: %d, process nr: %d, stackpage=%08lx)",
- current->comm, task_pid_nr(current), 0xffff & i, 4096+(unsigned long)current);
-
- /*
- * When in-kernel, we also print out the stack and code at the
- * time of the fault..
- */
- if (in_kernel) {
- printk("\nStack: ");
- show_stack(current, (unsigned long*) sp);
-
- printk("\nCode: ");
- if (regs->bpc < PAGE_OFFSET)
- goto bad;
-
- for(i=0;i<20;i++) {
- unsigned char c;
- if (__get_user(c, &((unsigned char*)regs->bpc)[i])) {
-bad:
- printk(" Bad PC value.");
- break;
- }
- printk("%02x ", c);
- }
- }
- printk("\n");
-}
-
-static DEFINE_SPINLOCK(die_lock);
-
-void die(const char * str, struct pt_regs * regs, long err)
-{
- console_verbose();
- spin_lock_irq(&die_lock);
- bust_spinlocks(1);
- printk("%s: %04lx\n", str, err & 0xffff);
- show_registers(regs);
- bust_spinlocks(0);
- spin_unlock_irq(&die_lock);
- do_exit(SIGSEGV);
-}
-
-static __inline__ void die_if_kernel(const char * str,
- struct pt_regs * regs, long err)
-{
- if (!user_mode(regs))
- die(str, regs, err);
-}
-
-static __inline__ void do_trap(int trapnr, int signr, const char * str,
- struct pt_regs * regs, long error_code, siginfo_t *info)
-{
- if (user_mode(regs)) {
- /* trap_signal */
- struct task_struct *tsk = current;
- tsk->thread.error_code = error_code;
- tsk->thread.trap_no = trapnr;
- if (info)
- force_sig_info(signr, info, tsk);
- else
- force_sig(signr, tsk);
- return;
- } else {
- /* kernel_trap */
- if (!fixup_exception(regs))
- die(str, regs, error_code);
- return;
- }
-}
-
-#define DO_ERROR(trapnr, signr, str, name) \
-asmlinkage void do_##name(struct pt_regs * regs, long error_code) \
-{ \
- do_trap(trapnr, signr, NULL, regs, error_code, NULL); \
-}
-
-#define DO_ERROR_INFO(trapnr, signr, str, name, sicode, siaddr) \
-asmlinkage void do_##name(struct pt_regs * regs, long error_code) \
-{ \
- siginfo_t info; \
- info.si_signo = signr; \
- info.si_errno = 0; \
- info.si_code = sicode; \
- info.si_addr = (void __user *)siaddr; \
- do_trap(trapnr, signr, str, regs, error_code, &info); \
-}
-
-DO_ERROR( 1, SIGTRAP, "debug trap", debug_trap)
-DO_ERROR_INFO(0x20, SIGILL, "reserved instruction ", rie_handler, ILL_ILLOPC, regs->bpc)
-DO_ERROR_INFO(0x100, SIGILL, "privileged instruction", pie_handler, ILL_PRVOPC, regs->bpc)
-DO_ERROR_INFO(-1, SIGILL, "illegal trap", ill_trap, ILL_ILLTRP, regs->bpc)
-
-extern int handle_unaligned_access(unsigned long, struct pt_regs *);
-
-/* This code taken from arch/sh/kernel/traps.c */
-asmlinkage void do_alignment_check(struct pt_regs *regs, long error_code)
-{
- mm_segment_t oldfs;
- unsigned long insn;
- int tmp;
-
- oldfs = get_fs();
-
- if (user_mode(regs)) {
- local_irq_enable();
- current->thread.error_code = error_code;
- current->thread.trap_no = 0x17;
-
- set_fs(USER_DS);
- if (copy_from_user(&insn, (void *)regs->bpc, 4)) {
- set_fs(oldfs);
- goto uspace_segv;
- }
- tmp = handle_unaligned_access(insn, regs);
- set_fs(oldfs);
-
- if (!tmp)
- return;
-
- uspace_segv:
- printk(KERN_NOTICE "Killing process \"%s\" due to unaligned "
- "access\n", current->comm);
- force_sig(SIGSEGV, current);
- } else {
- set_fs(KERNEL_DS);
- if (copy_from_user(&insn, (void *)regs->bpc, 4)) {
- set_fs(oldfs);
- die("insn faulting in do_address_error", regs, 0);
- }
- handle_unaligned_access(insn, regs);
- set_fs(oldfs);
- }
-}
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-/* ld script to make M32R Linux kernel
- */
-
-#include <asm-generic/vmlinux.lds.h>
-#include <asm/addrspace.h>
-#include <asm/page.h>
-#include <asm/thread_info.h>
-
-OUTPUT_ARCH(m32r)
-#if defined(__LITTLE_ENDIAN__)
- jiffies = jiffies_64;
-#else
- jiffies = jiffies_64 + 4;
-#endif
-
-kernel_entry = boot - 0x80000000;
-ENTRY(kernel_entry)
-
-SECTIONS
-{
- . = CONFIG_MEMORY_START + __PAGE_OFFSET;
- eit_vector = .;
-
- . = . + 0x1000;
- .empty_zero_page : { *(.empty_zero_page) } = 0
-
- /* read-only */
- _text = .; /* Text and read-only data */
- .boot : { *(.boot) } = 0
- .text : {
- HEAD_TEXT
- TEXT_TEXT
- SCHED_TEXT
- CPUIDLE_TEXT
- LOCK_TEXT
- *(.fixup)
- *(.gnu.warning)
- } = 0x9090
-#ifdef CONFIG_SMP
- . = ALIGN(65536);
- .eit_vector4 : { *(.eit_vector4) }
-#endif
- _etext = .; /* End of text section */
-
- EXCEPTION_TABLE(16)
- NOTES
-
- _sdata = .; /* Start of data section */
- RODATA
- RW_DATA_SECTION(32, PAGE_SIZE, THREAD_SIZE)
- _edata = .; /* End of data section */
-
- /* will be freed after init */
- . = ALIGN(PAGE_SIZE); /* Init code and data */
- __init_begin = .;
- INIT_TEXT_SECTION(PAGE_SIZE)
- INIT_DATA_SECTION(16)
- PERCPU_SECTION(32)
- . = ALIGN(PAGE_SIZE);
- __init_end = .;
- /* freed after init ends here */
-
- BSS_SECTION(0, 0, 4)
-
- _end = . ;
-
- /* Stabs debugging sections. */
- .stab 0 : { *(.stab) }
- .stabstr 0 : { *(.stabstr) }
- .stab.excl 0 : { *(.stab.excl) }
- .stab.exclstr 0 : { *(.stab.exclstr) }
- .stab.index 0 : { *(.stab.index) }
- .stab.indexstr 0 : { *(.stab.indexstr) }
- .comment 0 : { *(.comment) }
-
- /* Sections to be discarded */
- DISCARDS
-}
+++ /dev/null
-#
-# Makefile for M32R-specific library files..
-#
-
-lib-y := checksum.o ashxdi3.o memset.o memcpy.o \
- delay.o strlen.o usercopy.o csum_partial_copy.o \
- ucmpdi2.o
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * linux/arch/m32r/lib/ashxdi3.S
- *
- * Copyright (C) 2001,2002 Hiroyuki Kondo, and Hirokazu Takata
- *
- */
-
-;
-; input (r0,r1) src
-; input r2 shift val
-; r3 scratch
-; output (r0,r1)
-;
-
-#ifdef CONFIG_ISA_DUAL_ISSUE
-
-#ifndef __LITTLE_ENDIAN__
-
- .text
- .align 4
- .globl __ashrdi3
-__ashrdi3:
- cmpz r2 || ldi r3, #32
- jc r14 || cmpu r2, r3
- bc 1f
- ; case 32 =< shift
- mv r1, r0 || srai r0, #31
- addi r2, #-32
- sra r1, r2
- jmp r14
- .fillinsn
-1: ; case shift <32
- mv r3, r0 || srl r1, r2
- sra r0, r2 || neg r2, r2
- sll r3, r2
- or r1, r3 || jmp r14
-
- .align 4
- .globl __ashldi3
- .globl __lshldi3
-__ashldi3:
-__lshldi3:
- cmpz r2 || ldi r3, #32
- jc r14 || cmpu r2, r3
- bc 1f
- ; case 32 =< shift
- mv r0, r1 || addi r2, #-32
- sll r0, r2 || ldi r1, #0
- jmp r14
- .fillinsn
-1: ; case shift <32
- mv r3, r1 || sll r0, r2
- sll r1, r2 || neg r2, r2
- srl r3, r2
- or r0, r3 || jmp r14
-
- .align 4
- .globl __lshrdi3
-__lshrdi3:
- cmpz r2 || ldi r3, #32
- jc r14 || cmpu r2, r3
- bc 1f
- ; case 32 =< shift
- mv r1, r0 || addi r2, #-32
- ldi r0, #0 || srl r1, r2
- jmp r14
- .fillinsn
-1: ; case shift <32
- mv r3, r0 || srl r1, r2
- srl r0, r2 || neg r2, r2
- sll r3, r2
- or r1, r3 || jmp r14
-
-#else /* LITTLE_ENDIAN */
-
- .text
- .align 4
- .globl __ashrdi3
-__ashrdi3:
- cmpz r2 || ldi r3, #32
- jc r14 || cmpu r2, r3
- bc 1f
- ; case 32 =< shift
- mv r0, r1 || srai r1, #31
- addi r2, #-32
- sra r0, r2
- jmp r14
- .fillinsn
-1: ; case shift <32
- mv r3, r1 || srl r0, r2
- sra r1, r2 || neg r2, r2
- sll r3, r2
- or r0, r3 || jmp r14
-
- .align 4
- .globl __ashldi3
- .globl __lshldi3
-__ashldi3:
-__lshldi3:
- cmpz r2 || ldi r3, #32
- jc r14 || cmpu r2, r3
- bc 1f
- ; case 32 =< shift
- mv r1, r0 || addi r2, #-32
- sll r1, r2 || ldi r0, #0
- jmp r14
- .fillinsn
-1: ; case shift <32
- mv r3, r0 || sll r1, r2
- sll r0, r2 || neg r2, r2
- srl r3, r2
- or r1, r3 || jmp r14
-
- .align 4
- .globl __lshrdi3
-__lshrdi3:
- cmpz r2 || ldi r3, #32
- jc r14 || cmpu r2, r3
- bc 1f
- ; case 32 =< shift
- mv r0, r1 || addi r2, #-32
- ldi r1, #0 || srl r0, r2
- jmp r14
- .fillinsn
-1: ; case shift <32
- mv r3, r1 || srl r0, r2
- srl r1, r2 || neg r2, r2
- sll r3, r2
- or r0, r3 || jmp r14
-
-#endif
-
-#else /* not CONFIG_ISA_DUAL_ISSUE */
-
-#ifndef __LITTLE_ENDIAN__
-
- .text
- .align 4
- .globl __ashrdi3
-__ashrdi3:
- beqz r2, 2f
- cmpui r2, #32
- bc 1f
- ; case 32 =< shift
- mv r1, r0
- srai r0, #31
- addi r2, #-32
- sra r1, r2
- jmp r14
- .fillinsn
-1: ; case shift <32
- mv r3, r0
- srl r1, r2
- sra r0, r2
- neg r2, r2
- sll r3, r2
- or r1, r3
- .fillinsn
-2:
- jmp r14
-
- .align 4
- .globl __ashldi3
- .globl __lshldi3
-__ashldi3:
-__lshldi3:
- beqz r2, 2f
- cmpui r2, #32
- bc 1f
- ; case 32 =< shift
- mv r0, r1
- addi r2, #-32
- sll r0, r2
- ldi r1, #0
- jmp r14
- .fillinsn
-1: ; case shift <32
- mv r3, r1
- sll r0, r2
- sll r1, r2
- neg r2, r2
- srl r3, r2
- or r0, r3
- .fillinsn
-2:
- jmp r14
-
- .align 4
- .globl __lshrdi3
-__lshrdi3:
- beqz r2, 2f
- cmpui r2, #32
- bc 1f
- ; case 32 =< shift
- mv r1, r0
- ldi r0, #0
- addi r2, #-32
- srl r1, r2
- jmp r14
- .fillinsn
-1: ; case shift <32
- mv r3, r0
- srl r1, r2
- srl r0, r2
- neg r2, r2
- sll r3, r2
- or r1, r3
- .fillinsn
-2:
- jmp r14
-
-#else
-
- .text
- .align 4
- .globl __ashrdi3
-__ashrdi3:
- beqz r2, 2f
- cmpui r2, #32
- bc 1f
- ; case 32 =< shift
- mv r0, r1
- srai r1, #31
- addi r2, #-32
- sra r0, r2
- jmp r14
- .fillinsn
-1: ; case shift <32
- mv r3, r1
- srl r0, r2
- sra r1, r2
- neg r2, r2
- sll r3, r2
- or r0, r3
- .fillinsn
-2:
- jmp r14
-
- .align 4
- .globl __ashldi3
- .globl __lshldi3
-__ashldi3:
-__lshldi3:
- beqz r2, 2f
- cmpui r2, #32
- bc 1f
- ; case 32 =< shift
- mv r1, r0
- addi r2, #-32
- sll r1, r2
- ldi r0, #0
- jmp r14
- .fillinsn
-1: ; case shift <32
- mv r3, r0
- sll r1, r2
- sll r0, r2
- neg r2, r2
- srl r3, r2
- or r1, r3
- .fillinsn
-2:
- jmp r14
-
- .align 4
- .globl __lshrdi3
-__lshrdi3:
- beqz r2, 2f
- cmpui r2, #32
- bc 1f
- ; case 32 =< shift
- mv r0, r1
- ldi r1, #0
- addi r2, #-32
- srl r0, r2
- jmp r14
- .fillinsn
-1: ; case shift <32
- mv r3, r1
- srl r0, r2
- srl r1, r2
- neg r2, r2
- sll r3, r2
- or r0, r3
- .fillinsn
-2:
- jmp r14
-
-#endif
-
-#endif /* not CONFIG_ISA_DUAL_ISSUE */
-
- .end
+++ /dev/null
-/*
- * INET An implementation of the TCP/IP protocol suite for the LINUX
- * operating system. INET is implemented using the BSD Socket
- * interface as the means of communication with the user level.
- *
- * IP/TCP/UDP checksumming routines
- *
- * Authors: Jorge Cwik, <jorge@laser.satlink.net>
- * Arnt Gulbrandsen, <agulbra@nvg.unit.no>
- * Tom May, <ftom@netcom.com>
- * Pentium Pro/II routines:
- * Alexander Kjeldaas <astor@guardian.no>
- * Finn Arne Gangstad <finnag@guardian.no>
- * Lots of code moved from tcp.c and ip.c; see those files
- * for more names.
- *
- * Changes: Ingo Molnar, converted csum_partial_copy() to 2.1 exception
- * handling.
- * Andi Kleen, add zeroing on error
- * converted to pure assembler
- * Hirokazu Takata,Hiroyuki Kondo rewrite for the m32r architecture.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include <linux/linkage.h>
-#include <asm/assembler.h>
-#include <asm/errno.h>
-
-/*
- * computes a partial checksum, e.g. for TCP/UDP fragments
- */
-
-/*
-unsigned int csum_partial(const unsigned char * buff, int len, unsigned int sum)
- */
-
-
-#ifdef CONFIG_ISA_DUAL_ISSUE
-
- /*
- * Experiments with Ethernet and SLIP connections show that buff
- * is aligned on either a 2-byte or 4-byte boundary. We get at
- * least a twofold speedup on 486 and Pentium if it is 4-byte aligned.
- * Fortunately, it is easy to convert 2-byte alignment to 4-byte
- * alignment for the unrolled loop.
- */
-
- .text
-ENTRY(csum_partial)
- ; Function args
- ; r0: unsigned char *buff
- ; r1: int len
- ; r2: unsigned int sum
-
- push r2 || ldi r2, #0
- and3 r7, r0, #1 ; Check alignment.
- beqz r7, 1f ; Jump if alignment is ok.
- ; 1-byte mis aligned
- ldub r4, @r0 || addi r0, #1
- ; clear c-bit || Alignment uses up bytes.
- cmp r0, r0 || addi r1, #-1
- ldi r3, #0 || addx r2, r4
- addx r2, r3
- .fillinsn
-1:
- and3 r4, r0, #2 ; Check alignment.
- beqz r4, 2f ; Jump if alignment is ok.
- ; clear c-bit || Alignment uses up two bytes.
- cmp r0, r0 || addi r1, #-2
- bgtz r1, 1f ; Jump if we had at least two bytes.
- bra 4f || addi r1, #2
- .fillinsn ; len(r1) was < 2. Deal with it.
-1:
- ; 2-byte aligned
- lduh r4, @r0 || ldi r3, #0
- addx r2, r4 || addi r0, #2
- addx r2, r3
- .fillinsn
-2:
- ; 4-byte aligned
- cmp r0, r0 ; clear c-bit
- srl3 r6, r1, #5
- beqz r6, 2f
- .fillinsn
-
-1: ld r3, @r0+
- ld r4, @r0+ ; +4
- ld r5, @r0+ ; +8
- ld r3, @r0+ || addx r2, r3 ; +12
- ld r4, @r0+ || addx r2, r4 ; +16
- ld r5, @r0+ || addx r2, r5 ; +20
- ld r3, @r0+ || addx r2, r3 ; +24
- ld r4, @r0+ || addx r2, r4 ; +28
- addx r2, r5 || addi r6, #-1
- addx r2, r3
- addx r2, r4
- bnez r6, 1b
-
- addx r2, r6 ; r6=0
- cmp r0, r0 ; This clears c-bit
- .fillinsn
-2: and3 r6, r1, #0x1c ; withdraw len
- beqz r6, 4f
- srli r6, #2
- .fillinsn
-
-3: ld r4, @r0+ || addi r6, #-1
- addx r2, r4
- bnez r6, 3b
-
- addx r2, r6 ; r6=0
- cmp r0, r0 ; This clears c-bit
- .fillinsn
-4: and3 r1, r1, #3
- beqz r1, 7f ; if len == 0 goto end
- and3 r6, r1, #2
- beqz r6, 5f ; if len < 2 goto 5f(1byte)
- lduh r4, @r0 || addi r0, #2
- addi r1, #-2 || slli r4, #16
- addx r2, r4
- beqz r1, 6f
- .fillinsn
-5: ldub r4, @r0 || ldi r1, #0
-#ifndef __LITTLE_ENDIAN__
- slli r4, #8
-#endif
- addx r2, r4
- .fillinsn
-6: addx r2, r1
- .fillinsn
-7:
- and3 r0, r2, #0xffff
- srli r2, #16
- add r0, r2
- srl3 r2, r0, #16
- beqz r2, 1f
- addi r0, #1
- and3 r0, r0, #0xffff
- .fillinsn
-1:
- beqz r7, 1f ; swap the upper byte for the lower
- and3 r2, r0, #0xff
- srl3 r0, r0, #8
- slli r2, #8
- or r0, r2
- .fillinsn
-1:
- pop r2 || cmp r0, r0
- addx r0, r2 || ldi r2, #0
- addx r0, r2
- jmp r14
-
-#else /* not CONFIG_ISA_DUAL_ISSUE */
-
- /*
- * Experiments with Ethernet and SLIP connections show that buff
- * is aligned on either a 2-byte or 4-byte boundary. We get at
- * least a twofold speedup on 486 and Pentium if it is 4-byte aligned.
- * Fortunately, it is easy to convert 2-byte alignment to 4-byte
- * alignment for the unrolled loop.
- */
-
- .text
-ENTRY(csum_partial)
- ; Function args
- ; r0: unsigned char *buff
- ; r1: int len
- ; r2: unsigned int sum
-
- push r2
- ldi r2, #0
- and3 r7, r0, #1 ; Check alignment.
- beqz r7, 1f ; Jump if alignment is ok.
- ; 1-byte mis aligned
- ldub r4, @r0
- addi r0, #1
- addi r1, #-1 ; Alignment uses up bytes.
- cmp r0, r0 ; clear c-bit
- ldi r3, #0
- addx r2, r4
- addx r2, r3
- .fillinsn
-1:
- and3 r4, r0, #2 ; Check alignment.
- beqz r4, 2f ; Jump if alignment is ok.
- addi r1, #-2 ; Alignment uses up two bytes.
- cmp r0, r0 ; clear c-bit
- bgtz r1, 1f ; Jump if we had at least two bytes.
- addi r1, #2 ; len(r1) was < 2. Deal with it.
- bra 4f
- .fillinsn
-1:
- ; 2-byte aligned
- lduh r4, @r0
- addi r0, #2
- ldi r3, #0
- addx r2, r4
- addx r2, r3
- .fillinsn
-2:
- ; 4-byte aligned
- cmp r0, r0 ; clear c-bit
- srl3 r6, r1, #5
- beqz r6, 2f
- .fillinsn
-
-1: ld r3, @r0+
- ld r4, @r0+ ; +4
- ld r5, @r0+ ; +8
- addx r2, r3
- addx r2, r4
- addx r2, r5
- ld r3, @r0+ ; +12
- ld r4, @r0+ ; +16
- ld r5, @r0+ ; +20
- addx r2, r3
- addx r2, r4
- addx r2, r5
- ld r3, @r0+ ; +24
- ld r4, @r0+ ; +28
- addi r6, #-1
- addx r2, r3
- addx r2, r4
- bnez r6, 1b
- addx r2, r6 ; r6=0
- cmp r0, r0 ; This clears c-bit
- .fillinsn
-
-2: and3 r6, r1, #0x1c ; withdraw len
- beqz r6, 4f
- srli r6, #2
- .fillinsn
-
-3: ld r4, @r0+
- addi r6, #-1
- addx r2, r4
- bnez r6, 3b
- addx r2, r6 ; r6=0
- cmp r0, r0 ; This clears c-bit
- .fillinsn
-
-4: and3 r1, r1, #3
- beqz r1, 7f ; if len == 0 goto end
- and3 r6, r1, #2
- beqz r6, 5f ; if len < 2 goto 5f(1byte)
-
- lduh r4, @r0
- addi r0, #2
- addi r1, #-2
- slli r4, #16
- addx r2, r4
- beqz r1, 6f
- .fillinsn
-5: ldub r4, @r0
-#ifndef __LITTLE_ENDIAN__
- slli r4, #8
-#endif
- addx r2, r4
- .fillinsn
-6: ldi r5, #0
- addx r2, r5
- .fillinsn
-7:
- and3 r0, r2, #0xffff
- srli r2, #16
- add r0, r2
- srl3 r2, r0, #16
- beqz r2, 1f
- addi r0, #1
- and3 r0, r0, #0xffff
- .fillinsn
-1:
- beqz r7, 1f
- mv r2, r0
- srl3 r0, r2, #8
- and3 r2, r2, #0xff
- slli r2, #8
- or r0, r2
- .fillinsn
-1:
- pop r2
- cmp r0, r0
- addx r0, r2
- ldi r2, #0
- addx r0, r2
- jmp r14
-
-#endif /* not CONFIG_ISA_DUAL_ISSUE */
-
-/*
-unsigned int csum_partial_copy_generic (const char *src, char *dst,
- int len, int sum, int *src_err_ptr, int *dst_err_ptr)
- */
-
-/*
- * Copy from ds while checksumming, otherwise like csum_partial
- *
- * The macros SRC and DST specify the type of access for the instruction.
- * thus we can call a custom exception handler for all access types.
- *
- * FIXME: could someone double-check whether I haven't mixed up some SRC and
- * DST definitions? It's damn hard to trigger all cases. I hope I got
- * them all but there's no guarantee.
- */
-
-ENTRY(csum_partial_copy_generic)
- nop
- nop
- nop
- nop
- jmp r14
- nop
- nop
- nop
-
- .end
+++ /dev/null
-/*
- * INET An implementation of the TCP/IP protocol suite for the LINUX
- * operating system. INET is implemented using the BSD Socket
- * interface as the means of communication with the user level.
- *
- * M32R specific IP/TCP/UDP checksumming routines
- * (Some code taken from MIPS architecture)
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1994, 1995 Waldorf Electronics GmbH
- * Copyright (C) 1998, 1999 Ralf Baechle
- * Copyright (C) 2001-2005 Hiroyuki Kondo, Hirokazu Takata
- *
- */
-
-#include <linux/module.h>
-#include <linux/types.h>
-#include <linux/string.h>
-
-#include <net/checksum.h>
-#include <asm/byteorder.h>
-#include <linux/uaccess.h>
-
-/*
- * Copy while checksumming, otherwise like csum_partial
- */
-__wsum
-csum_partial_copy_nocheck (const void *src, void *dst, int len, __wsum sum)
-{
- sum = csum_partial(src, len, sum);
- memcpy(dst, src, len);
-
- return sum;
-}
-EXPORT_SYMBOL(csum_partial_copy_nocheck);
-
-/*
- * Copy from userspace and compute checksum. If we catch an exception
- * then zero the rest of the buffer.
- */
-__wsum
-csum_partial_copy_from_user (const void __user *src, void *dst,
- int len, __wsum sum, int *err_ptr)
-{
- int missing;
-
- missing = copy_from_user(dst, src, len);
- if (missing) {
- memset(dst + len - missing, 0, missing);
- *err_ptr = -EFAULT;
- }
-
- return csum_partial(dst, len-missing, sum);
-}
-EXPORT_SYMBOL(csum_partial_copy_from_user);
-EXPORT_SYMBOL(csum_partial);
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0
-/*
- * linux/arch/m32r/lib/delay.c
- *
- * Copyright (c) 2002 Hitoshi Yamamoto, Hirokazu Takata
- * Copyright (c) 2004 Hirokazu Takata
- */
-
-#include <linux/param.h>
-#include <linux/module.h>
-#ifdef CONFIG_SMP
-#include <linux/sched.h>
-#include <asm/current.h>
-#include <asm/smp.h>
-#endif /* CONFIG_SMP */
-#include <asm/processor.h>
-
-void __delay(unsigned long loops)
-{
-#ifdef CONFIG_ISA_DUAL_ISSUE
- __asm__ __volatile__ (
- "beqz %0, 2f \n\t"
- "addi %0, #-1 \n\t"
-
- " .fillinsn \n\t"
- "1: \n\t"
- "cmpz %0 || addi %0, #-1 \n\t"
- "bc 2f || cmpz %0 \n\t"
- "bc 2f || addi %0, #-1 \n\t"
- "cmpz %0 || addi %0, #-1 \n\t"
- "bc 2f || cmpz %0 \n\t"
- "bnc 1b || addi %0, #-1 \n\t"
- " .fillinsn \n\t"
- "2: \n\t"
- : "+r" (loops)
- : "r" (0)
- : "cbit"
- );
-#else
- __asm__ __volatile__ (
- "beqz %0, 2f \n\t"
- " .fillinsn \n\t"
- "1: \n\t"
- "addi %0, #-1 \n\t"
- "blez %0, 2f \n\t"
- "addi %0, #-1 \n\t"
- "blez %0, 2f \n\t"
- "addi %0, #-1 \n\t"
- "blez %0, 2f \n\t"
- "addi %0, #-1 \n\t"
- "bgtz %0, 1b \n\t"
- " .fillinsn \n\t"
- "2: \n\t"
- : "+r" (loops)
- : "r" (0)
- );
-#endif
-}
-
-void __const_udelay(unsigned long xloops)
-{
-#if defined(CONFIG_ISA_M32R2) && defined(CONFIG_ISA_DSP_LEVEL2)
- /*
- * loops [1] = (xloops >> 32) [sec] * loops_per_jiffy [1/jiffy]
- * * HZ [jiffy/sec]
- * = (xloops >> 32) [sec] * (loops_per_jiffy * HZ) [1/sec]
- * = (((xloops * loops_per_jiffy) >> 32) * HZ) [1]
- *
- * NOTE:
- * - '[]' depicts variable's dimension in the above equation.
- * - "rac" instruction rounds the accumulator in word size.
- */
- __asm__ __volatile__ (
- "srli %0, #1 \n\t"
- "mulwhi %0, %1 ; a0 \n\t"
- "mulwu1 %0, %1 ; a1 \n\t"
- "sadd ; a0 += (a1 >> 16) \n\t"
- "rac a0, a0, #1 \n\t"
- "mvfacmi %0, a0 \n\t"
- : "+r" (xloops)
- : "r" (current_cpu_data.loops_per_jiffy)
- : "a0", "a1"
- );
-#elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R)
- /*
- * u64 ull;
- * ull = (u64)xloops * (u64)current_cpu_data.loops_per_jiffy;
- * xloops = (ull >> 32);
- */
- __asm__ __volatile__ (
- "and3 r4, %0, #0xffff \n\t"
- "and3 r5, %1, #0xffff \n\t"
- "mul r4, r5 \n\t"
- "srl3 r6, %0, #16 \n\t"
- "srli r4, #16 \n\t"
- "mul r5, r6 \n\t"
- "add r4, r5 \n\t"
- "and3 r5, %0, #0xffff \n\t"
- "srl3 r6, %1, #16 \n\t"
- "mul r5, r6 \n\t"
- "add r4, r5 \n\t"
- "srl3 r5, %0, #16 \n\t"
- "srli r4, #16 \n\t"
- "mul r5, r6 \n\t"
- "add r4, r5 \n\t"
- "mv %0, r4 \n\t"
- : "+r" (xloops)
- : "r" (current_cpu_data.loops_per_jiffy)
- : "r4", "r5", "r6"
- );
-#else
-#error unknown isa configuration
-#endif
- __delay(xloops * HZ);
-}
-
-void __udelay(unsigned long usecs)
-{
- __const_udelay(usecs * 0x000010c7); /* 2**32 / 1000000 (rounded up) */
-}
-
-void __ndelay(unsigned long nsecs)
-{
- __const_udelay(nsecs * 0x00005); /* 2**32 / 1000000000 (rounded up) */
-}
-
-EXPORT_SYMBOL(__delay);
-EXPORT_SYMBOL(__const_udelay);
-EXPORT_SYMBOL(__udelay);
-EXPORT_SYMBOL(__ndelay);
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __ASM_LIBGCC_H
-#define __ASM_LIBGCC_H
-
-#include <asm/byteorder.h>
-
-#ifdef __BIG_ENDIAN
-struct DWstruct {
- int high, low;
-};
-#elif defined(__LITTLE_ENDIAN)
-struct DWstruct {
- int low, high;
-};
-#else
-#error I feel sick.
-#endif
-
-typedef union {
- struct DWstruct s;
- long long ll;
-} DWunion;
-
-#endif /* __ASM_LIBGCC_H */
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * linux/arch/m32r/lib/memcpy.S
- *
- * Copyright (C) 2001 Hiroyuki Kondo, and Hirokazu Takata
- * Copyright (C) 2004 Hirokazu Takata
- *
- * void *memcopy(void *dst, const void *src, int n);
- *
- * dst: r0
- * src: r1
- * n : r2
- */
-
- .text
-#include <linux/linkage.h>
-#include <asm/assembler.h>
-
-#ifdef CONFIG_ISA_DUAL_ISSUE
-
- .text
-ENTRY(memcpy)
-memcopy:
- mv r4, r0 || mv r7, r0
- or r7, r1 || cmpz r2
- jc r14 || cmpeq r0, r1 ; return if r2=0
- jc r14 ; return if r0=r1
-
- and3 r7, r7, #3
- bnez r7, byte_copy
- srl3 r3, r2, #2
- and3 r2, r2, #3
- beqz r3, byte_copy
- addi r4, #-4
-word_copy:
- ld r7, @r1+ || addi r3, #-1
- st r7, @+r4 || cmpz r2
- bnez r3, word_copy
- addi r4, #4 || jc r14 ; return if r2=0
-#if defined(CONFIG_ISA_M32R2)
-byte_copy:
- ldb r7, @r1 || addi r1, #1
- addi r2, #-1 || stb r7, @r4+
- bnez r2, byte_copy
-#elif defined(CONFIG_ISA_M32R)
-byte_copy:
- ldb r7, @r1 || addi r1, #1
- addi r2, #-1 || stb r7, @r4
- addi r4, #1
- bnez r2, byte_copy
-#else
-#error unknown isa configuration
-#endif
-end_memcopy:
- jmp r14
-
-#else /* not CONFIG_ISA_DUAL_ISSUE */
-
- .text
-ENTRY(memcpy)
-memcopy:
- mv r4, r0
- mv r7, r0
- or r7, r1
- beq r0, r1, end_memcopy
- beqz r2, end_memcopy
-
- and3 r7, r7, #3
- bnez r7, byte_copy
- srl3 r3, r2, #2
- and3 r2, r2, #3
- beqz r3, byte_copy
- addi r4, #-4
-word_copy:
- ld r7, @r1+
- addi r3, #-1
- st r7, @+r4
- bnez r3, word_copy
- beqz r2, end_memcopy
- addi r4, #4
-byte_copy:
- ldb r7, @r1
- addi r1, #1
- addi r2, #-1
- stb r7, @r4
- addi r4, #1
- bnez r2, byte_copy
-end_memcopy:
- jmp r14
-
-#endif /* not CONFIG_ISA_DUAL_ISSUE */
-
- .end
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * linux/arch/m32r/lib/memset.S
- *
- * Copyright (C) 2001,2002 Hiroyuki Kondo, and Hirokazu Takata
- * Copyright (C) 2004 Hirokazu Takata
- *
- * void *memset(void *dst, int val, int len);
- *
- * dst: r0
- * val: r1
- * len: r2
- * ret: r0
- *
- */
-
- .text
- .global memset
-
-#ifdef CONFIG_ISA_DUAL_ISSUE
-
- .align 4
-memset:
- mv r4, r0 || cmpz r2
- jc r14
- cmpui r2, #16
- bnc qword_align_check
- cmpui r2, #4
- bc byte_set
-word_align_check: /* len >= 4 */
- and3 r3, r4, #3
- beqz r3, word_set
- addi r3, #-4
- neg r3, r3 /* r3 = -(r3 - 4) */
-align_word:
- stb r1, @r4 || addi r4, #1
- addi r2, #-1 || addi r3, #-1
- bnez r3, align_word
- cmpui r2, #4
- bc byte_set
-word_set:
- and3 r1, r1, #0x00ff /* r1: abababab <-- ??????ab */
- sll3 r3, r1, #8
- or r1, r3 || addi r4, #-4
- sll3 r3, r1, #16
- or r1, r3 || addi r2, #-4
-word_set_loop:
- st r1, @+r4 || addi r2, #-4
- bgtz r2, word_set_loop
- bnez r2, byte_set_wrap
- st r1, @+r4
- jmp r14
-
-qword_align_check: /* len >= 16 */
- and3 r3, r4, #15
- bnez r3, word_align_check
-qword_set:
- and3 r1, r1, #0x00ff /* r1: abababab <-- ??????ab */
- sll3 r3, r1, #8
- or r1, r3 || addi r4, #-4
- sll3 r3, r1, #16
- or r1, r3 || ldi r5, #16
-qword_set_loop:
- ld r3, @(4,r4) /* cache line allocate */
- st r1, @+r4 || addi r2, #-16
- st r1, @+r4 || cmpu r2, r5
- st r1, @+r4
- st r1, @+r4
- bnc qword_set_loop || cmpz r2
- jc r14
-set_remainder:
- cmpui r2, #4
- bc byte_set_wrap1
- addi r2, #-4
- bra word_set_loop
-
-byte_set_wrap:
- addi r2, #4
- cmpz r2
- jc r14
-byte_set_wrap1:
- addi r4, #4
-#if defined(CONFIG_ISA_M32R2)
-byte_set:
- addi r2, #-1 || stb r1, @r4+
- bnez r2, byte_set
-#elif defined(CONFIG_ISA_M32R)
-byte_set:
- addi r2, #-1 || stb r1, @r4
- addi r4, #1
- bnez r2, byte_set
-#else
-#error unknown isa configuration
-#endif
-end_memset:
- jmp r14
-
-#else /* not CONFIG_ISA_DUAL_ISSUE */
-
- .align 4
-memset:
- mv r4, r0
- beqz r2, end_memset
- cmpui r2, #16
- bnc qword_align_check
- cmpui r2, #4
- bc byte_set
-word_align_check: /* len >= 4 */
- and3 r3, r4, #3
- beqz r3, word_set
- addi r3, #-4
- neg r3, r3 /* r3 = -(r3 - 4) */
-align_word:
- stb r1, @r4
- addi r4, #1
- addi r2, #-1
- addi r3, #-1
- bnez r3, align_word
- cmpui r2, #4
- bc byte_set
-word_set:
- and3 r1, r1, #0x00ff /* r1: abababab <-- ??????ab */
- sll3 r3, r1, #8
- or r1, r3
- sll3 r3, r1, #16
- or r1, r3
- addi r2, #-4
- addi r4, #-4
-word_set_loop:
- st r1, @+r4
- addi r2, #-4
- bgtz r2, word_set_loop
- bnez r2, byte_set_wrap
- st r1, @+r4
- jmp r14
-
-qword_align_check: /* len >= 16 */
- and3 r3, r4, #15
- bnez r3, word_align_check
-qword_set:
- and3 r1, r1, #0x00ff /* r1: abababab <-- ??????ab */
- sll3 r3, r1, #8
- or r1, r3
- sll3 r3, r1, #16
- or r1, r3
- addi r4, #-4
-qword_set_loop:
- ld r3, @(4,r4) /* cache line allocate */
- addi r2, #-16
- st r1, @+r4
- st r1, @+r4
- cmpui r2, #16
- st r1, @+r4
- st r1, @+r4
- bnc qword_set_loop
- bnez r2, set_remainder
- jmp r14
-set_remainder:
- cmpui r2, #4
- bc byte_set_wrap1
- addi r2, #-4
- bra word_set_loop
-
-byte_set_wrap:
- addi r2, #4
- beqz r2, end_memset
-byte_set_wrap1:
- addi r4, #4
-byte_set:
- addi r2, #-1
- stb r1, @r4
- addi r4, #1
- bnez r2, byte_set
-end_memset:
- jmp r14
-
-#endif /* not CONFIG_ISA_DUAL_ISSUE */
-
- .end
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * linux/arch/m32r/strlen.S -- strlen code.
- *
- * Copyright (C) 2001 Hirokazu Takata
- *
- * size_t strlen(const char *s);
- *
- */
-
-#include <linux/linkage.h>
-#include <asm/assembler.h>
-
-#ifdef CONFIG_ISA_DUAL_ISSUE
-
- .text
-ENTRY(strlen)
- mv r6, r0 || ldi r2, #0
- and3 r0, r0, #3
- bnez r0, strlen_byte
-;
-strlen_word:
- ld r0, @r6+
-;
- seth r5, #high(0x01010101)
- or3 r5, r5, #low(0x01010101)
- sll3 r7, r5, #7
-strlen_word_loop:
- ld r1, @r6+ || not r4, r0
- sub r0, r5 || and r4, r7
- and r4, r0
- bnez r4, strlen_last_bytes
- ld r0, @r6+ || not r4, r1
- sub r1, r5 || and r4, r7
- and r4, r1 || addi r2, #4
- bnez r4, strlen_last_bytes
- addi r2, #4 || bra.s strlen_word_loop
-
- ; NOTE: If a null char. exists, return 0.
- ; if ((x - 0x01010101) & ~x & 0x80808080)
- ; return 0;
-;
-strlen_byte:
- ldb r1, @r6 || addi r6, #1
- beqz r1, strlen_exit
- addi r2, #1 || bra.s strlen_byte
-;
-strlen_last_bytes:
- ldi r0, #4 || addi r6, #-8
-;
-strlen_byte_loop:
- ldb r1, @r6 || addi r6, #1
- addi r0, #-1 || cmpz r1
- bc.s strlen_exit || cmpz r0
- addi r2, #1 || bnc.s strlen_byte_loop
-;
-strlen_exit:
- mv r0, r2 || jmp r14
-
-#else /* not CONFIG_ISA_DUAL_ISSUE */
-
- .text
-ENTRY(strlen)
- mv r6, r0
- ldi r2, #0
- and3 r0, r0, #3
- bnez r0, strlen_byte
-;
-strlen_word:
- ld r0, @r6+
-;
- seth r5, #high(0x01010101)
- or3 r5, r5, #low(0x01010101)
- sll3 r7, r5, #7
-strlen_word_loop:
- ld r1, @r6+
- not r4, r0 ; NOTE: If a null char. exists, return 0.
- sub r0, r5 ; if ((x - 0x01010101) & ~x & 0x80808080)
- and r4, r7 ; return 0;
- and r4, r0
- bnez r4, strlen_last_bytes
- addi r2, #4
-;
- ld r0, @r6+
- not r4, r1 ; NOTE: If a null char. exists, return 0.
- sub r1, r5 ; if ((x - 0x01010101) & ~x & 0x80808080)
- and r4, r7 ; return 0;
- and r4, r1
- bnez r4, strlen_last_bytes
- addi r2, #4
- bra strlen_word_loop
-;
-strlen_byte:
- ldb r1, @r6
- addi r6, #1
- beqz r1, strlen_exit
- addi r2, #1
- bra strlen_byte
-;
-strlen_last_bytes:
- ldi r0, #4
- addi r6, #-8
-;
-strlen_byte_loop:
- ldb r1, @r6
- addi r6, #1
- addi r0, #-1
- beqz r1, strlen_exit
- addi r2, #1
- bnez r0, strlen_byte_loop
-;
-strlen_exit:
- mv r0, r2
- jmp r14
-
-#endif /* not CONFIG_ISA_DUAL_ISSUE */
-
- .end
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0
-#include "libgcc.h"
-
-int __ucmpdi2(unsigned long long a, unsigned long long b)
-{
- const DWunion au = {.ll = a};
- const DWunion bu = {.ll = b};
-
- if ((unsigned int)au.s.high < (unsigned int)bu.s.high)
- return 0;
- else if ((unsigned int)au.s.high > (unsigned int)bu.s.high)
- return 2;
- if ((unsigned int)au.s.low < (unsigned int)bu.s.low)
- return 0;
- else if ((unsigned int)au.s.low > (unsigned int)bu.s.low)
- return 2;
- return 1;
-}
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0
-/*
- * User address space access functions.
- * The non inlined parts of asm-m32r/uaccess.h are here.
- *
- * Copyright 1997 Andi Kleen <ak@muc.de>
- * Copyright 1997 Linus Torvalds
- * Copyright 2001, 2002, 2004 Hirokazu Takata
- */
-#include <linux/prefetch.h>
-#include <linux/string.h>
-#include <linux/thread_info.h>
-#include <linux/uaccess.h>
-
-/*
- * Copy a null terminated string from userspace.
- */
-
-#ifdef CONFIG_ISA_DUAL_ISSUE
-
-#define __do_strncpy_from_user(dst,src,count,res) \
-do { \
- int __d0, __d1, __d2; \
- __asm__ __volatile__( \
- " beqz %1, 2f\n" \
- " .fillinsn\n" \
- "0: ldb r14, @%3 || addi %3, #1\n" \
- " stb r14, @%4 || addi %4, #1\n" \
- " beqz r14, 1f\n" \
- " addi %1, #-1\n" \
- " bnez %1, 0b\n" \
- " .fillinsn\n" \
- "1: sub %0, %1\n" \
- " .fillinsn\n" \
- "2:\n" \
- ".section .fixup,\"ax\"\n" \
- " .balign 4\n" \
- "3: seth r14, #high(2b)\n" \
- " or3 r14, r14, #low(2b)\n" \
- " jmp r14 || ldi %0, #%5\n" \
- ".previous\n" \
- ".section __ex_table,\"a\"\n" \
- " .balign 4\n" \
- " .long 0b,3b\n" \
- ".previous" \
- : "=&r"(res), "=&r"(count), "=&r" (__d0), "=&r" (__d1), \
- "=&r" (__d2) \
- : "i"(-EFAULT), "0"(count), "1"(count), "3"(src), \
- "4"(dst) \
- : "r14", "cbit", "memory"); \
-} while (0)
-
-#else /* not CONFIG_ISA_DUAL_ISSUE */
-
-#define __do_strncpy_from_user(dst,src,count,res) \
-do { \
- int __d0, __d1, __d2; \
- __asm__ __volatile__( \
- " beqz %1, 2f\n" \
- " .fillinsn\n" \
- "0: ldb r14, @%3\n" \
- " stb r14, @%4\n" \
- " addi %3, #1\n" \
- " addi %4, #1\n" \
- " beqz r14, 1f\n" \
- " addi %1, #-1\n" \
- " bnez %1, 0b\n" \
- " .fillinsn\n" \
- "1: sub %0, %1\n" \
- " .fillinsn\n" \
- "2:\n" \
- ".section .fixup,\"ax\"\n" \
- " .balign 4\n" \
- "3: ldi %0, #%5\n" \
- " seth r14, #high(2b)\n" \
- " or3 r14, r14, #low(2b)\n" \
- " jmp r14\n" \
- ".previous\n" \
- ".section __ex_table,\"a\"\n" \
- " .balign 4\n" \
- " .long 0b,3b\n" \
- ".previous" \
- : "=&r"(res), "=&r"(count), "=&r" (__d0), "=&r" (__d1), \
- "=&r" (__d2) \
- : "i"(-EFAULT), "0"(count), "1"(count), "3"(src), \
- "4"(dst) \
- : "r14", "cbit", "memory"); \
-} while (0)
-
-#endif /* CONFIG_ISA_DUAL_ISSUE */
-
-long
-strncpy_from_user(char *dst, const char __user *src, long count)
-{
- long res = -EFAULT;
- if (access_ok(VERIFY_READ, src, 1))
- __do_strncpy_from_user(dst, src, count, res);
- return res;
-}
-
-
-/*
- * Zero Userspace
- */
-
-#ifdef CONFIG_ISA_DUAL_ISSUE
-
-#define __do_clear_user(addr,size) \
-do { \
- int __dst, __c; \
- __asm__ __volatile__( \
- " beqz %1, 9f\n" \
- " and3 r14, %0, #3\n" \
- " bnez r14, 2f\n" \
- " and3 r14, %1, #3\n" \
- " bnez r14, 2f\n" \
- " and3 %1, %1, #3\n" \
- " beqz %2, 2f\n" \
- " addi %0, #-4\n" \
- " .fillinsn\n" \
- "0: ; word clear \n" \
- " st %6, @+%0 || addi %2, #-1\n" \
- " bnez %2, 0b\n" \
- " beqz %1, 9f\n" \
- " .fillinsn\n" \
- "2: ; byte clear \n" \
- " stb %6, @%0 || addi %1, #-1\n" \
- " addi %0, #1\n" \
- " bnez %1, 2b\n" \
- " .fillinsn\n" \
- "9:\n" \
- ".section .fixup,\"ax\"\n" \
- " .balign 4\n" \
- "4: slli %2, #2\n" \
- " seth r14, #high(9b)\n" \
- " or3 r14, r14, #low(9b)\n" \
- " jmp r14 || add %1, %2\n" \
- ".previous\n" \
- ".section __ex_table,\"a\"\n" \
- " .balign 4\n" \
- " .long 0b,4b\n" \
- " .long 2b,9b\n" \
- ".previous\n" \
- : "=&r"(__dst), "=&r"(size), "=&r"(__c) \
- : "0"(addr), "1"(size), "2"(size / 4), "r"(0) \
- : "r14", "cbit", "memory"); \
-} while (0)
-
-#else /* not CONFIG_ISA_DUAL_ISSUE */
-
-#define __do_clear_user(addr,size) \
-do { \
- int __dst, __c; \
- __asm__ __volatile__( \
- " beqz %1, 9f\n" \
- " and3 r14, %0, #3\n" \
- " bnez r14, 2f\n" \
- " and3 r14, %1, #3\n" \
- " bnez r14, 2f\n" \
- " and3 %1, %1, #3\n" \
- " beqz %2, 2f\n" \
- " addi %0, #-4\n" \
- " .fillinsn\n" \
- "0: st %6, @+%0 ; word clear \n" \
- " addi %2, #-1\n" \
- " bnez %2, 0b\n" \
- " beqz %1, 9f\n" \
- " .fillinsn\n" \
- "2: stb %6, @%0 ; byte clear \n" \
- " addi %1, #-1\n" \
- " addi %0, #1\n" \
- " bnez %1, 2b\n" \
- " .fillinsn\n" \
- "9:\n" \
- ".section .fixup,\"ax\"\n" \
- " .balign 4\n" \
- "4: slli %2, #2\n" \
- " add %1, %2\n" \
- " seth r14, #high(9b)\n" \
- " or3 r14, r14, #low(9b)\n" \
- " jmp r14\n" \
- ".previous\n" \
- ".section __ex_table,\"a\"\n" \
- " .balign 4\n" \
- " .long 0b,4b\n" \
- " .long 2b,9b\n" \
- ".previous\n" \
- : "=&r"(__dst), "=&r"(size), "=&r"(__c) \
- : "0"(addr), "1"(size), "2"(size / 4), "r"(0) \
- : "r14", "cbit", "memory"); \
-} while (0)
-
-#endif /* not CONFIG_ISA_DUAL_ISSUE */
-
-unsigned long
-clear_user(void __user *to, unsigned long n)
-{
- if (access_ok(VERIFY_WRITE, to, n))
- __do_clear_user(to, n);
- return n;
-}
-
-unsigned long
-__clear_user(void __user *to, unsigned long n)
-{
- __do_clear_user(to, n);
- return n;
-}
-
-/*
- * Return the size of a string (including the ending 0)
- *
- * Return 0 on exception, a value greater than N if too long
- */
-
-#ifdef CONFIG_ISA_DUAL_ISSUE
-
-long strnlen_user(const char __user *s, long n)
-{
- unsigned long mask = -__addr_ok(s);
- unsigned long res;
-
- __asm__ __volatile__(
- " and %0, %5 || mv r1, %1\n"
- " beqz %0, strnlen_exit\n"
- " and3 r0, %1, #3\n"
- " bnez r0, strnlen_byte_loop\n"
- " cmpui %0, #4\n"
- " bc strnlen_byte_loop\n"
- "strnlen_word_loop:\n"
- "0: ld r0, @%1+\n"
- " pcmpbz r0\n"
- " bc strnlen_last_bytes_fixup\n"
- " addi %0, #-4\n"
- " beqz %0, strnlen_exit\n"
- " bgtz %0, strnlen_word_loop\n"
- "strnlen_last_bytes:\n"
- " mv %0, %4\n"
- "strnlen_last_bytes_fixup:\n"
- " addi %1, #-4\n"
- "strnlen_byte_loop:\n"
- "1: ldb r0, @%1 || addi %0, #-1\n"
- " beqz r0, strnlen_exit\n"
- " addi %1, #1\n"
- " bnez %0, strnlen_byte_loop\n"
- "strnlen_exit:\n"
- " sub %1, r1\n"
- " add3 %0, %1, #1\n"
- " .fillinsn\n"
- "9:\n"
- ".section .fixup,\"ax\"\n"
- " .balign 4\n"
- "4: addi %1, #-4\n"
- " .fillinsn\n"
- "5: seth r1, #high(9b)\n"
- " or3 r1, r1, #low(9b)\n"
- " jmp r1 || ldi %0, #0\n"
- ".previous\n"
- ".section __ex_table,\"a\"\n"
- " .balign 4\n"
- " .long 0b,4b\n"
- " .long 1b,5b\n"
- ".previous"
- : "=&r" (res), "=r" (s)
- : "0" (n), "1" (s), "r" (n & 3), "r" (mask), "r"(0x01010101)
- : "r0", "r1", "cbit");
-
- /* NOTE: strnlen_user() algorithm:
- * {
- * char *p;
- * for (p = s; n-- && *p != '\0'; ++p)
- * ;
- * return p - s + 1;
- * }
- */
-
- /* NOTE: If a null char. exists, return 0.
- * if ((x - 0x01010101) & ~x & 0x80808080)\n"
- * return 0;\n"
- */
-
- return res & mask;
-}
-
-#else /* not CONFIG_ISA_DUAL_ISSUE */
-
-long strnlen_user(const char __user *s, long n)
-{
- unsigned long mask = -__addr_ok(s);
- unsigned long res;
-
- __asm__ __volatile__(
- " and %0, %5\n"
- " mv r1, %1\n"
- " beqz %0, strnlen_exit\n"
- " and3 r0, %1, #3\n"
- " bnez r0, strnlen_byte_loop\n"
- " cmpui %0, #4\n"
- " bc strnlen_byte_loop\n"
- " sll3 r3, %6, #7\n"
- "strnlen_word_loop:\n"
- "0: ld r0, @%1+\n"
- " not r2, r0\n"
- " sub r0, %6\n"
- " and r2, r3\n"
- " and r2, r0\n"
- " bnez r2, strnlen_last_bytes_fixup\n"
- " addi %0, #-4\n"
- " beqz %0, strnlen_exit\n"
- " bgtz %0, strnlen_word_loop\n"
- "strnlen_last_bytes:\n"
- " mv %0, %4\n"
- "strnlen_last_bytes_fixup:\n"
- " addi %1, #-4\n"
- "strnlen_byte_loop:\n"
- "1: ldb r0, @%1\n"
- " addi %0, #-1\n"
- " beqz r0, strnlen_exit\n"
- " addi %1, #1\n"
- " bnez %0, strnlen_byte_loop\n"
- "strnlen_exit:\n"
- " sub %1, r1\n"
- " add3 %0, %1, #1\n"
- " .fillinsn\n"
- "9:\n"
- ".section .fixup,\"ax\"\n"
- " .balign 4\n"
- "4: addi %1, #-4\n"
- " .fillinsn\n"
- "5: ldi %0, #0\n"
- " seth r1, #high(9b)\n"
- " or3 r1, r1, #low(9b)\n"
- " jmp r1\n"
- ".previous\n"
- ".section __ex_table,\"a\"\n"
- " .balign 4\n"
- " .long 0b,4b\n"
- " .long 1b,5b\n"
- ".previous"
- : "=&r" (res), "=r" (s)
- : "0" (n), "1" (s), "r" (n & 3), "r" (mask), "r"(0x01010101)
- : "r0", "r1", "r2", "r3", "cbit");
-
- /* NOTE: strnlen_user() algorithm:
- * {
- * char *p;
- * for (p = s; n-- && *p != '\0'; ++p)
- * ;
- * return p - s + 1;
- * }
- */
-
- /* NOTE: If a null char. exists, return 0.
- * if ((x - 0x01010101) & ~x & 0x80808080)\n"
- * return 0;\n"
- */
-
- return res & mask;
-}
-
-#endif /* CONFIG_ISA_DUAL_ISSUE */
-
+++ /dev/null
-# SPDX-License-Identifier: GPL-2.0
-#
-# Makefile for the Linux M32R-specific parts of the memory manager.
-#
-
-ifdef CONFIG_MMU
-obj-y := init.o fault.o mmu.o extable.o ioremap.o cache.o page.o
-else
-obj-y := init.o fault-nommu.o mmu.o extable.o ioremap-nommu.o cache.o page.o
-endif
-
-obj-$(CONFIG_DISCONTIGMEM) += discontig.o
-
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0
-/*
- * linux/arch/m32r/mm/cache.c
- *
- * Copyright (C) 2002-2005 Hirokazu Takata, Hayato Fujiwara
- */
-
-#include <asm/pgtable.h>
-
-#undef MCCR
-
-#if defined(CONFIG_CHIP_XNUX2) || defined(CONFIG_CHIP_M32700) \
- || defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_OPSP)
-/* Cache Control Register */
-#define MCCR ((volatile unsigned long*)0xfffffffc)
-#define MCCR_CC (1UL << 7) /* Cache mode modify bit */
-#define MCCR_IIV (1UL << 6) /* I-cache invalidate */
-#define MCCR_DIV (1UL << 5) /* D-cache invalidate */
-#define MCCR_DCB (1UL << 4) /* D-cache copy back */
-#define MCCR_ICM (1UL << 1) /* I-cache mode [0:off,1:on] */
-#define MCCR_DCM (1UL << 0) /* D-cache mode [0:off,1:on] */
-#define MCCR_ICACHE_INV (MCCR_CC|MCCR_IIV)
-#define MCCR_DCACHE_CB (MCCR_CC|MCCR_DCB)
-#define MCCR_DCACHE_CBINV (MCCR_CC|MCCR_DIV|MCCR_DCB)
-#define CHECK_MCCR(mccr) (mccr = *MCCR)
-#elif defined(CONFIG_CHIP_M32102)
-#define MCCR ((volatile unsigned char*)0xfffffffe)
-#define MCCR_IIV (1UL << 0) /* I-cache invalidate */
-#define MCCR_ICACHE_INV MCCR_IIV
-#elif defined(CONFIG_CHIP_M32104)
-#define MCCR ((volatile unsigned short*)0xfffffffe)
-#define MCCR_IIV (1UL << 8) /* I-cache invalidate */
-#define MCCR_DIV (1UL << 9) /* D-cache invalidate */
-#define MCCR_DCB (1UL << 10) /* D-cache copy back */
-#define MCCR_ICM (1UL << 0) /* I-cache mode [0:off,1:on] */
-#define MCCR_DCM (1UL << 1) /* D-cache mode [0:off,1:on] */
-#define MCCR_ICACHE_INV MCCR_IIV
-#define MCCR_DCACHE_CB MCCR_DCB
-#define MCCR_DCACHE_CBINV (MCCR_DIV|MCCR_DCB)
-#endif
-
-#ifndef MCCR
-#error Unknown cache type.
-#endif
-
-
-/* Copy back and invalidate D-cache and invalidate I-cache all */
-void _flush_cache_all(void)
-{
-#if defined(CONFIG_CHIP_M32102)
- unsigned char mccr;
- *MCCR = MCCR_ICACHE_INV;
-#elif defined(CONFIG_CHIP_M32104)
- unsigned short mccr;
-
- /* Copyback and invalidate D-cache */
- /* Invalidate I-cache */
- *MCCR |= (MCCR_ICACHE_INV | MCCR_DCACHE_CBINV);
-#else
- unsigned long mccr;
-
- /* Copyback and invalidate D-cache */
- /* Invalidate I-cache */
- *MCCR = MCCR_ICACHE_INV | MCCR_DCACHE_CBINV;
-#endif
- while ((mccr = *MCCR) & MCCR_IIV); /* loop while invalidating... */
-}
-
-/* Copy back D-cache and invalidate I-cache all */
-void _flush_cache_copyback_all(void)
-{
-#if defined(CONFIG_CHIP_M32102)
- unsigned char mccr;
- *MCCR = MCCR_ICACHE_INV;
-#elif defined(CONFIG_CHIP_M32104)
- unsigned short mccr;
-
- /* Copyback and invalidate D-cache */
- /* Invalidate I-cache */
- *MCCR |= (MCCR_ICACHE_INV | MCCR_DCACHE_CB);
-#else
- unsigned long mccr;
-
- /* Copyback D-cache */
- /* Invalidate I-cache */
- *MCCR = MCCR_ICACHE_INV | MCCR_DCACHE_CB;
-#endif
- while ((mccr = *MCCR) & MCCR_IIV); /* loop while invalidating... */
-}
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0
-/*
- * linux/arch/m32r/mm/discontig.c
- *
- * Discontig memory support
- *
- * Copyright (c) 2003 Hitoshi Yamamoto
- */
-
-#include <linux/mm.h>
-#include <linux/bootmem.h>
-#include <linux/mmzone.h>
-#include <linux/initrd.h>
-#include <linux/nodemask.h>
-#include <linux/module.h>
-#include <linux/pfn.h>
-
-#include <asm/setup.h>
-
-extern char _end[];
-
-struct pglist_data *node_data[MAX_NUMNODES];
-EXPORT_SYMBOL(node_data);
-
-pg_data_t m32r_node_data[MAX_NUMNODES];
-
-/* Memory profile */
-typedef struct {
- unsigned long start_pfn;
- unsigned long pages;
- unsigned long holes;
- unsigned long free_pfn;
-} mem_prof_t;
-static mem_prof_t mem_prof[MAX_NUMNODES];
-
-extern unsigned long memory_start;
-extern unsigned long memory_end;
-
-static void __init mem_prof_init(void)
-{
- unsigned long start_pfn, holes, free_pfn;
- const unsigned long zone_alignment = 1UL << (MAX_ORDER - 1);
- unsigned long ul;
- mem_prof_t *mp;
-
- /* Node#0 SDRAM */
- mp = &mem_prof[0];
- mp->start_pfn = PFN_UP(CONFIG_MEMORY_START);
- mp->pages = PFN_DOWN(memory_end - memory_start);
- mp->holes = 0;
- mp->free_pfn = PFN_UP(__pa(_end));
-
- /* Node#1 internal SRAM */
- mp = &mem_prof[1];
- start_pfn = free_pfn = PFN_UP(CONFIG_IRAM_START);
- holes = 0;
- if (start_pfn & (zone_alignment - 1)) {
- ul = zone_alignment;
- while (start_pfn >= ul)
- ul += zone_alignment;
-
- start_pfn = ul - zone_alignment;
- holes = free_pfn - start_pfn;
- }
-
- mp->start_pfn = start_pfn;
- mp->pages = PFN_DOWN(CONFIG_IRAM_SIZE) + holes;
- mp->holes = holes;
- mp->free_pfn = PFN_UP(CONFIG_IRAM_START);
-}
-
-unsigned long __init setup_memory(void)
-{
- unsigned long bootmap_size;
- unsigned long min_pfn;
- int nid;
- mem_prof_t *mp;
-
- max_low_pfn = 0;
- min_low_pfn = -1;
-
- mem_prof_init();
-
- for_each_online_node(nid) {
- mp = &mem_prof[nid];
- NODE_DATA(nid)=(pg_data_t *)&m32r_node_data[nid];
- NODE_DATA(nid)->bdata = &bootmem_node_data[nid];
- min_pfn = mp->start_pfn;
- max_pfn = mp->start_pfn + mp->pages;
- bootmap_size = init_bootmem_node(NODE_DATA(nid), mp->free_pfn,
- mp->start_pfn, max_pfn);
-
- free_bootmem_node(NODE_DATA(nid), PFN_PHYS(mp->start_pfn),
- PFN_PHYS(mp->pages));
-
- reserve_bootmem_node(NODE_DATA(nid), PFN_PHYS(mp->start_pfn),
- PFN_PHYS(mp->free_pfn - mp->start_pfn) + bootmap_size,
- BOOTMEM_DEFAULT);
-
- if (max_low_pfn < max_pfn)
- max_low_pfn = max_pfn;
-
- if (min_low_pfn > min_pfn)
- min_low_pfn = min_pfn;
- }
-
-#ifdef CONFIG_BLK_DEV_INITRD
- if (LOADER_TYPE && INITRD_START) {
- if (INITRD_START + INITRD_SIZE <= PFN_PHYS(max_low_pfn)) {
- reserve_bootmem_node(NODE_DATA(0), INITRD_START,
- INITRD_SIZE, BOOTMEM_DEFAULT);
- initrd_start = INITRD_START + PAGE_OFFSET;
- initrd_end = initrd_start + INITRD_SIZE;
- printk("initrd:start[%08lx],size[%08lx]\n",
- initrd_start, INITRD_SIZE);
- } else {
- printk("initrd extends beyond end of memory "
- "(0x%08lx > 0x%08llx)\ndisabling initrd\n",
- INITRD_START + INITRD_SIZE,
- (unsigned long long)PFN_PHYS(max_low_pfn));
-
- initrd_start = 0;
- }
- }
-#endif /* CONFIG_BLK_DEV_INITRD */
-
- return max_low_pfn;
-}
-
-#define START_PFN(nid) (NODE_DATA(nid)->bdata->node_min_pfn)
-#define MAX_LOW_PFN(nid) (NODE_DATA(nid)->bdata->node_low_pfn)
-
-void __init zone_sizes_init(void)
-{
- unsigned long zones_size[MAX_NR_ZONES], zholes_size[MAX_NR_ZONES];
- unsigned long low, start_pfn;
- int nid, i;
- mem_prof_t *mp;
-
- for_each_online_node(nid) {
- mp = &mem_prof[nid];
- for (i = 0 ; i < MAX_NR_ZONES ; i++) {
- zones_size[i] = 0;
- zholes_size[i] = 0;
- }
- start_pfn = START_PFN(nid);
- low = MAX_LOW_PFN(nid);
- zones_size[ZONE_DMA] = low - start_pfn;
- zholes_size[ZONE_DMA] = mp->holes;
-
- node_set_state(nid, N_NORMAL_MEMORY);
- free_area_init_node(nid, zones_size, start_pfn, zholes_size);
- }
-
- /*
- * For test
- * Use all area of internal RAM.
- * see __alloc_pages()
- */
- NODE_DATA(1)->node_zones->watermark[WMARK_MIN] = 0;
- NODE_DATA(1)->node_zones->watermark[WMARK_LOW] = 0;
- NODE_DATA(1)->node_zones->watermark[WMARK_HIGH] = 0;
-}
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0
-/*
- * linux/arch/m32r/mm/extable.c
- */
-
-#include <linux/extable.h>
-#include <linux/uaccess.h>
-
-int fixup_exception(struct pt_regs *regs)
-{
- const struct exception_table_entry *fixup;
-
- fixup = search_exception_tables(regs->bpc);
- if (fixup) {
- regs->bpc = fixup->fixup;
- return 1;
- }
-
- return 0;
-}
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0
-/*
- * linux/arch/m32r/mm/fault.c
- *
- * Copyright (c) 2001, 2002 Hitoshi Yamamoto, and H. Kondo
- *
- * Some code taken from i386 version.
- * Copyright (C) 1995 Linus Torvalds
- */
-
-#include <linux/signal.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/errno.h>
-#include <linux/string.h>
-#include <linux/types.h>
-#include <linux/ptrace.h>
-#include <linux/mman.h>
-#include <linux/mm.h>
-#include <linux/smp.h>
-#include <linux/interrupt.h>
-#include <linux/init.h>
-#include <linux/vt_kern.h> /* For unblank_screen() */
-
-#include <asm/m32r.h>
-#include <linux/uaccess.h>
-#include <asm/pgalloc.h>
-#include <asm/pgtable.h>
-#include <asm/hardirq.h>
-#include <asm/mmu_context.h>
-
-extern void die(const char *, struct pt_regs *, long);
-
-#ifndef CONFIG_SMP
-asmlinkage unsigned int tlb_entry_i_dat;
-asmlinkage unsigned int tlb_entry_d_dat;
-#define tlb_entry_i tlb_entry_i_dat
-#define tlb_entry_d tlb_entry_d_dat
-#else
-unsigned int tlb_entry_i_dat[NR_CPUS];
-unsigned int tlb_entry_d_dat[NR_CPUS];
-#define tlb_entry_i tlb_entry_i_dat[smp_processor_id()]
-#define tlb_entry_d tlb_entry_d_dat[smp_processor_id()]
-#endif
-
-void do_BUG(const char *file, int line)
-{
- bust_spinlocks(1);
- printk("kernel BUG at %s:%d!\n", file, line);
-}
-
-/*======================================================================*
- * do_page_fault()
- *======================================================================*
- * This routine handles page faults. It determines the address,
- * and the problem, and then passes it off to one of the appropriate
- * routines.
- *
- * ARGUMENT:
- * regs : M32R SP reg.
- * error_code : See below
- * address : M32R MMU MDEVA reg. (Operand ACE)
- * : M32R BPC reg. (Instruction ACE)
- *
- * error_code :
- * bit 0 == 0 means no page found, 1 means protection fault
- * bit 1 == 0 means read, 1 means write
- * bit 2 == 0 means kernel, 1 means user-mode
- *======================================================================*/
-asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long error_code,
- unsigned long address)
-{
-
-/*
- * Oops. The kernel tried to access some bad page. We'll have to
- * terminate things with extreme prejudice.
- */
-
- bust_spinlocks(1);
-
- if (address < PAGE_SIZE)
- printk(KERN_ALERT "Unable to handle kernel NULL pointer dereference");
- else
- printk(KERN_ALERT "Unable to handle kernel paging request");
- printk(" at virtual address %08lx\n",address);
- printk(" printing bpc:\n");
- printk(KERN_ALERT "bpc = %08lx\n", regs->bpc);
-
- die("Oops", regs, error_code);
- bust_spinlocks(0);
- do_exit(SIGKILL);
-}
-
-/*======================================================================*
- * update_mmu_cache()
- *======================================================================*/
-void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr,
- pte_t *ptep)
-{
- BUG();
-}
-
-/*======================================================================*
- * flush_tlb_page() : flushes one page
- *======================================================================*/
-void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
-{
- BUG();
-}
-
-/*======================================================================*
- * flush_tlb_range() : flushes a range of pages
- *======================================================================*/
-void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
- unsigned long end)
-{
- BUG();
-}
-
-/*======================================================================*
- * flush_tlb_mm() : flushes the specified mm context TLB's
- *======================================================================*/
-void local_flush_tlb_mm(struct mm_struct *mm)
-{
- BUG();
-}
-
-/*======================================================================*
- * flush_tlb_all() : flushes all processes TLBs
- *======================================================================*/
-void local_flush_tlb_all(void)
-{
- BUG();
-}
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0
-/*
- * linux/arch/m32r/mm/fault.c
- *
- * Copyright (c) 2001, 2002 Hitoshi Yamamoto, and H. Kondo
- * Copyright (c) 2004 Naoto Sugai, NIIBE Yutaka
- *
- * Some code taken from i386 version.
- * Copyright (C) 1995 Linus Torvalds
- */
-
-#include <linux/signal.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/errno.h>
-#include <linux/string.h>
-#include <linux/types.h>
-#include <linux/ptrace.h>
-#include <linux/mman.h>
-#include <linux/mm.h>
-#include <linux/smp.h>
-#include <linux/interrupt.h>
-#include <linux/init.h>
-#include <linux/tty.h>
-#include <linux/vt_kern.h> /* For unblank_screen() */
-#include <linux/highmem.h>
-#include <linux/extable.h>
-#include <linux/uaccess.h>
-
-#include <asm/m32r.h>
-#include <asm/hardirq.h>
-#include <asm/mmu_context.h>
-#include <asm/tlbflush.h>
-
-extern void die(const char *, struct pt_regs *, long);
-
-#ifndef CONFIG_SMP
-asmlinkage unsigned int tlb_entry_i_dat;
-asmlinkage unsigned int tlb_entry_d_dat;
-#define tlb_entry_i tlb_entry_i_dat
-#define tlb_entry_d tlb_entry_d_dat
-#else
-unsigned int tlb_entry_i_dat[NR_CPUS];
-unsigned int tlb_entry_d_dat[NR_CPUS];
-#define tlb_entry_i tlb_entry_i_dat[smp_processor_id()]
-#define tlb_entry_d tlb_entry_d_dat[smp_processor_id()]
-#endif
-
-extern void init_tlb(void);
-
-/*======================================================================*
- * do_page_fault()
- *======================================================================*
- * This routine handles page faults. It determines the address,
- * and the problem, and then passes it off to one of the appropriate
- * routines.
- *
- * ARGUMENT:
- * regs : M32R SP reg.
- * error_code : See below
- * address : M32R MMU MDEVA reg. (Operand ACE)
- * : M32R BPC reg. (Instruction ACE)
- *
- * error_code :
- * bit 0 == 0 means no page found, 1 means protection fault
- * bit 1 == 0 means read, 1 means write
- * bit 2 == 0 means kernel, 1 means user-mode
- * bit 3 == 0 means data, 1 means instruction
- *======================================================================*/
-#define ACE_PROTECTION 1
-#define ACE_WRITE 2
-#define ACE_USERMODE 4
-#define ACE_INSTRUCTION 8
-
-asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long error_code,
- unsigned long address)
-{
- struct task_struct *tsk;
- struct mm_struct *mm;
- struct vm_area_struct * vma;
- unsigned long page, addr;
- unsigned long flags = 0;
- int fault;
- siginfo_t info;
-
- /*
- * If BPSW IE bit enable --> set PSW IE bit
- */
- if (regs->psw & M32R_PSW_BIE)
- local_irq_enable();
-
- tsk = current;
-
- info.si_code = SEGV_MAPERR;
-
- /*
- * We fault-in kernel-space virtual memory on-demand. The
- * 'reference' page table is init_mm.pgd.
- *
- * NOTE! We MUST NOT take any locks for this case. We may
- * be in an interrupt or a critical region, and should
- * only copy the information from the master page table,
- * nothing more.
- *
- * This verifies that the fault happens in kernel space
- * (error_code & ACE_USERMODE) == 0, and that the fault was not a
- * protection error (error_code & ACE_PROTECTION) == 0.
- */
- if (address >= TASK_SIZE && !(error_code & ACE_USERMODE))
- goto vmalloc_fault;
-
- mm = tsk->mm;
-
- /*
- * If we're in an interrupt or have no user context or have pagefaults
- * disabled then we must not take the fault.
- */
- if (faulthandler_disabled() || !mm)
- goto bad_area_nosemaphore;
-
- if (error_code & ACE_USERMODE)
- flags |= FAULT_FLAG_USER;
-
- /* When running in the kernel we expect faults to occur only to
- * addresses in user space. All other faults represent errors in the
- * kernel and should generate an OOPS. Unfortunately, in the case of an
- * erroneous fault occurring in a code path which already holds mmap_sem
- * we will deadlock attempting to validate the fault against the
- * address space. Luckily the kernel only validly references user
- * space from well defined areas of code, which are listed in the
- * exceptions table.
- *
- * As the vast majority of faults will be valid we will only perform
- * the source reference check when there is a possibility of a deadlock.
- * Attempt to lock the address space, if we cannot we then validate the
- * source. If this is invalid we can skip the address space check,
- * thus avoiding the deadlock.
- */
- if (!down_read_trylock(&mm->mmap_sem)) {
- if ((error_code & ACE_USERMODE) == 0 &&
- !search_exception_tables(regs->psw))
- goto bad_area_nosemaphore;
- down_read(&mm->mmap_sem);
- }
-
- vma = find_vma(mm, address);
- if (!vma)
- goto bad_area;
- if (vma->vm_start <= address)
- goto good_area;
- if (!(vma->vm_flags & VM_GROWSDOWN))
- goto bad_area;
-
- if (error_code & ACE_USERMODE) {
- /*
- * accessing the stack below "spu" is always a bug.
- * The "+ 4" is there due to the push instruction
- * doing pre-decrement on the stack and that
- * doesn't show up until later..
- */
- if (address + 4 < regs->spu)
- goto bad_area;
- }
-
- if (expand_stack(vma, address))
- goto bad_area;
-/*
- * Ok, we have a good vm_area for this memory access, so
- * we can handle it..
- */
-good_area:
- info.si_code = SEGV_ACCERR;
- switch (error_code & (ACE_WRITE|ACE_PROTECTION)) {
- default: /* 3: write, present */
- /* fall through */
- case ACE_WRITE: /* write, not present */
- if (!(vma->vm_flags & VM_WRITE))
- goto bad_area;
- flags |= FAULT_FLAG_WRITE;
- break;
- case ACE_PROTECTION: /* read, present */
- case 0: /* read, not present */
- if (!(vma->vm_flags & (VM_READ | VM_EXEC)))
- goto bad_area;
- }
-
- /*
- * For instruction access exception, check if the area is executable
- */
- if ((error_code & ACE_INSTRUCTION) && !(vma->vm_flags & VM_EXEC))
- goto bad_area;
-
- /*
- * If for any reason at all we couldn't handle the fault,
- * make sure we exit gracefully rather than endlessly redo
- * the fault.
- */
- addr = (address & PAGE_MASK);
- set_thread_fault_code(error_code);
- fault = handle_mm_fault(vma, addr, flags);
- if (unlikely(fault & VM_FAULT_ERROR)) {
- if (fault & VM_FAULT_OOM)
- goto out_of_memory;
- else if (fault & VM_FAULT_SIGSEGV)
- goto bad_area;
- else if (fault & VM_FAULT_SIGBUS)
- goto do_sigbus;
- BUG();
- }
- if (fault & VM_FAULT_MAJOR)
- tsk->maj_flt++;
- else
- tsk->min_flt++;
- set_thread_fault_code(0);
- up_read(&mm->mmap_sem);
- return;
-
-/*
- * Something tried to access memory that isn't in our memory map..
- * Fix it, but check if it's kernel or user first..
- */
-bad_area:
- up_read(&mm->mmap_sem);
-
-bad_area_nosemaphore:
- /* User mode accesses just cause a SIGSEGV */
- if (error_code & ACE_USERMODE) {
- tsk->thread.address = address;
- tsk->thread.error_code = error_code | (address >= TASK_SIZE);
- tsk->thread.trap_no = 14;
- info.si_signo = SIGSEGV;
- info.si_errno = 0;
- /* info.si_code has been set above */
- info.si_addr = (void __user *)address;
- force_sig_info(SIGSEGV, &info, tsk);
- return;
- }
-
-no_context:
- /* Are we prepared to handle this kernel fault? */
- if (fixup_exception(regs))
- return;
-
-/*
- * Oops. The kernel tried to access some bad page. We'll have to
- * terminate things with extreme prejudice.
- */
-
- bust_spinlocks(1);
-
- if (address < PAGE_SIZE)
- printk(KERN_ALERT "Unable to handle kernel NULL pointer dereference");
- else
- printk(KERN_ALERT "Unable to handle kernel paging request");
- printk(" at virtual address %08lx\n",address);
- printk(KERN_ALERT " printing bpc:\n");
- printk("%08lx\n", regs->bpc);
- page = *(unsigned long *)MPTB;
- page = ((unsigned long *) page)[address >> PGDIR_SHIFT];
- printk(KERN_ALERT "*pde = %08lx\n", page);
- if (page & _PAGE_PRESENT) {
- page &= PAGE_MASK;
- address &= 0x003ff000;
- page = ((unsigned long *) __va(page))[address >> PAGE_SHIFT];
- printk(KERN_ALERT "*pte = %08lx\n", page);
- }
- die("Oops", regs, error_code);
- bust_spinlocks(0);
- do_exit(SIGKILL);
-
-/*
- * We ran out of memory, or some other thing happened to us that made
- * us unable to handle the page fault gracefully.
- */
-out_of_memory:
- up_read(&mm->mmap_sem);
- if (!(error_code & ACE_USERMODE))
- goto no_context;
- pagefault_out_of_memory();
- return;
-
-do_sigbus:
- up_read(&mm->mmap_sem);
-
- /* Kernel mode? Handle exception or die */
- if (!(error_code & ACE_USERMODE))
- goto no_context;
-
- tsk->thread.address = address;
- tsk->thread.error_code = error_code;
- tsk->thread.trap_no = 14;
- info.si_signo = SIGBUS;
- info.si_errno = 0;
- info.si_code = BUS_ADRERR;
- info.si_addr = (void __user *)address;
- force_sig_info(SIGBUS, &info, tsk);
- return;
-
-vmalloc_fault:
- {
- /*
- * Synchronize this task's top level page-table
- * with the 'reference' page table.
- *
- * Do _not_ use "tsk" here. We might be inside
- * an interrupt in the middle of a task switch..
- */
- int offset = pgd_index(address);
- pgd_t *pgd, *pgd_k;
- pmd_t *pmd, *pmd_k;
- pte_t *pte_k;
-
- pgd = (pgd_t *)*(unsigned long *)MPTB;
- pgd = offset + (pgd_t *)pgd;
- pgd_k = init_mm.pgd + offset;
-
- if (!pgd_present(*pgd_k))
- goto no_context;
-
- /*
- * set_pgd(pgd, *pgd_k); here would be useless on PAE
- * and redundant with the set_pmd() on non-PAE.
- */
-
- pmd = pmd_offset(pgd, address);
- pmd_k = pmd_offset(pgd_k, address);
- if (!pmd_present(*pmd_k))
- goto no_context;
- set_pmd(pmd, *pmd_k);
-
- pte_k = pte_offset_kernel(pmd_k, address);
- if (!pte_present(*pte_k))
- goto no_context;
-
- addr = (address & PAGE_MASK);
- set_thread_fault_code(error_code);
- update_mmu_cache(NULL, addr, pte_k);
- set_thread_fault_code(0);
- return;
- }
-}
-
-/*======================================================================*
- * update_mmu_cache()
- *======================================================================*/
-#define TLB_MASK (NR_TLB_ENTRIES - 1)
-#define ITLB_END (unsigned long *)(ITLB_BASE + (NR_TLB_ENTRIES * 8))
-#define DTLB_END (unsigned long *)(DTLB_BASE + (NR_TLB_ENTRIES * 8))
-void update_mmu_cache(struct vm_area_struct *vma, unsigned long vaddr,
- pte_t *ptep)
-{
- volatile unsigned long *entry1, *entry2;
- unsigned long pte_data, flags;
- unsigned int *entry_dat;
- int inst = get_thread_fault_code() & ACE_INSTRUCTION;
- int i;
-
- /* Ptrace may call this routine. */
- if (vma && current->active_mm != vma->vm_mm)
- return;
-
- local_irq_save(flags);
-
- vaddr = (vaddr & PAGE_MASK) | get_asid();
-
- pte_data = pte_val(*ptep);
-
-#ifdef CONFIG_CHIP_OPSP
- entry1 = (unsigned long *)ITLB_BASE;
- for (i = 0; i < NR_TLB_ENTRIES; i++) {
- if (*entry1++ == vaddr) {
- set_tlb_data(entry1, pte_data);
- break;
- }
- entry1++;
- }
- entry2 = (unsigned long *)DTLB_BASE;
- for (i = 0; i < NR_TLB_ENTRIES; i++) {
- if (*entry2++ == vaddr) {
- set_tlb_data(entry2, pte_data);
- break;
- }
- entry2++;
- }
-#else
- /*
- * Update TLB entries
- * entry1: ITLB entry address
- * entry2: DTLB entry address
- */
- __asm__ __volatile__ (
- "seth %0, #high(%4) \n\t"
- "st %2, @(%5, %0) \n\t"
- "ldi %1, #1 \n\t"
- "st %1, @(%6, %0) \n\t"
- "add3 r4, %0, %7 \n\t"
- ".fillinsn \n"
- "1: \n\t"
- "ld %1, @(%6, %0) \n\t"
- "bnez %1, 1b \n\t"
- "ld %0, @r4+ \n\t"
- "ld %1, @r4 \n\t"
- "st %3, @+%0 \n\t"
- "st %3, @+%1 \n\t"
- : "=&r" (entry1), "=&r" (entry2)
- : "r" (vaddr), "r" (pte_data), "i" (MMU_REG_BASE),
- "i" (MSVA_offset), "i" (MTOP_offset), "i" (MIDXI_offset)
- : "r4", "memory"
- );
-#endif
-
- if ((!inst && entry2 >= DTLB_END) || (inst && entry1 >= ITLB_END))
- goto notfound;
-
-found:
- local_irq_restore(flags);
-
- return;
-
- /* Valid entry not found */
-notfound:
- /*
- * Update ITLB or DTLB entry
- * entry1: TLB entry address
- * entry2: TLB base address
- */
- if (!inst) {
- entry2 = (unsigned long *)DTLB_BASE;
- entry_dat = &tlb_entry_d;
- } else {
- entry2 = (unsigned long *)ITLB_BASE;
- entry_dat = &tlb_entry_i;
- }
- entry1 = entry2 + (((*entry_dat - 1) & TLB_MASK) << 1);
-
- for (i = 0 ; i < NR_TLB_ENTRIES ; i++) {
- if (!(entry1[1] & 2)) /* Valid bit check */
- break;
-
- if (entry1 != entry2)
- entry1 -= 2;
- else
- entry1 += TLB_MASK << 1;
- }
-
- if (i >= NR_TLB_ENTRIES) { /* Empty entry not found */
- entry1 = entry2 + (*entry_dat << 1);
- *entry_dat = (*entry_dat + 1) & TLB_MASK;
- }
- *entry1++ = vaddr; /* Set TLB tag */
- set_tlb_data(entry1, pte_data);
-
- goto found;
-}
-
-/*======================================================================*
- * flush_tlb_page() : flushes one page
- *======================================================================*/
-void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
-{
- if (vma->vm_mm && mm_context(vma->vm_mm) != NO_CONTEXT) {
- unsigned long flags;
-
- local_irq_save(flags);
- page &= PAGE_MASK;
- page |= (mm_context(vma->vm_mm) & MMU_CONTEXT_ASID_MASK);
- __flush_tlb_page(page);
- local_irq_restore(flags);
- }
-}
-
-/*======================================================================*
- * flush_tlb_range() : flushes a range of pages
- *======================================================================*/
-void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
- unsigned long end)
-{
- struct mm_struct *mm;
-
- mm = vma->vm_mm;
- if (mm_context(mm) != NO_CONTEXT) {
- unsigned long flags;
- int size;
-
- local_irq_save(flags);
- size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
- if (size > (NR_TLB_ENTRIES / 4)) { /* Too many TLB to flush */
- mm_context(mm) = NO_CONTEXT;
- if (mm == current->mm)
- activate_context(mm);
- } else {
- unsigned long asid;
-
- asid = mm_context(mm) & MMU_CONTEXT_ASID_MASK;
- start &= PAGE_MASK;
- end += (PAGE_SIZE - 1);
- end &= PAGE_MASK;
-
- start |= asid;
- end |= asid;
- while (start < end) {
- __flush_tlb_page(start);
- start += PAGE_SIZE;
- }
- }
- local_irq_restore(flags);
- }
-}
-
-/*======================================================================*
- * flush_tlb_mm() : flushes the specified mm context TLB's
- *======================================================================*/
-void local_flush_tlb_mm(struct mm_struct *mm)
-{
- /* Invalidate all TLB of this process. */
- /* Instead of invalidating each TLB, we get new MMU context. */
- if (mm_context(mm) != NO_CONTEXT) {
- unsigned long flags;
-
- local_irq_save(flags);
- mm_context(mm) = NO_CONTEXT;
- if (mm == current->mm)
- activate_context(mm);
- local_irq_restore(flags);
- }
-}
-
-/*======================================================================*
- * flush_tlb_all() : flushes all processes TLBs
- *======================================================================*/
-void local_flush_tlb_all(void)
-{
- unsigned long flags;
-
- local_irq_save(flags);
- __flush_tlb_all();
- local_irq_restore(flags);
-}
-
-/*======================================================================*
- * init_mmu()
- *======================================================================*/
-void __init init_mmu(void)
-{
- tlb_entry_i = 0;
- tlb_entry_d = 0;
- mmu_context_cache = MMU_CONTEXT_FIRST_VERSION;
- set_asid(mmu_context_cache & MMU_CONTEXT_ASID_MASK);
- *(volatile unsigned long *)MPTB = (unsigned long)swapper_pg_dir;
-}
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0
-/*
- * linux/arch/m32r/mm/init.c
- *
- * Copyright (c) 2001, 2002 Hitoshi Yamamoto
- *
- * Some code taken from sh version.
- * Copyright (C) 1999 Niibe Yutaka
- * Based on linux/arch/i386/mm/init.c:
- * Copyright (C) 1995 Linus Torvalds
- */
-
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/mm.h>
-#include <linux/pagemap.h>
-#include <linux/bootmem.h>
-#include <linux/swap.h>
-#include <linux/highmem.h>
-#include <linux/bitops.h>
-#include <linux/nodemask.h>
-#include <linux/pfn.h>
-#include <linux/gfp.h>
-#include <asm/types.h>
-#include <asm/processor.h>
-#include <asm/page.h>
-#include <asm/pgtable.h>
-#include <asm/pgalloc.h>
-#include <asm/mmu_context.h>
-#include <asm/setup.h>
-#include <asm/tlb.h>
-#include <asm/sections.h>
-
-pgd_t swapper_pg_dir[1024];
-
-/*
- * Cache of MMU context last used.
- */
-#ifndef CONFIG_SMP
-unsigned long mmu_context_cache_dat;
-#else
-unsigned long mmu_context_cache_dat[NR_CPUS];
-#endif
-
-/*
- * function prototype
- */
-void __init paging_init(void);
-void __init mem_init(void);
-void free_initmem(void);
-#ifdef CONFIG_BLK_DEV_INITRD
-void free_initrd_mem(unsigned long, unsigned long);
-#endif
-
-/* It'd be good if these lines were in the standard header file. */
-#define START_PFN(nid) (NODE_DATA(nid)->bdata->node_min_pfn)
-#define MAX_LOW_PFN(nid) (NODE_DATA(nid)->bdata->node_low_pfn)
-
-#ifndef CONFIG_DISCONTIGMEM
-void __init zone_sizes_init(void)
-{
- unsigned long zones_size[MAX_NR_ZONES] = {0, };
- unsigned long start_pfn;
-
-#ifdef CONFIG_MMU
- {
- unsigned long low;
- unsigned long max_dma;
-
- start_pfn = START_PFN(0);
- max_dma = virt_to_phys((char *)MAX_DMA_ADDRESS) >> PAGE_SHIFT;
- low = MAX_LOW_PFN(0);
-
- if (low < max_dma) {
- zones_size[ZONE_DMA] = low - start_pfn;
- zones_size[ZONE_NORMAL] = 0;
- } else {
- zones_size[ZONE_DMA] = low - start_pfn;
- zones_size[ZONE_NORMAL] = low - max_dma;
- }
- }
-#else
- zones_size[ZONE_DMA] = 0 >> PAGE_SHIFT;
- zones_size[ZONE_NORMAL] = __MEMORY_SIZE >> PAGE_SHIFT;
- start_pfn = __MEMORY_START >> PAGE_SHIFT;
-#endif /* CONFIG_MMU */
-
- free_area_init_node(0, zones_size, start_pfn, 0);
-}
-#else /* CONFIG_DISCONTIGMEM */
-extern void zone_sizes_init(void);
-#endif /* CONFIG_DISCONTIGMEM */
-
-/*======================================================================*
- * paging_init() : sets up the page tables
- *======================================================================*/
-void __init paging_init(void)
-{
-#ifdef CONFIG_MMU
- int i;
- pgd_t *pg_dir;
-
- /* We don't need kernel mapping as hardware support that. */
- pg_dir = swapper_pg_dir;
-
- for (i = 0 ; i < USER_PTRS_PER_PGD * 2 ; i++)
- pgd_val(pg_dir[i]) = 0;
-#endif /* CONFIG_MMU */
- zone_sizes_init();
-}
-
-/*======================================================================*
- * mem_init() :
- * orig : arch/sh/mm/init.c
- *======================================================================*/
-void __init mem_init(void)
-{
-#ifndef CONFIG_MMU
- extern unsigned long memory_end;
-
- high_memory = (void *)(memory_end & PAGE_MASK);
-#else
- high_memory = (void *)__va(PFN_PHYS(MAX_LOW_PFN(0)));
-#endif /* CONFIG_MMU */
-
- /* clear the zero-page */
- memset(empty_zero_page, 0, PAGE_SIZE);
-
- set_max_mapnr(get_num_physpages());
- free_all_bootmem();
- mem_init_print_info(NULL);
-}
-
-/*======================================================================*
- * free_initmem() :
- * orig : arch/sh/mm/init.c
- *======================================================================*/
-void free_initmem(void)
-{
- free_initmem_default(-1);
-}
-
-#ifdef CONFIG_BLK_DEV_INITRD
-/*======================================================================*
- * free_initrd_mem() :
- * orig : arch/sh/mm/init.c
- *======================================================================*/
-void free_initrd_mem(unsigned long start, unsigned long end)
-{
- free_reserved_area((void *)start, (void *)end, -1, "initrd");
-}
-#endif
+++ /dev/null
-/*
- * linux/arch/m32r/mm/ioremap-nommu.c
- *
- * Copyright (c) 2001, 2002 Hiroyuki Kondo
- *
- * Taken from mips version.
- * (C) Copyright 1995 1996 Linus Torvalds
- * (C) Copyright 2001 Ralf Baechle
- */
-
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- */
-
-#include <linux/module.h>
-#include <asm/addrspace.h>
-#include <asm/byteorder.h>
-
-#include <linux/vmalloc.h>
-#include <asm/io.h>
-#include <asm/pgalloc.h>
-#include <asm/cacheflush.h>
-#include <asm/tlbflush.h>
-
-
-/*
- * Remap an arbitrary physical address space into the kernel virtual
- * address space. Needed when the kernel wants to access high addresses
- * directly.
- *
- * NOTE! We need to allow non-page-aligned mappings too: we will obviously
- * have to convert them into an offset in a page-aligned mapping, but the
- * caller shouldn't need to know that small detail.
- */
-
-#define IS_LOW512(addr) (!((unsigned long)(addr) & ~0x1fffffffUL))
-
-void __iomem *
-__ioremap(unsigned long phys_addr, unsigned long size, unsigned long flags)
-{
- return (void *)phys_addr;
-}
-
-#define IS_KSEG1(addr) (((unsigned long)(addr) & ~0x1fffffffUL) == KSEG1)
-
-void iounmap(volatile void __iomem *addr)
-{
-}
-
+++ /dev/null
-/*
- * linux/arch/m32r/mm/ioremap.c
- *
- * Copyright (c) 2001, 2002 Hiroyuki Kondo
- *
- * Taken from mips version.
- * (C) Copyright 1995 1996 Linus Torvalds
- * (C) Copyright 2001 Ralf Baechle
- */
-
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- */
-
-#include <linux/module.h>
-#include <asm/addrspace.h>
-#include <asm/byteorder.h>
-
-#include <linux/vmalloc.h>
-#include <linux/io.h>
-#include <asm/pgalloc.h>
-
-/*
- * Generic mapping function (not visible outside):
- */
-
-/*
- * Remap an arbitrary physical address space into the kernel virtual
- * address space. Needed when the kernel wants to access high addresses
- * directly.
- *
- * NOTE! We need to allow non-page-aligned mappings too: we will obviously
- * have to convert them into an offset in a page-aligned mapping, but the
- * caller shouldn't need to know that small detail.
- */
-
-#define IS_LOW512(addr) (!((unsigned long)(addr) & ~0x1fffffffUL))
-
-void __iomem *
-__ioremap(unsigned long phys_addr, unsigned long size, unsigned long flags)
-{
- void __iomem * addr;
- struct vm_struct * area;
- unsigned long offset, last_addr;
- pgprot_t pgprot;
-
- /* Don't allow wraparound or zero size */
- last_addr = phys_addr + size - 1;
- if (!size || last_addr < phys_addr)
- return NULL;
-
- /*
- * Map objects in the low 512mb of address space using KSEG1, otherwise
- * map using page tables.
- */
- if (IS_LOW512(phys_addr) && IS_LOW512(phys_addr + size - 1))
- return (void *) KSEG1ADDR(phys_addr);
-
- /*
- * Don't allow anybody to remap normal RAM that we're using..
- */
- if (phys_addr < virt_to_phys(high_memory)) {
- char *t_addr, *t_end;
- struct page *page;
-
- t_addr = __va(phys_addr);
- t_end = t_addr + (size - 1);
-
- for(page = virt_to_page(t_addr); page <= virt_to_page(t_end); page++)
- if(!PageReserved(page))
- return NULL;
- }
-
- pgprot = __pgprot(_PAGE_GLOBAL | _PAGE_PRESENT | _PAGE_READ
- | _PAGE_WRITE | flags);
-
- /*
- * Mappings have to be page-aligned
- */
- offset = phys_addr & ~PAGE_MASK;
- phys_addr &= PAGE_MASK;
- size = PAGE_ALIGN(last_addr + 1) - phys_addr;
-
- /*
- * Ok, go for it..
- */
- area = get_vm_area(size, VM_IOREMAP);
- if (!area)
- return NULL;
- area->phys_addr = phys_addr;
- addr = (void __iomem *) area->addr;
- if (ioremap_page_range((unsigned long)addr, (unsigned long)addr + size,
- phys_addr, pgprot)) {
- vunmap((void __force *) addr);
- return NULL;
- }
-
- return (void __iomem *) (offset + (char __iomem *)addr);
-}
-
-#define IS_KSEG1(addr) (((unsigned long)(addr) & ~0x1fffffffUL) == KSEG1)
-
-void iounmap(volatile void __iomem *addr)
-{
- if (!IS_KSEG1(addr))
- vfree((void *) (PAGE_MASK & (unsigned long) addr));
-}
-
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * linux/arch/m32r/mm/mmu.S
- *
- * Copyright (C) 2001 by Hiroyuki Kondo
- */
-
-#include <linux/linkage.h>
-#include <asm/assembler.h>
-#include <asm/smp.h>
-
- .text
-#ifdef CONFIG_MMU
-
-#include <asm/mmu_context.h>
-#include <asm/page.h>
-#include <asm/pgtable.h>
-#include <asm/m32r.h>
-
-/*
- * TLB Miss Exception handler
- */
- .balign 16
-ENTRY(tme_handler)
- .global tlb_entry_i_dat
- .global tlb_entry_d_dat
-
- SWITCH_TO_KERNEL_STACK
-
-#if defined(CONFIG_ISA_M32R2)
- st r0, @-sp
- st r1, @-sp
- st r2, @-sp
- st r3, @-sp
-
- seth r3, #high(MMU_REG_BASE)
- ld r1, @(MESTS_offset, r3) ; r1: status (MESTS reg.)
- ld r0, @(MDEVP_offset, r3) ; r0: PFN + ASID (MDEVP reg.)
- st r1, @(MESTS_offset, r3) ; clear status (MESTS reg.)
- and3 r1, r1, #(MESTS_IT)
- bnez r1, 1f ; instruction TLB miss?
-
-;; data TLB miss
-;; input
-;; r0: PFN + ASID (MDEVP reg.)
-;; r1 - r3: free
-;; output
-;; r0: PFN + ASID
-;; r1: TLB entry base address
-;; r2: &tlb_entry_{i|d}_dat
-;; r3: free
-
-#ifndef CONFIG_SMP
- seth r2, #high(tlb_entry_d_dat)
- or3 r2, r2, #low(tlb_entry_d_dat)
-#else /* CONFIG_SMP */
- ldi r1, #-8192
- seth r2, #high(tlb_entry_d_dat)
- or3 r2, r2, #low(tlb_entry_d_dat)
- and r1, sp
- ld r1, @(16, r1) ; current_thread_info->cpu
- slli r1, #2
- add r2, r1
-#endif /* !CONFIG_SMP */
- seth r1, #high(DTLB_BASE)
- or3 r1, r1, #low(DTLB_BASE)
- bra 2f
-
- .balign 16
- .fillinsn
-1:
-;; instrucntion TLB miss
-;; input
-;; r0: MDEVP reg. (included ASID)
-;; r1 - r3: free
-;; output
-;; r0: PFN + ASID
-;; r1: TLB entry base address
-;; r2: &tlb_entry_{i|d}_dat
-;; r3: free
- ldi r3, #-4096
- and3 r0, r0, #(MMU_CONTEXT_ASID_MASK)
- mvfc r1, bpc
- and r1, r3
- or r0, r1 ; r0: PFN + ASID
-#ifndef CONFIG_SMP
- seth r2, #high(tlb_entry_i_dat)
- or3 r2, r2, #low(tlb_entry_i_dat)
-#else /* CONFIG_SMP */
- ldi r1, #-8192
- seth r2, #high(tlb_entry_i_dat)
- or3 r2, r2, #low(tlb_entry_i_dat)
- and r1, sp
- ld r1, @(16, r1) ; current_thread_info->cpu
- slli r1, #2
- add r2, r1
-#endif /* !CONFIG_SMP */
- seth r1, #high(ITLB_BASE)
- or3 r1, r1, #low(ITLB_BASE)
-
- .fillinsn
-2:
-;; select TLB entry
-;; input
-;; r0: PFN + ASID
-;; r1: TLB entry base address
-;; r2: &tlb_entry_{i|d}_dat
-;; r3: free
-;; output
-;; r0: PFN + ASID
-;; r1: TLB entry address
-;; r2, r3: free
-#ifdef CONFIG_ISA_DUAL_ISSUE
- ld r3, @r2 || srli r1, #3
-#else
- ld r3, @r2
- srli r1, #3
-#endif
- add r1, r3
- ; tlb_entry_{d|i}_dat++;
- addi r3, #1
- and3 r3, r3, #(NR_TLB_ENTRIES - 1)
-#ifdef CONFIG_ISA_DUAL_ISSUE
- st r3, @r2 || slli r1, #3
-#else
- st r3, @r2
- slli r1, #3
-#endif
-
-;; load pte
-;; input
-;; r0: PFN + ASID
-;; r1: TLB entry address
-;; r2, r3: free
-;; output
-;; r0: PFN + ASID
-;; r1: TLB entry address
-;; r2: pte_data
-;; r3: free
- ; pgd = *(unsigned long *)MPTB;
- ld24 r2, #(-MPTB - 1)
- srl3 r3, r0, #22
-#ifdef CONFIG_ISA_DUAL_ISSUE
- not r2, r2 || slli r3, #2 ; r3: pgd offset
-#else
- not r2, r2
- slli r3, #2
-#endif
- ld r2, @r2 ; r2: pgd base addr (MPTB reg.)
- or r3, r2 ; r3: pmd addr
-
- ; pmd = pmd_offset(pgd, address);
- ld r3, @r3 ; r3: pmd data
- beqz r3, 3f ; pmd_none(*pmd) ?
-
- and3 r2, r3, #0xfff
- add3 r2, r2, #-355 ; _KERNPG_TABLE(=0x163)
- bnez r2, 3f ; pmd_bad(*pmd) ?
- ldi r2, #-4096
-
- ; pte = pte_offset(pmd, address);
- and r2, r3 ; r2: pte base addr
- srl3 r3, r0, #10
- and3 r3, r3, #0xffc ; r3: pte offset
- or r3, r2
- seth r2, #0x8000
- or r3, r2 ; r3: pte addr
-
- ; pte_data = (unsigned long)pte_val(*pte);
- ld r2, @r3 ; r2: pte data
- and3 r3, r2, #2 ; _PAGE_PRESENT(=2) check
- beqz r3, 3f
-
- .fillinsn
-5:
-;; set tlb
-;; input
-;; r0: PFN + ASID
-;; r1: TLB entry address
-;; r2: pte_data
-;; r3: free
- st r0, @r1 ; set_tlb_tag(entry++, address);
- st r2, @+r1 ; set_tlb_data(entry, pte_data);
-
- .fillinsn
-6:
- ld r3, @sp+
- ld r2, @sp+
- ld r1, @sp+
- ld r0, @sp+
- rte
-
- .fillinsn
-3:
-;; error
-;; input
-;; r0: PFN + ASID
-;; r1: TLB entry address
-;; r2, r3: free
-;; output
-;; r0: PFN + ASID
-;; r1: TLB entry address
-;; r2: pte_data
-;; r3: free
-#ifdef CONFIG_ISA_DUAL_ISSUE
- bra 5b || ldi r2, #2
-#else
- ldi r2, #2 ; r2: pte_data = 0 | _PAGE_PRESENT(=2)
- bra 5b
-#endif
-
-#elif defined (CONFIG_ISA_M32R)
-
- st sp, @-sp
- st r0, @-sp
- st r1, @-sp
- st r2, @-sp
- st r3, @-sp
- st r4, @-sp
-
- seth r3, #high(MMU_REG_BASE)
- ld r0, @(MDEVA_offset,r3) ; r0: address (MDEVA reg.)
- mvfc r2, bpc ; r2: bpc
- ld r1, @(MESTS_offset,r3) ; r1: status (MESTS reg.)
- st r1, @(MESTS_offset,r3) ; clear status (MESTS reg.)
- and3 r1, r1, #(MESTS_IT)
- beqz r1, 1f ; data TLB miss?
-
-;; instrucntion TLB miss
- mv r0, r2 ; address = bpc;
- ; entry = (unsigned long *)ITLB_BASE+tlb_entry_i*2;
- seth r3, #shigh(tlb_entry_i_dat)
- ld r4, @(low(tlb_entry_i_dat),r3)
- sll3 r2, r4, #3
- seth r1, #high(ITLB_BASE)
- or3 r1, r1, #low(ITLB_BASE)
- add r2, r1 ; r2: entry
- addi r4, #1 ; tlb_entry_i++;
- and3 r4, r4, #(NR_TLB_ENTRIES-1)
- st r4, @(low(tlb_entry_i_dat),r3)
- bra 2f
- .fillinsn
-1:
-;; data TLB miss
- ; entry = (unsigned long *)DTLB_BASE+tlb_entry_d*2;
- seth r3, #shigh(tlb_entry_d_dat)
- ld r4, @(low(tlb_entry_d_dat),r3)
- sll3 r2, r4, #3
- seth r1, #high(DTLB_BASE)
- or3 r1, r1, #low(DTLB_BASE)
- add r2, r1 ; r2: entry
- addi r4, #1 ; tlb_entry_d++;
- and3 r4, r4, #(NR_TLB_ENTRIES-1)
- st r4, @(low(tlb_entry_d_dat),r3)
- .fillinsn
-2:
-;; load pte
-; r0: address, r2: entry
-; r1,r3,r4: (free)
- ; pgd = *(unsigned long *)MPTB;
- ld24 r1, #(-MPTB-1)
- not r1, r1
- ld r1, @r1
- srl3 r4, r0, #22
- sll3 r3, r4, #2
- add r3, r1 ; r3: pgd
- ; pmd = pmd_offset(pgd, address);
- ld r1, @r3 ; r1: pmd
- beqz r1, 3f ; pmd_none(*pmd) ?
-;
- and3 r1, r1, #0x3ff
- ldi r4, #0x163 ; _KERNPG_TABLE(=0x163)
- bne r1, r4, 3f ; pmd_bad(*pmd) ?
-
- .fillinsn
-4:
- ; pte = pte_offset(pmd, address);
- ld r4, @r3 ; r4: pte
- ldi r3, #-4096
- and r4, r3
- srl3 r3, r0, #10
- and3 r3, r3, #0xffc
- add r4, r3
- seth r3, #0x8000
- add r4, r3 ; r4: pte
- ; pte_data = (unsigned long)pte_val(*pte);
- ld r1, @r4 ; r1: pte_data
- and3 r3, r1, #2 ; _PAGE_PRESENT(=2) check
- beqz r3, 3f
-
- .fillinsn
-;; set tlb
-; r0: address, r1: pte_data, r2: entry
-; r3,r4: (free)
-5:
- ldi r3, #-4096 ; set_tlb_tag(entry++, address);
- and r3, r0
- seth r4, #shigh(MASID)
- ld r4, @(low(MASID),r4) ; r4: MASID
- and3 r4, r4, #(MMU_CONTEXT_ASID_MASK)
- or r3, r4
- st r3, @r2
- st r1, @(4,r2) ; set_tlb_data(entry, pte_data);
-
- ld r4, @sp+
- ld r3, @sp+
- ld r2, @sp+
- ld r1, @sp+
- ld r0, @sp+
- ld sp, @sp+
- rte
-
- .fillinsn
-3:
- ldi r1, #2 ; r1: pte_data = 0 | _PAGE_PRESENT(=2)
- bra 5b
-
-#else
-#error unknown isa configuration
-#endif
-
-ENTRY(init_tlb)
-;; Set MMU Register
- seth r0, #high(MMU_REG_BASE) ; Set MMU_REG_BASE higher
- or3 r0, r0, #low(MMU_REG_BASE) ; Set MMU_REG_BASE lower
- ldi r1, #0
- st r1, @(MPSZ_offset,r0) ; Set MPSZ Reg(Page size 4KB:0 16KB:1 64KB:2)
- ldi r1, #0
- st r1, @(MASID_offset,r0) ; Set ASID Zero
-
-;; Set TLB
- seth r0, #high(ITLB_BASE) ; Set ITLB_BASE higher
- or3 r0, r0, #low(ITLB_BASE) ; Set ITLB_BASE lower
- seth r1, #high(DTLB_BASE) ; Set DTLB_BASE higher
- or3 r1, r1, #low(DTLB_BASE) ; Set DTLB_BASE lower
- ldi r2, #0
- ldi r3, #NR_TLB_ENTRIES
- addi r0, #-4
- addi r1, #-4
-clear_tlb:
- st r2, @+r0 ; VPA <- 0
- st r2, @+r0 ; PPA <- 0
- st r2, @+r1 ; VPA <- 0
- st r2, @+r1 ; PPA <- 0
- addi r3, #-1
- bnez r3, clear_tlb
-;;
- jmp r14
-
-ENTRY(m32r_itlb_entrys)
-ENTRY(m32r_otlb_entrys)
-
-#endif /* CONFIG_MMU */
-
- .end
+++ /dev/null
-/*
- * linux/arch/m32r/mm/page.S
- *
- * Clear/Copy page with CPU
- *
- * Copyright (C) 2004 The Free Software Initiative of Japan
- *
- * Written by Niibe Yutaka
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- */
- .text
- .global copy_page
- /*
- * copy_page (to, from)
- *
- * PAGE_SIZE = 4096-byte
- * Cache line = 16-byte
- * 16 * 256
- */
- .align 4
-copy_page:
- ldi r2, #255
- ld r3, @r0 /* cache line allocate */
- ld r4, @r1+
- ld r5, @r1+
- ld r6, @r1+
- ld r7, @r1+
- .fillinsn
-0:
- st r4, @r0
- st r5, @+r0
- st r6, @+r0
- st r7, @+r0
- ld r4, @r1+
- addi r0, #4
- ld r5, @r1+
- ld r6, @r1+
- ld r7, @r1+
- ld r3, @r0 /* cache line allocate */
- addi r2, #-1
- bnez r2, 0b
-
- st r4, @r0
- st r5, @+r0
- st r6, @+r0
- st r7, @+r0
- jmp r14
-
- .text
- .global clear_page
- /*
- * clear_page (to)
- *
- * PAGE_SIZE = 4096-byte
- * Cache line = 16-byte
- * 16 * 256
- */
- .align 4
-clear_page:
- ldi r2, #255
- ldi r4, #0
- ld r3, @r0 /* cache line allocate */
- .fillinsn
-0:
- st r4, @r0
- st r4, @+r0
- st r4, @+r0
- st r4, @+r0
- addi r0, #4
- ld r3, @r0 /* cache line allocate */
- addi r2, #-1
- bnez r2, 0b
-
- st r4, @r0
- st r4, @+r0
- st r4, @+r0
- st r4, @+r0
- jmp r14
+++ /dev/null
-# SPDX-License-Identifier: GPL-2.0
-obj-$(CONFIG_OPROFILE) += oprofile.o
-
-DRIVER_OBJS := $(addprefix ../../../drivers/oprofile/, \
- oprof.o cpu_buffer.o buffer_sync.o \
- event_buffer.o oprofile_files.o \
- oprofilefs.o oprofile_stats.o \
- timer_int.o )
-
-oprofile-y := $(DRIVER_OBJS) init.o
+++ /dev/null
-/**
- * @file init.c
- *
- * @remark Copyright 2002 OProfile authors
- * @remark Read the file COPYING
- *
- * @author John Levon <levon@movementarian.org>
- */
-
-#include <linux/kernel.h>
-#include <linux/oprofile.h>
-#include <linux/errno.h>
-#include <linux/init.h>
-
-int __init oprofile_arch_init(struct oprofile_operations *ops)
-{
- return -ENODEV;
-}
-
-void oprofile_arch_exit(void)
-{
-}
+++ /dev/null
-# SPDX-License-Identifier: GPL-2.0
-# arch/m32r/platforms/Makefile
-obj-$(CONFIG_PLAT_M32104UT) += m32104ut/
-obj-$(CONFIG_PLAT_M32700UT) += m32700ut/
-obj-$(CONFIG_PLAT_MAPPI) += mappi/
-obj-$(CONFIG_PLAT_MAPPI2) += mappi2/
-obj-$(CONFIG_PLAT_MAPPI3) += mappi3/
-obj-$(CONFIG_PLAT_OAKS32R) += oaks32r/
-obj-$(CONFIG_PLAT_OPSPUT) += opsput/
-obj-$(CONFIG_PLAT_USRV) += usrv/
+++ /dev/null
-obj-y := setup.o io.o
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0
-/*
- * linux/arch/m32r/platforms/m32104ut/io.c
- *
- * Typical I/O routines for M32104UT board.
- *
- * Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
- * Hitoshi Yamamoto, Mamoru Sakugawa,
- * Naoto Sugai, Hayato Fujiwara
- */
-
-#include <asm/m32r.h>
-#include <asm/page.h>
-#include <asm/io.h>
-#include <asm/byteorder.h>
-
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
-#include <linux/types.h>
-
-#define M32R_PCC_IOMAP_SIZE 0x1000
-
-#define M32R_PCC_IOSTART0 0x1000
-#define M32R_PCC_IOEND0 (M32R_PCC_IOSTART0 + M32R_PCC_IOMAP_SIZE - 1)
-
-extern void pcc_ioread_byte(int, unsigned long, void *, size_t, size_t, int);
-extern void pcc_ioread_word(int, unsigned long, void *, size_t, size_t, int);
-extern void pcc_iowrite_byte(int, unsigned long, void *, size_t, size_t, int);
-extern void pcc_iowrite_word(int, unsigned long, void *, size_t, size_t, int);
-#endif /* CONFIG_PCMCIA && CONFIG_M32R_CFC */
-
-#define PORT2ADDR(port) _port2addr(port)
-
-static inline void *_port2addr(unsigned long port)
-{
- return (void *)(port | NONCACHE_OFFSET);
-}
-
-#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
-static inline void *__port2addr_ata(unsigned long port)
-{
- static int dummy_reg;
-
- switch (port) {
- case 0x1f0: return (void *)(0x0c002000 | NONCACHE_OFFSET);
- case 0x1f1: return (void *)(0x0c012800 | NONCACHE_OFFSET);
- case 0x1f2: return (void *)(0x0c012002 | NONCACHE_OFFSET);
- case 0x1f3: return (void *)(0x0c012802 | NONCACHE_OFFSET);
- case 0x1f4: return (void *)(0x0c012004 | NONCACHE_OFFSET);
- case 0x1f5: return (void *)(0x0c012804 | NONCACHE_OFFSET);
- case 0x1f6: return (void *)(0x0c012006 | NONCACHE_OFFSET);
- case 0x1f7: return (void *)(0x0c012806 | NONCACHE_OFFSET);
- case 0x3f6: return (void *)(0x0c01200e | NONCACHE_OFFSET);
- default: return (void *)&dummy_reg;
- }
-}
-#endif
-
-/*
- * M32104T-LAN is located in the extended bus space
- * from 0x01000000 to 0x01ffffff on physical address.
- * The base address of LAN controller(LAN91C111) is 0x300.
- */
-#define LAN_IOSTART (0x300 | NONCACHE_OFFSET)
-#define LAN_IOEND (0x320 | NONCACHE_OFFSET)
-static inline void *_port2addr_ne(unsigned long port)
-{
- return (void *)(port + NONCACHE_OFFSET + 0x01000000);
-}
-
-static inline void delay(void)
-{
- __asm__ __volatile__ ("push r0; \n\t pop r0;" : : :"memory");
-}
-
-/*
- * NIC I/O function
- */
-
-#define PORT2ADDR_NE(port) _port2addr_ne(port)
-
-static inline unsigned char _ne_inb(void *portp)
-{
- return *(volatile unsigned char *)portp;
-}
-
-static inline unsigned short _ne_inw(void *portp)
-{
- return (unsigned short)le16_to_cpu(*(volatile unsigned short *)portp);
-}
-
-static inline void _ne_insb(void *portp, void *addr, unsigned long count)
-{
- unsigned char *buf = (unsigned char *)addr;
-
- while (count--)
- *buf++ = _ne_inb(portp);
-}
-
-static inline void _ne_outb(unsigned char b, void *portp)
-{
- *(volatile unsigned char *)portp = b;
-}
-
-static inline void _ne_outw(unsigned short w, void *portp)
-{
- *(volatile unsigned short *)portp = cpu_to_le16(w);
-}
-
-unsigned char _inb(unsigned long port)
-{
- if (port >= LAN_IOSTART && port < LAN_IOEND)
- return _ne_inb(PORT2ADDR_NE(port));
-
- return *(volatile unsigned char *)PORT2ADDR(port);
-}
-
-unsigned short _inw(unsigned long port)
-{
- if (port >= LAN_IOSTART && port < LAN_IOEND)
- return _ne_inw(PORT2ADDR_NE(port));
-
- return *(volatile unsigned short *)PORT2ADDR(port);
-}
-
-unsigned long _inl(unsigned long port)
-{
- return *(volatile unsigned long *)PORT2ADDR(port);
-}
-
-unsigned char _inb_p(unsigned long port)
-{
- unsigned char v = _inb(port);
- delay();
- return (v);
-}
-
-unsigned short _inw_p(unsigned long port)
-{
- unsigned short v = _inw(port);
- delay();
- return (v);
-}
-
-unsigned long _inl_p(unsigned long port)
-{
- unsigned long v = _inl(port);
- delay();
- return (v);
-}
-
-void _outb(unsigned char b, unsigned long port)
-{
- if (port >= LAN_IOSTART && port < LAN_IOEND)
- _ne_outb(b, PORT2ADDR_NE(port));
- else
- *(volatile unsigned char *)PORT2ADDR(port) = b;
-}
-
-void _outw(unsigned short w, unsigned long port)
-{
- if (port >= LAN_IOSTART && port < LAN_IOEND)
- _ne_outw(w, PORT2ADDR_NE(port));
- else
- *(volatile unsigned short *)PORT2ADDR(port) = w;
-}
-
-void _outl(unsigned long l, unsigned long port)
-{
- *(volatile unsigned long *)PORT2ADDR(port) = l;
-}
-
-void _outb_p(unsigned char b, unsigned long port)
-{
- _outb(b, port);
- delay();
-}
-
-void _outw_p(unsigned short w, unsigned long port)
-{
- _outw(w, port);
- delay();
-}
-
-void _outl_p(unsigned long l, unsigned long port)
-{
- _outl(l, port);
- delay();
-}
-
-void _insb(unsigned int port, void *addr, unsigned long count)
-{
- if (port >= LAN_IOSTART && port < LAN_IOEND)
- _ne_insb(PORT2ADDR_NE(port), addr, count);
- else {
- unsigned char *buf = addr;
- unsigned char *portp = PORT2ADDR(port);
- while (count--)
- *buf++ = *(volatile unsigned char *)portp;
- }
-}
-
-void _insw(unsigned int port, void *addr, unsigned long count)
-{
- unsigned short *buf = addr;
- unsigned short *portp;
-
- if (port >= LAN_IOSTART && port < LAN_IOEND) {
- /*
- * This portion is only used by smc91111.c to read data
- * from the DATA_REG. Do not swap the data.
- */
- portp = PORT2ADDR_NE(port);
- while (count--)
- *buf++ = *(volatile unsigned short *)portp;
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
- } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- pcc_ioread_word(9, port, (void *)addr, sizeof(unsigned short),
- count, 1);
-#endif
-#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
- } else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
- portp = __port2addr_ata(port);
- while (count--)
- *buf++ = *(volatile unsigned short *)portp;
-#endif
- } else {
- portp = PORT2ADDR(port);
- while (count--)
- *buf++ = *(volatile unsigned short *)portp;
- }
-}
-
-void _insl(unsigned int port, void *addr, unsigned long count)
-{
- unsigned long *buf = addr;
- unsigned long *portp;
-
- portp = PORT2ADDR(port);
- while (count--)
- *buf++ = *(volatile unsigned long *)portp;
-}
-
-void _outsb(unsigned int port, const void *addr, unsigned long count)
-{
- const unsigned char *buf = addr;
- unsigned char *portp;
-
- if (port >= LAN_IOSTART && port < LAN_IOEND) {
- portp = PORT2ADDR_NE(port);
- while (count--)
- _ne_outb(*buf++, portp);
- } else {
- portp = PORT2ADDR(port);
- while (count--)
- *(volatile unsigned char *)portp = *buf++;
- }
-}
-
-void _outsw(unsigned int port, const void *addr, unsigned long count)
-{
- const unsigned short *buf = addr;
- unsigned short *portp;
-
- if (port >= LAN_IOSTART && port < LAN_IOEND) {
- /*
- * This portion is only used by smc91111.c to write data
- * into the DATA_REG. Do not swap the data.
- */
- portp = PORT2ADDR_NE(port);
- while (count--)
- *(volatile unsigned short *)portp = *buf++;
-#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
- } else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
- portp = __port2addr_ata(port);
- while (count--)
- *(volatile unsigned short *)portp = *buf++;
-#endif
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
- } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- pcc_iowrite_word(9, port, (void *)addr, sizeof(unsigned short),
- count, 1);
-#endif
- } else {
- portp = PORT2ADDR(port);
- while (count--)
- *(volatile unsigned short *)portp = *buf++;
- }
-}
-
-void _outsl(unsigned int port, const void *addr, unsigned long count)
-{
- const unsigned long *buf = addr;
- unsigned char *portp;
-
- portp = PORT2ADDR(port);
- while (count--)
- *(volatile unsigned long *)portp = *buf++;
-}
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0
-/*
- * linux/arch/m32r/platforms/m32104ut/setup.c
- *
- * Setup routines for M32104UT Board
- *
- * Copyright (c) 2002-2005 Hiroyuki Kondo, Hirokazu Takata,
- * Hitoshi Yamamoto, Mamoru Sakugawa,
- * Naoto Sugai, Hayato Fujiwara
- */
-
-#include <linux/irq.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/device.h>
-
-#include <asm/m32r.h>
-#include <asm/io.h>
-
-#define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
-
-icu_data_t icu_data[NR_IRQS];
-
-static void disable_m32104ut_irq(unsigned int irq)
-{
- unsigned long port, data;
-
- port = irq2port(irq);
- data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7;
- outl(data, port);
-}
-
-static void enable_m32104ut_irq(unsigned int irq)
-{
- unsigned long port, data;
-
- port = irq2port(irq);
- data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6;
- outl(data, port);
-}
-
-static void mask_m32104ut_irq(struct irq_data *data)
-{
- disable_m32104ut_irq(data->irq);
-}
-
-static void unmask_m32104ut_irq(struct irq_data *data)
-{
- enable_m32104ut_irq(data->irq);
-}
-
-static void shutdown_m32104ut_irq(struct irq_data *data)
-{
- unsigned int irq = data->irq;
- unsigned long port = irq2port(irq);
-
- outl(M32R_ICUCR_ILEVEL7, port);
-}
-
-static struct irq_chip m32104ut_irq_type =
-{
- .name = "M32104UT-IRQ",
- .irq_shutdown = shutdown_m32104ut_irq,
- .irq_unmask = unmask_m32104ut_irq,
- .irq_mask = mask_m32104ut_irq,
-};
-
-void __init init_IRQ(void)
-{
- static int once = 0;
-
- if (once)
- return;
- else
- once++;
-
-#if defined(CONFIG_SMC91X)
- /* INT#0: LAN controller on M32104UT-LAN (SMC91C111)*/
- irq_set_chip_and_handler(M32R_IRQ_INT0, &m32104ut_irq_type,
- handle_level_irq);
- /* "H" level sense */
- cu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD11;
- disable_m32104ut_irq(M32R_IRQ_INT0);
-#endif /* CONFIG_SMC91X */
-
- /* MFT2 : system timer */
- irq_set_chip_and_handler(M32R_IRQ_MFT2, &m32104ut_irq_type,
- handle_level_irq);
- icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
- disable_m32104ut_irq(M32R_IRQ_MFT2);
-
-#ifdef CONFIG_SERIAL_M32R_SIO
- /* SIO0_R : uart receive data */
- irq_set_chip_and_handler(M32R_IRQ_SIO0_R, &m32104ut_irq_type,
- handle_level_irq);
- icu_data[M32R_IRQ_SIO0_R].icucr = M32R_ICUCR_IEN;
- disable_m32104ut_irq(M32R_IRQ_SIO0_R);
-
- /* SIO0_S : uart send data */
- irq_set_chip_and_handler(M32R_IRQ_SIO0_S, &m32104ut_irq_type,
- handle_level_irq);
- icu_data[M32R_IRQ_SIO0_S].icucr = M32R_ICUCR_IEN;
- disable_m32104ut_irq(M32R_IRQ_SIO0_S);
-#endif /* CONFIG_SERIAL_M32R_SIO */
-}
-
-#if defined(CONFIG_SMC91X)
-
-#define LAN_IOSTART 0x300
-#define LAN_IOEND 0x320
-static struct resource smc91x_resources[] = {
- [0] = {
- .start = (LAN_IOSTART),
- .end = (LAN_IOEND),
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = M32R_IRQ_INT0,
- .end = M32R_IRQ_INT0,
- .flags = IORESOURCE_IRQ,
- }
-};
-
-static struct platform_device smc91x_device = {
- .name = "smc91x",
- .id = 0,
- .num_resources = ARRAY_SIZE(smc91x_resources),
- .resource = smc91x_resources,
-};
-#endif
-
-static int __init platform_init(void)
-{
-#if defined(CONFIG_SMC91X)
- platform_device_register(&smc91x_device);
-#endif
- return 0;
-}
-arch_initcall(platform_init);
+++ /dev/null
-obj-y := setup.o io.o
+++ /dev/null
-# .gdbinit file
-# $Id: dot.gdbinit_200MHz_16MB,v 1.2 2004/10/20 03:02:27 fujiwara Exp $
-#-----
-# NOTE: this file is generated by a script, "gen_gdbinit.pl".
-# (Please type "gen_gdbinit.pl --help" and check the help message).
-# $ Id: gen_gdbinit.pl,v 1.12 2004/07/26 09:56:10 takata Exp $
-#-----
-# target platform: m32700ut
-
-# setting
-set width 0d70
-set radix 0d16
-
-debug_chaos
-
-# clk xin:cpu:bif:bus=25:200:50:50
-define clock_init
- set *(unsigned long *)0x00ef4008 = 0x00000000
- set *(unsigned long *)0x00ef4004 = 0
- shell sleep 0.1
- # NOTE: Please change the master clock source from PLL-clock to Xin-clock
- # and switch off PLL, before resetting the clock gear ratio.
-
- set *(unsigned long *)0x00ef4024 = 2
- set *(unsigned long *)0x00ef4020 = 2
- set *(unsigned long *)0x00ef4010 = 0
- set *(unsigned long *)0x00ef4014 = 0
- set *(unsigned long *)0x00ef4004 = 3
- shell sleep 0.1
- set *(unsigned long *)0x00ef4008 = 0x00000200
-end
-
-# Initialize SDRAM controller
-define sdram_init
- # SDIR0
- set *(unsigned long *)0x00ef6008 = 0x00000182
- # SDIR1
- set *(unsigned long *)0x00ef600c = 0x00000001
- # Initialize wait
- shell sleep 0.1
- # Ch0-MOD
- set *(unsigned long *)0x00ef602c = 0x00000020
- # Ch0-TR
- set *(unsigned long *)0x00ef6028 = 0x00041302
- # Ch0-ADR (size:16MB)
- set *(unsigned long *)0x00ef6020 = 0x08000002
- # AutoRef On
- set *(unsigned long *)0x00ef6004 = 0x00010517
- # Access enable
- set *(unsigned long *)0x00ef6024 = 0x00000001
-end
-document sdram_init
- SDRAM controller initialization
- 0x08000000 - 0x08ffffff (16MB)
-end
-
-# Initialize BSEL3 for UT-CFC
-define cfc_init
- set $sfrbase = 0xa0ef0000
-# too fast
-# set *(unsigned long *)($sfrbase + 0x5300) = 0x0b0b8000
-# set *(unsigned long *)($sfrbase + 0x5304) = 0x00102204
-# set *(unsigned long *)($sfrbase + 0x5300) = 0x1f1f8000
-# set *(unsigned long *)($sfrbase + 0x5300) = 0x1f1f1fdf
-# set *(unsigned long *)($sfrbase + 0x5304) = 0x0013220f
-# set *(unsigned long *)($sfrbase + 0x5304) = 0x0013330f
-end
-document cfc_init
- CF controller initialization
-end
-
-# MMU enable
-define mmu_enable
- set $evb=0x88000000
- set *(unsigned long *)0xffff0024=1
-end
-
-# MMU disable
-define mmu_disable
- set $evb=0
- set *(unsigned long *)0xffff0024=0
-end
-
-# Show TLB entries
-define show_tlb_entries
- set $i = 0
- set $addr = $arg0
- set $nr_entries = $arg1
- use_mon_code
- while ($i < $nr_entries)
- set $tlb_tag = *(unsigned long*)$addr
- set $tlb_data = *(unsigned long*)($addr + 4)
- printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx\n", $i, $addr, $tlb_tag, $tlb_data
- set $i = $i + 1
- set $addr = $addr + 8
- end
- use_debug_dma
-end
-define itlb
- set $itlb=0xfe000000
- show_tlb_entries $itlb 0d32
-end
-define dtlb
- set $dtlb=0xfe000800
- show_tlb_entries $dtlb 0d32
-end
-
-# Initialize TLB entries
-define init_tlb_entries
- set $i = 0
- set $addr = $arg0
- set $nr_entries = $arg1
- use_mon_code
- while ($i < $nr_entries)
- set *(unsigned long *)($addr + 0x4) = 0
- set $i = $i + 1
- set $addr = $addr + 8
- end
- use_debug_dma
-end
-define tlb_init
- set $itlb=0xfe000000
- init_tlb_entries $itlb 0d32
- set $dtlb=0xfe000800
- init_tlb_entries $dtlb 0d32
-end
-
-# Show current task structure
-define show_current
- set $current = $spi & 0xffffe000
- printf "$current=0x%08lX\n",$current
- print *(struct task_struct *)$current
-end
-
-# Show user assigned task structure
-define show_task
- set = $arg0 & 0xffffe000
- printf "$task=0x%08lX\n",$task
- print *(struct task_struct *)$task
-end
-document show_task
- Show user assigned task structure
- arg0 : task structure address
-end
-
-# Show M32R registers
-define show_regs
- printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
- printf " R4[0x%08lX] R5[0x%08lX] R6[0x%08lX] R7[0x%08lX]\n",$r4,$r5,$r6,$r7
- printf " R8[0x%08lX] R9[0x%08lX] R10[0x%08lX] R11[0x%08lX]\n",$r8,$r9,$r10,$r11
- printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$sp
- printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
- printf "BPC[0x%08lX] PC[0x%08lX] ACCL[0x%08lX] ACCH[0x%08lX]\n",$bpc,$pc,$accl,$acch
- printf "EVB[0x%08lX]\n",$evb
-end
-
-# Setup all
-define setup
- use_mon_code
- set *(unsigned int)0xfffffffc=0x60
- shell sleep 0.1
- clock_init
- shell sleep 0.1
- # SDRAM: 16MB
- set *(unsigned long *)0x00ef6020 = 0x08000002
- cfc_init
- # USB
- set *(unsigned short *)0xb0301000 = 0x100
-
- set $evb=0x08000000
-end
-
-# Load modules
-define load_modules
- use_debug_dma
- load
-end
-
-# Set kernel parameters
-define set_kernel_parameters
- set $param = (void*)0x08001000
- # INITRD_START
-# set *(unsigned long *)($param + 0x0010) = 0x08300000
- # INITRD_SIZE
-# set *(unsigned long *)($param + 0x0014) = 0x00000000
- # M32R_CPUCLK
- set *(unsigned long *)($param + 0x0018) = 0d200000000
- # M32R_BUSCLK
- set *(unsigned long *)($param + 0x001c) = 0d50000000
-
- # M32R_TIMER_DIVIDE
- set *(unsigned long *)($param + 0x0020) = 0d128
-
- set {char[0x200]}($param + 0x100) = "console=ttyS0,115200n8x console=tty1 root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/rootfs,rsize=1024,wsize=1024 nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 mem=16M \0"
-end
-
-# Boot
-define boot
- set_kernel_parameters
- set $fp = 0
- set $pc = 0x08002000
-# set *(unsigned char *)0xffffffff = 0x03
- si
- c
-end
-
-# Set breakpoints
-define set_breakpoints
- b *0x08000030
-end
-
-# Restart
-define restart
- sdireset
- sdireset
- set $pc = 0
- b *0x04001000
- b *0x08001000
- b *0x08002000
- si
- c
- tlb_init
- del
- setup
- load_modules
- boot
-end
-
-define si
- stepi
- x/i $pc
- show_reg
-end
-
-sdireset
-sdireset
-file vmlinux
-target m32rsdi
-set $pc = 0
-b *0x04001000
-b *0x08001000
-b *0x08002000
-c
-tlb_init
-del
-setup
-load_modules
-boot
-
+++ /dev/null
-# .gdbinit file
-# $Id: dot.gdbinit_300MHz_32MB,v 1.2 2004/10/20 03:02:27 fujiwara Exp $
-#-----
-# NOTE: this file is generated by a script, "gen_gdbinit.pl".
-# (Please type "gen_gdbinit.pl --help" and check the help message).
-# $ Id: gen_gdbinit.pl,v 1.12 2004/07/26 09:56:10 takata Exp $
-#-----
-# target platform: m32700ut
-
-# setting
-set width 0d70
-set radix 0d16
-
-debug_chaos
-
-# clk xin:cpu:bif:bus=25:300:75:75
-define clock_init
- set *(unsigned long *)0x00ef4008 = 0x00000000
- set *(unsigned long *)0x00ef4004 = 0
- shell sleep 0.1
- # NOTE: Please change the master clock source from PLL-clock to Xin-clock
- # and switch off PLL, before resetting the clock gear ratio.
-
- set *(unsigned long *)0x00ef4024 = 2
- set *(unsigned long *)0x00ef4020 = 2
- set *(unsigned long *)0x00ef4010 = 0
- set *(unsigned long *)0x00ef4014 = 0
- set *(unsigned long *)0x00ef4004 = 5
- shell sleep 0.1
- set *(unsigned long *)0x00ef4008 = 0x00000200
-end
-
-# Initialize SDRAM controller
-define sdram_init
- # SDIR0
- set *(unsigned long *)0x00ef6008 = 0x00000182
- # SDIR1
- set *(unsigned long *)0x00ef600c = 0x00000001
- # Initialize wait
- shell sleep 0.1
- # Ch0-MOD
- set *(unsigned long *)0x00ef602c = 0x00000020
- # Ch0-TR
- set *(unsigned long *)0x00ef6028 = 0x00051502
- # Ch0-ADR (size:32MB)
- set *(unsigned long *)0x00ef6020 = 0x08000003
- # AutoRef On
- set *(unsigned long *)0x00ef6004 = 0x00010e24
- # Access enable
- set *(unsigned long *)0x00ef6024 = 0x00000001
-end
-document sdram_init
- SDRAM controller initialization
- 0x08000000 - 0x09ffffff (32MB)
-end
-
-# Initialize BSEL3 for UT-CFC
-define cfc_init
- set $sfrbase = 0xa0ef0000
-# too fast
-# set *(unsigned long *)($sfrbase + 0x5300) = 0x0b0b8000
-# set *(unsigned long *)($sfrbase + 0x5304) = 0x00102204
-# set *(unsigned long *)($sfrbase + 0x5300) = 0x1f1f8000
-# set *(unsigned long *)($sfrbase + 0x5300) = 0x1f1f1fdf
-# set *(unsigned long *)($sfrbase + 0x5304) = 0x0013220f
-# set *(unsigned long *)($sfrbase + 0x5304) = 0x0013330f
-end
-document cfc_init
- CF controller initialization
-end
-
-# MMU enable
-define mmu_enable
- set $evb=0x88000000
- set *(unsigned long *)0xffff0024=1
-end
-
-# MMU disable
-define mmu_disable
- set $evb=0
- set *(unsigned long *)0xffff0024=0
-end
-
-# Show TLB entries
-define show_tlb_entries
- set $i = 0
- set $addr = $arg0
- set $nr_entries = $arg1
- use_mon_code
- while ($i < $nr_entries)
- set $tlb_tag = *(unsigned long*)$addr
- set $tlb_data = *(unsigned long*)($addr + 4)
- printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx\n", $i, $addr, $tlb_tag, $tlb_data
- set $i = $i + 1
- set $addr = $addr + 8
- end
- use_debug_dma
-end
-define itlb
- set $itlb=0xfe000000
- show_tlb_entries $itlb 0d32
-end
-define dtlb
- set $dtlb=0xfe000800
- show_tlb_entries $dtlb 0d32
-end
-
-# Initialize TLB entries
-define init_tlb_entries
- set $i = 0
- set $addr = $arg0
- set $nr_entries = $arg1
- use_mon_code
- while ($i < $nr_entries)
- set *(unsigned long *)($addr + 0x4) = 0
- set $i = $i + 1
- set $addr = $addr + 8
- end
- use_debug_dma
-end
-define tlb_init
- set $itlb=0xfe000000
- init_tlb_entries $itlb 0d32
- set $dtlb=0xfe000800
- init_tlb_entries $dtlb 0d32
-end
-
-# Show current task structure
-define show_current
- set $current = $spi & 0xffffe000
- printf "$current=0x%08lX\n",$current
- print *(struct task_struct *)$current
-end
-
-# Show user assigned task structure
-define show_task
- set = $arg0 & 0xffffe000
- printf "$task=0x%08lX\n",$task
- print *(struct task_struct *)$task
-end
-document show_task
- Show user assigned task structure
- arg0 : task structure address
-end
-
-# Show M32R registers
-define show_regs
- printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
- printf " R4[0x%08lX] R5[0x%08lX] R6[0x%08lX] R7[0x%08lX]\n",$r4,$r5,$r6,$r7
- printf " R8[0x%08lX] R9[0x%08lX] R10[0x%08lX] R11[0x%08lX]\n",$r8,$r9,$r10,$r11
- printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$sp
- printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
- printf "BPC[0x%08lX] PC[0x%08lX] ACCL[0x%08lX] ACCH[0x%08lX]\n",$bpc,$pc,$accl,$acch
- printf "EVB[0x%08lX]\n",$evb
-end
-
-# Setup all
-define setup
- use_mon_code
- set *(unsigned int)0xfffffffc=0x60
- shell sleep 0.1
- clock_init
- shell sleep 0.1
- # SDRAM: 32MB
- set *(unsigned long *)0x00ef6020 = 0x08000003
- cfc_init
- # USB
- set *(unsigned short *)0xb0301000 = 0x100
-
- set $evb=0x08000000
-end
-
-# Load modules
-define load_modules
- use_debug_dma
- load
-end
-
-# Set kernel parameters
-define set_kernel_parameters
- set $param = (void*)0x08001000
- # INITRD_START
-# set *(unsigned long *)($param + 0x0010) = 0x08300000
- # INITRD_SIZE
-# set *(unsigned long *)($param + 0x0014) = 0x00000000
- # M32R_CPUCLK
- set *(unsigned long *)($param + 0x0018) = 0d300000000
- # M32R_BUSCLK
- set *(unsigned long *)($param + 0x001c) = 0d75000000
-
- # M32R_TIMER_DIVIDE
- set *(unsigned long *)($param + 0x0020) = 0d128
-
- set {char[0x200]}($param + 0x100) = "console=ttyS0,115200n8x console=tty1 root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/rootfs,rsize=1024,wsize=1024 nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 mem=32M \0"
-end
-
-# Boot
-define boot
- set_kernel_parameters
- set $fp = 0
- set $pc = 0x08002000
-# set *(unsigned char *)0xffffffff = 0x03
- si
- c
-end
-
-# Set breakpoints
-define set_breakpoints
- b *0x08000030
-end
-
-# Restart
-define restart
- sdireset
- sdireset
- set $pc = 0
- b *0x04001000
- b *0x08001000
- b *0x08002000
- si
- c
- tlb_init
- del
- setup
- load_modules
- boot
-end
-
-define si
- stepi
- x/i $pc
- show_reg
-end
-
-sdireset
-sdireset
-file vmlinux
-target m32rsdi
-set $pc = 0
-b *0x04001000
-b *0x08001000
-b *0x08002000
-c
-tlb_init
-del
-setup
-load_modules
-boot
-
+++ /dev/null
-# .gdbinit file
-# $Id: dot.gdbinit_400MHz_32MB,v 1.1 2004/10/21 01:41:27 fujiwara Exp $
-#-----
-# NOTE: this file is generated by a script, "gen_gdbinit.pl".
-# (Please type "gen_gdbinit.pl --help" and check the help message).
-# $ Id: gen_gdbinit.pl,v 1.12 2004/07/26 09:56:10 takata Exp $
-#-----
-# target platform: m32700ut
-
-# setting
-set width 0d70
-set radix 0d16
-
-debug_chaos
-
-# clk xin:cpu:bif:bus=25:400:100:50
-define clock_init
- set *(unsigned long *)0x00ef4008 = 0x00000000
- set *(unsigned long *)0x00ef4004 = 0
- shell sleep 0.1
- # NOTE: Please change the master clock source from PLL-clock to Xin-clock
- # and switch off PLL, before resetting the clock gear ratio.
-
- set *(unsigned long *)0x00ef4024 = 3
- set *(unsigned long *)0x00ef4020 = 2
- set *(unsigned long *)0x00ef4010 = 0
- set *(unsigned long *)0x00ef4014 = 0
- set *(unsigned long *)0x00ef4004 = 7
- shell sleep 0.1
- set *(unsigned long *)0x00ef4008 = 0x00000200
-end
-
-# Initialize SDRAM controller
-define sdram_init
- # SDIR0
- set *(unsigned long *)0x00ef6008 = 0x00000182
- # SDIR1
- set *(unsigned long *)0x00ef600c = 0x00000001
- # Initialize wait
- shell sleep 0.1
- # Ch0-MOD
- set *(unsigned long *)0x00ef602c = 0x00000020
- # Ch0-TR
- set *(unsigned long *)0x00ef6028 = 0x00041302
- # Ch0-ADR (size:32MB)
- set *(unsigned long *)0x00ef6020 = 0x08000003
- # AutoRef On
- set *(unsigned long *)0x00ef6004 = 0x00010517
- # Access enable
- set *(unsigned long *)0x00ef6024 = 0x00000001
-end
-document sdram_init
- SDRAM controller initialization
- 0x08000000 - 0x09ffffff (32MB)
-end
-
-# Initialize BSEL3 for UT-CFC
-define cfc_init
- set $sfrbase = 0xa0ef0000
-# too fast
-# set *(unsigned long *)($sfrbase + 0x5300) = 0x0b0b8000
-# set *(unsigned long *)($sfrbase + 0x5304) = 0x00102204
-# set *(unsigned long *)($sfrbase + 0x5300) = 0x1f1f8000
-# set *(unsigned long *)($sfrbase + 0x5300) = 0x1f1f1fdf
-# set *(unsigned long *)($sfrbase + 0x5304) = 0x0013220f
-# set *(unsigned long *)($sfrbase + 0x5304) = 0x0013330f
-end
-document cfc_init
- CF controller initialization
-end
-
-# MMU enable
-define mmu_enable
- set $evb=0x88000000
- set *(unsigned long *)0xffff0024=1
-end
-
-# MMU disable
-define mmu_disable
- set $evb=0
- set *(unsigned long *)0xffff0024=0
-end
-
-# Show TLB entries
-define show_tlb_entries
- set $i = 0
- set $addr = $arg0
- set $nr_entries = $arg1
- use_mon_code
- while ($i < $nr_entries)
- set $tlb_tag = *(unsigned long*)$addr
- set $tlb_data = *(unsigned long*)($addr + 4)
- printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx\n", $i, $addr, $tlb_tag, $tlb_data
- set $i = $i + 1
- set $addr = $addr + 8
- end
- use_debug_dma
-end
-define itlb
- set $itlb=0xfe000000
- show_tlb_entries $itlb 0d32
-end
-define dtlb
- set $dtlb=0xfe000800
- show_tlb_entries $dtlb 0d32
-end
-
-# Initialize TLB entries
-define init_tlb_entries
- set $i = 0
- set $addr = $arg0
- set $nr_entries = $arg1
- use_mon_code
- while ($i < $nr_entries)
- set *(unsigned long *)($addr + 0x4) = 0
- set $i = $i + 1
- set $addr = $addr + 8
- end
- use_debug_dma
-end
-define tlb_init
- set $itlb=0xfe000000
- init_tlb_entries $itlb 0d32
- set $dtlb=0xfe000800
- init_tlb_entries $dtlb 0d32
-end
-
-# Show current task structure
-define show_current
- set $current = $spi & 0xffffe000
- printf "$current=0x%08lX\n",$current
- print *(struct task_struct *)$current
-end
-
-# Show user assigned task structure
-define show_task
- set = $arg0 & 0xffffe000
- printf "$task=0x%08lX\n",$task
- print *(struct task_struct *)$task
-end
-document show_task
- Show user assigned task structure
- arg0 : task structure address
-end
-
-# Show M32R registers
-define show_regs
- printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
- printf " R4[0x%08lX] R5[0x%08lX] R6[0x%08lX] R7[0x%08lX]\n",$r4,$r5,$r6,$r7
- printf " R8[0x%08lX] R9[0x%08lX] R10[0x%08lX] R11[0x%08lX]\n",$r8,$r9,$r10,$r11
- printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$sp
- printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
- printf "BPC[0x%08lX] PC[0x%08lX] ACCL[0x%08lX] ACCH[0x%08lX]\n",$bpc,$pc,$accl,$acch
- printf "EVB[0x%08lX]\n",$evb
-end
-
-# Setup all
-define setup
- use_mon_code
- set *(unsigned int)0xfffffffc=0x60
- shell sleep 0.1
- clock_init
- shell sleep 0.1
- # SDRAM: 32MB
- set *(unsigned long *)0x00ef6020 = 0x08000003
- cfc_init
- # USB
- set *(unsigned short *)0xb0301000 = 0x100
-
- set $evb=0x08000000
-end
-
-# Load modules
-define load_modules
- use_debug_dma
- load
-end
-
-# Set kernel parameters
-define set_kernel_parameters
- set $param = (void*)0x08001000
- # INITRD_START
-# set *(unsigned long *)($param + 0x0010) = 0x08300000
- # INITRD_SIZE
-# set *(unsigned long *)($param + 0x0014) = 0x00000000
- # M32R_CPUCLK
- set *(unsigned long *)($param + 0x0018) = 0d400000000
- # M32R_BUSCLK
- set *(unsigned long *)($param + 0x001c) = 0d50000000
-
- # M32R_TIMER_DIVIDE
- set *(unsigned long *)($param + 0x0020) = 0d128
-
- set {char[0x200]}($param + 0x100) = "console=ttyS0,115200n8x console=tty1 root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/rootfs,rsize=1024,wsize=1024 nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 mem=32M \0"
-end
-
-# Boot
-define boot
- set_kernel_parameters
- set $fp = 0
- set $pc = 0x08002000
-# set *(unsigned char *)0xffffffff = 0x03
- si
- c
-end
-
-# Set breakpoints
-define set_breakpoints
- b *0x08000030
-end
-
-# Restart
-define restart
- sdireset
- sdireset
- set $pc = 0
- b *0x04001000
- b *0x08001000
- b *0x08002000
- si
- c
- tlb_init
- del
- setup
- load_modules
- boot
-end
-
-define si
- stepi
- x/i $pc
- show_reg
-end
-
-sdireset
-sdireset
-file vmlinux
-target m32rsdi
-set $pc = 0
-b *0x04001000
-b *0x08001000
-b *0x08002000
-c
-tlb_init
-del
-setup
-load_modules
-boot
-
+++ /dev/null
-/*
- * linux/arch/m32r/platforms/m32700ut/io.c
- *
- * Typical I/O routines for M32700UT board.
- *
- * Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
- * Hitoshi Yamamoto, Takeo Takahashi
- *
- * This file is subject to the terms and conditions of the GNU General
- * Public License. See the file "COPYING" in the main directory of this
- * archive for more details.
- */
-
-#include <asm/m32r.h>
-#include <asm/page.h>
-#include <asm/io.h>
-#include <asm/byteorder.h>
-
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
-#include <linux/types.h>
-
-#define M32R_PCC_IOMAP_SIZE 0x1000
-
-#define M32R_PCC_IOSTART0 0x1000
-#define M32R_PCC_IOEND0 (M32R_PCC_IOSTART0 + M32R_PCC_IOMAP_SIZE - 1)
-
-extern void pcc_ioread_byte(int, unsigned long, void *, size_t, size_t, int);
-extern void pcc_ioread_word(int, unsigned long, void *, size_t, size_t, int);
-extern void pcc_iowrite_byte(int, unsigned long, void *, size_t, size_t, int);
-extern void pcc_iowrite_word(int, unsigned long, void *, size_t, size_t, int);
-#endif /* CONFIG_PCMCIA && CONFIG_M32R_CFC */
-
-#define PORT2ADDR(port) _port2addr(port)
-#define PORT2ADDR_USB(port) _port2addr_usb(port)
-
-static inline void *_port2addr(unsigned long port)
-{
- return (void *)(port | NONCACHE_OFFSET);
-}
-
-#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
-static inline void *__port2addr_ata(unsigned long port)
-{
- static int dummy_reg;
-
- switch (port) {
- case 0x1f0: return (void *)(0x0c002000 | NONCACHE_OFFSET);
- case 0x1f1: return (void *)(0x0c012800 | NONCACHE_OFFSET);
- case 0x1f2: return (void *)(0x0c012002 | NONCACHE_OFFSET);
- case 0x1f3: return (void *)(0x0c012802 | NONCACHE_OFFSET);
- case 0x1f4: return (void *)(0x0c012004 | NONCACHE_OFFSET);
- case 0x1f5: return (void *)(0x0c012804 | NONCACHE_OFFSET);
- case 0x1f6: return (void *)(0x0c012006 | NONCACHE_OFFSET);
- case 0x1f7: return (void *)(0x0c012806 | NONCACHE_OFFSET);
- case 0x3f6: return (void *)(0x0c01200e | NONCACHE_OFFSET);
- default: return (void *)&dummy_reg;
- }
-}
-#endif
-
-/*
- * M32700UT-LAN is located in the extended bus space
- * from 0x10000000 to 0x13ffffff on physical address.
- * The base address of LAN controller(LAN91C111) is 0x300.
- */
-#define LAN_IOSTART (0x300 | NONCACHE_OFFSET)
-#define LAN_IOEND (0x320 | NONCACHE_OFFSET)
-static inline void *_port2addr_ne(unsigned long port)
-{
- return (void *)(port + 0x10000000);
-}
-static inline void *_port2addr_usb(unsigned long port)
-{
- return (void *)((port & 0x0f) + NONCACHE_OFFSET + 0x10303000);
-}
-
-static inline void delay(void)
-{
- __asm__ __volatile__ ("push r0; \n\t pop r0;" : : :"memory");
-}
-
-/*
- * NIC I/O function
- */
-
-#define PORT2ADDR_NE(port) _port2addr_ne(port)
-
-static inline unsigned char _ne_inb(void *portp)
-{
- return *(volatile unsigned char *)portp;
-}
-
-static inline unsigned short _ne_inw(void *portp)
-{
- return (unsigned short)le16_to_cpu(*(volatile unsigned short *)portp);
-}
-
-static inline void _ne_insb(void *portp, void *addr, unsigned long count)
-{
- unsigned char *buf = (unsigned char *)addr;
-
- while (count--)
- *buf++ = _ne_inb(portp);
-}
-
-static inline void _ne_outb(unsigned char b, void *portp)
-{
- *(volatile unsigned char *)portp = b;
-}
-
-static inline void _ne_outw(unsigned short w, void *portp)
-{
- *(volatile unsigned short *)portp = cpu_to_le16(w);
-}
-
-unsigned char _inb(unsigned long port)
-{
- if (port >= LAN_IOSTART && port < LAN_IOEND)
- return _ne_inb(PORT2ADDR_NE(port));
-
-#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
- else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
- return *(volatile unsigned char *)__port2addr_ata(port);
- }
-#endif
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
- else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- unsigned char b;
- pcc_ioread_byte(0, port, &b, sizeof(b), 1, 0);
- return b;
- } else
-#endif
-
- return *(volatile unsigned char *)PORT2ADDR(port);
-}
-
-unsigned short _inw(unsigned long port)
-{
- if (port >= LAN_IOSTART && port < LAN_IOEND)
- return _ne_inw(PORT2ADDR_NE(port));
-#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
- else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
- return *(volatile unsigned short *)__port2addr_ata(port);
- }
-#endif
-#if defined(CONFIG_USB)
- else if(port >= 0x340 && port < 0x3a0)
- return *(volatile unsigned short *)PORT2ADDR_USB(port);
-#endif
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
- else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- unsigned short w;
- pcc_ioread_word(0, port, &w, sizeof(w), 1, 0);
- return w;
- } else
-#endif
- return *(volatile unsigned short *)PORT2ADDR(port);
-}
-
-unsigned long _inl(unsigned long port)
-{
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
- if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- unsigned long l;
- pcc_ioread_word(0, port, &l, sizeof(l), 1, 0);
- return l;
- } else
-#endif
- return *(volatile unsigned long *)PORT2ADDR(port);
-}
-
-unsigned char _inb_p(unsigned long port)
-{
- unsigned char v = _inb(port);
- delay();
- return (v);
-}
-
-unsigned short _inw_p(unsigned long port)
-{
- unsigned short v = _inw(port);
- delay();
- return (v);
-}
-
-unsigned long _inl_p(unsigned long port)
-{
- unsigned long v = _inl(port);
- delay();
- return (v);
-}
-
-void _outb(unsigned char b, unsigned long port)
-{
- if (port >= LAN_IOSTART && port < LAN_IOEND)
- _ne_outb(b, PORT2ADDR_NE(port));
- else
-#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
- if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
- *(volatile unsigned char *)__port2addr_ata(port) = b;
- } else
-#endif
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
- if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- pcc_iowrite_byte(0, port, &b, sizeof(b), 1, 0);
- } else
-#endif
- *(volatile unsigned char *)PORT2ADDR(port) = b;
-}
-
-void _outw(unsigned short w, unsigned long port)
-{
- if (port >= LAN_IOSTART && port < LAN_IOEND)
- _ne_outw(w, PORT2ADDR_NE(port));
- else
-#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
- if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
- *(volatile unsigned short *)__port2addr_ata(port) = w;
- } else
-#endif
-#if defined(CONFIG_USB)
- if(port >= 0x340 && port < 0x3a0)
- *(volatile unsigned short *)PORT2ADDR_USB(port) = w;
- else
-#endif
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
- if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- pcc_iowrite_word(0, port, &w, sizeof(w), 1, 0);
- } else
-#endif
- *(volatile unsigned short *)PORT2ADDR(port) = w;
-}
-
-void _outl(unsigned long l, unsigned long port)
-{
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
- if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- pcc_iowrite_word(0, port, &l, sizeof(l), 1, 0);
- } else
-#endif
- *(volatile unsigned long *)PORT2ADDR(port) = l;
-}
-
-void _outb_p(unsigned char b, unsigned long port)
-{
- _outb(b, port);
- delay();
-}
-
-void _outw_p(unsigned short w, unsigned long port)
-{
- _outw(w, port);
- delay();
-}
-
-void _outl_p(unsigned long l, unsigned long port)
-{
- _outl(l, port);
- delay();
-}
-
-void _insb(unsigned int port, void *addr, unsigned long count)
-{
- if (port >= LAN_IOSTART && port < LAN_IOEND)
- _ne_insb(PORT2ADDR_NE(port), addr, count);
-#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
- else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
- unsigned char *buf = addr;
- unsigned char *portp = __port2addr_ata(port);
- while (count--)
- *buf++ = *(volatile unsigned char *)portp;
- }
-#endif
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
- else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- pcc_ioread_byte(0, port, (void *)addr, sizeof(unsigned char),
- count, 1);
- }
-#endif
- else {
- unsigned char *buf = addr;
- unsigned char *portp = PORT2ADDR(port);
- while (count--)
- *buf++ = *(volatile unsigned char *)portp;
- }
-}
-
-void _insw(unsigned int port, void *addr, unsigned long count)
-{
- unsigned short *buf = addr;
- unsigned short *portp;
-
- if (port >= LAN_IOSTART && port < LAN_IOEND) {
- /*
- * This portion is only used by smc91111.c to read data
- * from the DATA_REG. Do not swap the data.
- */
- portp = PORT2ADDR_NE(port);
- while (count--)
- *buf++ = *(volatile unsigned short *)portp;
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
- } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- pcc_ioread_word(9, port, (void *)addr, sizeof(unsigned short),
- count, 1);
-#endif
-#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
- } else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
- portp = __port2addr_ata(port);
- while (count--)
- *buf++ = *(volatile unsigned short *)portp;
-#endif
- } else {
- portp = PORT2ADDR(port);
- while (count--)
- *buf++ = *(volatile unsigned short *)portp;
- }
-}
-
-void _insl(unsigned int port, void *addr, unsigned long count)
-{
- unsigned long *buf = addr;
- unsigned long *portp;
-
- portp = PORT2ADDR(port);
- while (count--)
- *buf++ = *(volatile unsigned long *)portp;
-}
-
-void _outsb(unsigned int port, const void *addr, unsigned long count)
-{
- const unsigned char *buf = addr;
- unsigned char *portp;
-
- if (port >= LAN_IOSTART && port < LAN_IOEND) {
- portp = PORT2ADDR_NE(port);
- while (count--)
- _ne_outb(*buf++, portp);
-#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
- } else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
- portp = __port2addr_ata(port);
- while (count--)
- *(volatile unsigned char *)portp = *buf++;
-#endif
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
- } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- pcc_iowrite_byte(0, port, (void *)addr, sizeof(unsigned char),
- count, 1);
-#endif
- } else {
- portp = PORT2ADDR(port);
- while (count--)
- *(volatile unsigned char *)portp = *buf++;
- }
-}
-
-void _outsw(unsigned int port, const void *addr, unsigned long count)
-{
- const unsigned short *buf = addr;
- unsigned short *portp;
-
- if (port >= LAN_IOSTART && port < LAN_IOEND) {
- /*
- * This portion is only used by smc91111.c to write data
- * into the DATA_REG. Do not swap the data.
- */
- portp = PORT2ADDR_NE(port);
- while (count--)
- *(volatile unsigned short *)portp = *buf++;
-#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
- } else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
- portp = __port2addr_ata(port);
- while (count--)
- *(volatile unsigned short *)portp = *buf++;
-#endif
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
- } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- pcc_iowrite_word(9, port, (void *)addr, sizeof(unsigned short),
- count, 1);
-#endif
- } else {
- portp = PORT2ADDR(port);
- while (count--)
- *(volatile unsigned short *)portp = *buf++;
- }
-}
-
-void _outsl(unsigned int port, const void *addr, unsigned long count)
-{
- const unsigned long *buf = addr;
- unsigned char *portp;
-
- portp = PORT2ADDR(port);
- while (count--)
- *(volatile unsigned long *)portp = *buf++;
-}
+++ /dev/null
-/*
- * linux/arch/m32r/platforms/m32700ut/setup.c
- *
- * Setup routines for Renesas M32700UT Board
- *
- * Copyright (c) 2002-2005 Hiroyuki Kondo, Hirokazu Takata,
- * Hitoshi Yamamoto, Takeo Takahashi
- *
- * This file is subject to the terms and conditions of the GNU General
- * Public License. See the file "COPYING" in the main directory of this
- * archive for more details.
- */
-
-#include <linux/irq.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-
-#include <asm/m32r.h>
-#include <asm/io.h>
-
-/*
- * M32700 Interrupt Control Unit (Level 1)
- */
-#define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
-
-icu_data_t icu_data[M32700UT_NUM_CPU_IRQ];
-
-static void disable_m32700ut_irq(unsigned int irq)
-{
- unsigned long port, data;
-
- port = irq2port(irq);
- data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7;
- outl(data, port);
-}
-
-static void enable_m32700ut_irq(unsigned int irq)
-{
- unsigned long port, data;
-
- port = irq2port(irq);
- data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6;
- outl(data, port);
-}
-
-static void mask_m32700ut(struct irq_data *data)
-{
- disable_m32700ut_irq(data->irq);
-}
-
-static void unmask_m32700ut(struct irq_data *data)
-{
- enable_m32700ut_irq(data->irq);
-}
-
-static void shutdown_m32700ut(struct irq_data *data)
-{
- unsigned long port;
-
- port = irq2port(data->irq);
- outl(M32R_ICUCR_ILEVEL7, port);
-}
-
-static struct irq_chip m32700ut_irq_type =
-{
- .name = "M32700UT-IRQ",
- .irq_shutdown = shutdown_m32700ut,
- .irq_mask = mask_m32700ut,
- .irq_unmask = unmask_m32700ut
-};
-
-/*
- * Interrupt Control Unit of PLD on M32700UT (Level 2)
- */
-#define irq2pldirq(x) ((x) - M32700UT_PLD_IRQ_BASE)
-#define pldirq2port(x) (unsigned long)((int)PLD_ICUCR1 + \
- (((x) - 1) * sizeof(unsigned short)))
-
-typedef struct {
- unsigned short icucr; /* ICU Control Register */
-} pld_icu_data_t;
-
-static pld_icu_data_t pld_icu_data[M32700UT_NUM_PLD_IRQ];
-
-static void disable_m32700ut_pld_irq(unsigned int irq)
-{
- unsigned long port, data;
- unsigned int pldirq;
-
- pldirq = irq2pldirq(irq);
- port = pldirq2port(pldirq);
- data = pld_icu_data[pldirq].icucr|PLD_ICUCR_ILEVEL7;
- outw(data, port);
-}
-
-static void enable_m32700ut_pld_irq(unsigned int irq)
-{
- unsigned long port, data;
- unsigned int pldirq;
-
- pldirq = irq2pldirq(irq);
- port = pldirq2port(pldirq);
- data = pld_icu_data[pldirq].icucr|PLD_ICUCR_IEN|PLD_ICUCR_ILEVEL6;
- outw(data, port);
-}
-
-static void mask_m32700ut_pld(struct irq_data *data)
-{
- disable_m32700ut_pld_irq(data->irq);
-}
-
-static void unmask_m32700ut_pld(struct irq_data *data)
-{
- enable_m32700ut_pld_irq(data->irq);
- enable_m32700ut_irq(M32R_IRQ_INT1);
-}
-
-static void shutdown_m32700ut_pld_irq(struct irq_data *data)
-{
- unsigned long port;
- unsigned int pldirq;
-
- pldirq = irq2pldirq(data->irq);
- port = pldirq2port(pldirq);
- outw(PLD_ICUCR_ILEVEL7, port);
-}
-
-static struct irq_chip m32700ut_pld_irq_type =
-{
- .name = "M32700UT-PLD-IRQ",
- .irq_shutdown = shutdown_m32700ut_pld_irq,
- .irq_mask = mask_m32700ut_pld,
- .irq_unmask = unmask_m32700ut_pld,
-};
-
-/*
- * Interrupt Control Unit of PLD on M32700UT-LAN (Level 2)
- */
-#define irq2lanpldirq(x) ((x) - M32700UT_LAN_PLD_IRQ_BASE)
-#define lanpldirq2port(x) (unsigned long)((int)M32700UT_LAN_ICUCR1 + \
- (((x) - 1) * sizeof(unsigned short)))
-
-static pld_icu_data_t lanpld_icu_data[M32700UT_NUM_LAN_PLD_IRQ];
-
-static void disable_m32700ut_lanpld_irq(unsigned int irq)
-{
- unsigned long port, data;
- unsigned int pldirq;
-
- pldirq = irq2lanpldirq(irq);
- port = lanpldirq2port(pldirq);
- data = lanpld_icu_data[pldirq].icucr|PLD_ICUCR_ILEVEL7;
- outw(data, port);
-}
-
-static void enable_m32700ut_lanpld_irq(unsigned int irq)
-{
- unsigned long port, data;
- unsigned int pldirq;
-
- pldirq = irq2lanpldirq(irq);
- port = lanpldirq2port(pldirq);
- data = lanpld_icu_data[pldirq].icucr|PLD_ICUCR_IEN|PLD_ICUCR_ILEVEL6;
- outw(data, port);
-}
-
-static void mask_m32700ut_lanpld(struct irq_data *data)
-{
- disable_m32700ut_lanpld_irq(data->irq);
-}
-
-static void unmask_m32700ut_lanpld(struct irq_data *data)
-{
- enable_m32700ut_lanpld_irq(data->irq);
- enable_m32700ut_irq(M32R_IRQ_INT0);
-}
-
-static void shutdown_m32700ut_lanpld(struct irq_data *data)
-{
- unsigned long port;
- unsigned int pldirq;
-
- pldirq = irq2lanpldirq(data->irq);
- port = lanpldirq2port(pldirq);
- outw(PLD_ICUCR_ILEVEL7, port);
-}
-
-static struct irq_chip m32700ut_lanpld_irq_type =
-{
- .name = "M32700UT-PLD-LAN-IRQ",
- .irq_shutdown = shutdown_m32700ut_lanpld,
- .irq_mask = mask_m32700ut_lanpld,
- .irq_unmask = unmask_m32700ut_lanpld,
-};
-
-/*
- * Interrupt Control Unit of PLD on M32700UT-LCD (Level 2)
- */
-#define irq2lcdpldirq(x) ((x) - M32700UT_LCD_PLD_IRQ_BASE)
-#define lcdpldirq2port(x) (unsigned long)((int)M32700UT_LCD_ICUCR1 + \
- (((x) - 1) * sizeof(unsigned short)))
-
-#ifdef CONFIG_USB
-static pld_icu_data_t lcdpld_icu_data[M32700UT_NUM_LCD_PLD_IRQ];
-
-static void disable_m32700ut_lcdpld_irq(unsigned int irq)
-{
- unsigned long port, data;
- unsigned int pldirq;
-
- pldirq = irq2lcdpldirq(irq);
- port = lcdpldirq2port(pldirq);
- data = lcdpld_icu_data[pldirq].icucr|PLD_ICUCR_ILEVEL7;
- outw(data, port);
-}
-
-static void enable_m32700ut_lcdpld_irq(unsigned int irq)
-{
- unsigned long port, data;
- unsigned int pldirq;
-
- pldirq = irq2lcdpldirq(irq);
- port = lcdpldirq2port(pldirq);
- data = lcdpld_icu_data[pldirq].icucr|PLD_ICUCR_IEN|PLD_ICUCR_ILEVEL6;
- outw(data, port);
-}
-
-static void mask_m32700ut_lcdpld(struct irq_data *data)
-{
- disable_m32700ut_lcdpld_irq(data->irq);
-}
-
-static void unmask_m32700ut_lcdpld(struct irq_data *data)
-{
- enable_m32700ut_lcdpld_irq(data->irq);
- enable_m32700ut_irq(M32R_IRQ_INT2);
-}
-
-static void shutdown_m32700ut_lcdpld(struct irq_data *data)
-{
- unsigned long port;
- unsigned int pldirq;
-
- pldirq = irq2lcdpldirq(data->irq);
- port = lcdpldirq2port(pldirq);
- outw(PLD_ICUCR_ILEVEL7, port);
-}
-
-static struct irq_chip m32700ut_lcdpld_irq_type =
-{
- .name = "M32700UT-PLD-LCD-IRQ",
- .irq_shutdown = shutdown_m32700ut_lcdpld,
- .irq_mask = mask_m32700ut_lcdpld,
- .irq_unmask = unmask_m32700ut_lcdpld,
-};
-#endif
-
-void __init init_IRQ(void)
-{
-#if defined(CONFIG_SMC91X)
- /* INT#0: LAN controller on M32700UT-LAN (SMC91C111)*/
- irq_set_chip_and_handler(M32700UT_LAN_IRQ_LAN,
- &m32700ut_lanpld_irq_type, handle_level_irq);
- lanpld_icu_data[irq2lanpldirq(M32700UT_LAN_IRQ_LAN)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02; /* "H" edge sense */
- disable_m32700ut_lanpld_irq(M32700UT_LAN_IRQ_LAN);
-#endif /* CONFIG_SMC91X */
-
- /* MFT2 : system timer */
- irq_set_chip_and_handler(M32R_IRQ_MFT2, &m32700ut_irq_type,
- handle_level_irq);
- icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
- disable_m32700ut_irq(M32R_IRQ_MFT2);
-
- /* SIO0 : receive */
- irq_set_chip_and_handler(M32R_IRQ_SIO0_R, &m32700ut_irq_type,
- handle_level_irq);
- icu_data[M32R_IRQ_SIO0_R].icucr = 0;
- disable_m32700ut_irq(M32R_IRQ_SIO0_R);
-
- /* SIO0 : send */
- irq_set_chip_and_handler(M32R_IRQ_SIO0_S, &m32700ut_irq_type,
- handle_level_irq);
- icu_data[M32R_IRQ_SIO0_S].icucr = 0;
- disable_m32700ut_irq(M32R_IRQ_SIO0_S);
-
- /* SIO1 : receive */
- irq_set_chip_and_handler(M32R_IRQ_SIO1_R, &m32700ut_irq_type,
- handle_level_irq);
- icu_data[M32R_IRQ_SIO1_R].icucr = 0;
- disable_m32700ut_irq(M32R_IRQ_SIO1_R);
-
- /* SIO1 : send */
- irq_set_chip_and_handler(M32R_IRQ_SIO1_S, &m32700ut_irq_type,
- handle_level_irq);
- icu_data[M32R_IRQ_SIO1_S].icucr = 0;
- disable_m32700ut_irq(M32R_IRQ_SIO1_S);
-
- /* DMA1 : */
- irq_set_chip_and_handler(M32R_IRQ_DMA1, &m32700ut_irq_type,
- handle_level_irq);
- icu_data[M32R_IRQ_DMA1].icucr = 0;
- disable_m32700ut_irq(M32R_IRQ_DMA1);
-
-#ifdef CONFIG_SERIAL_M32R_PLDSIO
- /* INT#1: SIO0 Receive on PLD */
- irq_set_chip_and_handler(PLD_IRQ_SIO0_RCV, &m32700ut_pld_irq_type,
- handle_level_irq);
- pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_RCV)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03;
- disable_m32700ut_pld_irq(PLD_IRQ_SIO0_RCV);
-
- /* INT#1: SIO0 Send on PLD */
- irq_set_chip_and_handler(PLD_IRQ_SIO0_SND, &m32700ut_pld_irq_type,
- handle_level_irq);
- pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_SND)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03;
- disable_m32700ut_pld_irq(PLD_IRQ_SIO0_SND);
-#endif /* CONFIG_SERIAL_M32R_PLDSIO */
-
- /* INT#1: CFC IREQ on PLD */
- irq_set_chip_and_handler(PLD_IRQ_CFIREQ, &m32700ut_pld_irq_type,
- handle_level_irq);
- pld_icu_data[irq2pldirq(PLD_IRQ_CFIREQ)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* 'L' level sense */
- disable_m32700ut_pld_irq(PLD_IRQ_CFIREQ);
-
- /* INT#1: CFC Insert on PLD */
- irq_set_chip_and_handler(PLD_IRQ_CFC_INSERT, &m32700ut_pld_irq_type,
- handle_level_irq);
- pld_icu_data[irq2pldirq(PLD_IRQ_CFC_INSERT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD00; /* 'L' edge sense */
- disable_m32700ut_pld_irq(PLD_IRQ_CFC_INSERT);
-
- /* INT#1: CFC Eject on PLD */
- irq_set_chip_and_handler(PLD_IRQ_CFC_EJECT, &m32700ut_pld_irq_type,
- handle_level_irq);
- pld_icu_data[irq2pldirq(PLD_IRQ_CFC_EJECT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02; /* 'H' edge sense */
- disable_m32700ut_pld_irq(PLD_IRQ_CFC_EJECT);
-
- /*
- * INT0# is used for LAN, DIO
- * We enable it here.
- */
- icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD11;
- enable_m32700ut_irq(M32R_IRQ_INT0);
-
- /*
- * INT1# is used for UART, MMC, CF Controller in FPGA.
- * We enable it here.
- */
- icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD11;
- enable_m32700ut_irq(M32R_IRQ_INT1);
-
-#if defined(CONFIG_USB)
- outw(USBCR_OTGS, USBCR); /* USBCR: non-OTG */
- irq_set_chip_and_handler(M32700UT_LCD_IRQ_USB_INT1,
- &m32700ut_lcdpld_irq_type, handle_level_irq);
-
- lcdpld_icu_data[irq2lcdpldirq(M32700UT_LCD_IRQ_USB_INT1)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* "L" level sense */
- disable_m32700ut_lcdpld_irq(M32700UT_LCD_IRQ_USB_INT1);
-#endif
- /*
- * INT2# is used for BAT, USB, AUDIO
- * We enable it here.
- */
- icu_data[M32R_IRQ_INT2].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01;
- enable_m32700ut_irq(M32R_IRQ_INT2);
-
-#if defined(CONFIG_VIDEO_M32R_AR)
- /*
- * INT3# is used for AR
- */
- irq_set_chip_and_handler(M32R_IRQ_INT3, &m32700ut_irq_type,
- handle_level_irq);
- icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
- disable_m32700ut_irq(M32R_IRQ_INT3);
-#endif /* CONFIG_VIDEO_M32R_AR */
-}
-
-#if defined(CONFIG_SMC91X)
-
-#define LAN_IOSTART 0x300
-#define LAN_IOEND 0x320
-static struct resource smc91x_resources[] = {
- [0] = {
- .start = (LAN_IOSTART),
- .end = (LAN_IOEND),
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = M32700UT_LAN_IRQ_LAN,
- .end = M32700UT_LAN_IRQ_LAN,
- .flags = IORESOURCE_IRQ,
- }
-};
-
-static struct platform_device smc91x_device = {
- .name = "smc91x",
- .id = 0,
- .num_resources = ARRAY_SIZE(smc91x_resources),
- .resource = smc91x_resources,
-};
-#endif
-
-#if defined(CONFIG_FB_S1D13XXX)
-
-#include <video/s1d13xxxfb.h>
-#include <asm/s1d13806.h>
-
-static struct s1d13xxxfb_pdata s1d13xxxfb_data = {
- .initregs = s1d13xxxfb_initregs,
- .initregssize = ARRAY_SIZE(s1d13xxxfb_initregs),
- .platform_init_video = NULL,
-#ifdef CONFIG_PM
- .platform_suspend_video = NULL,
- .platform_resume_video = NULL,
-#endif
-};
-
-static struct resource s1d13xxxfb_resources[] = {
- [0] = {
- .start = 0x10600000UL,
- .end = 0x1073FFFFUL,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = 0x10400000UL,
- .end = 0x104001FFUL,
- .flags = IORESOURCE_MEM,
- }
-};
-
-static struct platform_device s1d13xxxfb_device = {
- .name = S1D_DEVICENAME,
- .id = 0,
- .dev = {
- .platform_data = &s1d13xxxfb_data,
- },
- .num_resources = ARRAY_SIZE(s1d13xxxfb_resources),
- .resource = s1d13xxxfb_resources,
-};
-#endif
-
-static int __init platform_init(void)
-{
-#if defined(CONFIG_SMC91X)
- platform_device_register(&smc91x_device);
-#endif
-#if defined(CONFIG_FB_S1D13XXX)
- platform_device_register(&s1d13xxxfb_device);
-#endif
- return 0;
-}
-arch_initcall(platform_init);
+++ /dev/null
-obj-y := setup.o io.o
+++ /dev/null
-# .gdbinit file
-# $Id: dot.gdbinit.mappi,v 1.4 2004/10/20 02:24:37 takata Exp $
-#-----
-# NOTE: this file is generated by a script, "gen_gdbinit.pl".
-# (Please type "gen_gdbinit.pl --help" and check the help message).
-# $ Id: gen_gdbinit.pl,v 1.12 2004/07/26 09:56:10 takata Exp $
-#-----
-# target platform: mappi
-
-# setting
-set width 0d70
-set radix 0d16
-debug_chaos
-
-# clk xin:cpu:bif:bus=30:360:180:90
-define clock_init
- set *(unsigned long *)0x00ef4024 = 2
- set *(unsigned long *)0x00ef4020 = 1
- set *(unsigned long *)0x00ef4010 = 0
- set *(unsigned long *)0x00ef4014 = 0
- set *(unsigned long *)0x00ef4004 = 5
- shell sleep 0.1
- set *(unsigned long *)0x00ef4008 = 0x00000200
-end
-
-# Initialize programmable ports
-define port_init
- set $sfrbase = 0x00ef0000
- set *(unsigned short *)0x00ef1060 = 0x5555
- set *(unsigned short *)0x00ef1062 = 0x5555
- set *(unsigned short *)0x00ef1064 = 0x5555
- set *(unsigned short *)0x00ef1066 = 0x5555
- set *(unsigned short *)0x00ef1068 = 0x5555
- set *(unsigned short *)0x00ef106a = 0x0000
- set *(unsigned short *)0x00ef106e = 0x5555
- set *(unsigned short *)0x00ef1070 = 0x5555
- # LED ON
- set *(unsigned char *)($sfrbase + 0x1015) = 0xff
- set *(unsigned char *)($sfrbase + 0x1085) = 0xff
- shell sleep 0.1
- # LED OFF
- set *(unsigned char *)($sfrbase + 0x1085) = 0x00
-end
-document port_init
- P5=LED(output), P6.b4=LAN_RESET(output)
-end
-
-# Initialize SDRAM controller
-define sdram_init
- # SDIR0
- set *(unsigned long *)0x00ef6008 = 0x00000182
- # SDIR1
- set *(unsigned long *)0x00ef600c = 0x00000001
- # Initialize wait
- shell sleep 0.1
- # Ch0-MOD
- set *(unsigned long *)0x00ef602c = 0x00000020
- # Ch0-TR
- set *(unsigned long *)0x00ef6028 = 0x00051502
- # Ch0-ADR (size:64MB)
- set *(unsigned long *)0x00ef6020 = 0x08000004
- # AutoRef On
- set *(unsigned long *)0x00ef6004 = 0x00010e2b
- # Access enable
- set *(unsigned long *)0x00ef6024 = 0x00000001
-end
-document sdram_init
- SDRAM controller initialization
- 0x08000000 - 0x0bffffff (64MB)
-end
-
-# Initialize LAN controller
-define lanc_init
- set $sfrbase = 0x00ef0000
- # Set BSEL3 (BSEL3 for the Chaos's bselc)
- set *(unsigned long *)($sfrbase + 0x5300) = 0x0a0a8040
- set *(unsigned long *)($sfrbase + 0x5304) = 0x01120203
- set *(unsigned long *)($sfrbase + 0x5308) = 0x00000001
- # Reset (P5=LED,P6.b4=LAN_RESET)
- set *(unsigned short *)($sfrbase + 0x106c) = 0x0000
- set *(unsigned char *)($sfrbase + 0x1016) = 0xff
- set *(unsigned char *)($sfrbase + 0x1086) = 0xff
- shell sleep 0.1
- # swivel: 0=normal, 4=reverse
-# set *(unsigned char *)($sfrbase + 0x1086) = 0x00
- set *(unsigned char *)($sfrbase + 0x1086) = 0x04
- set *(unsigned long *)(0x0c000330) = 0xffffffff
- # Set mac address
- set $lanc = (void*)0x0c000300
- set *(unsigned long *)($lanc + 0x0000) = 0x00610010
- set *(unsigned long *)($lanc + 0x0004) = 0x00200030
- set *(unsigned long *)($lanc + 0x0008) = 0x00400050
- set *(unsigned long *)($lanc + 0x000c) = 0x00600007
-end
-document lanc_init
- LAN controller initialization
- ex.) MAC address: 10 20 30 40 50 60
-end
-
-# LCD & CRT dual-head setting (8bpp)
-define dispc_init
- set $sfrbase = 0x00ef0000
- # BSEL4 Dispc
- set *(unsigned long *)($sfrbase + 0x5400) = 0x0e0e8000
- set *(unsigned long *)($sfrbase + 0x5404) = 0x0012220a
-end
-
-# MMU enable
-define mmu_enable
- set $evb=0x88000000
- set *(unsigned long *)0xffff0024=1
-end
-
-# MMU disable
-define mmu_disable
- set $evb=0
- set *(unsigned long *)0xffff0024=0
-end
-
-# Show TLB entries
-define show_tlb_entries
- set $i = 0
- set $addr = $arg0
- set $nr_entries = $arg1
- use_mon_code
- while ($i < $nr_entries)
- set $tlb_tag = *(unsigned long*)$addr
- set $tlb_data = *(unsigned long*)($addr + 4)
- printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx\n", $i, $addr, $tlb_tag, $tlb_data
- set $i = $i + 1
- set $addr = $addr + 8
- end
- use_debug_dma
-end
-define itlb
- set $itlb=0xfe000000
- show_tlb_entries $itlb 0d32
-end
-define dtlb
- set $dtlb=0xfe000800
- show_tlb_entries $dtlb 0d32
-end
-
-# Show current task structure
-define show_current
- set $current = $spi & 0xffffe000
- printf "$current=0x%08lX\n",$current
- print *(struct task_struct *)$current
-end
-
-# Show user assigned task structure
-define show_task
- set = $arg0 & 0xffffe000
- printf "$task=0x%08lX\n",$task
- print *(struct task_struct *)$task
-end
-document show_task
- Show user assigned task structure
- arg0 : task structure address
-end
-
-# Show M32R registers
-define show_regs
- printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
- printf " R4[0x%08lX] R5[0x%08lX] R6[0x%08lX] R7[0x%08lX]\n",$r4,$r5,$r6,$r7
- printf " R8[0x%08lX] R9[0x%08lX] R10[0x%08lX] R11[0x%08lX]\n",$r8,$r9,$r10,$r11
- printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$sp
- printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
- printf "BPC[0x%08lX] PC[0x%08lX] ACCL[0x%08lX] ACCH[0x%08lX]\n",$bpc,$pc,$accl,$acch
- printf "EVB[0x%08lX]\n",$evb
-end
-
-# Setup all
-define setup
- use_mon_code
- set *(unsigned int)0xfffffffc=0x60
- shell sleep 0.1
- clock_init
- shell sleep 0.1
- port_init
- sdram_init
- lanc_init
- dispc_init
- set $evb=0x08000000
-end
-
-# Load modules
-define load_modules
- use_debug_dma
- load
-end
-
-# Set kernel parameters
-define set_kernel_parameters
- set $param = (void*)0x08001000
- # INITRD_START
-# set *(unsigned long *)($param + 0x0010) = 0x08300000
- # INITRD_SIZE
-# set *(unsigned long *)($param + 0x0014) = 0x00000000
- # M32R_CPUCLK
- set *(unsigned long *)($param + 0x0018) = 0d360000000
- # M32R_BUSCLK
- set *(unsigned long *)($param + 0x001c) = 0d90000000
-
- # M32R_TIMER_DIVIDE
- set *(unsigned long *)($param + 0x0020) = 0d128
-
- set {char[0x200]}($param + 0x100) = "console=ttyS0,115200n8x console=tty1 root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/rootfs nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 \0"
-end
-
-# Boot
-define boot
- set_kernel_parameters
- set $fp = 0
- set $pc = 0x08002000
- si
- c
-end
-
-# Set breakpoints
-define set_breakpoints
- b *0x08000030
-end
-
-# Restart
-define restart
- sdireset
- sdireset
- setup
- load_modules
- boot
-end
-
-sdireset
-sdireset
-file vmlinux
-target m32rsdi
-setup
-#load_modules
-#set_breakpoints
-#boot
-
+++ /dev/null
-# .gdbinit file
-# $Id$
-#-----
-# NOTE: this file is generated by a script, "gen_gdbinit.pl".
-# (Please type "gen_gdbinit.pl --help" and check the help message).
-# $ Id: gen_gdbinit.pl,v 1.5 2004/01/23 08:23:25 takata Exp $
-#-----
-# target platform: mappi
-
-# setting
-set width 0d70
-set radix 0d16
-debug_chaos
-
-# clk xin:cpu:bif:bus=25:200:50:50
-define clock_init
- set *(unsigned long *)0x00ef4024 = 2
- set *(unsigned long *)0x00ef4020 = 2
- set *(unsigned long *)0x00ef4010 = 0
- set *(unsigned long *)0x00ef4014 = 0
- set *(unsigned long *)0x00ef4004 = 3
- shell sleep 0.1
- set *(unsigned long *)0x00ef4008 = 0x00000200
-end
-
-# Initialize programmable ports
-define port_init
- set $sfrbase = 0x00ef0000
- set *(unsigned short *)0x00ef1060 = 0x5555
- set *(unsigned short *)0x00ef1062 = 0x5555
- set *(unsigned short *)0x00ef1064 = 0x5555
- set *(unsigned short *)0x00ef1066 = 0x5555
- set *(unsigned short *)0x00ef1068 = 0x5555
- set *(unsigned short *)0x00ef106a = 0x0000
- set *(unsigned short *)0x00ef106e = 0x5555
- set *(unsigned short *)0x00ef1070 = 0x5555
- # LED ON
- set *(unsigned char *)($sfrbase + 0x1015) = 0xff
- set *(unsigned char *)($sfrbase + 0x1085) = 0xff
- shell sleep 0.1
- # LED OFF
- set *(unsigned char *)($sfrbase + 0x1085) = 0x00
-end
-document port_init
- P5=LED(output), P6.b4=LAN_RESET(output)
-end
-
-# Initialize SDRAM controller
-define sdram_init
- # SDIR0
- set *(unsigned long *)0x00ef6008 = 0x00000182
- # SDIR1
- set *(unsigned long *)0x00ef600c = 0x00000001
- # Initialize wait
- shell sleep 0.1
- # Ch0-MOD
- set *(unsigned long *)0x00ef602c = 0x00000020
- # Ch0-TR
- set *(unsigned long *)0x00ef6028 = 0x00051502
- # Ch0-ADR (size:64MB)
- set *(unsigned long *)0x00ef6020 = 0x00000004
- # AutoRef On
- set *(unsigned long *)0x00ef6004 = 0x00010f05
- # Access enable
- set *(unsigned long *)0x00ef6024 = 0x00000001
-end
-document sdram_init
- SDRAM controller initialization
- 0x08000000 - 0x0bffffff (64MB)
-end
-
-# Initialize LAN controller
-define lanc_init
- set $sfrbase = 0x00ef0000
- # Set BSEL3 (BSEL3 for the Chaos's bselc)
- set *(unsigned long *)($sfrbase + 0x5300) = 0x07078040
- set *(unsigned long *)($sfrbase + 0x5304) = 0x01110102
- set *(unsigned long *)($sfrbase + 0x5308) = 0x00000001
- # Reset (P5=LED,P6.b4=LAN_RESET)
- set *(unsigned short *)($sfrbase + 0x106c) = 0x0000
- set *(unsigned char *)($sfrbase + 0x1016) = 0xff
- set *(unsigned char *)($sfrbase + 0x1086) = 0xff
- shell sleep 0.1
- # swivel: 0=normal, 4=reverse
-# set *(unsigned char *)($sfrbase + 0x1086) = 0x00
- set *(unsigned char *)($sfrbase + 0x1086) = 0x04
- set *(unsigned long *)(0x0c000330) = 0xffffffff
- # Set mac address
- set $lanc = (void*)0x0c000300
- set *(unsigned long *)($lanc + 0x0000) = 0x00610010
- set *(unsigned long *)($lanc + 0x0004) = 0x00200030
- set *(unsigned long *)($lanc + 0x0008) = 0x00400050
- set *(unsigned long *)($lanc + 0x000c) = 0x00600007
-end
-document lanc_init
- LAN controller initialization
- ex.) MAC address: 10 20 30 40 50 60
-end
-
-# LCD & CRT dual-head setting (8bpp)
-define dispc_init
- set $sfrbase = 0x00ef0000
- # BSEL4 Dispc
- set *(unsigned long *)($sfrbase + 0x5400) = 0x06078000
- set *(unsigned long *)($sfrbase + 0x5404) = 0x00101101
-end
-
-# MMU enable
-define mmu_enable
- set $evb=0x88000000
- set *(unsigned long *)0xffff0024=1
-end
-
-# MMU disable
-define mmu_disable
- set $evb=0
- set *(unsigned long *)0xffff0024=0
-end
-
-# Show TLB entries
-define show_tlb_entries
- set $i = 0
- set $addr = $arg0
- set $nr_entries = $arg1
- use_mon_code
- while ($i < $nr_entries)
- set $tlb_tag = *(unsigned long*)$addr
- set $tlb_data = *(unsigned long*)($addr + 4)
- printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx\n", $i, $addr, $tlb_tag, $tlb_data
- set $i = $i + 1
- set $addr = $addr + 8
- end
- use_debug_dma
-end
-define itlb
- set $itlb=0xfe000000
- show_tlb_entries $itlb 0d32
-end
-define dtlb
- set $dtlb=0xfe000800
- show_tlb_entries $dtlb 0d32
-end
-
-# Show current task structure
-define show_current
- set $current = $spi & 0xffffe000
- printf "$current=0x%08lX\n",$current
- print *(struct task_struct *)$current
-end
-
-# Show user assigned task structure
-define show_task
- set = $arg0 & 0xffffe000
- printf "$task=0x%08lX\n",$task
- print *(struct task_struct *)$task
-end
-document show_task
- Show user assigned task structure
- arg0 : task structure address
-end
-
-# Show M32R registers
-define show_regs
- printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
- printf " R4[0x%08lX] R5[0x%08lX] R6[0x%08lX] R7[0x%08lX]\n",$r4,$r5,$r6,$r7
- printf " R8[0x%08lX] R9[0x%08lX] R10[0x%08lX] R11[0x%08lX]\n",$r8,$r9,$r10,$r11
- printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$sp
- printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
- printf "BPC[0x%08lX] PC[0x%08lX] ACCL[0x%08lX] ACCH[0x%08lX]\n",$bpc,$pc,$accl,$acch
- printf "EVB[0x%08lX]\n",$evb
-end
-
-# Setup all
-define setup
- use_mon_code
- set *(unsigned int)0xfffffffc=0x60
- shell sleep 0.1
- clock_init
- shell sleep 0.1
- port_init
- sdram_init
- lanc_init
- dispc_init
- set $evb=0x00000000
-end
-
-# Load modules
-define load_modules
- use_debug_dma
- load
-end
-
-# Set kernel parameters
-define set_kernel_parameters
- set $param = (void*)0x00001000
- # INITRD_START
- #set *(unsigned long *)($param + 0x0010) = 0x082a0000
- # INITRD_SIZE
- #set *(unsigned long *)($param + 0x0014) = 0x00000000
- # M32R_CPUCLK
- set *(unsigned long *)($param + 0x0018) = 0d200000000
- # M32R_BUSCLK
- set *(unsigned long *)($param + 0x001c) = 0d50000000
-
- # M32R_TIMER_DIVIDE
- set *(unsigned long *)($param + 0x0020) = 0d128
-
- set {char[0x200]}($param + 0x100) = "console=ttyS0,115200n8x root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/root.bbox-httpd nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 \0"
-end
-
-# Boot
-define boot
- set_kernel_parameters
- set $fp = 0
- set $pc=0x00002000
- set *(long *)0xfffffff4=0x8080
-# b load_flat_binary
-# set *(unsigned char *)0x08001003=0x63
-# set *(unsigned char *)0x08001003=0x02
- si
-# c
-end
-
-# Set breakpoints
-define set_breakpoints
- b *0x08000030
-end
-
-# Restart
-define restart
- sdireset
- sdireset
- setup
- load_modules
- boot
-end
-
-sdireset
-sdireset
-file vmlinux
-target m32rsdi
-setup
-load_modules
-boot
-
+++ /dev/null
-# .gdbinit file
-# $Id$
-
-# setting
-set width 0d70
-set radix 0d16
-debug_chaos
-
-# clk xin:cpu:bif:bus=1:4:2:1
-define clock_init_on
- set *(unsigned long *)0x00ef4024 = 2
- set *(unsigned long *)0x00ef4020 = 1
- set *(unsigned long *)0x00ef4010 = 0
- set *(unsigned long *)0x00ef4014 = 0
- set *(unsigned long *)0x00ef4004 = 0x1
- shell sleep 0.1
- set *(unsigned long *)0x00ef4008 = 0x0200
-# set *(unsigned long *)0x00ef4008 = 0x0201
-end
-
-# clk xin:cpu:bif:bus=1:4:1:1
-define clock_init_on_1411
- set *(unsigned long *)0x00ef4024 = 2
- set *(unsigned long *)0x00ef4020 = 2
- set *(unsigned long *)0x00ef4010 = 0
- set *(unsigned long *)0x00ef4014 = 0
- set *(unsigned long *)0x00ef4004 = 0x1
- shell sleep 0.1
- set *(unsigned long *)0x00ef4008 = 0x0200
-end
-
-# clk xin:cpu:bif:bus=1:4:2:1
-define clock_init_on_1421
- set *(unsigned long *)0x00ef4024 = 2
- set *(unsigned long *)0x00ef4020 = 1
- set *(unsigned long *)0x00ef4010 = 0
- set *(unsigned long *)0x00ef4014 = 0
- set *(unsigned long *)0x00ef4004 = 0x1
- shell sleep 0.1
- set *(unsigned long *)0x00ef4008 = 0x0200
-end
-
-# clk xin:cpu:bif:bus=1:8:2:1
-define clock_init_on_1821
- set *(unsigned long *)0x00ef4024 = 3
- set *(unsigned long *)0x00ef4020 = 2
- set *(unsigned long *)0x00ef4010 = 0
- set *(unsigned long *)0x00ef4014 = 0
- set *(unsigned long *)0x00ef4004 = 0x3
- shell sleep 0.1
- set *(unsigned long *)0x00ef4008 = 0x0200
-end
-
-# clk xin:cpu:bif:bus=1:8:4:1
-define clock_init_on_1841
- set *(unsigned long *)0x00ef4024 = 3
- set *(unsigned long *)0x00ef4020 = 1
- set *(unsigned long *)0x00ef4010 = 0
- set *(unsigned long *)0x00ef4014 = 0
- set *(unsigned long *)0x00ef4004 = 0x3
- shell sleep 0.1
- set *(unsigned long *)0x00ef4008 = 0x0200
-end
-
-# clk xin:cpu:bif:bus=1:16:8:1
-define clock_init_on_11681
- set *(unsigned long *)0x00ef4024 = 4
- set *(unsigned long *)0x00ef4020 = 2
- set *(unsigned long *)0x00ef4010 = 0
- set *(unsigned long *)0x00ef4014 = 0
- set *(unsigned long *)0x00ef4004 = 0x7
- shell sleep 0.1
- set *(unsigned long *)0x00ef4008 = 0x0200
-end
-
-# clk xin:cpu:bif:bus=1:1:1:1
-define clock_init_off
- # CPU
- set *(unsigned long *)0x00ef4010 = 0
- set *(unsigned long *)0x00ef4014 = 0
- # BIF
- set *(unsigned long *)0x00ef4020 = 0
- # BUS
- set *(unsigned long *)0x00ef4024 = 0
- # PLL
- set *(unsigned long *)0x00ef4008 = 0x0000
-end
-
-# Initialize programmable ports
-define port_init
- set $sfrbase = 0x00ef0000
- set *(unsigned short *)0x00ef1060 = 0x5555
- set *(unsigned short *)0x00ef1062 = 0x5555
- set *(unsigned short *)0x00ef1064 = 0x5555
- set *(unsigned short *)0x00ef1066 = 0x5555
- set *(unsigned short *)0x00ef1068 = 0x5555
- set *(unsigned short *)0x00ef106a = 0x0000
- set *(unsigned short *)0x00ef106e = 0x5555
- set *(unsigned short *)0x00ef1070 = 0x5555
- # LED ON
- set *(unsigned char *)($sfrbase + 0x1015) = 0xff
- set *(unsigned char *)($sfrbase + 0x1085) = 0xff
- shell sleep 0.1
- # LED OFF
- set *(unsigned char *)($sfrbase + 0x1085) = 0x00
-end
-document port_init
- P5=LED(output), P6.b4=LAN_RESET(output)
-end
-
-# Initialize SDRAM controller for Mappi
-define sdram_init
- # SDIR0
- set *(unsigned long *)0x00ef6008 = 0x00000182
- # SDIR1
- set *(unsigned long *)0x00ef600c = 0x00000001
- # Initialize wait
- shell sleep 0.1
- # Ch0-MOD
- set *(unsigned long *)0x00ef602c = 0x00000020
- # Ch0-TR
- set *(unsigned long *)0x00ef6028 = 0x00010002
- # Ch0-ADR
- set *(unsigned long *)0x00ef6020 = 0x08000004
- # AutoRef On
- set *(unsigned long *)0x00ef6004 = 0x00010107
- # Access enable
- set *(unsigned long *)0x00ef6024 = 0x00000001
-end
-document sdram_init
- Mappi SDRAM controller initialization
- 0x08000000 - 0x0bffffff (64MB)
-end
-
-# Initialize LAN controller for Mappi
-define lanc_init
- set $sfrbase = 0x00ef0000
- # Set BSEL3 (BSEL3 for the Chaos's bselc)
-# set *(unsigned long *)($sfrbase + 0x5300) = 0x01018040
-# set *(unsigned long *)($sfrbase + 0x5304) = 0x01011101
- set *(unsigned long *)($sfrbase + 0x5300) = 0x04048000
- set *(unsigned long *)($sfrbase + 0x5304) = 0x01011103
- set *(unsigned long *)($sfrbase + 0x5308) = 0x00000001
- # Reset (P5=LED,P6.b4=LAN_RESET)
- set *(unsigned short *)($sfrbase + 0x106c) = 0x0000
- set *(unsigned char *)($sfrbase + 0x1016) = 0xff
- set *(unsigned char *)($sfrbase + 0x1086) = 0xff
- shell sleep 0.1
-# set *(unsigned char *)($sfrbase + 0x1086) = 0x00
- set *(unsigned char *)($sfrbase + 0x1086) = 0x04
- set *(unsigned long *)(0x0c000330) = 0xffffffff
- # Set mac address
- set $lanc = (void*)0x0c000300
- set *(unsigned long *)($lanc + 0x0000) = 0x00610010
- set *(unsigned long *)($lanc + 0x0004) = 0x00200030
- set *(unsigned long *)($lanc + 0x0008) = 0x00400050
- set *(unsigned long *)($lanc + 0x000c) = 0x00600007
-end
-document lanc_init
- Mappi LAN controller initialization
- ex.) MAC address: 10 20 30 40 50 60
-end
-
-# LCD & CRT dual-head setting (8bpp)
-define dispc_init
- set $sfrbase = 0x00ef0000
- # BSEL4 Dispc
- # 20MHz
-# set *(unsigned long *)($sfrbase + 0x5400) = 0x02028282
-# set *(unsigned long *)($sfrbase + 0x5404) = 0x00122202
- # 40MHz
- set *(unsigned long *)($sfrbase + 0x5400) = 0x04048000
- set *(unsigned long *)($sfrbase + 0x5404) = 0x00101103
-end
-
-# MMU enable
-define mmu_enable
- set $evb=0x88000000
- set *(unsigned long *)0xffff0024=1
-end
-
-# MMU disable
-define mmu_disable
- set $evb=0
- set *(unsigned long *)0xffff0024=0
-end
-
-# Show TLB entries
-define show_tlb_entries
- set $i = 0
- set $addr = $arg0
- use_mon_code
- while ($i < 0d32 )
- set $tlb_tag = *(unsigned long*)$addr
- set $tlb_data = *(unsigned long*)($addr + 4)
- printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx\n", $i, $addr, $tlb_tag, $tlb_data
- set $i = $i + 1
- set $addr = $addr + 8
- end
- use_debug_dma
-end
-define itlb
- set $itlb=0xfe000000
- show_tlb_entries $itlb
-end
-define dtlb
- set $dtlb=0xfe000800
- show_tlb_entries $dtlb
-end
-
-
-# Show current task structure
-define show_current
- set $current = $spi & 0xffffe000
- printf "$current=0x%08lX\n",$current
- print *(struct task_struct *)$current
-end
-
-# Show user assigned task structure
-define show_task
- set $task = $arg0 & 0xffffe000
- printf "$task=0x%08lX\n",$task
- print *(struct task_struct *)$task
-end
-document show_task
- Show user assigned task structure
- arg0 : task structure address
-end
-
-# Show M32R registers
-define show_regs
- printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
- printf " R4[0x%08lX] R5[0x%08lX] R6[0x%08lX] R7[0x%08lX]\n",$r4,$r5,$r6,$r7
- printf " R8[0x%08lX] R9[0x%08lX] R10[0x%08lX] R11[0x%08lX]\n",$r8,$r9,$r10,$r11
- printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$fp
- printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
- printf "BPC[0x%08lX] PC[0x%08lX] ACCL[0x%08lX] ACCH[0x%08lX]\n",$bpc,$pc,$accl,$acch
- printf "EVB[0x%08lX]\n",$evb
-end
-
-
-# Setup all
-define setup
- use_mon_code
- set *(unsigned int)0xfffffffc=0x60
- shell sleep 0.1
-# clock_init_on_1411
- clock_init_on_1421
-# clock_init_on_1821
-# clock_init_on_1841
-# clock_init_on_11681
-# clock_init_off
- shell sleep 0.1
- port_init
- sdram_init
- lanc_init
- dispc_init
- set $evb=0x08000000
-end
-
-# Load modules
-define load_modules
- use_debug_dma
- load
-# load ramdisk_082a0000.mot
-# load romfs_082a0000.mot
-# use_mon_code
-end
-
-# Set kernel parameters
-define set_kernel_parameters
- set $param = (void*)0x08001000
- # INITRD_START
-# set *(unsigned long *)($param + 0x0010) = 0x082a0000
- # INITRD_SIZE
-# set *(unsigned long *)($param + 0x0014) = 0x00000000
- # M32R_CPUCLK
- set *(unsigned long *)($param + 0x0018) = 0d160000000
-# set *(unsigned long *)($param + 0x0018) = 0d80000000
-# set *(unsigned long *)($param + 0x0018) = 0d40000000
- # M32R_BUSCLK
- set *(unsigned long *)($param + 0x001c) = 0d40000000
-
- # M32R_TIMER_DIVIDE
- set *(unsigned long *)($param + 0x0020) = 0d128
-
- set {char[0x200]}($param + 0x100) = "console=tty1 console=ttyS0,115200n8x root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/root.x nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 \0"
-# set {char[0x200]}($param + 0x100) = "console=tty1 root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/root.x nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 \0"
-end
-
-# Boot
-define boot
- set_kernel_parameters
- set $pc=0x08002000
- set *(unsigned char *)0x08001003=0x03
- si
- c
-end
-
-# Set breakpoints
-define set_breakpoints
- b *0x08000030
-end
-
-## Boot MP
-define boot_mp
- set_kernel_parameters
- set *(unsigned long *)0x00f00000 = boot - 0x80000000
- set *(unsigned long *)0x00eff2f8 = 0x2
- x 0x00eff2f8
-
- set $pc=0x08002000
- si
- c
-end
-document boot_mp
- Boot BSP
-end
-
-## Boot UP
-define boot_up
- set_kernel_parameters
- set $pc=0x08002000
- si
- c
-end
-document boot_up
- Boot BSP
-end
-
-# Restart
-define restart
- sdireset
- sdireset
- setup
- load_modules
- boot_mp
-end
-
-sdireset
-sdireset
-file vmlinux
-target m32rsdi
-setup
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0
-/*
- * linux/arch/m32r/platforms/mappi/io.c
- *
- * Typical I/O routines for Mappi board.
- *
- * Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
- * Hitoshi Yamamoto
- */
-
-#include <asm/m32r.h>
-#include <asm/page.h>
-#include <asm/io.h>
-#include <asm/byteorder.h>
-
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC)
-#include <linux/types.h>
-
-#define M32R_PCC_IOMAP_SIZE 0x1000
-
-#define M32R_PCC_IOSTART0 0x1000
-#define M32R_PCC_IOEND0 (M32R_PCC_IOSTART0 + M32R_PCC_IOMAP_SIZE - 1)
-#define M32R_PCC_IOSTART1 0x2000
-#define M32R_PCC_IOEND1 (M32R_PCC_IOSTART1 + M32R_PCC_IOMAP_SIZE - 1)
-
-extern void pcc_ioread(int, unsigned long, void *, size_t, size_t, int);
-extern void pcc_iowrite(int, unsigned long, void *, size_t, size_t, int);
-#endif /* CONFIG_PCMCIA && CONFIG_M32R_PCC */
-
-#define PORT2ADDR(port) _port2addr(port)
-
-static inline void *_port2addr(unsigned long port)
-{
- return (void *)(port | NONCACHE_OFFSET);
-}
-
-static inline void *_port2addr_ne(unsigned long port)
-{
- return (void *)((port<<1) + NONCACHE_OFFSET + 0x0C000000);
-}
-
-static inline void delay(void)
-{
- __asm__ __volatile__ ("push r0; \n\t pop r0;" : : :"memory");
-}
-
-/*
- * NIC I/O function
- */
-
-#define PORT2ADDR_NE(port) _port2addr_ne(port)
-
-static inline unsigned char _ne_inb(void *portp)
-{
- return (unsigned char) *(volatile unsigned short *)portp;
-}
-
-static inline unsigned short _ne_inw(void *portp)
-{
- unsigned short tmp;
-
- tmp = *(volatile unsigned short *)portp;
- return le16_to_cpu(tmp);
-}
-
-static inline void _ne_outb(unsigned char b, void *portp)
-{
- *(volatile unsigned short *)portp = (unsigned short)b;
-}
-
-static inline void _ne_outw(unsigned short w, void *portp)
-{
- *(volatile unsigned short *)portp = cpu_to_le16(w);
-}
-
-unsigned char _inb(unsigned long port)
-{
- if (port >= 0x300 && port < 0x320)
- return _ne_inb(PORT2ADDR_NE(port));
- else
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC)
- if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- unsigned char b;
- pcc_ioread(0, port, &b, sizeof(b), 1, 0);
- return b;
- } else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) {
- unsigned char b;
- pcc_ioread(1, port, &b, sizeof(b), 1, 0);
- return b;
- } else
-#endif
-
- return *(volatile unsigned char *)PORT2ADDR(port);
-}
-
-unsigned short _inw(unsigned long port)
-{
- if (port >= 0x300 && port < 0x320)
- return _ne_inw(PORT2ADDR_NE(port));
- else
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC)
- if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- unsigned short w;
- pcc_ioread(0, port, &w, sizeof(w), 1, 0);
- return w;
- } else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) {
- unsigned short w;
- pcc_ioread(1, port, &w, sizeof(w), 1, 0);
- return w;
- } else
-#endif
- return *(volatile unsigned short *)PORT2ADDR(port);
-}
-
-unsigned long _inl(unsigned long port)
-{
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC)
- if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- unsigned long l;
- pcc_ioread(0, port, &l, sizeof(l), 1, 0);
- return l;
- } else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) {
- unsigned short l;
- pcc_ioread(1, port, &l, sizeof(l), 1, 0);
- return l;
- } else
-#endif
- return *(volatile unsigned long *)PORT2ADDR(port);
-}
-
-unsigned char _inb_p(unsigned long port)
-{
- unsigned char v = _inb(port);
- delay();
- return (v);
-}
-
-unsigned short _inw_p(unsigned long port)
-{
- unsigned short v = _inw(port);
- delay();
- return (v);
-}
-
-unsigned long _inl_p(unsigned long port)
-{
- unsigned long v = _inl(port);
- delay();
- return (v);
-}
-
-void _outb(unsigned char b, unsigned long port)
-{
- if (port >= 0x300 && port < 0x320)
- _ne_outb(b, PORT2ADDR_NE(port));
- else
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC)
- if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- pcc_iowrite(0, port, &b, sizeof(b), 1, 0);
- } else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) {
- pcc_iowrite(1, port, &b, sizeof(b), 1, 0);
- } else
-#endif
- *(volatile unsigned char *)PORT2ADDR(port) = b;
-}
-
-void _outw(unsigned short w, unsigned long port)
-{
- if (port >= 0x300 && port < 0x320)
- _ne_outw(w, PORT2ADDR_NE(port));
- else
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC)
- if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- pcc_iowrite(0, port, &w, sizeof(w), 1, 0);
- } else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) {
- pcc_iowrite(1, port, &w, sizeof(w), 1, 0);
- } else
-#endif
- *(volatile unsigned short *)PORT2ADDR(port) = w;
-}
-
-void _outl(unsigned long l, unsigned long port)
-{
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC)
- if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- pcc_iowrite(0, port, &l, sizeof(l), 1, 0);
- } else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) {
- pcc_iowrite(1, port, &l, sizeof(l), 1, 0);
- } else
-#endif
- *(volatile unsigned long *)PORT2ADDR(port) = l;
-}
-
-void _outb_p(unsigned char b, unsigned long port)
-{
- _outb(b, port);
- delay();
-}
-
-void _outw_p(unsigned short w, unsigned long port)
-{
- _outw(w, port);
- delay();
-}
-
-void _outl_p(unsigned long l, unsigned long port)
-{
- _outl(l, port);
- delay();
-}
-
-void _insb(unsigned int port, void *addr, unsigned long count)
-{
- unsigned short *buf = addr;
- unsigned short *portp;
-
- if (port >= 0x300 && port < 0x320){
- portp = PORT2ADDR_NE(port);
- while (count--)
- *buf++ = *(volatile unsigned char *)portp;
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC)
- } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- pcc_ioread(0, port, (void *)addr, sizeof(unsigned char),
- count, 1);
- } else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) {
- pcc_ioread(1, port, (void *)addr, sizeof(unsigned char),
- count, 1);
-#endif
- } else {
- portp = PORT2ADDR(port);
- while (count--)
- *buf++ = *(volatile unsigned char *)portp;
- }
-}
-
-void _insw(unsigned int port, void *addr, unsigned long count)
-{
- unsigned short *buf = addr;
- unsigned short *portp;
-
- if (port >= 0x300 && port < 0x320) {
- portp = PORT2ADDR_NE(port);
- while (count--)
- *buf++ = _ne_inw(portp);
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC)
- } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- pcc_ioread(0, port, (void *)addr, sizeof(unsigned short),
- count, 1);
- } else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) {
- pcc_ioread(1, port, (void *)addr, sizeof(unsigned short),
- count, 1);
-#endif
- } else {
- portp = PORT2ADDR(port);
- while (count--)
- *buf++ = *(volatile unsigned short *)portp;
- }
-}
-
-void _insl(unsigned int port, void *addr, unsigned long count)
-{
- unsigned long *buf = addr;
- unsigned long *portp;
-
- portp = PORT2ADDR(port);
- while (count--)
- *buf++ = *(volatile unsigned long *)portp;
-}
-
-void _outsb(unsigned int port, const void *addr, unsigned long count)
-{
- const unsigned char *buf = addr;
- unsigned char *portp;
-
- if (port >= 0x300 && port < 0x320) {
- portp = PORT2ADDR_NE(port);
- while (count--)
- _ne_outb(*buf++, portp);
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC)
- } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- pcc_iowrite(0, port, (void *)addr, sizeof(unsigned char),
- count, 1);
- } else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) {
- pcc_iowrite(1, port, (void *)addr, sizeof(unsigned char),
- count, 1);
-#endif
- } else {
- portp = PORT2ADDR(port);
- while (count--)
- *(volatile unsigned char *)portp = *buf++;
- }
-}
-
-void _outsw(unsigned int port, const void *addr, unsigned long count)
-{
- const unsigned short *buf = addr;
- unsigned short *portp;
-
- if (port >= 0x300 && port < 0x320) {
- portp = PORT2ADDR_NE(port);
- while (count--)
- _ne_outw(*buf++, portp);
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_PCC)
- } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- pcc_iowrite(0, port, (void *)addr, sizeof(unsigned short),
- count, 1);
- } else if (port >= M32R_PCC_IOSTART1 && port <= M32R_PCC_IOEND1) {
- pcc_iowrite(1, port, (void *)addr, sizeof(unsigned short),
- count, 1);
-#endif
- } else {
- portp = PORT2ADDR(port);
- while (count--)
- *(volatile unsigned short *)portp = *buf++;
- }
-}
-
-void _outsl(unsigned int port, const void *addr, unsigned long count)
-{
- const unsigned long *buf = addr;
- unsigned char *portp;
-
- portp = PORT2ADDR(port);
- while (count--)
- *(volatile unsigned long *)portp = *buf++;
-}
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0
-/*
- * linux/arch/m32r/platforms/mappi/setup.c
- *
- * Setup routines for Renesas MAPPI Board
- *
- * Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
- * Hitoshi Yamamoto
- */
-
-#include <linux/irq.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-
-#include <asm/m32r.h>
-#include <asm/io.h>
-
-#define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
-
-icu_data_t icu_data[NR_IRQS];
-
-static void disable_mappi_irq(unsigned int irq)
-{
- unsigned long port, data;
-
- port = irq2port(irq);
- data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7;
- outl(data, port);
-}
-
-static void enable_mappi_irq(unsigned int irq)
-{
- unsigned long port, data;
-
- port = irq2port(irq);
- data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6;
- outl(data, port);
-}
-
-static void mask_mappi(struct irq_data *data)
-{
- disable_mappi_irq(data->irq);
-}
-
-static void unmask_mappi(struct irq_data *data)
-{
- enable_mappi_irq(data->irq);
-}
-
-static void shutdown_mappi(struct irq_data *data)
-{
- unsigned long port;
-
- port = irq2port(data->irq);
- outl(M32R_ICUCR_ILEVEL7, port);
-}
-
-static struct irq_chip mappi_irq_type =
-{
- .name = "MAPPI-IRQ",
- .irq_shutdown = shutdown_mappi,
- .irq_mask = mask_mappi,
- .irq_unmask = unmask_mappi,
-};
-
-void __init init_IRQ(void)
-{
- static int once = 0;
-
- if (once)
- return;
- else
- once++;
-
-#ifdef CONFIG_NE2000
- /* INT0 : LAN controller (RTL8019AS) */
- irq_set_chip_and_handler(M32R_IRQ_INT0, &mappi_irq_type,
- handle_level_irq);
- icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD11;
- disable_mappi_irq(M32R_IRQ_INT0);
-#endif /* CONFIG_M32R_NE2000 */
-
- /* MFT2 : system timer */
- irq_set_chip_and_handler(M32R_IRQ_MFT2, &mappi_irq_type,
- handle_level_irq);
- icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
- disable_mappi_irq(M32R_IRQ_MFT2);
-
-#ifdef CONFIG_SERIAL_M32R_SIO
- /* SIO0_R : uart receive data */
- irq_set_chip_and_handler(M32R_IRQ_SIO0_R, &mappi_irq_type,
- handle_level_irq);
- icu_data[M32R_IRQ_SIO0_R].icucr = 0;
- disable_mappi_irq(M32R_IRQ_SIO0_R);
-
- /* SIO0_S : uart send data */
- irq_set_chip_and_handler(M32R_IRQ_SIO0_S, &mappi_irq_type,
- handle_level_irq);
- icu_data[M32R_IRQ_SIO0_S].icucr = 0;
- disable_mappi_irq(M32R_IRQ_SIO0_S);
-
- /* SIO1_R : uart receive data */
- irq_set_chip_and_handler(M32R_IRQ_SIO1_R, &mappi_irq_type,
- handle_level_irq);
- icu_data[M32R_IRQ_SIO1_R].icucr = 0;
- disable_mappi_irq(M32R_IRQ_SIO1_R);
-
- /* SIO1_S : uart send data */
- irq_set_chip_and_handler(M32R_IRQ_SIO1_S, &mappi_irq_type,
- handle_level_irq);
- icu_data[M32R_IRQ_SIO1_S].icucr = 0;
- disable_mappi_irq(M32R_IRQ_SIO1_S);
-#endif /* CONFIG_SERIAL_M32R_SIO */
-
-#if defined(CONFIG_M32R_PCC)
- /* INT1 : pccard0 interrupt */
- irq_set_chip_and_handler(M32R_IRQ_INT1, &mappi_irq_type,
- handle_level_irq);
- icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00;
- disable_mappi_irq(M32R_IRQ_INT1);
-
- /* INT2 : pccard1 interrupt */
- irq_set_chip_and_handler(M32R_IRQ_INT2, &mappi_irq_type,
- handle_level_irq);
- icu_data[M32R_IRQ_INT2].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00;
- disable_mappi_irq(M32R_IRQ_INT2);
-#endif /* CONFIG_M32RPCC */
-}
-
-#if defined(CONFIG_FB_S1D13XXX)
-
-#include <video/s1d13xxxfb.h>
-#include <asm/s1d13806.h>
-
-static struct s1d13xxxfb_pdata s1d13xxxfb_data = {
- .initregs = s1d13xxxfb_initregs,
- .initregssize = ARRAY_SIZE(s1d13xxxfb_initregs),
- .platform_init_video = NULL,
-#ifdef CONFIG_PM
- .platform_suspend_video = NULL,
- .platform_resume_video = NULL,
-#endif
-};
-
-static struct resource s1d13xxxfb_resources[] = {
- [0] = {
- .start = 0x10200000UL,
- .end = 0x1033FFFFUL,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = 0x10000000UL,
- .end = 0x100001FFUL,
- .flags = IORESOURCE_MEM,
- }
-};
-
-static struct platform_device s1d13xxxfb_device = {
- .name = S1D_DEVICENAME,
- .id = 0,
- .dev = {
- .platform_data = &s1d13xxxfb_data,
- },
- .num_resources = ARRAY_SIZE(s1d13xxxfb_resources),
- .resource = s1d13xxxfb_resources,
-};
-
-static int __init platform_init(void)
-{
- platform_device_register(&s1d13xxxfb_device);
- return 0;
-}
-arch_initcall(platform_init);
-#endif
+++ /dev/null
-obj-y := setup.o io.o
+++ /dev/null
-# .gdbinit file
-# $Id: dot.gdbinit.vdec2,v 1.2 2004/11/11 02:03:15 takata Exp $
-
-# setting
-set width 0d70
-set radix 0d16
-use_debug_dma
-
-# Initialize SDRAM controller for Mappi
-define sdram_init
- # SDIR0
- set *(unsigned long *)0x00ef6008=0x00000182
- # SDIR1
- set *(unsigned long *)0x00ef600c=0x00000001
- # Initialize wait
- shell sleep 1
- # Ch0-MOD
- set *(unsigned long *)0x00ef602c=0x00000020
- # Ch0-TR
- set *(unsigned long *)0x00ef6028=0x00041302
- # Ch0-ADR
- set *(unsigned long *)0x00ef6020=0x08000004
- # AutoRef On
- set *(unsigned long *)0x00ef6004=0x00010705
- # Access enable
- set *(unsigned long *)0x00ef6024=0x00000001
-end
-document sdram_init
- Mappi SDRAM controller initialization
- 0x08000000 - 0x0bffffff (64MB)
-end
-
-# Initialize SDRAM controller for Mappi
-define sdram_init2
- # SDIR0
- set *(unsigned long *)0x00ef6008=0x00000182
- # Ch0-MOD
- set *(unsigned long *)0x00ef602c=0x00000020
- # Ch0-TR
- set *(unsigned long *)0x00ef6028=0x00010002
- # Ch0-ADR
- set *(unsigned long *)0x00ef6020=0x08000004
- # AutoRef On
- set *(unsigned long *)0x00ef6004=0x00010107
- # SDIR1
- set *(unsigned long *)0x00ef600c=0x00000001
- # Initialize wait
- shell sleep 1
- # Access enable
- set *(unsigned long *)0x00ef6024=0x00000001
- shell sleep 1
-end
-document sdram_init
- Mappi SDRAM controller initialization
- 0x08000000 - 0x0bffffff (64MB)
-end
-
-# Initialize LAN controller for Mappi
-define lanc_init
- # Set BSEL1 (BSEL3 for the Chaos's bselc)
- #set *(unsigned long *)0x00ef5004 = 0x0fff330f
- #set *(unsigned long *)0x00ef5004 = 0x01113301
-
-# set *(unsigned long *)0x00ef5004 = 0x02011101
-# set *(unsigned long *)0x00ef5004 = 0x04441104
-
- # BSEL5
-# set *(unsigned long *)0x00ef5014 = 0x0ccc310c
-# set *(unsigned long *)0x00ef5014 = 0x0303310f
-# set *(unsigned long *)0x00ef5014 = 0x01011102 -> NG
-# set *(unsigned long *)0x00ef5014 = 0x03033103
-
- set *(unsigned long *)0x00ef500c = 0x0b0b1304
- set *(unsigned long *)0x00ef5010 = 0x03033302
-# set *(unsigned long *)0x00ef5018 = 0x02223302
-end
-
-# MMU enable
-define mmu_enable
- set $evb=0x88000000
- set *(unsigned long *)0xffff0024=1
-end
-
-# MMU disable
-define mmu_disable
- set $evb=0
- set *(unsigned long *)0xffff0024=0
-end
-
-# Show TLB entries
-define show_tlb_entries
- set $i = 0
- set $addr = $arg0
- while ($i < 0d16 )
- set $tlb_tag = *(unsigned long*)$addr
- set $tlb_data = *(unsigned long*)($addr + 4)
- printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx\n", $i, $addr, $tlb_tag, $tlb_data
- set $i = $i + 1
- set $addr = $addr + 8
- end
-end
-define itlb
- set $itlb=0xfe000000
- show_tlb_entries $itlb
-end
-define dtlb
- set $dtlb=0xfe000800
- show_tlb_entries $dtlb
-end
-
-# Cache ON
-define set_cache_type
- set $mctype = (void*)0xfffffff8
-# chaos
-# set *(unsigned long *)($mctype) = 0x0000c000
-# m32102 i-cache only
- set *(unsigned long *)($mctype) = 0x00008000
-# m32102 d-cache only
-# set *(unsigned long *)($mctype) = 0x00004000
-end
-define cache_on
- set $param = (void*)0x08001000
- set *(unsigned long *)($param) = 0x60ff6102
-end
-
-
-# Show current task structure
-define show_current
- set $current = $spi & 0xffffe000
- printf "$current=0x%08lX\n",$current
- print *(struct task_struct *)$current
-end
-
-# Show user assigned task structure
-define show_task
- set $task = $arg0 & 0xffffe000
- printf "$task=0x%08lX\n",$task
- print *(struct task_struct *)$task
-end
-document show_task
- Show user assigned task structure
- arg0 : task structure address
-end
-
-# Show M32R registers
-define show_regs
- printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
- printf " R4[0x%08lX] R5[0x%08lX] R6[0x%08lX] R7[0x%08lX]\n",$r4,$r5,$r6,$r7
- printf " R8[0x%08lX] R9[0x%08lX] R10[0x%08lX] R11[0x%08lX]\n",$r8,$r9,$r10,$r11
- printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$sp
- printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
- printf "BPC[0x%08lX] PC[0x%08lX] ACCL[0x%08lX] ACCH[0x%08lX]\n",$bpc,$pc,$accl,$acch
- printf "EVB[0x%08lX]\n",$evb
-
- set $mests = *(unsigned long *)0xffff000c
- set $mdeva = *(unsigned long *)0xffff0010
- printf "MESTS[0x%08lX] MDEVA[0x%08lX]\n",$mests,$mdeva
-end
-
-
-# Setup all
-define setup
- sdram_init
-# lanc_init
-# dispc_init
-# set $evb=0x08000000
-end
-
-# Load modules
-define load_modules
- use_debug_dma
- load
-# load busybox.mot
-end
-
-# Set kernel parameters
-define set_kernel_parameters
- set $param = (void*)0x08001000
-
- ## MOUNT_ROOT_RDONLY
- set {long}($param+0x00)=0
- ## RAMDISK_FLAGS
- #set {long}($param+0x04)=0
- ## ORIG_ROOT_DEV
- #set {long}($param+0x08)=0x00000100
- ## LOADER_TYPE
- #set {long}($param+0x0C)=0
- ## INITRD_START
- set {long}($param+0x10)=0x082a0000
- ## INITRD_SIZE
- set {long}($param+0x14)=0d6200000
-
- # M32R_CPUCLK
- set *(unsigned long *)($param + 0x0018) = 0d25000000
- # M32R_BUSCLK
- set *(unsigned long *)($param + 0x001c) = 0d25000000
- # M32R_TIMER_DIVIDE
- set *(unsigned long *)($param + 0x0020) = 0d128
-
-
- set {char[0x200]}($param + 0x100) = "console=ttyS0,115200n8x root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/root.2.6 nfsaddrs=192.168.0.102:192.168.0.1:192.168.0.1:255.255.255.0:mappi: \0"
-
-
-end
-
-# Boot
-define boot
- set_kernel_parameters
- debug_chaos
- set $pc=0x08002000
- set $fp=0
- del b
- si
-end
-
-# Restart
-define restart
- sdireset
- sdireset
- setup
- load_modules
- boot
-end
-
-sdireset
-sdireset
-file vmlinux
-target m32rsdi
-
-restart
-boot
-
-
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0
-/*
- * linux/arch/m32r/platforms/mappi2/io.c
- *
- * Typical I/O routines for Mappi2 board.
- *
- * Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
- * Hitoshi Yamamoto, Mamoru Sakugawa
- */
-
-#include <asm/m32r.h>
-#include <asm/page.h>
-#include <asm/io.h>
-#include <asm/byteorder.h>
-
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
-#include <linux/types.h>
-
-#define M32R_PCC_IOMAP_SIZE 0x1000
-
-#define M32R_PCC_IOSTART0 0x1000
-#define M32R_PCC_IOEND0 (M32R_PCC_IOSTART0 + M32R_PCC_IOMAP_SIZE - 1)
-
-extern void pcc_ioread_byte(int, unsigned long, void *, size_t, size_t, int);
-extern void pcc_ioread_word(int, unsigned long, void *, size_t, size_t, int);
-extern void pcc_iowrite_byte(int, unsigned long, void *, size_t, size_t, int);
-extern void pcc_iowrite_word(int, unsigned long, void *, size_t, size_t, int);
-#endif /* CONFIG_PCMCIA && CONFIG_M32R_CFC */
-
-#define PORT2ADDR(port) _port2addr(port)
-#define PORT2ADDR_NE(port) _port2addr_ne(port)
-#define PORT2ADDR_USB(port) _port2addr_usb(port)
-
-static inline void *_port2addr(unsigned long port)
-{
- return (void *)(port | NONCACHE_OFFSET);
-}
-
-#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
-static inline void *__port2addr_ata(unsigned long port)
-{
- static int dummy_reg;
-
- switch (port) {
- case 0x1f0: return (void *)(0x0c002000 | NONCACHE_OFFSET);
- case 0x1f1: return (void *)(0x0c012800 | NONCACHE_OFFSET);
- case 0x1f2: return (void *)(0x0c012002 | NONCACHE_OFFSET);
- case 0x1f3: return (void *)(0x0c012802 | NONCACHE_OFFSET);
- case 0x1f4: return (void *)(0x0c012004 | NONCACHE_OFFSET);
- case 0x1f5: return (void *)(0x0c012804 | NONCACHE_OFFSET);
- case 0x1f6: return (void *)(0x0c012006 | NONCACHE_OFFSET);
- case 0x1f7: return (void *)(0x0c012806 | NONCACHE_OFFSET);
- case 0x3f6: return (void *)(0x0c01200e | NONCACHE_OFFSET);
- default: return (void *)&dummy_reg;
- }
-}
-#endif
-
-#define LAN_IOSTART (0x300 | NONCACHE_OFFSET)
-#define LAN_IOEND (0x320 | NONCACHE_OFFSET)
-#ifdef CONFIG_CHIP_OPSP
-static inline void *_port2addr_ne(unsigned long port)
-{
- return (void *)(port + 0x10000000);
-}
-#else
-static inline void *_port2addr_ne(unsigned long port)
-{
- return (void *)(port + 0x04000000);
-}
-#endif
-static inline void *_port2addr_usb(unsigned long port)
-{
- return (void *)(port + NONCACHE_OFFSET + 0x14000000);
-}
-static inline void delay(void)
-{
- __asm__ __volatile__ ("push r0; \n\t pop r0;" : : :"memory");
-}
-
-/*
- * NIC I/O function
- */
-
-static inline unsigned char _ne_inb(void *portp)
-{
- return (unsigned char) *(volatile unsigned char *)portp;
-}
-
-static inline unsigned short _ne_inw(void *portp)
-{
- return (unsigned short)le16_to_cpu(*(volatile unsigned short *)portp);
-}
-
-static inline void _ne_insb(void *portp, void * addr, unsigned long count)
-{
- unsigned char *buf = addr;
-
- while (count--)
- *buf++ = *(volatile unsigned char *)portp;
-}
-
-static inline void _ne_outb(unsigned char b, void *portp)
-{
- *(volatile unsigned char *)portp = (unsigned char)b;
-}
-
-static inline void _ne_outw(unsigned short w, void *portp)
-{
- *(volatile unsigned short *)portp = cpu_to_le16(w);
-}
-
-unsigned char _inb(unsigned long port)
-{
- if (port >= LAN_IOSTART && port < LAN_IOEND)
- return _ne_inb(PORT2ADDR_NE(port));
-#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
- else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
- return *(volatile unsigned char *)__port2addr_ata(port);
- }
-#endif
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
- else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- unsigned char b;
- pcc_ioread_byte(0, port, &b, sizeof(b), 1, 0);
- return b;
- } else
-#endif
-
- return *(volatile unsigned char *)PORT2ADDR(port);
-}
-
-unsigned short _inw(unsigned long port)
-{
- if (port >= LAN_IOSTART && port < LAN_IOEND)
- return _ne_inw(PORT2ADDR_NE(port));
-#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
- else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
- return *(volatile unsigned short *)__port2addr_ata(port);
- }
-#endif
-#if defined(CONFIG_USB)
- else if (port >= 0x340 && port < 0x3a0)
- return *(volatile unsigned short *)PORT2ADDR_USB(port);
-#endif
-
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
- else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- unsigned short w;
- pcc_ioread_word(0, port, &w, sizeof(w), 1, 0);
- return w;
- } else
-#endif
- return *(volatile unsigned short *)PORT2ADDR(port);
-}
-
-unsigned long _inl(unsigned long port)
-{
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
- if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- unsigned long l;
- pcc_ioread_word(0, port, &l, sizeof(l), 1, 0);
- return l;
- } else
-#endif
- return *(volatile unsigned long *)PORT2ADDR(port);
-}
-
-unsigned char _inb_p(unsigned long port)
-{
- unsigned char v = _inb(port);
- delay();
- return (v);
-}
-
-unsigned short _inw_p(unsigned long port)
-{
- unsigned short v = _inw(port);
- delay();
- return (v);
-}
-
-unsigned long _inl_p(unsigned long port)
-{
- unsigned long v = _inl(port);
- delay();
- return (v);
-}
-
-void _outb(unsigned char b, unsigned long port)
-{
- if (port >= LAN_IOSTART && port < LAN_IOEND)
- _ne_outb(b, PORT2ADDR_NE(port));
- else
-#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
- if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
- *(volatile unsigned char *)__port2addr_ata(port) = b;
- } else
-#endif
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
- if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- pcc_iowrite_byte(0, port, &b, sizeof(b), 1, 0);
- } else
-#endif
- *(volatile unsigned char *)PORT2ADDR(port) = b;
-}
-
-void _outw(unsigned short w, unsigned long port)
-{
- if (port >= LAN_IOSTART && port < LAN_IOEND)
- _ne_outw(w, PORT2ADDR_NE(port));
- else
-#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
- if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
- *(volatile unsigned short *)__port2addr_ata(port) = w;
- } else
-#endif
-#if defined(CONFIG_USB)
- if (port >= 0x340 && port < 0x3a0)
- *(volatile unsigned short *)PORT2ADDR_USB(port) = w;
- else
-#endif
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
- if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- pcc_iowrite_word(0, port, &w, sizeof(w), 1, 0);
- } else
-#endif
- *(volatile unsigned short *)PORT2ADDR(port) = w;
-}
-
-void _outl(unsigned long l, unsigned long port)
-{
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
- if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- pcc_iowrite_word(0, port, &l, sizeof(l), 1, 0);
- } else
-#endif
- *(volatile unsigned long *)PORT2ADDR(port) = l;
-}
-
-void _outb_p(unsigned char b, unsigned long port)
-{
- _outb(b, port);
- delay();
-}
-
-void _outw_p(unsigned short w, unsigned long port)
-{
- _outw(w, port);
- delay();
-}
-
-void _outl_p(unsigned long l, unsigned long port)
-{
- _outl(l, port);
- delay();
-}
-
-void _insb(unsigned int port, void * addr, unsigned long count)
-{
- if (port >= LAN_IOSTART && port < LAN_IOEND)
- _ne_insb(PORT2ADDR_NE(port), addr, count);
-#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
- else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
- unsigned char *buf = addr;
- unsigned char *portp = __port2addr_ata(port);
- while (count--)
- *buf++ = *(volatile unsigned char *)portp;
- }
-#endif
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
- else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- pcc_ioread_byte(0, port, (void *)addr, sizeof(unsigned char),
- count, 1);
- }
-#endif
- else {
- unsigned char *buf = addr;
- unsigned char *portp = PORT2ADDR(port);
- while (count--)
- *buf++ = *(volatile unsigned char *)portp;
- }
-}
-
-void _insw(unsigned int port, void * addr, unsigned long count)
-{
- unsigned short *buf = addr;
- unsigned short *portp;
-
- if (port >= LAN_IOSTART && port < LAN_IOEND) {
- portp = PORT2ADDR_NE(port);
- while (count--)
- *buf++ = *(volatile unsigned short *)portp;
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
- } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- pcc_ioread_word(9, port, (void *)addr, sizeof(unsigned short),
- count, 1);
-#endif
-#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
- } else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
- portp = __port2addr_ata(port);
- while (count--)
- *buf++ = *(volatile unsigned short *)portp;
-#endif
- } else {
- portp = PORT2ADDR(port);
- while (count--)
- *buf++ = *(volatile unsigned short *)portp;
- }
-}
-
-void _insl(unsigned int port, void * addr, unsigned long count)
-{
- unsigned long *buf = addr;
- unsigned long *portp;
-
- portp = PORT2ADDR(port);
- while (count--)
- *buf++ = *(volatile unsigned long *)portp;
-}
-
-void _outsb(unsigned int port, const void * addr, unsigned long count)
-{
- const unsigned char *buf = addr;
- unsigned char *portp;
-
- if (port >= LAN_IOSTART && port < LAN_IOEND) {
- portp = PORT2ADDR_NE(port);
- while (count--)
- _ne_outb(*buf++, portp);
-#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
- } else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
- portp = __port2addr_ata(port);
- while (count--)
- *(volatile unsigned char *)portp = *buf++;
-#endif
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
- } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- pcc_iowrite_byte(0, port, (void *)addr, sizeof(unsigned char),
- count, 1);
-#endif
- } else {
- portp = PORT2ADDR(port);
- while (count--)
- *(volatile unsigned char *)portp = *buf++;
- }
-}
-
-void _outsw(unsigned int port, const void * addr, unsigned long count)
-{
- const unsigned short *buf = addr;
- unsigned short *portp;
-
- if (port >= LAN_IOSTART && port < LAN_IOEND) {
- portp = PORT2ADDR_NE(port);
- while (count--)
- *(volatile unsigned short *)portp = *buf++;
-#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
- } else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
- portp = __port2addr_ata(port);
- while (count--)
- *(volatile unsigned short *)portp = *buf++;
-#endif
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
- } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- pcc_iowrite_word(9, port, (void *)addr, sizeof(unsigned short),
- count, 1);
-#endif
- } else {
- portp = PORT2ADDR(port);
- while (count--)
- *(volatile unsigned short *)portp = *buf++;
- }
-}
-
-void _outsl(unsigned int port, const void * addr, unsigned long count)
-{
- const unsigned long *buf = addr;
- unsigned char *portp;
-
- portp = PORT2ADDR(port);
- while (count--)
- *(volatile unsigned long *)portp = *buf++;
-}
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0
-/*
- * linux/arch/m32r/platforms/mappi2/setup.c
- *
- * Setup routines for Renesas MAPPI-II(M3A-ZA36) Board
- *
- * Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
- * Hitoshi Yamamoto, Mamoru Sakugawa
- */
-
-#include <linux/irq.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-
-#include <asm/m32r.h>
-#include <asm/io.h>
-
-#define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
-
-icu_data_t icu_data[NR_IRQS];
-
-static void disable_mappi2_irq(unsigned int irq)
-{
- unsigned long port, data;
-
- if ((irq == 0) ||(irq >= NR_IRQS)) {
- printk("bad irq 0x%08x\n", irq);
- return;
- }
- port = irq2port(irq);
- data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7;
- outl(data, port);
-}
-
-static void enable_mappi2_irq(unsigned int irq)
-{
- unsigned long port, data;
-
- if ((irq == 0) ||(irq >= NR_IRQS)) {
- printk("bad irq 0x%08x\n", irq);
- return;
- }
- port = irq2port(irq);
- data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6;
- outl(data, port);
-}
-
-static void mask_mappi2(struct irq_data *data)
-{
- disable_mappi2_irq(data->irq);
-}
-
-static void unmask_mappi2(struct irq_data *data)
-{
- enable_mappi2_irq(data->irq);
-}
-
-static void shutdown_mappi2(struct irq_data *data)
-{
- unsigned long port;
-
- port = irq2port(data->irq);
- outl(M32R_ICUCR_ILEVEL7, port);
-}
-
-static struct irq_chip mappi2_irq_type =
-{
- .name = "MAPPI2-IRQ",
- .irq_shutdown = shutdown_mappi2,
- .irq_mask = mask_mappi2,
- .irq_unmask = unmask_mappi2,
-};
-
-void __init init_IRQ(void)
-{
-#if defined(CONFIG_SMC91X)
- /* INT0 : LAN controller (SMC91111) */
- irq_set_chip_and_handler(M32R_IRQ_INT0, &mappi2_irq_type,
- handle_level_irq);
- icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
- disable_mappi2_irq(M32R_IRQ_INT0);
-#endif /* CONFIG_SMC91X */
-
- /* MFT2 : system timer */
- irq_set_chip_and_handler(M32R_IRQ_MFT2, &mappi2_irq_type,
- handle_level_irq);
- icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
- disable_mappi2_irq(M32R_IRQ_MFT2);
-
-#ifdef CONFIG_SERIAL_M32R_SIO
- /* SIO0_R : uart receive data */
- irq_set_chip_and_handler(M32R_IRQ_SIO0_R, &mappi2_irq_type,
- handle_level_irq);
- icu_data[M32R_IRQ_SIO0_R].icucr = 0;
- disable_mappi2_irq(M32R_IRQ_SIO0_R);
-
- /* SIO0_S : uart send data */
- irq_set_chip_and_handler(M32R_IRQ_SIO0_S, &mappi2_irq_type,
- handle_level_irq);
- icu_data[M32R_IRQ_SIO0_S].icucr = 0;
- disable_mappi2_irq(M32R_IRQ_SIO0_S);
- /* SIO1_R : uart receive data */
- irq_set_chip_and_handler(M32R_IRQ_SIO1_R, &mappi2_irq_type,
- handle_level_irq);
- icu_data[M32R_IRQ_SIO1_R].icucr = 0;
- disable_mappi2_irq(M32R_IRQ_SIO1_R);
-
- /* SIO1_S : uart send data */
- irq_set_chip_and_handler(M32R_IRQ_SIO1_S, &mappi2_irq_type,
- handle_level_irq);
- icu_data[M32R_IRQ_SIO1_S].icucr = 0;
- disable_mappi2_irq(M32R_IRQ_SIO1_S);
-#endif /* CONFIG_M32R_USE_DBG_CONSOLE */
-
-#if defined(CONFIG_USB)
- /* INT1 : USB Host controller interrupt */
- irq_set_chip_and_handler(M32R_IRQ_INT1, &mappi2_irq_type,
- handle_level_irq);
- icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01;
- disable_mappi2_irq(M32R_IRQ_INT1);
-#endif /* CONFIG_USB */
-
- /* ICUCR40: CFC IREQ */
- irq_set_chip_and_handler(PLD_IRQ_CFIREQ, &mappi2_irq_type,
- handle_level_irq);
- icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01;
- disable_mappi2_irq(PLD_IRQ_CFIREQ);
-
-#if defined(CONFIG_M32R_CFC)
- /* ICUCR41: CFC Insert */
- irq_set_chip_and_handler(PLD_IRQ_CFC_INSERT, &mappi2_irq_type,
- handle_level_irq);
- icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00;
- disable_mappi2_irq(PLD_IRQ_CFC_INSERT);
-
- /* ICUCR42: CFC Eject */
- irq_set_chip_and_handler(PLD_IRQ_CFC_EJECT, &mappi2_irq_type,
- handle_level_irq);
- icu_data[PLD_IRQ_CFC_EJECT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
- disable_mappi2_irq(PLD_IRQ_CFC_EJECT);
-#endif /* CONFIG_MAPPI2_CFC */
-}
-
-#define LAN_IOSTART 0x300
-#define LAN_IOEND 0x320
-static struct resource smc91x_resources[] = {
- [0] = {
- .start = (LAN_IOSTART),
- .end = (LAN_IOEND),
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = M32R_IRQ_INT0,
- .end = M32R_IRQ_INT0,
- .flags = IORESOURCE_IRQ,
- }
-};
-
-static struct platform_device smc91x_device = {
- .name = "smc91x",
- .id = 0,
- .num_resources = ARRAY_SIZE(smc91x_resources),
- .resource = smc91x_resources,
-};
-
-static int __init platform_init(void)
-{
- platform_device_register(&smc91x_device);
- return 0;
-}
-arch_initcall(platform_init);
+++ /dev/null
-obj-y := setup.o io.o
+++ /dev/null
-# .gdbinit file
-# $Id: dot.gdbinit,v 1.1 2005/04/11 02:21:08 sakugawa Exp $
-
-# setting
-set width 0d70
-set radix 0d16
-use_debug_dma
-
-# Initialize SDRAM controller for Mappi
-define sdram_init
- # SDIR0
- set *(unsigned long *)0x00ef6008 = 0x00000182
- # SDIR1
- set *(unsigned long *)0x00ef600c = 0x00000001
- # Initialize wait
- shell sleep 0.1
- # MOD
- set *(unsigned long *)0x00ef602c = 0x00000020
- set *(unsigned long *)0x00ef604c = 0x00000020
- # TR
- set *(unsigned long *)0x00ef6028 = 0x00051502
- set *(unsigned long *)0x00ef6048 = 0x00051502
- # ADR
- set *(unsigned long *)0x00ef6020 = 0x08000004
- set *(unsigned long *)0x00ef6040 = 0x0c000004
- # AutoRef On
- set *(unsigned long *)0x00ef6004 = 0x00010517
- # Access enable
- set *(unsigned long *)0x00ef6024 = 0x00000001
- set *(unsigned long *)0x00ef6044 = 0x00000001
-end
-
-# Initialize LAN controller for Mappi
-define lanc_init
- # Set BSEL4
- #set *(unsigned long *)0x00ef5004 = 0x0fff330f
- #set *(unsigned long *)0x00ef5004 = 0x01113301
-
-# set *(unsigned long *)0x00ef5004 = 0x02011101
-# set *(unsigned long *)0x00ef5004 = 0x04441104
-end
-
-define clock_init
- set *(unsigned long *)0x00ef4010 = 2
- set *(unsigned long *)0x00ef4014 = 2
- set *(unsigned long *)0x00ef4020 = 3
- set *(unsigned long *)0x00ef4024 = 3
- set *(unsigned long *)0x00ef4004 = 0x7
-# shell sleep 0.1
-# set *(unsigned long *)0x00ef4004 = 0x5
- shell sleep 0.1
- set *(unsigned long *)0x00ef4008 = 0x0200
-end
-
-define port_init
- set $sfrbase = 0x00ef0000
- set *(unsigned short *)0x00ef1060 = 0x5555
- set *(unsigned short *)0x00ef1062 = 0x5555
- set *(unsigned short *)0x00ef1064 = 0x5555
- set *(unsigned short *)0x00ef1066 = 0x5555
- set *(unsigned short *)0x00ef1068 = 0x5555
- set *(unsigned short *)0x00ef106a = 0x0000
- set *(unsigned short *)0x00ef106e = 0x5555
- set *(unsigned short *)0x00ef1070 = 0x5555
-end
-
-# MMU enable
-define mmu_enable
- set $evb=0x88000000
- set *(unsigned long *)0xffff0024=1
-end
-
-# MMU disable
-define mmu_disable
- set $evb=0
- set *(unsigned long *)0xffff0024=0
-end
-
-# Show TLB entries
-define show_tlb_entries
- set $i = 0
- set $addr = $arg0
- while ($i < 0d16 )
- set $tlb_tag = *(unsigned long*)$addr
- set $tlb_data = *(unsigned long*)($addr + 4)
- printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx\n", $i, $addr, $tlb_tag, $tlb_data
- set $i = $i + 1
- set $addr = $addr + 8
- end
-end
-define itlb
- set $itlb=0xfe000000
- show_tlb_entries $itlb
-end
-define dtlb
- set $dtlb=0xfe000800
- show_tlb_entries $dtlb
-end
-
-# Cache ON
-define set_cache_type
- set $mctype = (void*)0xfffffff8
-# chaos
-# set *(unsigned long *)($mctype) = 0x0000c000
-# m32102 i-cache only
- set *(unsigned long *)($mctype) = 0x00008000
-# m32102 d-cache only
-# set *(unsigned long *)($mctype) = 0x00004000
-end
-define cache_on
- set $param = (void*)0x08001000
- set *(unsigned long *)($param) = 0x60ff6102
-end
-
-
-# Show current task structure
-define show_current
- set $current = $spi & 0xffffe000
- printf "$current=0x%08lX\n",$current
- print *(struct task_struct *)$current
-end
-
-# Show user assigned task structure
-define show_task
- set $task = $arg0 & 0xffffe000
- printf "$task=0x%08lX\n",$task
- print *(struct task_struct *)$task
-end
-document show_task
- Show user assigned task structure
- arg0 : task structure address
-end
-
-# Show M32R registers
-define show_regs
- printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
- printf " R4[0x%08lX] R5[0x%08lX] R6[0x%08lX] R7[0x%08lX]\n",$r4,$r5,$r6,$r7
- printf " R8[0x%08lX] R9[0x%08lX] R10[0x%08lX] R11[0x%08lX]\n",$r8,$r9,$r10,$r11
- printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$sp
- printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
- printf "BPC[0x%08lX] PC[0x%08lX] ACCL[0x%08lX] ACCH[0x%08lX]\n",$bpc,$pc,$accl,$acch
- printf "EVB[0x%08lX]\n",$evb
-
- set $mests = *(unsigned long *)0xffff000c
- set $mdeva = *(unsigned long *)0xffff0010
- printf "MESTS[0x%08lX] MDEVA[0x%08lX]\n",$mests,$mdeva
-end
-
-
-# Setup all
-define setup
- clock_init
- shell sleep 0.1
- port_init
- sdram_init
-# lanc_init
-# dispc_init
-# set $evb=0x08000000
-end
-
-# Load modules
-define load_modules
- use_debug_dma
- load
-# load busybox.mot
-end
-
-# Set kernel parameters
-define set_kernel_parameters
- set $param = (void*)0x08001000
-
- ## MOUNT_ROOT_RDONLY
- set {long}($param+0x00)=0
- ## RAMDISK_FLAGS
- #set {long}($param+0x04)=0
- ## ORIG_ROOT_DEV
- #set {long}($param+0x08)=0x00000100
- ## LOADER_TYPE
- #set {long}($param+0x0C)=0
- ## INITRD_START
- set {long}($param+0x10)=0x082a0000
- ## INITRD_SIZE
- set {long}($param+0x14)=0d6200000
-
- # M32R_CPUCLK
- set *(unsigned long *)($param + 0x0018) = 0d100000000
- # M32R_BUSCLK
- set *(unsigned long *)($param + 0x001c) = 0d50000000
- # M32R_TIMER_DIVIDE
- set *(unsigned long *)($param + 0x0020) = 0d128
-
-
- set {char[0x200]}($param + 0x100) = "console=ttyS0,115200n8x root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/root.2.6_04 nfsaddrs=192.168.0.102:192.168.0.1:192.168.0.1:255.255.255.0:mappi: \0"
-
-
-end
-
-# Boot
-define boot
- set_kernel_parameters
- debug_chaos
- set *(unsigned long *)0x00f00000=0x08002000
- set $pc=0x08002000
- set $fp=0
- del b
- si
-end
-
-# Restart
-define restart
- sdireset
- sdireset
- setup
- load_modules
- boot
-end
-
-sdireset
-sdireset
-file vmlinux
-target m32rsdi
-
-restart
-boot
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0
-/*
- * linux/arch/m32r/platforms/mappi3/io.c
- *
- * Typical I/O routines for Mappi3 board.
- *
- * Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
- * Hitoshi Yamamoto, Mamoru Sakugawa
- */
-
-#include <asm/m32r.h>
-#include <asm/page.h>
-#include <asm/io.h>
-#include <asm/byteorder.h>
-
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
-#include <linux/types.h>
-
-#define M32R_PCC_IOMAP_SIZE 0x1000
-
-#define M32R_PCC_IOSTART0 0x1000
-#define M32R_PCC_IOEND0 (M32R_PCC_IOSTART0 + M32R_PCC_IOMAP_SIZE - 1)
-
-extern void pcc_ioread_byte(int, unsigned long, void *, size_t, size_t, int);
-extern void pcc_ioread_word(int, unsigned long, void *, size_t, size_t, int);
-extern void pcc_iowrite_byte(int, unsigned long, void *, size_t, size_t, int);
-extern void pcc_iowrite_word(int, unsigned long, void *, size_t, size_t, int);
-#endif /* CONFIG_PCMCIA && CONFIG_M32R_CFC */
-
-#define PORT2ADDR(port) _port2addr(port)
-#define PORT2ADDR_NE(port) _port2addr_ne(port)
-#define PORT2ADDR_USB(port) _port2addr_usb(port)
-
-static inline void *_port2addr(unsigned long port)
-{
- return (void *)(port | NONCACHE_OFFSET);
-}
-
-#if defined(CONFIG_IDE)
-static inline void *__port2addr_ata(unsigned long port)
-{
- static int dummy_reg;
-
- switch (port) {
- /* IDE0 CF */
- case 0x1f0: return (void *)(0x14002000 | NONCACHE_OFFSET);
- case 0x1f1: return (void *)(0x14012800 | NONCACHE_OFFSET);
- case 0x1f2: return (void *)(0x14012002 | NONCACHE_OFFSET);
- case 0x1f3: return (void *)(0x14012802 | NONCACHE_OFFSET);
- case 0x1f4: return (void *)(0x14012004 | NONCACHE_OFFSET);
- case 0x1f5: return (void *)(0x14012804 | NONCACHE_OFFSET);
- case 0x1f6: return (void *)(0x14012006 | NONCACHE_OFFSET);
- case 0x1f7: return (void *)(0x14012806 | NONCACHE_OFFSET);
- case 0x3f6: return (void *)(0x1401200e | NONCACHE_OFFSET);
- /* IDE1 IDE */
- case 0x170: /* Data 16bit */
- return (void *)(0x14810000 | NONCACHE_OFFSET);
- case 0x171: /* Features / Error */
- return (void *)(0x14810002 | NONCACHE_OFFSET);
- case 0x172: /* Sector count */
- return (void *)(0x14810004 | NONCACHE_OFFSET);
- case 0x173: /* Sector number */
- return (void *)(0x14810006 | NONCACHE_OFFSET);
- case 0x174: /* Cylinder low */
- return (void *)(0x14810008 | NONCACHE_OFFSET);
- case 0x175: /* Cylinder high */
- return (void *)(0x1481000a | NONCACHE_OFFSET);
- case 0x176: /* Device head */
- return (void *)(0x1481000c | NONCACHE_OFFSET);
- case 0x177: /* Command */
- return (void *)(0x1481000e | NONCACHE_OFFSET);
- case 0x376: /* Device control / Alt status */
- return (void *)(0x1480800c | NONCACHE_OFFSET);
-
- default: return (void *)&dummy_reg;
- }
-}
-#endif
-
-#define LAN_IOSTART (0x300 | NONCACHE_OFFSET)
-#define LAN_IOEND (0x320 | NONCACHE_OFFSET)
-static inline void *_port2addr_ne(unsigned long port)
-{
- return (void *)(port + 0x10000000);
-}
-
-static inline void *_port2addr_usb(unsigned long port)
-{
- return (void *)(port + NONCACHE_OFFSET + 0x12000000);
-}
-static inline void delay(void)
-{
- __asm__ __volatile__ ("push r0; \n\t pop r0;" : : :"memory");
-}
-
-/*
- * NIC I/O function
- */
-
-static inline unsigned char _ne_inb(void *portp)
-{
- return (unsigned char) *(volatile unsigned char *)portp;
-}
-
-static inline unsigned short _ne_inw(void *portp)
-{
- return (unsigned short)le16_to_cpu(*(volatile unsigned short *)portp);
-}
-
-static inline void _ne_insb(void *portp, void * addr, unsigned long count)
-{
- unsigned char *buf = addr;
-
- while (count--)
- *buf++ = *(volatile unsigned char *)portp;
-}
-
-static inline void _ne_outb(unsigned char b, void *portp)
-{
- *(volatile unsigned char *)portp = (unsigned char)b;
-}
-
-static inline void _ne_outw(unsigned short w, void *portp)
-{
- *(volatile unsigned short *)portp = cpu_to_le16(w);
-}
-
-unsigned char _inb(unsigned long port)
-{
- if (port >= LAN_IOSTART && port < LAN_IOEND)
- return _ne_inb(PORT2ADDR_NE(port));
-#if defined(CONFIG_IDE)
- else if ( ((port >= 0x170 && port <=0x177) || port == 0x376) ||
- ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){
- return *(volatile unsigned char *)__port2addr_ata(port);
- }
-#endif
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
- else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- unsigned char b;
- pcc_ioread_byte(0, port, &b, sizeof(b), 1, 0);
- return b;
- } else
-#endif
- return *(volatile unsigned char *)PORT2ADDR(port);
-}
-
-unsigned short _inw(unsigned long port)
-{
- if (port >= LAN_IOSTART && port < LAN_IOEND)
- return _ne_inw(PORT2ADDR_NE(port));
-#if defined(CONFIG_IDE)
- else if ( ((port >= 0x170 && port <=0x177) || port == 0x376) ||
- ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){
- return *(volatile unsigned short *)__port2addr_ata(port);
- }
-#endif
-#if defined(CONFIG_USB)
- else if (port >= 0x340 && port < 0x3a0)
- return *(volatile unsigned short *)PORT2ADDR_USB(port);
-#endif
-
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
- else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- unsigned short w;
- pcc_ioread_word(0, port, &w, sizeof(w), 1, 0);
- return w;
- } else
-#endif
- return *(volatile unsigned short *)PORT2ADDR(port);
-}
-
-unsigned long _inl(unsigned long port)
-{
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
- if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- unsigned long l;
- pcc_ioread_word(0, port, &l, sizeof(l), 1, 0);
- return l;
- } else
-#endif
- return *(volatile unsigned long *)PORT2ADDR(port);
-}
-
-unsigned char _inb_p(unsigned long port)
-{
- unsigned char v = _inb(port);
- delay();
- return (v);
-}
-
-unsigned short _inw_p(unsigned long port)
-{
- unsigned short v = _inw(port);
- delay();
- return (v);
-}
-
-unsigned long _inl_p(unsigned long port)
-{
- unsigned long v = _inl(port);
- delay();
- return (v);
-}
-
-void _outb(unsigned char b, unsigned long port)
-{
- if (port >= LAN_IOSTART && port < LAN_IOEND)
- _ne_outb(b, PORT2ADDR_NE(port));
- else
-#if defined(CONFIG_IDE)
- if ( ((port >= 0x170 && port <=0x177) || port == 0x376) ||
- ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){
- *(volatile unsigned char *)__port2addr_ata(port) = b;
- } else
-#endif
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
- if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- pcc_iowrite_byte(0, port, &b, sizeof(b), 1, 0);
- } else
-#endif
- *(volatile unsigned char *)PORT2ADDR(port) = b;
-}
-
-void _outw(unsigned short w, unsigned long port)
-{
- if (port >= LAN_IOSTART && port < LAN_IOEND)
- _ne_outw(w, PORT2ADDR_NE(port));
- else
-#if defined(CONFIG_IDE)
- if ( ((port >= 0x170 && port <=0x177) || port == 0x376) ||
- ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){
- *(volatile unsigned short *)__port2addr_ata(port) = w;
- } else
-#endif
-#if defined(CONFIG_USB)
- if (port >= 0x340 && port < 0x3a0)
- *(volatile unsigned short *)PORT2ADDR_USB(port) = w;
- else
-#endif
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
- if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- pcc_iowrite_word(0, port, &w, sizeof(w), 1, 0);
- } else
-#endif
- *(volatile unsigned short *)PORT2ADDR(port) = w;
-}
-
-void _outl(unsigned long l, unsigned long port)
-{
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
- if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- pcc_iowrite_word(0, port, &l, sizeof(l), 1, 0);
- } else
-#endif
- *(volatile unsigned long *)PORT2ADDR(port) = l;
-}
-
-void _outb_p(unsigned char b, unsigned long port)
-{
- _outb(b, port);
- delay();
-}
-
-void _outw_p(unsigned short w, unsigned long port)
-{
- _outw(w, port);
- delay();
-}
-
-void _outl_p(unsigned long l, unsigned long port)
-{
- _outl(l, port);
- delay();
-}
-
-void _insb(unsigned int port, void * addr, unsigned long count)
-{
- if (port >= LAN_IOSTART && port < LAN_IOEND)
- _ne_insb(PORT2ADDR_NE(port), addr, count);
-#if defined(CONFIG_IDE)
- else if ( ((port >= 0x170 && port <=0x177) || port == 0x376) ||
- ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){
- unsigned char *buf = addr;
- unsigned char *portp = __port2addr_ata(port);
- while (count--)
- *buf++ = *(volatile unsigned char *)portp;
- }
-#endif
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
- else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- pcc_ioread_byte(0, port, (void *)addr, sizeof(unsigned char),
- count, 1);
- }
-#endif
- else {
- unsigned char *buf = addr;
- unsigned char *portp = PORT2ADDR(port);
- while (count--)
- *buf++ = *(volatile unsigned char *)portp;
- }
-}
-
-void _insw(unsigned int port, void * addr, unsigned long count)
-{
- unsigned short *buf = addr;
- unsigned short *portp;
-
- if (port >= LAN_IOSTART && port < LAN_IOEND) {
- portp = PORT2ADDR_NE(port);
- while (count--)
- *buf++ = *(volatile unsigned short *)portp;
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
- } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- pcc_ioread_word(9, port, (void *)addr, sizeof(unsigned short),
- count, 1);
-#endif
-#if defined(CONFIG_IDE)
- } else if ( ((port >= 0x170 && port <=0x177) || port == 0x376) ||
- ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){
- portp = __port2addr_ata(port);
- while (count--)
- *buf++ = *(volatile unsigned short *)portp;
-#endif
- } else {
- portp = PORT2ADDR(port);
- while (count--)
- *buf++ = *(volatile unsigned short *)portp;
- }
-}
-
-void _insl(unsigned int port, void * addr, unsigned long count)
-{
- unsigned long *buf = addr;
- unsigned long *portp;
-
- portp = PORT2ADDR(port);
- while (count--)
- *buf++ = *(volatile unsigned long *)portp;
-}
-
-void _outsb(unsigned int port, const void * addr, unsigned long count)
-{
- const unsigned char *buf = addr;
- unsigned char *portp;
-
- if (port >= LAN_IOSTART && port < LAN_IOEND) {
- portp = PORT2ADDR_NE(port);
- while (count--)
- _ne_outb(*buf++, portp);
-#if defined(CONFIG_IDE)
- } else if ( ((port >= 0x170 && port <=0x177) || port == 0x376) ||
- ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){
- portp = __port2addr_ata(port);
- while (count--)
- *(volatile unsigned char *)portp = *buf++;
-#endif
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
- } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- pcc_iowrite_byte(0, port, (void *)addr, sizeof(unsigned char),
- count, 1);
-#endif
- } else {
- portp = PORT2ADDR(port);
- while (count--)
- *(volatile unsigned char *)portp = *buf++;
- }
-}
-
-void _outsw(unsigned int port, const void * addr, unsigned long count)
-{
- const unsigned short *buf = addr;
- unsigned short *portp;
-
- if (port >= LAN_IOSTART && port < LAN_IOEND) {
- portp = PORT2ADDR_NE(port);
- while (count--)
- *(volatile unsigned short *)portp = *buf++;
-#if defined(CONFIG_IDE)
- } else if ( ((port >= 0x170 && port <=0x177) || port == 0x376) ||
- ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) ){
- portp = __port2addr_ata(port);
- while (count--)
- *(volatile unsigned short *)portp = *buf++;
-#endif
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
- } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- pcc_iowrite_word(9, port, (void *)addr, sizeof(unsigned short),
- count, 1);
-#endif
- } else {
- portp = PORT2ADDR(port);
- while (count--)
- *(volatile unsigned short *)portp = *buf++;
- }
-}
-
-void _outsl(unsigned int port, const void * addr, unsigned long count)
-{
- const unsigned long *buf = addr;
- unsigned char *portp;
-
- portp = PORT2ADDR(port);
- while (count--)
- *(volatile unsigned long *)portp = *buf++;
-}
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0
-/*
- * linux/arch/m32r/platforms/mappi3/setup.c
- *
- * Setup routines for Renesas MAPPI-III(M3A-2170) Board
- *
- * Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
- * Hitoshi Yamamoto, Mamoru Sakugawa
- */
-
-#include <linux/irq.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-
-#include <asm/m32r.h>
-#include <asm/io.h>
-
-#define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
-
-icu_data_t icu_data[NR_IRQS];
-
-static void disable_mappi3_irq(unsigned int irq)
-{
- unsigned long port, data;
-
- if ((irq == 0) ||(irq >= NR_IRQS)) {
- printk("bad irq 0x%08x\n", irq);
- return;
- }
- port = irq2port(irq);
- data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7;
- outl(data, port);
-}
-
-static void enable_mappi3_irq(unsigned int irq)
-{
- unsigned long port, data;
-
- if ((irq == 0) ||(irq >= NR_IRQS)) {
- printk("bad irq 0x%08x\n", irq);
- return;
- }
- port = irq2port(irq);
- data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6;
- outl(data, port);
-}
-
-static void mask_mappi3(struct irq_data *data)
-{
- disable_mappi3_irq(data->irq);
-}
-
-static void unmask_mappi3(struct irq_data *data)
-{
- enable_mappi3_irq(data->irq);
-}
-
-static void shutdown_mappi3(struct irq_data *data)
-{
- unsigned long port;
-
- port = irq2port(data->irq);
- outl(M32R_ICUCR_ILEVEL7, port);
-}
-
-static struct irq_chip mappi3_irq_type = {
- .name = "MAPPI3-IRQ",
- .irq_shutdown = shutdown_mappi3,
- .irq_mask = mask_mappi3,
- .irq_unmask = unmask_mappi3,
-};
-
-void __init init_IRQ(void)
-{
-#if defined(CONFIG_SMC91X)
- /* INT0 : LAN controller (SMC91111) */
- irq_set_chip_and_handler(M32R_IRQ_INT0, &mappi3_irq_type,
- handle_level_irq);
- icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
- disable_mappi3_irq(M32R_IRQ_INT0);
-#endif /* CONFIG_SMC91X */
-
- /* MFT2 : system timer */
- irq_set_chip_and_handler(M32R_IRQ_MFT2, &mappi3_irq_type,
- handle_level_irq);
- icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
- disable_mappi3_irq(M32R_IRQ_MFT2);
-
-#ifdef CONFIG_SERIAL_M32R_SIO
- /* SIO0_R : uart receive data */
- irq_set_chip_and_handler(M32R_IRQ_SIO0_R, &mappi3_irq_type,
- handle_level_irq);
- icu_data[M32R_IRQ_SIO0_R].icucr = 0;
- disable_mappi3_irq(M32R_IRQ_SIO0_R);
-
- /* SIO0_S : uart send data */
- irq_set_chip_and_handler(M32R_IRQ_SIO0_S, &mappi3_irq_type,
- handle_level_irq);
- icu_data[M32R_IRQ_SIO0_S].icucr = 0;
- disable_mappi3_irq(M32R_IRQ_SIO0_S);
- /* SIO1_R : uart receive data */
- irq_set_chip_and_handler(M32R_IRQ_SIO1_R, &mappi3_irq_type,
- handle_level_irq);
- icu_data[M32R_IRQ_SIO1_R].icucr = 0;
- disable_mappi3_irq(M32R_IRQ_SIO1_R);
-
- /* SIO1_S : uart send data */
- irq_set_chip_and_handler(M32R_IRQ_SIO1_S, &mappi3_irq_type,
- handle_level_irq);
- icu_data[M32R_IRQ_SIO1_S].icucr = 0;
- disable_mappi3_irq(M32R_IRQ_SIO1_S);
-#endif /* CONFIG_M32R_USE_DBG_CONSOLE */
-
-#if defined(CONFIG_USB)
- /* INT1 : USB Host controller interrupt */
- irq_set_chip_and_handler(M32R_IRQ_INT1, &mappi3_irq_type,
- handle_level_irq);
- icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01;
- disable_mappi3_irq(M32R_IRQ_INT1);
-#endif /* CONFIG_USB */
-
- /* CFC IREQ */
- irq_set_chip_and_handler(PLD_IRQ_CFIREQ, &mappi3_irq_type,
- handle_level_irq);
- icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01;
- disable_mappi3_irq(PLD_IRQ_CFIREQ);
-
-#if defined(CONFIG_M32R_CFC)
- /* ICUCR41: CFC Insert & eject */
- irq_set_chip_and_handler(PLD_IRQ_CFC_INSERT, &mappi3_irq_type,
- handle_level_irq);
- icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00;
- disable_mappi3_irq(PLD_IRQ_CFC_INSERT);
-
-#endif /* CONFIG_M32R_CFC */
-
- /* IDE IREQ */
- irq_set_chip_and_handler(PLD_IRQ_IDEIREQ, &mappi3_irq_type,
- handle_level_irq);
- icu_data[PLD_IRQ_IDEIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
- disable_mappi3_irq(PLD_IRQ_IDEIREQ);
-
-}
-
-#if defined(CONFIG_SMC91X)
-
-#define LAN_IOSTART 0x300
-#define LAN_IOEND 0x320
-static struct resource smc91x_resources[] = {
- [0] = {
- .start = (LAN_IOSTART),
- .end = (LAN_IOEND),
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = M32R_IRQ_INT0,
- .end = M32R_IRQ_INT0,
- .flags = IORESOURCE_IRQ,
- }
-};
-
-static struct platform_device smc91x_device = {
- .name = "smc91x",
- .id = 0,
- .num_resources = ARRAY_SIZE(smc91x_resources),
- .resource = smc91x_resources,
-};
-
-#endif
-
-#if defined(CONFIG_FB_S1D13XXX)
-
-#include <video/s1d13xxxfb.h>
-#include <asm/s1d13806.h>
-
-static struct s1d13xxxfb_pdata s1d13xxxfb_data = {
- .initregs = s1d13xxxfb_initregs,
- .initregssize = ARRAY_SIZE(s1d13xxxfb_initregs),
- .platform_init_video = NULL,
-#ifdef CONFIG_PM
- .platform_suspend_video = NULL,
- .platform_resume_video = NULL,
-#endif
-};
-
-static struct resource s1d13xxxfb_resources[] = {
- [0] = {
- .start = 0x1d600000UL,
- .end = 0x1d73FFFFUL,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = 0x1d400000UL,
- .end = 0x1d4001FFUL,
- .flags = IORESOURCE_MEM,
- }
-};
-
-static struct platform_device s1d13xxxfb_device = {
- .name = S1D_DEVICENAME,
- .id = 0,
- .dev = {
- .platform_data = &s1d13xxxfb_data,
- },
- .num_resources = ARRAY_SIZE(s1d13xxxfb_resources),
- .resource = s1d13xxxfb_resources,
-};
-#endif
-
-static int __init platform_init(void)
-{
-#if defined(CONFIG_SMC91X)
- platform_device_register(&smc91x_device);
-#endif
-#if defined(CONFIG_FB_S1D13XXX)
- platform_device_register(&s1d13xxxfb_device);
-#endif
- return 0;
-}
-arch_initcall(platform_init);
+++ /dev/null
-obj-y := setup.o io.o
+++ /dev/null
-# .gdbinit file
-# $Id: dot.gdbinit.oaks32r,v 1.4 2004/10/20 02:24:37 takata Exp $
-#-----
-# NOTE: this file is generated by a script, "gen_gdbinit.pl".
-# (Please type "gen_gdbinit.pl --help" and check the help message).
-# $ Id: gen_gdbinit.pl,v 1.12 2004/07/26 09:56:10 takata Exp $
-#-----
-# target platform: oaks32r
-
-# setting
-set width 0d70
-set radix 0d16
-
-# clk xin:cpu:bus=16:66:33
-define clock_init
- set *(unsigned long *)0x00ef4008 = 1
- shell sleep 0.1
- set *(unsigned long *)0x00ef4000 = 0x00020100
-end
-
-# Initialize programmable ports
-define port_init
- set *(unsigned long *)0x00ef1000 = 0x1
- set *(unsigned long *)0x00ef1060 = 0x01400001
- set *(unsigned long *)0x00ef1064 = 0x00015555
- set *(unsigned long *)0x00ef1068 = 0x55555050
- set *(unsigned long *)0x00ef106c = 0x05150040
-end
-
-# Initialize SDRAM controller
-define sdram_init
- set *(unsigned long *)0x00ef6008 = 0x00000182
- set *(unsigned long *)0x00ef600c = 0x00000001
- shell sleep 0.1
- set *(unsigned long *)0x00ef602c = 0x00000010
- set *(unsigned long *)0x00ef6028 = 0x00000300
- set *(unsigned long *)0x00ef6048 = 0x00000001
- set *(unsigned long *)0x00ef6020 = 0x01000041
- set *(unsigned long *)0x00ef6004 = 0x00010117
- set *(unsigned long *)0x00ef6010 = 0x00000001
- set *(unsigned long *)0x00ef6024 = 0x00000001
-end
-document sdram_init
- SDRAM controller initialization
- 0x01000000 - 0x017fffff (8MB)
-end
-
-# Initialize LAN controller
-define lanc_init
- set *(unsigned long *)0x00ef5008 = 0x03031303
- #RST DRV (P64)
- set *(unsigned char *)0x00ef1046 = 0x08
- set *(unsigned char *)0x00ef1026 = 0xff
- set *(unsigned char *)0x00ef1026 = 0x00
- set *(unsigned short *)0x02000630 = 0xffff
-end
-
-# Show current task structure
-define show_current
- set $current = $spi & 0xffffe000
- printf "$current=0x%08lX\n",$current
- print *(struct task_struct *)$current
-end
-
-# Show user assigned task structure
-define show_task
- set = $arg0 & 0xffffe000
- printf "$task=0x%08lX\n",$task
- print *(struct task_struct *)$task
-end
-document show_task
- Show user assigned task structure
- arg0 : task structure address
-end
-
-# Show M32R registers
-define show_regs
- printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
- printf " R4[0x%08lX] R5[0x%08lX] R6[0x%08lX] R7[0x%08lX]\n",$r4,$r5,$r6,$r7
- printf " R8[0x%08lX] R9[0x%08lX] R10[0x%08lX] R11[0x%08lX]\n",$r8,$r9,$r10,$r11
- printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$sp
- printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
- printf "BPC[0x%08lX] PC[0x%08lX] ACCL[0x%08lX] ACCH[0x%08lX]\n",$bpc,$pc,$accl,$acch
-end
-
-# Setup all
-define setup
- use_mon_code
- set *(unsigned int)0xfffffffc=0x60
- shell sleep 0.1
- clock_init
- shell sleep 0.1
- port_init
- sdram_init
- lanc_init
-end
-
-# Load modules
-define load_modules
- use_debug_dma
- load
-end
-
-# Set kernel parameters
-define set_kernel_parameters
- set $param = (void*)0x01001000
- # INITRD_START
-# set *(unsigned long *)($param + 0x0010) = 0x00000000
- # INITRD_SIZE
-# set *(unsigned long *)($param + 0x0014) = 0x00000000
- # M32R_CPUCLK
- set *(unsigned long *)($param + 0x0018) = 0d66666667
- # M32R_BUSCLK
- set *(unsigned long *)($param + 0x001c) = 0d33333333
-
- # M32R_TIMER_DIVIDE
- set *(unsigned long *)($param + 0x0020) = 0d128
-
- set {char[0x200]}($param + 0x100) = "console=ttyS0,115200n8x root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/rootfs nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 \0"
-end
-
-# Boot
-define boot
- set_kernel_parameters
- set $fp = 0
- set $pc = 0x01002000
- si
- c
-end
-
-# Set breakpoints
-define set_breakpoints
- b *0x00000020
- b *0x00000030
-end
-
-# Restart
-define restart
- sdireset
- sdireset
- setup
- load_modules
- boot
-end
-
-sdireset
-sdireset
-file vmlinux
-target m32rsdi
-setup
-#load_modules
-#set_breakpoints
-#boot
-
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0
-/*
- * linux/arch/m32r/platforms/oaks32r/io.c
- *
- * Typical I/O routines for OAKS32R board.
- *
- * Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
- * Hitoshi Yamamoto, Mamoru Sakugawa
- */
-
-#include <asm/m32r.h>
-#include <asm/page.h>
-#include <asm/io.h>
-
-#define PORT2ADDR(port) _port2addr(port)
-
-static inline void *_port2addr(unsigned long port)
-{
- return (void *)(port | NONCACHE_OFFSET);
-}
-
-static inline void *_port2addr_ne(unsigned long port)
-{
- return (void *)((port<<1) + NONCACHE_OFFSET + 0x02000000);
-}
-
-static inline void delay(void)
-{
- __asm__ __volatile__ ("push r0; \n\t pop r0;" : : :"memory");
-}
-
-/*
- * NIC I/O function
- */
-
-#define PORT2ADDR_NE(port) _port2addr_ne(port)
-
-static inline unsigned char _ne_inb(void *portp)
-{
- return *(volatile unsigned char *)(portp+1);
-}
-
-static inline unsigned short _ne_inw(void *portp)
-{
- unsigned short tmp;
-
- tmp = *(unsigned short *)(portp) & 0xff;
- tmp |= *(unsigned short *)(portp+2) << 8;
- return tmp;
-}
-
-static inline void _ne_insb(void *portp, void *addr, unsigned long count)
-{
- unsigned char *buf = addr;
- while (count--)
- *buf++ = *(volatile unsigned char *)(portp+1);
-}
-
-static inline void _ne_outb(unsigned char b, void *portp)
-{
- *(volatile unsigned char *)(portp+1) = b;
-}
-
-static inline void _ne_outw(unsigned short w, void *portp)
-{
- *(volatile unsigned short *)portp = (w >> 8);
- *(volatile unsigned short *)(portp+2) = (w & 0xff);
-}
-
-unsigned char _inb(unsigned long port)
-{
- if (port >= 0x300 && port < 0x320)
- return _ne_inb(PORT2ADDR_NE(port));
-
- return *(volatile unsigned char *)PORT2ADDR(port);
-}
-
-unsigned short _inw(unsigned long port)
-{
- if (port >= 0x300 && port < 0x320)
- return _ne_inw(PORT2ADDR_NE(port));
-
- return *(volatile unsigned short *)PORT2ADDR(port);
-}
-
-unsigned long _inl(unsigned long port)
-{
- return *(volatile unsigned long *)PORT2ADDR(port);
-}
-
-unsigned char _inb_p(unsigned long port)
-{
- unsigned char v = _inb(port);
- delay();
- return (v);
-}
-
-unsigned short _inw_p(unsigned long port)
-{
- unsigned short v = _inw(port);
- delay();
- return (v);
-}
-
-unsigned long _inl_p(unsigned long port)
-{
- unsigned long v = _inl(port);
- delay();
- return (v);
-}
-
-void _outb(unsigned char b, unsigned long port)
-{
- if (port >= 0x300 && port < 0x320)
- _ne_outb(b, PORT2ADDR_NE(port));
- else
- *(volatile unsigned char *)PORT2ADDR(port) = b;
-}
-
-void _outw(unsigned short w, unsigned long port)
-{
- if (port >= 0x300 && port < 0x320)
- _ne_outw(w, PORT2ADDR_NE(port));
- else
- *(volatile unsigned short *)PORT2ADDR(port) = w;
-}
-
-void _outl(unsigned long l, unsigned long port)
-{
- *(volatile unsigned long *)PORT2ADDR(port) = l;
-}
-
-void _outb_p(unsigned char b, unsigned long port)
-{
- _outb(b, port);
- delay();
-}
-
-void _outw_p(unsigned short w, unsigned long port)
-{
- _outw(w, port);
- delay();
-}
-
-void _outl_p(unsigned long l, unsigned long port)
-{
- _outl(l, port);
- delay();
-}
-
-void _insb(unsigned int port, void *addr, unsigned long count)
-{
- if (port >= 0x300 && port < 0x320)
- _ne_insb(PORT2ADDR_NE(port), addr, count);
- else {
- unsigned char *buf = addr;
- unsigned char *portp = PORT2ADDR(port);
- while (count--)
- *buf++ = *(volatile unsigned char *)portp;
- }
-}
-
-void _insw(unsigned int port, void *addr, unsigned long count)
-{
- unsigned short *buf = addr;
- unsigned short *portp;
-
- if (port >= 0x300 && port < 0x320) {
- portp = PORT2ADDR_NE(port);
- while (count--)
- *buf++ = _ne_inw(portp);
- } else {
- portp = PORT2ADDR(port);
- while (count--)
- *buf++ = *(volatile unsigned short *)portp;
- }
-}
-
-void _insl(unsigned int port, void *addr, unsigned long count)
-{
- unsigned long *buf = addr;
- unsigned long *portp;
-
- portp = PORT2ADDR(port);
- while (count--)
- *buf++ = *(volatile unsigned long *)portp;
-}
-
-void _outsb(unsigned int port, const void *addr, unsigned long count)
-{
- const unsigned char *buf = addr;
- unsigned char *portp;
-
- if (port >= 0x300 && port < 0x320) {
- portp = PORT2ADDR_NE(port);
- while (count--)
- _ne_outb(*buf++, portp);
- } else {
- portp = PORT2ADDR(port);
- while (count--)
- *(volatile unsigned char *)portp = *buf++;
- }
-}
-
-void _outsw(unsigned int port, const void *addr, unsigned long count)
-{
- const unsigned short *buf = addr;
- unsigned short *portp;
-
- if (port >= 0x300 && port < 0x320) {
- portp = PORT2ADDR_NE(port);
- while (count--)
- _ne_outw(*buf++, portp);
- } else {
- portp = PORT2ADDR(port);
- while (count--)
- *(volatile unsigned short *)portp = *buf++;
- }
-}
-
-void _outsl(unsigned int port, const void *addr, unsigned long count)
-{
- const unsigned long *buf = addr;
- unsigned char *portp;
-
- portp = PORT2ADDR(port);
- while (count--)
- *(volatile unsigned long *)portp = *buf++;
-}
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0
-/*
- * linux/arch/m32r/platforms/oaks32r/setup.c
- *
- * Setup routines for OAKS32R Board
- *
- * Copyright (c) 2002-2005 Hiroyuki Kondo, Hirokazu Takata,
- * Hitoshi Yamamoto, Mamoru Sakugawa
- */
-
-#include <linux/irq.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-
-#include <asm/m32r.h>
-#include <asm/io.h>
-
-#define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
-
-icu_data_t icu_data[NR_IRQS];
-
-static void disable_oaks32r_irq(unsigned int irq)
-{
- unsigned long port, data;
-
- port = irq2port(irq);
- data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7;
- outl(data, port);
-}
-
-static void enable_oaks32r_irq(unsigned int irq)
-{
- unsigned long port, data;
-
- port = irq2port(irq);
- data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6;
- outl(data, port);
-}
-
-static void mask_oaks32r(struct irq_data *data)
-{
- disable_oaks32r_irq(data->irq);
-}
-
-static void unmask_oaks32r(struct irq_data *data)
-{
- enable_oaks32r_irq(data->irq);
-}
-
-static void shutdown_oaks32r(struct irq_data *data)
-{
- unsigned long port;
-
- port = irq2port(data->irq);
- outl(M32R_ICUCR_ILEVEL7, port);
-}
-
-static struct irq_chip oaks32r_irq_type =
-{
- .name = "OAKS32R-IRQ",
- .irq_shutdown = shutdown_oaks32r,
- .irq_mask = mask_oaks32r,
- .irq_unmask = unmask_oaks32r,
-};
-
-void __init init_IRQ(void)
-{
- static int once = 0;
-
- if (once)
- return;
- else
- once++;
-
-#ifdef CONFIG_NE2000
- /* INT3 : LAN controller (RTL8019AS) */
- irq_set_chip_and_handler(M32R_IRQ_INT3, &oaks32r_irq_type,
- handle_level_irq);
- icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
- disable_oaks32r_irq(M32R_IRQ_INT3);
-#endif /* CONFIG_M32R_NE2000 */
-
- /* MFT2 : system timer */
- irq_set_chip_and_handler(M32R_IRQ_MFT2, &oaks32r_irq_type,
- handle_level_irq);
- icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
- disable_oaks32r_irq(M32R_IRQ_MFT2);
-
-#ifdef CONFIG_SERIAL_M32R_SIO
- /* SIO0_R : uart receive data */
- irq_set_chip_and_handler(M32R_IRQ_SIO0_R, &oaks32r_irq_type,
- handle_level_irq);
- icu_data[M32R_IRQ_SIO0_R].icucr = 0;
- disable_oaks32r_irq(M32R_IRQ_SIO0_R);
-
- /* SIO0_S : uart send data */
- irq_set_chip_and_handler(M32R_IRQ_SIO0_S, &oaks32r_irq_type,
- handle_level_irq);
- icu_data[M32R_IRQ_SIO0_S].icucr = 0;
- disable_oaks32r_irq(M32R_IRQ_SIO0_S);
-
- /* SIO1_R : uart receive data */
- irq_set_chip_and_handler(M32R_IRQ_SIO1_R, &oaks32r_irq_type,
- handle_level_irq);
- icu_data[M32R_IRQ_SIO1_R].icucr = 0;
- disable_oaks32r_irq(M32R_IRQ_SIO1_R);
-
- /* SIO1_S : uart send data */
- irq_set_chip_and_handler(M32R_IRQ_SIO1_S, &oaks32r_irq_type,
- handle_level_irq);
- icu_data[M32R_IRQ_SIO1_S].icucr = 0;
- disable_oaks32r_irq(M32R_IRQ_SIO1_S);
-#endif /* CONFIG_SERIAL_M32R_SIO */
-}
+++ /dev/null
-obj-y := setup.o io.o
+++ /dev/null
-# .gdbinit file
-# $Id: dot.gdbinit,v 1.1 2004/07/27 06:54:20 sakugawa Exp $
-
-# setting
-set width 0d70
-set radix 0d16
-set height 0
-debug_chaos
-
-# clk xin:cpu:bus=1:8:1
-define clock_init_on_181
- set *(unsigned long *)0x00ef400c = 0x2
- set *(unsigned long *)0x00ef4004 = 0x1
- shell sleep 0.1
- set *(unsigned long *)0x00ef4000 = 0x101
-end
-# clk xin:cpu:bus=1:8:2
-define clock_init_on_182
- set *(unsigned long *)0x00ef400c = 0x1
- set *(unsigned long *)0x00ef4004 = 0x1
- shell sleep 0.1
- set *(unsigned long *)0x00ef4000 = 0x101
-end
-
-# clk xin:cpu:bus=1:8:4
-define clock_init_on_184
- set *(unsigned long *)0x00ef400c = 0x0
- set *(unsigned long *)0x00ef4004 = 0x1
- shell sleep 0.1
- set *(unsigned long *)0x00ef4000 = 0x101
-end
-
-# clk xin:cpu:bus=1:1:1
-define clock_init_off
- shell sleep 0.1
- set *(unsigned long *)0x00ef4000 = 0x0
- shell sleep 0.1
- set *(unsigned long *)0x00ef4004 = 0x0
- shell sleep 0.1
- set *(unsigned long *)0x00ef400c = 0x0
-end
-
-define tlb_init
- set $tlbbase = 0xfe000000
- set *(unsigned long *)($tlbbase + 0x04) = 0x0
- set *(unsigned long *)($tlbbase + 0x0c) = 0x0
- set *(unsigned long *)($tlbbase + 0x14) = 0x0
- set *(unsigned long *)($tlbbase + 0x1c) = 0x0
- set *(unsigned long *)($tlbbase + 0x24) = 0x0
- set *(unsigned long *)($tlbbase + 0x2c) = 0x0
- set *(unsigned long *)($tlbbase + 0x34) = 0x0
- set *(unsigned long *)($tlbbase + 0x3c) = 0x0
- set *(unsigned long *)($tlbbase + 0x44) = 0x0
- set *(unsigned long *)($tlbbase + 0x4c) = 0x0
- set *(unsigned long *)($tlbbase + 0x54) = 0x0
- set *(unsigned long *)($tlbbase + 0x5c) = 0x0
- set *(unsigned long *)($tlbbase + 0x64) = 0x0
- set *(unsigned long *)($tlbbase + 0x6c) = 0x0
- set *(unsigned long *)($tlbbase + 0x74) = 0x0
- set *(unsigned long *)($tlbbase + 0x7c) = 0x0
- set *(unsigned long *)($tlbbase + 0x84) = 0x0
- set *(unsigned long *)($tlbbase + 0x8c) = 0x0
- set *(unsigned long *)($tlbbase + 0x94) = 0x0
- set *(unsigned long *)($tlbbase + 0x9c) = 0x0
- set *(unsigned long *)($tlbbase + 0xa4) = 0x0
- set *(unsigned long *)($tlbbase + 0xac) = 0x0
- set *(unsigned long *)($tlbbase + 0xb4) = 0x0
- set *(unsigned long *)($tlbbase + 0xbc) = 0x0
- set *(unsigned long *)($tlbbase + 0xc4) = 0x0
- set *(unsigned long *)($tlbbase + 0xcc) = 0x0
- set *(unsigned long *)($tlbbase + 0xd4) = 0x0
- set *(unsigned long *)($tlbbase + 0xdc) = 0x0
- set *(unsigned long *)($tlbbase + 0xe4) = 0x0
- set *(unsigned long *)($tlbbase + 0xec) = 0x0
- set *(unsigned long *)($tlbbase + 0xf4) = 0x0
- set *(unsigned long *)($tlbbase + 0xfc) = 0x0
- set $tlbbase = 0xfe000800
- set *(unsigned long *)($tlbbase + 0x04) = 0x0
- set *(unsigned long *)($tlbbase + 0x0c) = 0x0
- set *(unsigned long *)($tlbbase + 0x14) = 0x0
- set *(unsigned long *)($tlbbase + 0x1c) = 0x0
- set *(unsigned long *)($tlbbase + 0x24) = 0x0
- set *(unsigned long *)($tlbbase + 0x2c) = 0x0
- set *(unsigned long *)($tlbbase + 0x34) = 0x0
- set *(unsigned long *)($tlbbase + 0x3c) = 0x0
- set *(unsigned long *)($tlbbase + 0x44) = 0x0
- set *(unsigned long *)($tlbbase + 0x4c) = 0x0
- set *(unsigned long *)($tlbbase + 0x54) = 0x0
- set *(unsigned long *)($tlbbase + 0x5c) = 0x0
- set *(unsigned long *)($tlbbase + 0x64) = 0x0
- set *(unsigned long *)($tlbbase + 0x6c) = 0x0
- set *(unsigned long *)($tlbbase + 0x74) = 0x0
- set *(unsigned long *)($tlbbase + 0x7c) = 0x0
- set *(unsigned long *)($tlbbase + 0x84) = 0x0
- set *(unsigned long *)($tlbbase + 0x8c) = 0x0
- set *(unsigned long *)($tlbbase + 0x94) = 0x0
- set *(unsigned long *)($tlbbase + 0x9c) = 0x0
- set *(unsigned long *)($tlbbase + 0xa4) = 0x0
- set *(unsigned long *)($tlbbase + 0xac) = 0x0
- set *(unsigned long *)($tlbbase + 0xb4) = 0x0
- set *(unsigned long *)($tlbbase + 0xbc) = 0x0
- set *(unsigned long *)($tlbbase + 0xc4) = 0x0
- set *(unsigned long *)($tlbbase + 0xcc) = 0x0
- set *(unsigned long *)($tlbbase + 0xd4) = 0x0
- set *(unsigned long *)($tlbbase + 0xdc) = 0x0
- set *(unsigned long *)($tlbbase + 0xe4) = 0x0
- set *(unsigned long *)($tlbbase + 0xec) = 0x0
- set *(unsigned long *)($tlbbase + 0xf4) = 0x0
- set *(unsigned long *)($tlbbase + 0xfc) = 0x0
-end
-
-define load_modules
- use_debug_dma
- load
-end
-
-# Set kernel parameters
-define set_kernel_parameters
- set $param = (void*)0x88001000
- # INITRD_START
-# set *(unsigned long *)($param + 0x0010) = 0x08300000
- # INITRD_SIZE
-# set *(unsigned long *)($param + 0x0014) = 0x00400000
- # M32R_CPUCLK
- set *(unsigned long *)($param + 0x0018) = 0d200000000
- # M32R_BUSCLK
- set *(unsigned long *)($param + 0x001c) = 0d50000000
-# set *(unsigned long *)($param + 0x001c) = 0d25000000
-
- # M32R_TIMER_DIVIDE
- set *(unsigned long *)($param + 0x0020) = 0d128
-
- set {char[0x200]}($param + 0x100) = "console=ttyS0,115200n8x console=tty1 \
- root=/dev/nfsroot \
- nfsroot=192.168.0.1:/project/m32r-linux/export/root.2.6 \
- nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 \
- mem=16m \0"
-end
-
-define boot
- set_kernel_parameters
- set $pc=0x88002000
- set $fp=0
- set $evb=0x88000000
- si
- c
-end
-
-# Show TLB entries
-define show_tlb_entries
- set $i = 0
- set $addr = $arg0
- use_mon_code
- while ($i < 0d32 )
- set $tlb_tag = *(unsigned long*)$addr
- set $tlb_data = *(unsigned long*)($addr + 4)
- printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx\n", $i, $addr, $tlb_tag, $tlb_data
- set $i = $i + 1
- set $addr = $addr + 8
- end
-# use_debug_dma
-end
-define itlb
- set $itlb=0xfe000000
- show_tlb_entries $itlb
-end
-define dtlb
- set $dtlb=0xfe000800
- show_tlb_entries $dtlb
-end
-
-define show_regs
- printf " R0[%08lx] R1[%08lx] R2[%08lx] R3[%08lx]\n",$r0,$r1,$r2,$r3
- printf " R4[%08lx] R5[%08lx] R6[%08lx] R7[%08lx]\n",$r4,$r5,$r6,$r7
- printf " R8[%08lx] R9[%08lx] R10[%08lx] R11[%08lx]\n",$r8,$r9,$r10,$r11
- printf "R12[%08lx] FP[%08lx] LR[%08lx] SP[%08lx]\n",$r12,$fp,$lr,$sp
- printf "PSW[%08lx] CBR[%08lx] SPI[%08lx] SPU[%08lx]\n",$psw,$cbr,$spi,$spu
- printf "BPC[%08lx] PC[%08lx] ACCL[%08lx] ACCH[%08lx]\n",$bpc,$pc,$accl,$acch
- printf "EVB[%08lx]\n",$evb
-end
-
-define restart
- sdireset
- sdireset
- en 1
- set $pc=0x0
- c
- tlb_init
- setup
- load_modules
- boot
-end
-
-define setup
- debug_chaos
-# Clock
-# shell sleep 0.1
-# clock_init_off
-# shell sleep 1
-# clock_init_on_182
-# shell sleep 0.1
-# SDRAM
- set *(unsigned long *)0xa0ef6004 = 0x0001053f
- set *(unsigned long *)0xa0ef6028 = 0x00031102
-end
-
-sdireset
-sdireset
-file vmlinux
-target m32rsdi
-set $pc=0x0
-b *0x30000
-c
-dis 1
-setup
-tlb_init
-load_modules
-boot
+++ /dev/null
-/*
- * linux/arch/m32r/platforms/opsput/io.c
- *
- * Typical I/O routines for OPSPUT board.
- *
- * Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
- * Hitoshi Yamamoto, Takeo Takahashi
- *
- * This file is subject to the terms and conditions of the GNU General
- * Public License. See the file "COPYING" in the main directory of this
- * archive for more details.
- */
-
-#include <asm/m32r.h>
-#include <asm/page.h>
-#include <asm/io.h>
-#include <asm/byteorder.h>
-
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
-#include <linux/types.h>
-
-#define M32R_PCC_IOMAP_SIZE 0x1000
-
-#define M32R_PCC_IOSTART0 0x1000
-#define M32R_PCC_IOEND0 (M32R_PCC_IOSTART0 + M32R_PCC_IOMAP_SIZE - 1)
-
-extern void pcc_ioread_byte(int, unsigned long, void *, size_t, size_t, int);
-extern void pcc_ioread_word(int, unsigned long, void *, size_t, size_t, int);
-extern void pcc_iowrite_byte(int, unsigned long, void *, size_t, size_t, int);
-extern void pcc_iowrite_word(int, unsigned long, void *, size_t, size_t, int);
-#endif /* CONFIG_PCMCIA && CONFIG_M32R_CFC */
-
-#define PORT2ADDR(port) _port2addr(port)
-#define PORT2ADDR_USB(port) _port2addr_usb(port)
-
-static inline void *_port2addr(unsigned long port)
-{
- return (void *)(port | NONCACHE_OFFSET);
-}
-
-#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
-static inline void *__port2addr_ata(unsigned long port)
-{
- static int dummy_reg;
-
- switch (port) {
- case 0x1f0: return (void *)(0x0c002000 | NONCACHE_OFFSET);
- case 0x1f1: return (void *)(0x0c012800 | NONCACHE_OFFSET);
- case 0x1f2: return (void *)(0x0c012002 | NONCACHE_OFFSET);
- case 0x1f3: return (void *)(0x0c012802 | NONCACHE_OFFSET);
- case 0x1f4: return (void *)(0x0c012004 | NONCACHE_OFFSET);
- case 0x1f5: return (void *)(0x0c012804 | NONCACHE_OFFSET);
- case 0x1f6: return (void *)(0x0c012006 | NONCACHE_OFFSET);
- case 0x1f7: return (void *)(0x0c012806 | NONCACHE_OFFSET);
- case 0x3f6: return (void *)(0x0c01200e | NONCACHE_OFFSET);
- default: return (void *)&dummy_reg;
- }
-}
-#endif
-
-/*
- * OPSPUT-LAN is located in the extended bus space
- * from 0x10000000 to 0x13ffffff on physical address.
- * The base address of LAN controller(LAN91C111) is 0x300.
- */
-#define LAN_IOSTART (0x300 | NONCACHE_OFFSET)
-#define LAN_IOEND (0x320 | NONCACHE_OFFSET)
-static inline void *_port2addr_ne(unsigned long port)
-{
- return (void *)(port + 0x10000000);
-}
-static inline void *_port2addr_usb(unsigned long port)
-{
- return (void *)((port & 0x0f) + NONCACHE_OFFSET + 0x10303000);
-}
-
-static inline void delay(void)
-{
- __asm__ __volatile__ ("push r0; \n\t pop r0;" : : :"memory");
-}
-
-/*
- * NIC I/O function
- */
-
-#define PORT2ADDR_NE(port) _port2addr_ne(port)
-
-static inline unsigned char _ne_inb(void *portp)
-{
- return *(volatile unsigned char *)portp;
-}
-
-static inline unsigned short _ne_inw(void *portp)
-{
- return (unsigned short)le16_to_cpu(*(volatile unsigned short *)portp);
-}
-
-static inline void _ne_insb(void *portp, void *addr, unsigned long count)
-{
- unsigned char *buf = (unsigned char *)addr;
-
- while (count--)
- *buf++ = _ne_inb(portp);
-}
-
-static inline void _ne_outb(unsigned char b, void *portp)
-{
- *(volatile unsigned char *)portp = b;
-}
-
-static inline void _ne_outw(unsigned short w, void *portp)
-{
- *(volatile unsigned short *)portp = cpu_to_le16(w);
-}
-
-unsigned char _inb(unsigned long port)
-{
- if (port >= LAN_IOSTART && port < LAN_IOEND)
- return _ne_inb(PORT2ADDR_NE(port));
-
-#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
- else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
- return *(volatile unsigned char *)__port2addr_ata(port);
- }
-#endif
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
- else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- unsigned char b;
- pcc_ioread_byte(0, port, &b, sizeof(b), 1, 0);
- return b;
- } else
-#endif
-
- return *(volatile unsigned char *)PORT2ADDR(port);
-}
-
-unsigned short _inw(unsigned long port)
-{
- if (port >= LAN_IOSTART && port < LAN_IOEND)
- return _ne_inw(PORT2ADDR_NE(port));
-#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
- else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
- return *(volatile unsigned short *)__port2addr_ata(port);
- }
-#endif
-#if defined(CONFIG_USB)
- else if(port >= 0x340 && port < 0x3a0)
- return *(volatile unsigned short *)PORT2ADDR_USB(port);
-#endif
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
- else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- unsigned short w;
- pcc_ioread_word(0, port, &w, sizeof(w), 1, 0);
- return w;
- } else
-#endif
- return *(volatile unsigned short *)PORT2ADDR(port);
-}
-
-unsigned long _inl(unsigned long port)
-{
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
- if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- unsigned long l;
- pcc_ioread_word(0, port, &l, sizeof(l), 1, 0);
- return l;
- } else
-#endif
- return *(volatile unsigned long *)PORT2ADDR(port);
-}
-
-unsigned char _inb_p(unsigned long port)
-{
- unsigned char v = _inb(port);
- delay();
- return (v);
-}
-
-unsigned short _inw_p(unsigned long port)
-{
- unsigned short v = _inw(port);
- delay();
- return (v);
-}
-
-unsigned long _inl_p(unsigned long port)
-{
- unsigned long v = _inl(port);
- delay();
- return (v);
-}
-
-void _outb(unsigned char b, unsigned long port)
-{
- if (port >= LAN_IOSTART && port < LAN_IOEND)
- _ne_outb(b, PORT2ADDR_NE(port));
- else
-#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
- if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
- *(volatile unsigned char *)__port2addr_ata(port) = b;
- } else
-#endif
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
- if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- pcc_iowrite_byte(0, port, &b, sizeof(b), 1, 0);
- } else
-#endif
- *(volatile unsigned char *)PORT2ADDR(port) = b;
-}
-
-void _outw(unsigned short w, unsigned long port)
-{
- if (port >= LAN_IOSTART && port < LAN_IOEND)
- _ne_outw(w, PORT2ADDR_NE(port));
- else
-#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
- if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
- *(volatile unsigned short *)__port2addr_ata(port) = w;
- } else
-#endif
-#if defined(CONFIG_USB)
- if(port >= 0x340 && port < 0x3a0)
- *(volatile unsigned short *)PORT2ADDR_USB(port) = w;
- else
-#endif
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
- if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- pcc_iowrite_word(0, port, &w, sizeof(w), 1, 0);
- } else
-#endif
- *(volatile unsigned short *)PORT2ADDR(port) = w;
-}
-
-void _outl(unsigned long l, unsigned long port)
-{
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
- if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- pcc_iowrite_word(0, port, &l, sizeof(l), 1, 0);
- } else
-#endif
- *(volatile unsigned long *)PORT2ADDR(port) = l;
-}
-
-void _outb_p(unsigned char b, unsigned long port)
-{
- _outb(b, port);
- delay();
-}
-
-void _outw_p(unsigned short w, unsigned long port)
-{
- _outw(w, port);
- delay();
-}
-
-void _outl_p(unsigned long l, unsigned long port)
-{
- _outl(l, port);
- delay();
-}
-
-void _insb(unsigned int port, void *addr, unsigned long count)
-{
- if (port >= LAN_IOSTART && port < LAN_IOEND)
- _ne_insb(PORT2ADDR_NE(port), addr, count);
-#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
- else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
- unsigned char *buf = addr;
- unsigned char *portp = __port2addr_ata(port);
- while (count--)
- *buf++ = *(volatile unsigned char *)portp;
- }
-#endif
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
- else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- pcc_ioread_byte(0, port, (void *)addr, sizeof(unsigned char),
- count, 1);
- }
-#endif
- else {
- unsigned char *buf = addr;
- unsigned char *portp = PORT2ADDR(port);
- while (count--)
- *buf++ = *(volatile unsigned char *)portp;
- }
-}
-
-void _insw(unsigned int port, void *addr, unsigned long count)
-{
- unsigned short *buf = addr;
- unsigned short *portp;
-
- if (port >= LAN_IOSTART && port < LAN_IOEND) {
- /*
- * This portion is only used by smc91111.c to read data
- * from the DATA_REG. Do not swap the data.
- */
- portp = PORT2ADDR_NE(port);
- while (count--)
- *buf++ = *(volatile unsigned short *)portp;
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
- } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- pcc_ioread_word(9, port, (void *)addr, sizeof(unsigned short),
- count, 1);
-#endif
-#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
- } else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
- portp = __port2addr_ata(port);
- while (count--)
- *buf++ = *(volatile unsigned short *)portp;
-#endif
- } else {
- portp = PORT2ADDR(port);
- while (count--)
- *buf++ = *(volatile unsigned short *)portp;
- }
-}
-
-void _insl(unsigned int port, void *addr, unsigned long count)
-{
- unsigned long *buf = addr;
- unsigned long *portp;
-
- portp = PORT2ADDR(port);
- while (count--)
- *buf++ = *(volatile unsigned long *)portp;
-}
-
-void _outsb(unsigned int port, const void *addr, unsigned long count)
-{
- const unsigned char *buf = addr;
- unsigned char *portp;
-
- if (port >= LAN_IOSTART && port < LAN_IOEND) {
- portp = PORT2ADDR_NE(port);
- while (count--)
- _ne_outb(*buf++, portp);
-#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
- } else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
- portp = __port2addr_ata(port);
- while (count--)
- *(volatile unsigned char *)portp = *buf++;
-#endif
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
- } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- pcc_iowrite_byte(0, port, (void *)addr, sizeof(unsigned char),
- count, 1);
-#endif
- } else {
- portp = PORT2ADDR(port);
- while (count--)
- *(volatile unsigned char *)portp = *buf++;
- }
-}
-
-void _outsw(unsigned int port, const void *addr, unsigned long count)
-{
- const unsigned short *buf = addr;
- unsigned short *portp;
-
- if (port >= LAN_IOSTART && port < LAN_IOEND) {
- /*
- * This portion is only used by smc91111.c to write data
- * into the DATA_REG. Do not swap the data.
- */
- portp = PORT2ADDR_NE(port);
- while (count--)
- *(volatile unsigned short *)portp = *buf++;
-#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
- } else if ((port >= 0x1f0 && port <=0x1f7) || port == 0x3f6) {
- portp = __port2addr_ata(port);
- while (count--)
- *(volatile unsigned short *)portp = *buf++;
-#endif
-#if defined(CONFIG_PCMCIA) && defined(CONFIG_M32R_CFC)
- } else if (port >= M32R_PCC_IOSTART0 && port <= M32R_PCC_IOEND0) {
- pcc_iowrite_word(9, port, (void *)addr, sizeof(unsigned short),
- count, 1);
-#endif
- } else {
- portp = PORT2ADDR(port);
- while (count--)
- *(volatile unsigned short *)portp = *buf++;
- }
-}
-
-void _outsl(unsigned int port, const void *addr, unsigned long count)
-{
- const unsigned long *buf = addr;
- unsigned char *portp;
-
- portp = PORT2ADDR(port);
- while (count--)
- *(volatile unsigned long *)portp = *buf++;
-}
+++ /dev/null
-/*
- * linux/arch/m32r/platforms/opsput/setup.c
- *
- * Setup routines for Renesas OPSPUT Board
- *
- * Copyright (c) 2002-2005
- * Hiroyuki Kondo, Hirokazu Takata,
- * Hitoshi Yamamoto, Takeo Takahashi, Mamoru Sakugawa
- *
- * This file is subject to the terms and conditions of the GNU General
- * Public License. See the file "COPYING" in the main directory of this
- * archive for more details.
- */
-
-#include <linux/irq.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-
-#include <asm/m32r.h>
-#include <asm/io.h>
-
-/*
- * OPSP Interrupt Control Unit (Level 1)
- */
-#define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
-
-icu_data_t icu_data[OPSPUT_NUM_CPU_IRQ];
-
-static void disable_opsput_irq(unsigned int irq)
-{
- unsigned long port, data;
-
- port = irq2port(irq);
- data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7;
- outl(data, port);
-}
-
-static void enable_opsput_irq(unsigned int irq)
-{
- unsigned long port, data;
-
- port = irq2port(irq);
- data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6;
- outl(data, port);
-}
-
-static void mask_opsput(struct irq_data *data)
-{
- disable_opsput_irq(data->irq);
-}
-
-static void unmask_opsput(struct irq_data *data)
-{
- enable_opsput_irq(data->irq);
-}
-
-static void shutdown_opsput(struct irq_data *data)
-{
- unsigned long port;
-
- port = irq2port(data->irq);
- outl(M32R_ICUCR_ILEVEL7, port);
-}
-
-static struct irq_chip opsput_irq_type =
-{
- .name = "OPSPUT-IRQ",
- .irq_shutdown = shutdown_opsput,
- .irq_mask = mask_opsput,
- .irq_unmask = unmask_opsput,
-};
-
-/*
- * Interrupt Control Unit of PLD on OPSPUT (Level 2)
- */
-#define irq2pldirq(x) ((x) - OPSPUT_PLD_IRQ_BASE)
-#define pldirq2port(x) (unsigned long)((int)PLD_ICUCR1 + \
- (((x) - 1) * sizeof(unsigned short)))
-
-typedef struct {
- unsigned short icucr; /* ICU Control Register */
-} pld_icu_data_t;
-
-static pld_icu_data_t pld_icu_data[OPSPUT_NUM_PLD_IRQ];
-
-static void disable_opsput_pld_irq(unsigned int irq)
-{
- unsigned long port, data;
- unsigned int pldirq;
-
- pldirq = irq2pldirq(irq);
- port = pldirq2port(pldirq);
- data = pld_icu_data[pldirq].icucr|PLD_ICUCR_ILEVEL7;
- outw(data, port);
-}
-
-static void enable_opsput_pld_irq(unsigned int irq)
-{
- unsigned long port, data;
- unsigned int pldirq;
-
- pldirq = irq2pldirq(irq);
- port = pldirq2port(pldirq);
- data = pld_icu_data[pldirq].icucr|PLD_ICUCR_IEN|PLD_ICUCR_ILEVEL6;
- outw(data, port);
-}
-
-static void mask_opsput_pld(struct irq_data *data)
-{
- disable_opsput_pld_irq(data->irq);
-}
-
-static void unmask_opsput_pld(struct irq_data *data)
-{
- enable_opsput_pld_irq(data->irq);
- enable_opsput_irq(M32R_IRQ_INT1);
-}
-
-static void shutdown_opsput_pld(struct irq_data *data)
-{
- unsigned long port;
- unsigned int pldirq;
-
- pldirq = irq2pldirq(data->irq);
- port = pldirq2port(pldirq);
- outw(PLD_ICUCR_ILEVEL7, port);
-}
-
-static struct irq_chip opsput_pld_irq_type =
-{
- .name = "OPSPUT-PLD-IRQ",
- .irq_shutdown = shutdown_opsput_pld,
- .irq_mask = mask_opsput_pld,
- .irq_unmask = unmask_opsput_pld,
-};
-
-/*
- * Interrupt Control Unit of PLD on OPSPUT-LAN (Level 2)
- */
-#define irq2lanpldirq(x) ((x) - OPSPUT_LAN_PLD_IRQ_BASE)
-#define lanpldirq2port(x) (unsigned long)((int)OPSPUT_LAN_ICUCR1 + \
- (((x) - 1) * sizeof(unsigned short)))
-
-static pld_icu_data_t lanpld_icu_data[OPSPUT_NUM_LAN_PLD_IRQ];
-
-static void disable_opsput_lanpld_irq(unsigned int irq)
-{
- unsigned long port, data;
- unsigned int pldirq;
-
- pldirq = irq2lanpldirq(irq);
- port = lanpldirq2port(pldirq);
- data = lanpld_icu_data[pldirq].icucr|PLD_ICUCR_ILEVEL7;
- outw(data, port);
-}
-
-static void enable_opsput_lanpld_irq(unsigned int irq)
-{
- unsigned long port, data;
- unsigned int pldirq;
-
- pldirq = irq2lanpldirq(irq);
- port = lanpldirq2port(pldirq);
- data = lanpld_icu_data[pldirq].icucr|PLD_ICUCR_IEN|PLD_ICUCR_ILEVEL6;
- outw(data, port);
-}
-
-static void mask_opsput_lanpld(struct irq_data *data)
-{
- disable_opsput_lanpld_irq(data->irq);
-}
-
-static void unmask_opsput_lanpld(struct irq_data *data)
-{
- enable_opsput_lanpld_irq(data->irq);
- enable_opsput_irq(M32R_IRQ_INT0);
-}
-
-static void shutdown_opsput_lanpld(struct irq_data *data)
-{
- unsigned long port;
- unsigned int pldirq;
-
- pldirq = irq2lanpldirq(data->irq);
- port = lanpldirq2port(pldirq);
- outw(PLD_ICUCR_ILEVEL7, port);
-}
-
-static struct irq_chip opsput_lanpld_irq_type =
-{
- .name = "OPSPUT-PLD-LAN-IRQ",
- .irq_shutdown = shutdown_opsput_lanpld,
- .irq_mask = mask_opsput_lanpld,
- .irq_unmask = unmask_opsput_lanpld,
-};
-
-/*
- * Interrupt Control Unit of PLD on OPSPUT-LCD (Level 2)
- */
-#define irq2lcdpldirq(x) ((x) - OPSPUT_LCD_PLD_IRQ_BASE)
-#define lcdpldirq2port(x) (unsigned long)((int)OPSPUT_LCD_ICUCR1 + \
- (((x) - 1) * sizeof(unsigned short)))
-
-static pld_icu_data_t lcdpld_icu_data[OPSPUT_NUM_LCD_PLD_IRQ];
-
-static void disable_opsput_lcdpld_irq(unsigned int irq)
-{
- unsigned long port, data;
- unsigned int pldirq;
-
- pldirq = irq2lcdpldirq(irq);
- port = lcdpldirq2port(pldirq);
- data = lcdpld_icu_data[pldirq].icucr|PLD_ICUCR_ILEVEL7;
- outw(data, port);
-}
-
-static void enable_opsput_lcdpld_irq(unsigned int irq)
-{
- unsigned long port, data;
- unsigned int pldirq;
-
- pldirq = irq2lcdpldirq(irq);
- port = lcdpldirq2port(pldirq);
- data = lcdpld_icu_data[pldirq].icucr|PLD_ICUCR_IEN|PLD_ICUCR_ILEVEL6;
- outw(data, port);
-}
-
-static void mask_opsput_lcdpld(struct irq_data *data)
-{
- disable_opsput_lcdpld_irq(data->irq);
-}
-
-static void unmask_opsput_lcdpld(struct irq_data *data)
-{
- enable_opsput_lcdpld_irq(data->irq);
- enable_opsput_irq(M32R_IRQ_INT2);
-}
-
-static void shutdown_opsput_lcdpld(struct irq_data *data)
-{
- unsigned long port;
- unsigned int pldirq;
-
- pldirq = irq2lcdpldirq(data->irq);
- port = lcdpldirq2port(pldirq);
- outw(PLD_ICUCR_ILEVEL7, port);
-}
-
-static struct irq_chip opsput_lcdpld_irq_type = {
- .name = "OPSPUT-PLD-LCD-IRQ",
- .irq_shutdown = shutdown_opsput_lcdpld,
- .irq_mask = mask_opsput_lcdpld,
- .irq_unmask = unmask_opsput_lcdpld,
-};
-
-void __init init_IRQ(void)
-{
-#if defined(CONFIG_SMC91X)
- /* INT#0: LAN controller on OPSPUT-LAN (SMC91C111)*/
- irq_set_chip_and_handler(OPSPUT_LAN_IRQ_LAN, &opsput_lanpld_irq_type,
- handle_level_irq);
- lanpld_icu_data[irq2lanpldirq(OPSPUT_LAN_IRQ_LAN)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02; /* "H" edge sense */
- disable_opsput_lanpld_irq(OPSPUT_LAN_IRQ_LAN);
-#endif /* CONFIG_SMC91X */
-
- /* MFT2 : system timer */
- irq_set_chip_and_handler(M32R_IRQ_MFT2, &opsput_irq_type,
- handle_level_irq);
- icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
- disable_opsput_irq(M32R_IRQ_MFT2);
-
- /* SIO0 : receive */
- irq_set_chip_and_handler(M32R_IRQ_SIO0_R, &opsput_irq_type,
- handle_level_irq);
- icu_data[M32R_IRQ_SIO0_R].icucr = 0;
- disable_opsput_irq(M32R_IRQ_SIO0_R);
-
- /* SIO0 : send */
- irq_set_chip_and_handler(M32R_IRQ_SIO0_S, &opsput_irq_type,
- handle_level_irq);
- icu_data[M32R_IRQ_SIO0_S].icucr = 0;
- disable_opsput_irq(M32R_IRQ_SIO0_S);
-
- /* SIO1 : receive */
- irq_set_chip_and_handler(M32R_IRQ_SIO1_R, &opsput_irq_type,
- handle_level_irq);
- icu_data[M32R_IRQ_SIO1_R].icucr = 0;
- disable_opsput_irq(M32R_IRQ_SIO1_R);
-
- /* SIO1 : send */
- irq_set_chip_and_handler(M32R_IRQ_SIO1_S, &opsput_irq_type,
- handle_level_irq);
- icu_data[M32R_IRQ_SIO1_S].icucr = 0;
- disable_opsput_irq(M32R_IRQ_SIO1_S);
-
- /* DMA1 : */
- irq_set_chip_and_handler(M32R_IRQ_DMA1, &opsput_irq_type,
- handle_level_irq);
- icu_data[M32R_IRQ_DMA1].icucr = 0;
- disable_opsput_irq(M32R_IRQ_DMA1);
-
-#ifdef CONFIG_SERIAL_M32R_PLDSIO
- /* INT#1: SIO0 Receive on PLD */
- irq_set_chip_and_handler(PLD_IRQ_SIO0_RCV, &opsput_pld_irq_type,
- handle_level_irq);
- pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_RCV)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03;
- disable_opsput_pld_irq(PLD_IRQ_SIO0_RCV);
-
- /* INT#1: SIO0 Send on PLD */
- irq_set_chip_and_handler(PLD_IRQ_SIO0_SND, &opsput_pld_irq_type,
- handle_level_irq);
- pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_SND)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03;
- disable_opsput_pld_irq(PLD_IRQ_SIO0_SND);
-#endif /* CONFIG_SERIAL_M32R_PLDSIO */
-
- /* INT#1: CFC IREQ on PLD */
- irq_set_chip_and_handler(PLD_IRQ_CFIREQ, &opsput_pld_irq_type,
- handle_level_irq);
- pld_icu_data[irq2pldirq(PLD_IRQ_CFIREQ)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* 'L' level sense */
- disable_opsput_pld_irq(PLD_IRQ_CFIREQ);
-
- /* INT#1: CFC Insert on PLD */
- irq_set_chip_and_handler(PLD_IRQ_CFC_INSERT, &opsput_pld_irq_type,
- handle_level_irq);
- pld_icu_data[irq2pldirq(PLD_IRQ_CFC_INSERT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD00; /* 'L' edge sense */
- disable_opsput_pld_irq(PLD_IRQ_CFC_INSERT);
-
- /* INT#1: CFC Eject on PLD */
- irq_set_chip_and_handler(PLD_IRQ_CFC_EJECT, &opsput_pld_irq_type,
- handle_level_irq);
- pld_icu_data[irq2pldirq(PLD_IRQ_CFC_EJECT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02; /* 'H' edge sense */
- disable_opsput_pld_irq(PLD_IRQ_CFC_EJECT);
-
- /*
- * INT0# is used for LAN, DIO
- * We enable it here.
- */
- icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD11;
- enable_opsput_irq(M32R_IRQ_INT0);
-
- /*
- * INT1# is used for UART, MMC, CF Controller in FPGA.
- * We enable it here.
- */
- icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD11;
- enable_opsput_irq(M32R_IRQ_INT1);
-
-#if defined(CONFIG_USB)
- outw(USBCR_OTGS, USBCR); /* USBCR: non-OTG */
- irq_set_chip_and_handler(OPSPUT_LCD_IRQ_USB_INT1,
- &opsput_lcdpld_irq_type, handle_level_irq);
- lcdpld_icu_data[irq2lcdpldirq(OPSPUT_LCD_IRQ_USB_INT1)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* "L" level sense */
- disable_opsput_lcdpld_irq(OPSPUT_LCD_IRQ_USB_INT1);
-#endif
- /*
- * INT2# is used for BAT, USB, AUDIO
- * We enable it here.
- */
- icu_data[M32R_IRQ_INT2].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01;
- enable_opsput_irq(M32R_IRQ_INT2);
-
-#if defined(CONFIG_VIDEO_M32R_AR)
- /*
- * INT3# is used for AR
- */
- irq_set_chip_and_handler(M32R_IRQ_INT3, &opsput_irq_type,
- handle_level_irq);
- icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
- disable_opsput_irq(M32R_IRQ_INT3);
-#endif /* CONFIG_VIDEO_M32R_AR */
-}
-
-#if defined(CONFIG_SMC91X)
-
-#define LAN_IOSTART 0x300
-#define LAN_IOEND 0x320
-static struct resource smc91x_resources[] = {
- [0] = {
- .start = (LAN_IOSTART),
- .end = (LAN_IOEND),
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = OPSPUT_LAN_IRQ_LAN,
- .end = OPSPUT_LAN_IRQ_LAN,
- .flags = IORESOURCE_IRQ,
- }
-};
-
-static struct platform_device smc91x_device = {
- .name = "smc91x",
- .id = 0,
- .num_resources = ARRAY_SIZE(smc91x_resources),
- .resource = smc91x_resources,
-};
-#endif
-
-#if defined(CONFIG_FB_S1D13XXX)
-
-#include <video/s1d13xxxfb.h>
-#include <asm/s1d13806.h>
-
-static struct s1d13xxxfb_pdata s1d13xxxfb_data = {
- .initregs = s1d13xxxfb_initregs,
- .initregssize = ARRAY_SIZE(s1d13xxxfb_initregs),
- .platform_init_video = NULL,
-#ifdef CONFIG_PM
- .platform_suspend_video = NULL,
- .platform_resume_video = NULL,
-#endif
-};
-
-static struct resource s1d13xxxfb_resources[] = {
- [0] = {
- .start = 0x10600000UL,
- .end = 0x1073FFFFUL,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = 0x10400000UL,
- .end = 0x104001FFUL,
- .flags = IORESOURCE_MEM,
- }
-};
-
-static struct platform_device s1d13xxxfb_device = {
- .name = S1D_DEVICENAME,
- .id = 0,
- .dev = {
- .platform_data = &s1d13xxxfb_data,
- },
- .num_resources = ARRAY_SIZE(s1d13xxxfb_resources),
- .resource = s1d13xxxfb_resources,
-};
-#endif
-
-static int __init platform_init(void)
-{
-#if defined(CONFIG_SMC91X)
- platform_device_register(&smc91x_device);
-#endif
-#if defined(CONFIG_FB_S1D13XXX)
- platform_device_register(&s1d13xxxfb_device);
-#endif
- return 0;
-}
-arch_initcall(platform_init);
+++ /dev/null
-obj-y := setup.o io.o
+++ /dev/null
-/*
- * linux/arch/m32r/platforms/usrv/io.c
- *
- * Typical I/O routines for uServer board.
- *
- * Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
- * Hitoshi Yamamoto, Takeo Takahashi
- *
- * This file is subject to the terms and conditions of the GNU General
- * Public License. See the file "COPYING" in the main directory of this
- * archive for more details.
- *
- */
-
-#include <asm/m32r.h>
-#include <asm/page.h>
-#include <asm/io.h>
-
-#include <linux/types.h>
-#include "../../../../drivers/pcmcia/m32r_cfc.h"
-
-extern void pcc_ioread_byte(int, unsigned long, void *, size_t, size_t, int);
-extern void pcc_ioread_word(int, unsigned long, void *, size_t, size_t, int);
-extern void pcc_iowrite_byte(int, unsigned long, void *, size_t, size_t, int);
-extern void pcc_iowrite_word(int, unsigned long, void *, size_t, size_t, int);
-#define CFC_IOSTART CFC_IOPORT_BASE
-#define CFC_IOEND (CFC_IOSTART + (M32R_PCC_MAPSIZE * M32R_MAX_PCC) - 1)
-
-#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
-#define UART0_REGSTART 0x04c20000
-#define UART1_REGSTART 0x04c20100
-#define UART_IOMAP_SIZE 8
-#define UART0_IOSTART 0x3f8
-#define UART0_IOEND (UART0_IOSTART + UART_IOMAP_SIZE - 1)
-#define UART1_IOSTART 0x2f8
-#define UART1_IOEND (UART1_IOSTART + UART_IOMAP_SIZE - 1)
-#endif /* CONFIG_SERIAL_8250 || CONFIG_SERIAL_8250_MODULE */
-
-#define PORT2ADDR(port) _port2addr(port)
-
-static inline void *_port2addr(unsigned long port)
-{
-#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
- if (port >= UART0_IOSTART && port <= UART0_IOEND)
- port = ((port - UART0_IOSTART) << 1) + UART0_REGSTART;
- else if (port >= UART1_IOSTART && port <= UART1_IOEND)
- port = ((port - UART1_IOSTART) << 1) + UART1_REGSTART;
-#endif /* CONFIG_SERIAL_8250 || CONFIG_SERIAL_8250_MODULE */
- return (void *)(port | (NONCACHE_OFFSET));
-}
-
-static inline void delay(void)
-{
- __asm__ __volatile__ ("push r0; \n\t pop r0;" : : :"memory");
-}
-
-unsigned char _inb(unsigned long port)
-{
- if (port >= CFC_IOSTART && port <= CFC_IOEND) {
- unsigned char b;
- pcc_ioread_byte(0, port, &b, sizeof(b), 1, 0);
- return b;
- } else
- return *(volatile unsigned char *)PORT2ADDR(port);
-}
-
-unsigned short _inw(unsigned long port)
-{
- if (port >= CFC_IOSTART && port <= CFC_IOEND) {
- unsigned short w;
- pcc_ioread_word(0, port, &w, sizeof(w), 1, 0);
- return w;
- } else
- return *(volatile unsigned short *)PORT2ADDR(port);
-}
-
-unsigned long _inl(unsigned long port)
-{
- if (port >= CFC_IOSTART && port <= CFC_IOEND) {
- unsigned long l;
- pcc_ioread_word(0, port, &l, sizeof(l), 1, 0);
- return l;
- } else
- return *(volatile unsigned long *)PORT2ADDR(port);
-}
-
-unsigned char _inb_p(unsigned long port)
-{
- unsigned char v = _inb(port);
- delay();
- return v;
-}
-
-unsigned short _inw_p(unsigned long port)
-{
- unsigned short v = _inw(port);
- delay();
- return v;
-}
-
-unsigned long _inl_p(unsigned long port)
-{
- unsigned long v = _inl(port);
- delay();
- return v;
-}
-
-void _outb(unsigned char b, unsigned long port)
-{
- if (port >= CFC_IOSTART && port <= CFC_IOEND)
- pcc_iowrite_byte(0, port, &b, sizeof(b), 1, 0);
- else
- *(volatile unsigned char *)PORT2ADDR(port) = b;
-}
-
-void _outw(unsigned short w, unsigned long port)
-{
- if (port >= CFC_IOSTART && port <= CFC_IOEND)
- pcc_iowrite_word(0, port, &w, sizeof(w), 1, 0);
- else
- *(volatile unsigned short *)PORT2ADDR(port) = w;
-}
-
-void _outl(unsigned long l, unsigned long port)
-{
- if (port >= CFC_IOSTART && port <= CFC_IOEND)
- pcc_iowrite_word(0, port, &l, sizeof(l), 1, 0);
- else
- *(volatile unsigned long *)PORT2ADDR(port) = l;
-}
-
-void _outb_p(unsigned char b, unsigned long port)
-{
- _outb(b, port);
- delay();
-}
-
-void _outw_p(unsigned short w, unsigned long port)
-{
- _outw(w, port);
- delay();
-}
-
-void _outl_p(unsigned long l, unsigned long port)
-{
- _outl(l, port);
- delay();
-}
-
-void _insb(unsigned int port, void * addr, unsigned long count)
-{
- if (port >= CFC_IOSTART && port <= CFC_IOEND)
- pcc_ioread_byte(0, port, addr, sizeof(unsigned char), count, 1);
- else {
- unsigned char *buf = addr;
- unsigned char *portp = PORT2ADDR(port);
- while (count--)
- *buf++ = *(volatile unsigned char *)portp;
- }
-}
-
-void _insw(unsigned int port, void * addr, unsigned long count)
-{
- unsigned short *buf = addr;
- unsigned short *portp;
-
- if (port >= CFC_IOSTART && port <= CFC_IOEND)
- pcc_ioread_word(0, port, addr, sizeof(unsigned short), count,
- 1);
- else {
- portp = PORT2ADDR(port);
- while (count--)
- *buf++ = *(volatile unsigned short *)portp;
- }
-}
-
-void _insl(unsigned int port, void * addr, unsigned long count)
-{
- unsigned long *buf = addr;
- unsigned long *portp;
-
- portp = PORT2ADDR(port);
- while (count--)
- *buf++ = *(volatile unsigned long *)portp;
-}
-
-void _outsb(unsigned int port, const void * addr, unsigned long count)
-{
- const unsigned char *buf = addr;
- unsigned char *portp;
-
- if (port >= CFC_IOSTART && port <= CFC_IOEND)
- pcc_iowrite_byte(0, port, (void *)addr, sizeof(unsigned char),
- count, 1);
- else {
- portp = PORT2ADDR(port);
- while (count--)
- *(volatile unsigned char *)portp = *buf++;
- }
-}
-
-void _outsw(unsigned int port, const void * addr, unsigned long count)
-{
- const unsigned short *buf = addr;
- unsigned short *portp;
-
- if (port >= CFC_IOSTART && port <= CFC_IOEND)
- pcc_iowrite_word(0, port, (void *)addr, sizeof(unsigned short),
- count, 1);
- else {
- portp = PORT2ADDR(port);
- while (count--)
- *(volatile unsigned short *)portp = *buf++;
- }
-}
-
-void _outsl(unsigned int port, const void * addr, unsigned long count)
-{
- const unsigned long *buf = addr;
- unsigned char *portp;
-
- portp = PORT2ADDR(port);
- while (count--)
- *(volatile unsigned long *)portp = *buf++;
-}
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0
-/*
- * linux/arch/m32r/platforms/usrv/setup.c
- *
- * Setup routines for MITSUBISHI uServer
- *
- * Copyright (c) 2001, 2002, 2003 Hiroyuki Kondo, Hirokazu Takata,
- * Hitoshi Yamamoto
- */
-
-#include <linux/irq.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-
-#include <asm/m32r.h>
-#include <asm/io.h>
-
-#define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
-
-icu_data_t icu_data[M32700UT_NUM_CPU_IRQ];
-
-static void disable_mappi_irq(unsigned int irq)
-{
- unsigned long port, data;
-
- port = irq2port(irq);
- data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7;
- outl(data, port);
-}
-
-static void enable_mappi_irq(unsigned int irq)
-{
- unsigned long port, data;
-
- port = irq2port(irq);
- data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6;
- outl(data, port);
-}
-
-static void mask_mappi(struct irq_data *data)
-{
- disable_mappi_irq(data->irq);
-}
-
-static void unmask_mappi(struct irq_data *data)
-{
- enable_mappi_irq(data->irq);
-}
-
-static void shutdown_mappi(struct irq_data *data)
-{
- unsigned long port;
-
- port = irq2port(data->irq);
- outl(M32R_ICUCR_ILEVEL7, port);
-}
-
-static struct irq_chip mappi_irq_type =
-{
- .name = "M32700-IRQ",
- .irq_shutdown = shutdown_mappi,
- .irq_mask = mask_mappi,
- .irq_unmask = unmask_mappi,
-};
-
-/*
- * Interrupt Control Unit of PLD on M32700UT (Level 2)
- */
-#define irq2pldirq(x) ((x) - M32700UT_PLD_IRQ_BASE)
-#define pldirq2port(x) (unsigned long)((int)PLD_ICUCR1 + \
- (((x) - 1) * sizeof(unsigned short)))
-
-typedef struct {
- unsigned short icucr; /* ICU Control Register */
-} pld_icu_data_t;
-
-static pld_icu_data_t pld_icu_data[M32700UT_NUM_PLD_IRQ];
-
-static void disable_m32700ut_pld_irq(unsigned int irq)
-{
- unsigned long port, data;
- unsigned int pldirq;
-
- pldirq = irq2pldirq(irq);
- port = pldirq2port(pldirq);
- data = pld_icu_data[pldirq].icucr|PLD_ICUCR_ILEVEL7;
- outw(data, port);
-}
-
-static void enable_m32700ut_pld_irq(unsigned int irq)
-{
- unsigned long port, data;
- unsigned int pldirq;
-
- pldirq = irq2pldirq(irq);
- port = pldirq2port(pldirq);
- data = pld_icu_data[pldirq].icucr|PLD_ICUCR_IEN|PLD_ICUCR_ILEVEL6;
- outw(data, port);
-}
-
-static void mask_m32700ut_pld(struct irq_data *data)
-{
- disable_m32700ut_pld_irq(data->irq);
-}
-
-static void unmask_m32700ut_pld(struct irq_data *data)
-{
- enable_m32700ut_pld_irq(data->irq);
- enable_mappi_irq(M32R_IRQ_INT1);
-}
-
-static void shutdown_m32700ut_pld(struct irq_data *data)
-{
- unsigned long port;
- unsigned int pldirq;
-
- pldirq = irq2pldirq(data->irq);
- port = pldirq2port(pldirq);
- outw(PLD_ICUCR_ILEVEL7, port);
-}
-
-static struct irq_chip m32700ut_pld_irq_type =
-{
- .name = "USRV-PLD-IRQ",
- .irq_shutdown = shutdown_m32700ut_pld,
- .irq_mask = mask_m32700ut_pld,
- .irq_unmask = unmask_m32700ut_pld,
-};
-
-void __init init_IRQ(void)
-{
- static int once = 0;
- int i;
-
- if (once)
- return;
- else
- once++;
-
- /* MFT2 : system timer */
- irq_set_chip_and_handler(M32R_IRQ_MFT2, &mappi_irq_type,
- handle_level_irq);
- icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
- disable_mappi_irq(M32R_IRQ_MFT2);
-
-#if defined(CONFIG_SERIAL_M32R_SIO)
- /* SIO0_R : uart receive data */
- irq_set_chip_and_handler(M32R_IRQ_SIO0_R, &mappi_irq_type,
- handle_level_irq);
- icu_data[M32R_IRQ_SIO0_R].icucr = 0;
- disable_mappi_irq(M32R_IRQ_SIO0_R);
-
- /* SIO0_S : uart send data */
- irq_set_chip_and_handler(M32R_IRQ_SIO0_S, &mappi_irq_type,
- handle_level_irq);
- icu_data[M32R_IRQ_SIO0_S].icucr = 0;
- disable_mappi_irq(M32R_IRQ_SIO0_S);
-
- /* SIO1_R : uart receive data */
- irq_set_chip_and_handler(M32R_IRQ_SIO1_R, &mappi_irq_type,
- handle_level_irq);
- icu_data[M32R_IRQ_SIO1_R].icucr = 0;
- disable_mappi_irq(M32R_IRQ_SIO1_R);
-
- /* SIO1_S : uart send data */
- irq_set_chip_and_handler(M32R_IRQ_SIO1_S, &mappi_irq_type,
- handle_level_irq);
- icu_data[M32R_IRQ_SIO1_S].icucr = 0;
- disable_mappi_irq(M32R_IRQ_SIO1_S);
-#endif /* CONFIG_SERIAL_M32R_SIO */
-
- /* INT#67-#71: CFC#0 IREQ on PLD */
- for (i = 0 ; i < CONFIG_M32R_CFC_NUM ; i++ ) {
- irq_set_chip_and_handler(PLD_IRQ_CF0 + i,
- &m32700ut_pld_irq_type,
- handle_level_irq);
- pld_icu_data[irq2pldirq(PLD_IRQ_CF0 + i)].icucr
- = PLD_ICUCR_ISMOD01; /* 'L' level sense */
- disable_m32700ut_pld_irq(PLD_IRQ_CF0 + i);
- }
-
-#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
- /* INT#76: 16552D#0 IREQ on PLD */
- irq_set_chip_and_handler(PLD_IRQ_UART0, &m32700ut_pld_irq_type,
- handle_level_irq);
- pld_icu_data[irq2pldirq(PLD_IRQ_UART0)].icucr
- = PLD_ICUCR_ISMOD03; /* 'H' level sense */
- disable_m32700ut_pld_irq(PLD_IRQ_UART0);
-
- /* INT#77: 16552D#1 IREQ on PLD */
- irq_set_chip_and_handler(PLD_IRQ_UART1, &m32700ut_pld_irq_type,
- handle_level_irq);
- pld_icu_data[irq2pldirq(PLD_IRQ_UART1)].icucr
- = PLD_ICUCR_ISMOD03; /* 'H' level sense */
- disable_m32700ut_pld_irq(PLD_IRQ_UART1);
-#endif /* CONFIG_SERIAL_8250 || CONFIG_SERIAL_8250_MODULE */
-
-#if defined(CONFIG_IDC_AK4524) || defined(CONFIG_IDC_AK4524_MODULE)
- /* INT#80: AK4524 IREQ on PLD */
- irq_set_chip_and_handler(PLD_IRQ_SNDINT, &m32700ut_pld_irq_type,
- handle_level_irq);
- pld_icu_data[irq2pldirq(PLD_IRQ_SNDINT)].icucr
- = PLD_ICUCR_ISMOD01; /* 'L' level sense */
- disable_m32700ut_pld_irq(PLD_IRQ_SNDINT);
-#endif /* CONFIG_IDC_AK4524 || CONFIG_IDC_AK4524_MODULE */
-
- /*
- * INT1# is used for UART, MMC, CF Controller in FPGA.
- * We enable it here.
- */
- icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD11;
- enable_mappi_irq(M32R_IRQ_INT1);
-}
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
-#include <asm-generic/bitsperlong.h>
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
-#ifndef TOOLS_ARCH_M32R_UAPI_ASM_MMAN_FIX_H
-#define TOOLS_ARCH_M32R_UAPI_ASM_MMAN_FIX_H
-#include <uapi/asm-generic/mman.h>
-/* MAP_32BIT is undefined on m32r, fix it for perf */
-#define MAP_32BIT 0
-#endif
projects / people / ms / linux.git / commitdiff
