gas/

2004-05-27  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-ia64.c (ar_is_in_integer_unit): Removed.
	(ar_is_only_in_integer_unit): New.
	(ar_is_only_in_memory_unit): New.
	(generate_unwind_image): Silence gcc on 32bit host.
	(md_assemble): Use ar_is_only_in_integer_unit instead of
	ar_is_in_integer_unit. Check AR access.

gas/testsuite

2004-05-27  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/ia64/regs.d: Updated.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 7365d169e1456a23f03c795420c27a0e578db723..66f396a66a61c20c98f3ba6668c3ce3e657154a3 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,12 @@
+2004-05-27  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * config/tc-ia64.c (ar_is_in_integer_unit): Removed.
+       (ar_is_only_in_integer_unit): New.
+       (ar_is_only_in_memory_unit): New.
+       (generate_unwind_image): Silence gcc on 32bit host.
+       (md_assemble): Use ar_is_only_in_integer_unit instead of
+       ar_is_in_integer_unit. Check AR access.
+
 2004-05-27  Peter Barada  <peter@the-baradas.com>
 
        * config/tc-m68k.c (md_begin): Sort the opcode table into

diff --git a/gas/config/tc-ia64.c b/gas/config/tc-ia64.c
index 0dc438c2ee4142d54261d2d8a3d1070ea31564fd..8c3756778f391ed9ae0f721f330eea86d0127add 100644 (file)
--- a/gas/config/tc-ia64.c
+++ b/gas/config/tc-ia64.c
@@ -696,7 +696,6 @@ static struct
 typedef void (*vbyte_func) PARAMS ((int, char *, char *));
 
 /* Forward declarations:  */
-static int ar_is_in_integer_unit PARAMS ((int regnum));
 static void set_section PARAMS ((char *name));
 static unsigned int set_regstack PARAMS ((unsigned int, unsigned int,
                                          unsigned int, unsigned int));
@@ -908,19 +907,22 @@ static unsigned int get_saved_prologue_count PARAMS ((unsigned long));
 static void save_prologue_count PARAMS ((unsigned long, unsigned int));
 static void free_saved_prologue_counts PARAMS ((void));
 
-/* Determine if application register REGNUM resides in the integer
+/* Determine if application register REGNUM resides only in the integer
    unit (as opposed to the memory unit).  */
 static int
-ar_is_in_integer_unit (reg)
-     int reg;
+ar_is_only_in_integer_unit (int reg)
 {
   reg -= REG_AR;
+  return reg >= 64 && reg <= 111;
+}
 
-  return (reg == 64    /* pfs */
-         || reg == 65  /* lc */
-         || reg == 66  /* ec */
-         /* ??? ias accepts and puts these in the integer unit.  */
-         || (reg >= 112 && reg <= 127));
+/* Determine if application register REGNUM resides only in the memory 
+   unit (as opposed to the integer unit).  */
+static int
+ar_is_only_in_memory_unit (int reg)
+{
+  reg -= REG_AR;
+  return reg >= 0 && reg <= 47;
 }
 
 /* Switch to section NAME and create section if necessary.  It's
@@ -3447,7 +3449,8 @@ generate_unwind_image (const segT text_seg)
       unwind.info = expr_build_dot ();
       
       frag_var (rs_machine_dependent, size, size, 0, 0,
-               (offsetT) unwind.personality_routine, (char *) list);
+               (offsetT) (long) unwind.personality_routine,
+               (char *) list);
 
       /* Add the personality address to the image.  */
       if (unwind.personality_routine != 0)
@@ -10021,11 +10024,15 @@ md_assemble (str)
            rop = 1;
          else
            abort ();
-         if (CURR_SLOT.opnd[rop].X_op == O_register
-             && ar_is_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number))
-           mnemonic = "mov.i";
+         if (CURR_SLOT.opnd[rop].X_op == O_register)
+           {
+             if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number))
+               mnemonic = "mov.i";
+             else
+               mnemonic = "mov.m";
+           }
          else
-           mnemonic = "mov.m";
+           abort ();
          ia64_free_opcode (idesc);
          idesc = ia64_find_opcode (mnemonic);
          while (idesc != NULL
@@ -10034,6 +10041,33 @@ md_assemble (str)
            idesc = get_next_opcode (idesc);
        }
     }
+  else if (strcmp (idesc->name, "mov.i") == 0
+          || strcmp (idesc->name, "mov.m") == 0)
+    {
+      enum ia64_opnd opnd1, opnd2;
+      int rop;
+      
+      opnd1 = idesc->operands[0];
+      opnd2 = idesc->operands[1];
+      if (opnd1 == IA64_OPND_AR3)
+       rop = 0;
+      else if (opnd2 == IA64_OPND_AR3)
+       rop = 1;
+      else
+       abort ();
+      if (CURR_SLOT.opnd[rop].X_op == O_register)
+       {
+         char unit = 'a';
+         if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number))
+           unit = 'i';
+         else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number))
+           unit = 'm';
+         if (unit != 'a' && unit != idesc->name [4])
+           as_bad ("AR %d cannot be accessed by %c-unit",
+                   (int) (CURR_SLOT.opnd[rop].X_add_number - REG_AR),
+                   TOUPPER (unit));
+       }
+    }
 
   qp_regno = 0;
   if (md.qp.X_op == O_register)

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 2169b61056afbec424bd7293dfa41b5abf73b30e..c26d461ab6f5736685c02c41e668d9af790d13ee 100644 (file)
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2004-05-27  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * gas/ia64/regs.d: Updated.
+
 2004-05-26  H.J. Lu  <hongjiu.lu@intel.com>
 
        * gas/ia64/ia64.exp: Run invalid-ar.

diff --git a/gas/testsuite/gas/ia64/regs.d b/gas/testsuite/gas/ia64/regs.d
index 20655b1148143f34c7d1f9c8769c51cc8945f0cf..8ff41a449eda88687e1e092896d1fa675b4371de 100644 (file)
--- a/gas/testsuite/gas/ia64/regs.d
+++ b/gas/testsuite/gas/ia64/regs.d
@@ -2041,53 +2041,53 @@ Disassembly of section \.text:
     2a56:      00 00 00 02 00 20                   nop\.m 0x0
     2a5c:      00 10 ca 00                         mov\.i r1=ar\.ec;;
     2a60:      09 00 00 00 01 00       \[MMI\]       nop\.m 0x0
-    2a66:      00 00 00 02 00 20                   nop\.m 0x0
-    2a6c:      00 80 cb 00                         mov\.i r1=ar112;;
+    2a66:      10 00 c0 45 08 00                   mov\.m r1=ar112
+    2a6c:      00 00 04 00                         nop\.i 0x0;;
     2a70:      09 00 00 00 01 00       \[MMI\]       nop\.m 0x0
-    2a76:      00 00 00 02 00 20                   nop\.m 0x0
-    2a7c:      00 88 cb 00                         mov\.i r1=ar113;;
+    2a76:      10 00 c4 45 08 00                   mov\.m r1=ar113
+    2a7c:      00 00 04 00                         nop\.i 0x0;;
     2a80:      09 00 00 00 01 00       \[MMI\]       nop\.m 0x0
-    2a86:      00 00 00 02 00 20                   nop\.m 0x0
-    2a8c:      00 90 cb 00                         mov\.i r1=ar114;;
+    2a86:      10 00 c8 45 08 00                   mov\.m r1=ar114
+    2a8c:      00 00 04 00                         nop\.i 0x0;;
     2a90:      09 00 00 00 01 00       \[MMI\]       nop\.m 0x0
-    2a96:      00 00 00 02 00 20                   nop\.m 0x0
-    2a9c:      00 98 cb 00                         mov\.i r1=ar115;;
+    2a96:      10 00 cc 45 08 00                   mov\.m r1=ar115
+    2a9c:      00 00 04 00                         nop\.i 0x0;;
     2aa0:      09 00 00 00 01 00       \[MMI\]       nop\.m 0x0
-    2aa6:      00 00 00 02 00 20                   nop\.m 0x0
-    2aac:      00 a0 cb 00                         mov\.i r1=ar116;;
+    2aa6:      10 00 d0 45 08 00                   mov\.m r1=ar116
+    2aac:      00 00 04 00                         nop\.i 0x0;;
     2ab0:      09 00 00 00 01 00       \[MMI\]       nop\.m 0x0
-    2ab6:      00 00 00 02 00 20                   nop\.m 0x0
-    2abc:      00 a8 cb 00                         mov\.i r1=ar117;;
+    2ab6:      10 00 d4 45 08 00                   mov\.m r1=ar117
+    2abc:      00 00 04 00                         nop\.i 0x0;;
     2ac0:      09 00 00 00 01 00       \[MMI\]       nop\.m 0x0
-    2ac6:      00 00 00 02 00 20                   nop\.m 0x0
-    2acc:      00 b0 cb 00                         mov\.i r1=ar118;;
+    2ac6:      10 00 d8 45 08 00                   mov\.m r1=ar118
+    2acc:      00 00 04 00                         nop\.i 0x0;;
     2ad0:      09 00 00 00 01 00       \[MMI\]       nop\.m 0x0
-    2ad6:      00 00 00 02 00 20                   nop\.m 0x0
-    2adc:      00 b8 cb 00                         mov\.i r1=ar119;;
+    2ad6:      10 00 dc 45 08 00                   mov\.m r1=ar119
+    2adc:      00 00 04 00                         nop\.i 0x0;;
     2ae0:      09 00 00 00 01 00       \[MMI\]       nop\.m 0x0
-    2ae6:      00 00 00 02 00 20                   nop\.m 0x0
-    2aec:      00 c0 cb 00                         mov\.i r1=ar120;;
+    2ae6:      10 00 e0 45 08 00                   mov\.m r1=ar120
+    2aec:      00 00 04 00                         nop\.i 0x0;;
     2af0:      09 00 00 00 01 00       \[MMI\]       nop\.m 0x0
-    2af6:      00 00 00 02 00 20                   nop\.m 0x0
-    2afc:      00 c8 cb 00                         mov\.i r1=ar121;;
+    2af6:      10 00 e4 45 08 00                   mov\.m r1=ar121
+    2afc:      00 00 04 00                         nop\.i 0x0;;
     2b00:      09 00 00 00 01 00       \[MMI\]       nop\.m 0x0
-    2b06:      00 00 00 02 00 20                   nop\.m 0x0
-    2b0c:      00 d0 cb 00                         mov\.i r1=ar122;;
+    2b06:      10 00 e8 45 08 00                   mov\.m r1=ar122
+    2b0c:      00 00 04 00                         nop\.i 0x0;;
     2b10:      09 00 00 00 01 00       \[MMI\]       nop\.m 0x0
-    2b16:      00 00 00 02 00 20                   nop\.m 0x0
-    2b1c:      00 d8 cb 00                         mov\.i r1=ar123;;
+    2b16:      10 00 ec 45 08 00                   mov\.m r1=ar123
+    2b1c:      00 00 04 00                         nop\.i 0x0;;
     2b20:      09 00 00 00 01 00       \[MMI\]       nop\.m 0x0
-    2b26:      00 00 00 02 00 20                   nop\.m 0x0
-    2b2c:      00 e0 cb 00                         mov\.i r1=ar124;;
+    2b26:      10 00 f0 45 08 00                   mov\.m r1=ar124
+    2b2c:      00 00 04 00                         nop\.i 0x0;;
     2b30:      09 00 00 00 01 00       \[MMI\]       nop\.m 0x0
-    2b36:      00 00 00 02 00 20                   nop\.m 0x0
-    2b3c:      00 e8 cb 00                         mov\.i r1=ar125;;
+    2b36:      10 00 f4 45 08 00                   mov\.m r1=ar125
+    2b3c:      00 00 04 00                         nop\.i 0x0;;
     2b40:      09 00 00 00 01 00       \[MMI\]       nop\.m 0x0
-    2b46:      00 00 00 02 00 20                   nop\.m 0x0
-    2b4c:      00 f0 cb 00                         mov\.i r1=ar126;;
+    2b46:      10 00 f8 45 08 00                   mov\.m r1=ar126
+    2b4c:      00 00 04 00                         nop\.i 0x0;;
     2b50:      09 00 00 00 01 00       \[MMI\]       nop\.m 0x0
-    2b56:      00 00 00 02 00 20                   nop\.m 0x0
-    2b5c:      00 f8 cb 00                         mov\.i r1=ar127;;
+    2b56:      10 00 fc 45 08 00                   mov\.m r1=ar127
+    2b5c:      00 00 04 00                         nop\.i 0x0;;
     2b60:      09 00 00 00 01 00       \[MMI\]       nop\.m 0x0
     2b66:      10 00 00 44 08 00                   mov\.m r1=ar\.k0
     2b6c:      00 00 04 00                         nop\.i 0x0;;