]> git.ipfire.org Git - thirdparty/binutils-gdb.git/commitdiff
Test US bit of v850eq.
authorAndrew Cagney <cagney@redhat.com>
Wed, 17 Sep 1997 13:46:29 +0000 (13:46 +0000)
committerAndrew Cagney <cagney@redhat.com>
Wed, 17 Sep 1997 13:46:29 +0000 (13:46 +0000)
Loop program for testing interrupt delivery.

sim/testsuite/v850eq-elf/Makefile.in
sim/testsuite/v850eq-elf/loop.s [new file with mode: 0644]
sim/testsuite/v850eq-elf/t-sld.s [new file with mode: 0644]

index 567f29156804d017a2680ff37a683473051fcbde..7f4c96953f01cee631dacfa09f053937241addf5 100644 (file)
@@ -89,6 +89,7 @@ TESTS= \
        t-ctret.ok \
        t-hsw.ok \
        t-ldsr.ok \
+       t-sld.ok \
        t-sxb.ok \
        t-sxh.ok \
        t-zxb.ok \
diff --git a/sim/testsuite/v850eq-elf/loop.s b/sim/testsuite/v850eq-elf/loop.s
new file mode 100644 (file)
index 0000000..bdd870b
--- /dev/null
@@ -0,0 +1,7 @@
+.include "t-macros.i"
+
+       start
+
+loop:  br loop
+
+       exit0
diff --git a/sim/testsuite/v850eq-elf/t-sld.s b/sim/testsuite/v850eq-elf/t-sld.s
new file mode 100644 (file)
index 0000000..861a9bf
--- /dev/null
@@ -0,0 +1,57 @@
+.include "t-macros.i"
+
+       start
+
+       # ensure that the US bit is clear
+       load r2 0xff
+       stsr psw, r3
+       and r2, r3
+       ldsr r3, psw
+
+       # put something into EP
+       load ep ep_base
+       
+test_sldb1:
+       sld.b 0[ep], r4
+       check1 r4 0xffffff80
+       
+test_sldbu1:
+       sld.bu 0[ep], r4
+       check1 r4, 0x80
+
+test_sldh1:
+       sld.h 0[ep], r4
+       check1 r4 0xffff8080
+       
+test_sldhu1:
+       sld.hu 0[ep], r4
+       check1 r4, 0x8080
+
+       
+       # Now set the US bit
+       load r2 0x100
+       stsr psw, r3
+       or r2, r3
+       ldsr r3, psw
+
+       
+test_sldb2:
+       sld.b 0[ep], r4
+       check1 r4, 0x80
+       
+test_sldbu2:
+       sld.bu 0[ep], r4
+       check1 r4 0xffffff80
+
+test_sldh2:
+       sld.h 0[ep], r4
+       check1 r4, 0x8080
+       
+test_sldhu2:
+       sld.hu 0[ep], r4
+       check1 r4 0xffff8080
+
+       exit0
+
+ep_base:
+       .short 0x8080