Merge tag 'x86-cleanups-2024-05-13' of git://git.kernel.org/pub/scm/linux/kernel...

Pull x86 cleanups from Ingo Molnar:

 - Fix function prototypes to address clang function type cast
   warnings in the math-emu code

 - Reorder definitions in <asm/msr-index.h>

 - Remove unused code

 - Fix typos

 - Simplify #include sections

* tag 'x86-cleanups-2024-05-13' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/pci/ce4100: Remove unused 'struct sim_reg_op'
  x86/msr: Move ARCH_CAP_XAPIC_DISABLE bit definition to its rightful place
  x86/math-emu: Fix function cast warnings
  x86/extable: Remove unused fixup type EX_TYPE_COPY
  x86/rtc: Remove unused intel-mid.h
  x86/32: Remove unused IA32_STACK_TOP and two externs
  x86/head: Simplify relative include path to xen-head.S
  x86/fred: Fix typo in Kconfig description
  x86/syscall/compat: Remove ia32_unistd.h
  x86/syscall/compat: Remove unused macro __SYSCALL_ia32_NR
  x86/virt/tdx: Remove duplicate include
  x86/xen: Remove duplicate #include

diff --cc arch/x86/Kconfig
index 9bdb0ba5b8c0a8db7a60a777627179015cbeaf02,bf2b2cb65e7fdeabf35e7789764493b04d1df197..40565564a625d7620b579fe89bc0451e4885734a
--- 1/arch/x86/Kconfig
--- 2/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@@ -501,11 -504,12 +501,11 @@@ config X86_FRE
          When enabled, try to use Flexible Return and Event Delivery
          instead of the legacy SYSCALL/SYSENTER/IDT architecture for
          ring transitions and exception/interrupt handling if the
-         system supports.
+         system supports it.
  
 -if X86_32
  config X86_BIGSMP
        bool "Support for big SMP systems with more than 8 CPUs"
 -      depends on SMP
 +      depends on SMP && X86_32
        help
          This option is needed for the systems that have more than 8 CPUs.
  

diff --cc arch/x86/entry/entry_64_compat.S
Simple merge

diff --cc arch/x86/include/asm/msr-index.h
index e72c2b87295799af9d44eb84f59d095f4f90acfd,961c0eb5aaaf2bfcd4dbc9cf8e71769cd8040e7c..e022e6eb766c64050aedcefc5b8962c2049184c6
--- 1/arch/x86/include/asm/msr-index.h
--- 2/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@@ -166,10 -163,10 +166,14 @@@
                                                 * are restricted to targets in
                                                 * kernel.
                                                 */
 +#define ARCH_CAP_BHI_NO                       BIT(20) /*
 +                                               * CPU is not affected by Branch
 +                                               * History Injection.
 +                                               */
+ #define ARCH_CAP_XAPIC_DISABLE                BIT(21) /*
+                                                * IA32_XAPIC_DISABLE_STATUS MSR
+                                                * supported
+                                                */
  #define ARCH_CAP_PBRSB_NO             BIT(24) /*
                                                 * Not susceptible to Post-Barrier
                                                 * Return Stack Buffer Predictions.

diff --cc arch/x86/kernel/head_32.S
Simple merge

diff --cc arch/x86/kernel/head_64.S
Simple merge

diff --cc arch/x86/xen/enlighten.c
Simple merge