;; GCC machine description for CRIS cpu cores.
-;; Copyright (C) 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
+;; Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
;; Contributed by Axis Communications.
;; This file is part of GCC.
;; gcc-2.7.2 (and problably not on gcc-2.8.1), relating to that when a
;; constant is substituted into an operand, the actual mode must be
;; deduced from the pattern. There is reasonable hope that that has been
-;; fixed in egcs post 1.1.1, so FIXME: try again.
+;; fixed, so FIXME: try again.
;; You will notice that three-operand alternatives ("=r", "r", "!To")
;; are marked with a "!" constraint modifier to avoid being reloaded
(define_insn "*extopqihi_side_biap"
[(set (match_operand:HI 0 "register_operand" "=r,r")
(match_operator:HI
- 6 "cris_operand_extend_operator"
+ 6 "cris_additive_operand_extend_operator"
[(match_operand:HI 1 "register_operand" "0,0")
(match_operator:HI
7 "cris_extend_operator"
(plus:SI (mult:SI (match_dup 2)
(match_dup 3))
(match_dup 4)))]
- "(GET_CODE (operands[5]) != UMIN || GET_CODE (operands[7]) == ZERO_EXTEND)
- && cris_side_effect_mode_ok (MULT, operands, 5, 4, 2, 3, 0)"
+ "cris_side_effect_mode_ok (MULT, operands, 5, 4, 2, 3, 0)"
"@
#
%x6%e7.%m7 [%5=%4+%2%T3],%0")
(plus:SI (mult:SI (match_dup 2)
(match_dup 3))
(match_dup 4)))]
- "(GET_CODE (operands[5]) != UMIN || GET_CODE (operands[7]) == ZERO_EXTEND)
+ "(GET_CODE (operands[6]) != UMIN || GET_CODE (operands[7]) == ZERO_EXTEND)
&& cris_side_effect_mode_ok (MULT, operands, 5, 4, 2, 3, 0)"
"@
#
(plus:SI (mult:SI (match_dup 2)
(match_dup 3))
(match_dup 4)))]
- "(GET_CODE (operands[5]) != UMIN || GET_CODE (operands[7]) == ZERO_EXTEND)
+ "(GET_CODE (operands[6]) != UMIN || GET_CODE (operands[7]) == ZERO_EXTEND)
&& cris_side_effect_mode_ok (MULT, operands, 5, 4, 2, 3, 0)"
"@
#
(define_insn "*extopqihi_side"
[(set (match_operand:HI 0 "register_operand" "=r,r,r")
(match_operator:HI
- 5 "cris_operand_extend_operator"
+ 5 "cris_additive_operand_extend_operator"
[(match_operand:HI 1 "register_operand" "0,0,0")
(match_operator:HI
6 "cris_extend_operator"
(set (match_operand:SI 4 "register_operand" "=*2,r,r")
(plus:SI (match_dup 2)
(match_dup 3)))]
- "(GET_CODE (operands[5]) != UMIN || GET_CODE (operands[6]) == ZERO_EXTEND)
- && cris_side_effect_mode_ok (PLUS, operands, 4, 2, 3, -1, 0)"
+ "cris_side_effect_mode_ok (PLUS, operands, 4, 2, 3, -1, 0)"
"*
{
if (which_alternative == 0
;; QImode to HImode
;; FIXME: GCC should widen.
-;; FIXME: These could have anonymous mode for operand 0.
(define_insn "*extopqihi_swap_side_biap"
[(set (match_operand:HI 0 "register_operand" "=r,r")
- (match_operator:HI
- 7 "cris_plus_or_bound_operator"
- [(match_operator:HI
- 6 "cris_extend_operator"
- [(mem:QI (plus:SI
- (mult:SI (match_operand:SI 2 "register_operand" "r,r")
- (match_operand:SI 3 "const_int_operand" "n,n"))
- (match_operand:SI 4 "register_operand" "r,r")))])
- (match_operand:HI 1 "register_operand" "0,0")]))
+ (plus:HI
+ (match_operator:HI
+ 6 "cris_extend_operator"
+ [(mem:QI (plus:SI
+ (mult:SI (match_operand:SI 2 "register_operand" "r,r")
+ (match_operand:SI 3 "const_int_operand" "n,n"))
+ (match_operand:SI 4 "register_operand" "r,r")))])
+ (match_operand:HI 1 "register_operand" "0,0")))
(set (match_operand:SI 5 "register_operand" "=*4,r")
(plus:SI (mult:SI (match_dup 2)
(match_dup 3))
(match_dup 4)))]
- "(GET_CODE (operands[6]) != UMIN || GET_CODE (operands[6]) == ZERO_EXTEND)
- && cris_side_effect_mode_ok (MULT, operands, 5, 4, 2, 3, 0)"
+ "cris_side_effect_mode_ok (MULT, operands, 5, 4, 2, 3, 0)"
"@
#
- %x7%e6.%m6 [%5=%4+%2%T3],%0")
+ add%e6.b [%5=%4+%2%T3],%0")
;; QImode to SImode
(plus:SI (mult:SI (match_dup 2)
(match_dup 3))
(match_dup 4)))]
- "(GET_CODE (operands[6]) != UMIN || GET_CODE (operands[6]) == ZERO_EXTEND)
+ "(GET_CODE (operands[7]) != UMIN || GET_CODE (operands[6]) == ZERO_EXTEND)
&& cris_side_effect_mode_ok (MULT, operands, 5, 4, 2, 3, 0)"
"@
#
(plus:SI (mult:SI (match_dup 2)
(match_dup 3))
(match_dup 4)))]
- "(GET_CODE (operands[6]) != UMIN || GET_CODE (operands[6]) == ZERO_EXTEND)
+ "(GET_CODE (operands[7]) != UMIN || GET_CODE (operands[6]) == ZERO_EXTEND)
&& cris_side_effect_mode_ok (MULT, operands, 5, 4, 2, 3, 0)"
"@
#
(define_insn "*extopqihi_swap_side"
[(set (match_operand:HI 0 "register_operand" "=r,r,r")
- (match_operator:HI
- 6 "cris_plus_or_bound_operator"
- [(match_operator:HI
- 5 "cris_extend_operator"
- [(mem:QI (plus:SI
- (match_operand:SI 2 "cris_bdap_operand" "%r,r,r")
- (match_operand:SI 3 "cris_bdap_operand" "r>Ri,r,>Ri")))])
- (match_operand:HI 1 "register_operand" "0,0,0")]))
+ (plus:HI
+ (match_operator:HI
+ 5 "cris_extend_operator"
+ [(mem:QI (plus:SI
+ (match_operand:SI 2 "cris_bdap_operand" "%r,r,r")
+ (match_operand:SI 3 "cris_bdap_operand" "r>Ri,r,>Ri")))])
+ (match_operand:HI 1 "register_operand" "0,0,0")))
(set (match_operand:SI 4 "register_operand" "=*2,r,r")
(plus:SI (match_dup 2)
(match_dup 3)))]
- "(GET_CODE (operands[6]) != UMIN || GET_CODE (operands[5]) == ZERO_EXTEND)
- && cris_side_effect_mode_ok (PLUS, operands, 4, 2, 3, -1, 0)"
+ "cris_side_effect_mode_ok (PLUS, operands, 4, 2, 3, -1, 0)"
"*
{
if (which_alternative == 0
|| CONST_OK_FOR_LETTER_P (INTVAL (operands[3]), 'N')
|| CONST_OK_FOR_LETTER_P (INTVAL (operands[3]), 'J')))
return \"#\";
- return \"%x6%e5.%m5 [%4=%2%S3],%0\";
+ return \"add%e5.b [%4=%2%S3],%0\";
}")
;; QImode to SImode
(define_insn "*extopqihi"
[(set (match_operand:HI 0 "register_operand" "=r,r,r,r")
(match_operator:HI
- 3 "cris_operand_extend_operator"
+ 3 "cris_additive_operand_extend_operator"
[(match_operand:HI 1 "register_operand" "0,0,0,r")
(match_operator:HI
4 "cris_extend_operator"
[(match_operand:QI 2 "nonimmediate_operand" "r,Q>,m,!To")])]))]
- "(GET_CODE (operands[3]) != UMIN || GET_CODE (operands[4]) == ZERO_EXTEND)
- && GET_MODE_SIZE (GET_MODE (operands[0])) <= UNITS_PER_WORD
+ "GET_MODE_SIZE (GET_MODE (operands[0])) <= UNITS_PER_WORD
&& (operands[1] != frame_pointer_rtx || GET_CODE (operands[3]) != PLUS)"
"@
%x3%e4.%m4 %2,%0
(define_insn "*extopqihi_swap"
[(set (match_operand:HI 0 "register_operand" "=r,r,r,r")
- (match_operator:HI
- 4 "cris_plus_or_bound_operator"
- [(match_operator:HI
- 3 "cris_extend_operator"
- [(match_operand:QI 2 "nonimmediate_operand" "r,Q>,m,!To")])
- (match_operand:HI 1 "register_operand" "0,0,0,r")]))]
- "(GET_CODE (operands[3]) != UMIN || GET_CODE (operands[4]) == ZERO_EXTEND)
- && GET_MODE_SIZE (GET_MODE (operands[0])) <= UNITS_PER_WORD
- && operands[1] != frame_pointer_rtx"
+ (plus:HI
+ (match_operator:HI
+ 3 "cris_extend_operator"
+ [(match_operand:QI 2 "nonimmediate_operand" "r,Q>,m,!To")])
+ (match_operand:HI 1 "register_operand" "0,0,0,r")))]
+ "operands[1] != frame_pointer_rtx"
"@
- %x4%e3.%m3 %2,%0
- %x4%e3.%m3 %2,%0
- %x4%e3.%m3 %2,%0
- %x4%e3.%m3 %2,%1,%0"
+ add%e3.b %2,%0
+ add%e3.b %2,%0
+ add%e3.b %2,%0
+ add%e3.b %2,%1,%0"
[(set_attr "slottable" "yes,yes,no,no")
(set_attr "cc" "clobber")])
3 "cris_extend_operator"
[(match_operand:QI 2 "nonimmediate_operand" "r,Q>,m,!To")])
(match_operand:SI 1 "register_operand" "0,0,0,r")]))]
- "(GET_CODE (operands[3]) != UMIN || GET_CODE (operands[4]) == ZERO_EXTEND)
- && GET_MODE_SIZE (GET_MODE (operands[0])) <= UNITS_PER_WORD
+ "(GET_CODE (operands[4]) != UMIN || GET_CODE (operands[3]) == ZERO_EXTEND)
&& operands[1] != frame_pointer_rtx"
"@
%x4%e3.%m3 %2,%0
3 "cris_extend_operator"
[(match_operand:HI 2 "nonimmediate_operand" "r,Q>,m,!To")])
(match_operand:SI 1 "register_operand" "0,0,0,r")]))]
- "(GET_CODE (operands[3]) != UMIN || GET_CODE (operands[4]) == ZERO_EXTEND)
- && GET_MODE_SIZE (GET_MODE (operands[0])) <= UNITS_PER_WORD
+ "(GET_CODE (operands[4]) != UMIN || GET_CODE (operands[3]) == ZERO_EXTEND)
&& operands[1] != frame_pointer_rtx"
"@
%x4%e3.%m3 %2,%0