gcc.target/cris/dbr-1.c: New test.

Random spotting.  Exposes the missed benefit for delay-slot
filling of a splitter for indexed addressing mode (the [rN+M]
one).  To be considered for common instructions and perhaps only
for suitable M; at least +-63 is obvious (when there's a register
available) as both the original and the add fit in delay-slots.

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 69c564ff952fa98fae07f389dd3a3271499cbc70..f81fd129db992eb8d113005aa9bbba65dece21c5 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -3,10 +3,9 @@
        * gcc.target/cris/cris.exp (check_effective_target_cc0): New.
 
        PR target/93372
-       * gcc.target/cris/pr93372-1.c: New test.
-       * gcc.target/cris/pr93372-2.c, gcc.target/cris/pr93372-5.c,
-       gcc.target/cris/pr93372-8.c: New tests.
-       * gcc.target/cris/pr93372-3.c, gcc.target/cris/pr93372-4.c,
+       * gcc.target/cris/pr93372-1.c, gcc.target/cris/pr93372-2.c,
+       gcc.target/cris/pr93372-5.c, gcc.target/cris/pr93372-8.c,
+       gcc.target/cris/pr93372-3.c, gcc.target/cris/pr93372-4.c,
        gcc.target/cris/pr93372-6.c, gcc.target/cris/pr93372-7.c,
        gcc.target/cris/pr93372-9.c, gcc.target/cris/pr93372-10.c,
        gcc.target/cris/pr93372-11.c, gcc.target/cris/pr93372-12.c,
@@ -21,7 +20,7 @@
        gcc.target/cris/pr93372-29.c, gcc.target/cris/pr93372-30.c,
        gcc.target/cris/pr93372-31.c, gcc.target/cris/pr93372-32.c,
        gcc.target/cris/pr93372-33.c, gcc.target/cris/pr93372-34.c,
-       gcc.target/cris/pr93372-35.c: New tests.
+       gcc.target/cris/pr93372-35.c, gcc.target/cris/dbr-1.c: New tests.
 
 2020-02-10  Jakub Jelinek  <jakub@redhat.com>
 

diff --git a/gcc/testsuite/gcc.target/cris/dbr-1.c b/gcc/testsuite/gcc.target/cris/dbr-1.c
new file mode 100644 (file)
index 0000000..9f79a76
--- /dev/null
+++ b/gcc/testsuite/gcc.target/cris/dbr-1.c
@@ -0,0 +1,11 @@
+/* Check that delayed-branch-slot is able to fill a trivially fillable
+   slot.  The xfail is due to the "move.d [$r10+4],$r10" not being split
+   up into "addq 4,$r10" and "move.d [$r10],$r10"; both slottable and of
+   the same actual cost in size and cycles as the unsplit insn.  */
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+/* { dg-final { scan-assembler-not "\tnop" { xfail *-*-* } } } */
+void *f(void **p)
+{
+  return p[1];
+}