gdb/

	* rs6000-tdep.c (gdb_print_insn_powerpc): Disassemble e500
	instructions if debugging an E500 binary.

diff --git a/gdb/ChangeLog b/gdb/ChangeLog
index 58ce121d583ce68dede370c4b0a975b54ee2cd30..8e60d3a1a1c15f62d6f0d9cae45b95659599803a 100644 (file)
--- a/gdb/ChangeLog
+++ b/gdb/ChangeLog
@@ -1,3 +1,8 @@
+2010-11-12  Nathan Froyd  <froydnj@codesourcery.com>
+
+       * rs6000-tdep.c (gdb_print_insn_powerpc): Disassemble e500
+       instructions if debugging an E500 binary.
+
 2010-11-12  Tom Tromey  <tromey@redhat.com>
 
        * varobj.c (value_get_print_value): Rearrange.  Pass stream to

diff --git a/gdb/rs6000-tdep.c b/gdb/rs6000-tdep.c
index 09c7f8ff9c4fdadb95720c54efe4aa8de4d33948..611c775e3c6cd11db1efdd7d51959e38b4d27df5 100644 (file)
--- a/gdb/rs6000-tdep.c
+++ b/gdb/rs6000-tdep.c
@@ -3029,7 +3029,19 @@ static int
 gdb_print_insn_powerpc (bfd_vma memaddr, disassemble_info *info)
 {
   if (!info->disassembler_options)
-    info->disassembler_options = "any";
+    {
+      /* When debugging E500 binaries and disassembling code containing
+        E500-specific (SPE) instructions, one sometimes sees AltiVec
+        instructions instead.  The opcode spaces for SPE instructions
+        and AltiVec instructions overlap, and specifiying the "any" cpu
+        looks for AltiVec instructions first.  If we know we're
+        debugging an E500 binary, however, we can specify the "e500x2"
+        cpu and get much more sane disassembly output.  */
+      if (info->mach == bfd_mach_ppc_e500)
+       info->disassembler_options = "e500x2";
+      else
+       info->disassembler_options = "any";
+    }
 
   if (info->endian == BFD_ENDIAN_BIG)
     return print_insn_big_powerpc (memaddr, info);