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arc: Put DBNZ instruction to a separate class
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2024-02-14  Yuriy Kolerovarc: Put DBNZ instruction to a separate class
2024-02-09  Peter BergnerPowerPC: Add support for Power11 options
2024-02-09  Jan Beulichx86/APX: with REX2 map 1 doesn't "chain" to maps 2...
2024-02-09  Jan Beulichx86/APX: V{BROADCAST,EXTRACT,INSERT}{F,I}128 can also...
2024-02-09  Jan Beulichx86/APX: VROUND{P,S}{S,D} encodings require AVX512...
2024-02-09  Jan Beulichx86: change type of Dwarf2 register numbers in register...
2024-01-29  Jose E. Marchesibpf: there is no ldinddw nor ldabsdw instructions
2024-01-26  Andrew Carlottiaarch64: move SHA512 instructions to +sha3
2024-01-26  Jan Beulichx86/APX: TILE{RELEASE,ZERO} have no EVEX encodings
2024-01-26  Jan Beulichx86/APX: no need to have decode go through x86_64_table[]
2024-01-26  Jan Beulichx86/APX: optimize MOVBE
2024-01-26  mengqinggangLoongArch: gas: Add support for s9 register
2024-01-24  Andrew Carlottiaarch64: Eliminate unused variable warnings with -DNDEBUG
2024-01-22  Nick CliftonUpdated Serbian translations for th bfd, gold and opcod...
2024-01-22  Mark Wielaardopcodes: tic4x_disassemble swap xcalloc arguments
2024-01-19  Jan Beulichx86-64: Dwarf2 register numbers for %bnd<N>
2024-01-19  Jan Beulichx86/APX: VROUND{P,S}{S,D} can generally be encoded
2024-01-19  Jan Beulichx86/APX: be consistent with insn suffixes
2024-01-19  Jan Beulichx86: drop redundant EVex128 from PUSH2/POP2
2024-01-19  Jan Beulichx86: support APX forms of U{RD,WR}MSR
2024-01-18  Nick CliftonAdd note to translators not to translate z/Architecture
2024-01-18  Nick CliftonUpdated translations for various sub-directories
2024-01-15  Nick CliftonChange version to 2.42.50 and regenerate files
2024-01-15  Nick CliftonAdd markers for 2.42 branch
2024-01-15  Victor Do Nascimentoaarch64: rcpc3: Regenerate aarch64-*-2.c files
2024-01-15  Victor Do Nascimentoaarch64: rcpc3: Add FP load/store insns
2024-01-15  Victor Do Nascimentoaarch64: rcpc3: Add integer load/store insns
2024-01-15  Victor Do Nascimentoaarch64: rcpc3: Define RCPC3_INSN macro
2024-01-15  Victor Do Nascimentoaarch64: rcpc3: add support in general_constraint_met_p
2024-01-15  Victor Do Nascimentoaarch64: rcpc3: New RCPC3_ADDR operand types
2024-01-15  Victor Do Nascimentoaarch64: rcpc3: Define address operand fields and inser...
2024-01-15  Victor Do Nascimentoaarch64: rcpc3: Create implicit load/store size calc...
2024-01-15  Victor Do Nascimentoaarch64: rcpc3: Add +rcpc3 architectural feature suppor...
2024-01-15  Andrew Carlottiaarch64: Fix tlbi and tlbip instructions
2024-01-15  Andrew Carlottiaarch64: Refactor aarch64_sys_ins_reg_supported_p
2024-01-15  Nick CliftonAdd generated source files and fix thinko in aarch64...
2024-01-15  Srinath Parvathaneniaarch64: Add SVE2.1 Contiguous load/store instructions.
2024-01-15  Srinath ParvathaneniPATCH 5/6][Binutils] aarch64: Add SVE2.1 fmin and fmax...
2024-01-15  Srinath Parvathaneniaarch64: Add SVE2.1 dupq, eorqv and extq instructions.
2024-01-15  Srinath Parvathaneniaarch64: Add support for FEAT_SVE2p1.
2024-01-15  Srinath Parvathaneniaarch64: Add support for FEAT_SME2p1 instructions.
2024-01-15  Srinath Parvathaneniaarch64: Add support for FEAT_B16B16 instructions.
2024-01-15  Indu Bhagatopcodes: i386-reg.tbl: Add a comment to reflect depende...
2024-01-15  Indu Bhagatopcodes: x86: new marker for insns that implicitly...
2024-01-15  Indu Bhagatopcodes: gas: x86: define and use Rex2 as attribute...
2024-01-12  Andrew Carlottiaarch64: Remove unused code
2024-01-12  Andrew Carlottiaarch64: Make FEAT_ASMv8p2 instruction aliases always...
2024-01-12  Andrew Carlottiaarch64: Add +xs flag for existing instructions
2024-01-12  Andrew Carlottiaarch64: Add +wfxt flag for existing instructions
2024-01-12  Andrew Carlottiaarch64: Add +rcpc2 flag for existing instructions
2024-01-12  Andrew Carlottiaarch64: Add +jscvt flag for existing fjcvtzs instruction
2024-01-11  Lulu CaiLoongArch: Discard extra spaces in objdump output
2024-01-10  Saurabh Jhagas: aarch64: Add system registers for Debug and PMU...
2024-01-09  Jan Beulichx86: add missing APX logic to cpu_flags_match()
2024-01-09  Srinath Parvathaneniaarch64: ADD FEAT_THE RCWCAS instructions.
2024-01-09  Victor Do Nascimentoaarch64: Regenerate aarch64-*-2.c files
2024-01-09  Victor Do Nascimentoaarch64: Add support for 128-bit system register mrrs...
2024-01-09  Victor Do Nascimentoaarch64: Add xs variants of tlbip operands
2024-01-09  Victor Do Nascimentoaarch64: Implement TLBIP 128-bit instruction
2024-01-09  Victor Do Nascimentoaarch64: Create QL_SRC_X2 and QL_DEST_X2 qualifier...
2024-01-09  Victor Do Nascimentoaarch64: Apply narrowing of allowed immediate values...
2024-01-09  Victor Do Nascimentoaarch64: Add support for the SYSP 128-bit system instru...
2024-01-09  Victor Do Nascimentoaarch64: Add support for xzr register in register pair...
2024-01-09  Victor Do Nascimentoaarch64: Expand maximum number of operands from 5 to 6
2024-01-09  Victor Do Nascimentoaarch64: Add +d128 architectural feature support
2024-01-08  srinathaarch64: Add ite feature system registers.
2024-01-07  H.J. Lui386: Correct adcx suffix in disassembler
2024-01-05  Tejas JoshiAdd AMD znver5 processor support
2024-01-05  Jan Beulichx86: corrections to CPU attribute/flags splitting
2024-01-05  Jin MaRISC-V: T-HEAD: Fix wrong instruction encoding for...
2024-01-04  Alan ModraUpdate year range in copyright notice of binutils files
2024-01-04  Lulu CaiLoongArch: Fix some macro that cannot be expanded properly
2023-12-30  Alan ModraLoongArch: Commas inside double quotes
2023-12-29  changjiachenLoongArch: opcodes: Add support for tls le relax.
2023-12-29  Jin MaRISC-V: THEAD: Add 5 assembly pseudoinstructions for...
2023-12-28  Hu, Lin1Support APX JMPABS for disassembler
2023-12-28  Cui, LiliSupport APX pushp/popp
2023-12-28  Mo, ZeweiSupport APX Push2/Pop2
2023-12-28  konglin1Support APX NDD
2023-12-28  Cui, LiliSupport APX GPR32 with extend evex prefix
2023-12-28  Cui, LiliCreated an empty EVEX_MAP4_ sub-table for EVEX instruct...
2023-12-28  Cui, LiliSupport APX GPR32 with rex2 prefix
2023-12-25  Lulu CaiLoongArch: Add new relocs and macro for TLSDESC.
2023-12-24  Alan ModraRe: LoongArch: Add support for <b ".L1"> and <beq,...
2023-12-20  Jens Remuss390: Add suffix to conditional branch instruction...
2023-12-20  Jens Remuss390: Optionally print instruction description in disas...
2023-12-20  Jens Remuss390: Use safe string functions and length macros in...
2023-12-20  Jens Remuss390: Enhance error handling in s390-mkopc
2023-12-20  Jens Remuss390: Provide IBM z16 (arch14) instruction descriptions
2023-12-20  Jens Remuss390: Align letter case of instruction descriptions
2023-12-20  Jens Remuss390: Fix build when using EXEEXT_FOR_BUILD
2023-12-19  Andrea Coralloaarch64: Add FEAT_ITE support
2023-12-19  Andrea Coralloaarch64: Add FEAT_ECBHB support
2023-12-19  Andrea Coralloaarch64: Add FEAT_SPECRES2 support
2023-12-19  Haochen Jiangx86: Remove the restriction for size of the mask regist...
2023-12-18  mengqinggangLoongArch: Add call36 and tail36 pseudo instructions...
2023-12-15  Jan Beulichrevert "x86: allow 32-bit reg to be used with U{RD...
2023-12-15  Jan Beulichx86: fold assembly dialect attributes
2023-12-15  Jan Beulichx86: Intel syntax implies Intel mnemonics
2023-12-14  Jin MaRISC-V: Fix the wrong encoding and operand of the XThea...
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