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For "trap", IBT and RIE exceptions, mask all PSW.SM. NB: Stepping
[thirdparty/binutils-gdb.git] / sim / testsuite / d10v-elf / ChangeLog
1997-12-08  Andrew CagneyFor "trap", IBT and RIE exceptions, mask all PSW.SM... blob | commitdiff | raw
1997-12-04  Andrew CagneyAdd DM (bit 4) to PSW. See 7-1 for more info. blob | commitdiff | raw | diff to current
1997-12-03  Andrew Cagney* d10v_sim.h (SEXT56): Define. blob | commitdiff | raw | diff to current
1997-12-02  Andrew CagneyFor "msbu", subtract unsigned product from ACC, blob | commitdiff | raw | diff to current
1997-12-02  Andrew CagneyFor "mulxu", store unsigned product in ACC. blob | commitdiff | raw | diff to current
1997-12-02  Andrew CagneyFor sub2w, compute carry according to negated addition... blob | commitdiff | raw | diff to current
1997-11-10  Andrew CagneyTest rachi instruction. blob | commitdiff | raw | diff to current
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