Stephane Carrez [Thu, 7 Mar 2002 19:12:44 +0000 (19:12 +0000)]
* interp.c (sim_hw_configure): Save the HW cpu pointer in the
cpu struct.
(sim_hw_configure): Connect the capture input/output events.
* sim-main.h (_sim_cpu): New member hw_cpu.
(m68hc11cpu_set_oscillator): Declare.
(m68hc11cpu_clear_oscillator): Declare.
(m68hc11cpu_set_port): Declare.
* dv-m68hc11.c (m68hc11_options): New for oscillator commands.
(m68hc11cpu_ports): New input ports and output ports to reflect
the HC11 IOs.
(m68hc11_delete): Cleanup any running oscillator.
(attach_m68hc11_regs): Create the input oscillators.
(make_oscillator): New function.
(find_oscillator): New function.
(oscillator_handler): New function.
(reset_oscillators): New function.
(m68hc11cpu_port_event): Handle the new input ports.
(m68hc11cpu_set_oscillator): New function.
(m68hc11cpu_clear_oscillator): New function.
(get_frequency): New function.
(m68hc11_option_handler): New function.
(m68hc11cpu_set_port): New function.
(m68hc11cpu_io_write): Post the port output events.
* dv-m68hc11spi.c (set_bit_port): Use m68hc11cpu_set_port to set
the output port value.
* dv-m68hc11tim.c (m68hc11tim_port_event): Handle CAPTURE event
by latching the TCNT value in the register.
Stephane Carrez [Thu, 7 Mar 2002 18:59:38 +0000 (18:59 +0000)]
* interrupts.c (interrupts_reset): New function, setup interrupt
vector address according to cpu mode.
(interrupts_initialize): Move reset portion to the above.
(interrupt_names): New table to give a name to interrupts.
(idefs): Handle pulse accumulator interrupts.
(interrupts_info): Print the interrupt history.
(interrupt_option_handler): New function.
(interrupt_options): New table of options.
(interrupts_update_pending): Keep track of when interrupts are
raised and implement breakpoint-on-raise-interrupt.
(interrupts_process): Keep track of when interrupts are taken
and implement breakpoint-on-interrupt.
* interrupts.h (struct interrupt_history): Define.
(struct interrupt): Keep track of the interrupt history.
(interrupts_reset): Declare.
(interrupts_initialize): Update prototype.
* m68hc11_sim.c (cpu_reset): Reset interrupts.
(cpu_initialize): Cleanup.
Jim Blandy [Thu, 7 Mar 2002 00:16:50 +0000 (00:16 +0000)]
* splay-tree.c (splay_tree_xmalloc_allocate,
splay_tree_xmalloc_deallocate): Use K&R-style definitions, not
prototyped definitions. Mark `data' arguments as unused.
* sim-main.h (ExceptionCause): Add new values for MIPS32
and MIPS64: MDMX, MCheck, CacheErr. Update comments
for DebugBreakPoint and NMIReset to note their status in
MIPS32 and MIPS64.
(SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
(SignalExceptionCacheErr): New exception macros.
Chris Demetriou [Wed, 6 Mar 2002 05:41:40 +0000 (05:41 +0000)]
2002-03-05 Chris Demetriou <cgd@broadcom.com>
* mips.igen (check_fpu): Enable check for coprocessor 1 usability.
* sim-main.h (COP_Usable): Define, but for now coprocessor 1
is always enabled.
(SignalExceptionCoProcessorUnusable): Take as argument the
unusable coprocessor number.
Jeff Law [Tue, 5 Mar 2002 17:55:55 +0000 (17:55 +0000)]
2002-02-26 John David Anglin <dave@hiauly1.hia.nrc.ca>
* bfd/elf-hppa.h (elf_hppa_is_dynamic_loader_symbol): New function.
(elf_hppa_relocate_section): Ignore undefined dynamic loader symbols.
(elf_hppa_final_link_relocate): Correct relocations for indirect
references to local data through the DLT. Fix .opd creation for
local symbols using R_PARISC_LTOFF_FPTR32 and R_PARISC_FPTR64
relocations. Use e_lsel selector for R_PARISC_DLTIND21L,
R_PARISC_LTOFF_FPTR21L and R_PARISC_LTOFF_TP21L as per
"Processor-Specific ELF for PA_RISC, Version 1.43" document.
Similarly, use e_rsel for DLT and LTOFF 'R' relocations.
* bfd/elf32-hppa.c (final_link_relocate): Revise relocation selectors
as per "Processor-Specific ELF for PA_RISC, Version 1.43" document.
Alan Modra [Tue, 5 Mar 2002 05:18:41 +0000 (05:18 +0000)]
* elflink.h (elf_bfd_final_link): Call elf_link_output_extsym
to output forced local syms for non-shared link.
(elf_link_output_extsym): Tweak condition for calling backend
adjust_dynamic_symbol so that previous behaviour is kept.
Chris Demetriou [Tue, 5 Mar 2002 03:14:56 +0000 (03:14 +0000)]
2002-02-04 Chris Demetriou <cgd@broadcom.com>
* mips.igen (check_fmt, check_fmt_p): New functions to check
whether specific floating point formats are usable.
(ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
(FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
(ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
Use the new functions.
(do_c_cond_fmt): Remove format checks...
(C.cond.fmta, C.cond.fmtb): And move them into all callers.
Alan Modra [Tue, 5 Mar 2002 03:10:34 +0000 (03:10 +0000)]
* tc-pdp11.c: Use VAX float format support for PDP-11 target.
(parse_ac5): New function for parsing float regs in float operand.
(parse_expression): Remove attempt to make literals be octal.
(parse_op_no_deferred): Support float literals.
(parse_op): Reject attempts to refer to float regs.
(parse_fop): New function, like parse_op but for float operand.
(md_assemble): Add cases to parse float operands. Also fix
IMM3, IMM6, IMM8 cases to pick up the operand from the right spot.
Alan Modra [Tue, 5 Mar 2002 03:09:53 +0000 (03:09 +0000)]
* pdp11-opc.c: Fix "mark" operand type. Fix operand types
for float opcodes that take float operands. Add alternate
names (xxxD vs. xxxF) for float opcodes.
* pdp11-dis.c (print_operand): Clean up formatting for mode 67.
(print_foperand): New function to handle float opcode operands.
(print_insn_pdp11): Use print_foperand to disassemble float ops.
H.J. Lu [Mon, 4 Mar 2002 20:41:55 +0000 (20:41 +0000)]
2002-03-04 H.J. Lu <hjl@gnu.org>
* elf.c (bfd_section_from_shdr): Handle special sections,
.init_array, .fini_array and .preinit_array.
(elf_fake_sections): Likewise.
* elflink.h (NAME(bfd_elf,size_dynamic_sections)): Create the
DT entry only if the section is in output for .init_array,
.fini_array and .preinit_array. Complain about .preinit_array
section in DSO.
(elf_bfd_final_link): Warn zero size for .init_array,
.fini_array and .preinit_array sections.
* elfxx-ia64.c (elfNN_ia64_section_from_shdr): Remove
SHT_INIT_ARRAY, SHT_FINI_ARRAY and SHT_PREINIT_ARRAY.
(elfNN_ia64_fake_sections): Remove .init_array, .fini_array and
.preinit_array.
Chris Demetriou [Sun, 3 Mar 2002 07:36:42 +0000 (07:36 +0000)]
2002-03-02 Chris Demetriou <cgd@broadcom.com>
* mips.igen (loadstore_ea): New function to do effective
address calculations.
(do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
CACHE): Use loadstore_ea to do effective address computations.
* elflink.h (size_dynamic_sections): If section named
".preinit_array" exists, create DT_PREINIT_ARRAY and
DT_PREINIT_ARRAYSZ entries in dynamic table. Analogously for
".init_array" and ".fini_array".
(elf_bfd_final_link): Handle DT_PREINIT_ARRAYSZ, DT_INIT_ARRAYSZ,
DT_FINI_ARRAYSZ, DT_PREINIT_ARRAY, DT_INIT_ARRAY, and
DT_FINI_ARRAY.
Eli Zaretskii [Thu, 28 Feb 2002 16:49:10 +0000 (16:49 +0000)]
* go32-nat.c (_initialize_go32_nat): Don't use periods in the
first line of the doc string for "info dos", except at the end of
the sentence, since the short help stops at the first period.
Chris Demetriou [Thu, 28 Feb 2002 07:01:14 +0000 (07:01 +0000)]
2002-02-27 Chris Demetriou <cgd@broadcom.com>
* mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
add a comma) so that it more closely match the MIPS ISA
documentation opcode partitioning.
(PREF): Put useful names on opcode fields, and include
instruction-printing string.
Chris Demetriou [Thu, 28 Feb 2002 02:57:34 +0000 (02:57 +0000)]
2002-02-27 Chris Demetriou <cgd@broadcom.com>
* mips.igen (check_u64): New function which in the future will
check whether 64-bit instructions are usable and signal an
exception if not. Currently a no-op.
(DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
* mips.igen (check_fpu): New function which in the future will
check whether FPU instructions are usable and signal an exception
if not. Currently a no-op.
(ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.