Peng Fan [Wed, 19 Aug 2015 07:48:58 +0000 (15:48 +0800)]
imx: mx6ul_14x14_evk select MX6UL
There is no need to expose SoC choice to user, we already got
the SoC according to the build target. So default "select MX6UL"
for MX6UL_14x14_EVK target.
Peng Fan [Wed, 19 Aug 2015 07:48:57 +0000 (15:48 +0800)]
arm: Add SYS_L2CACHE_OFF Kconfig entry
To i.MX6UL, SYS_L2CACHE_OFF is selected, but there is no Kconfig entry
for SYS_L2CACHE_OFF. Then "select SYS_L2CACHE_OFF" does not effect for
i.MX6UL, which is not expected.
Since SYS_L2CACHE_OFF is mainly used by ARM architecture, add it to
arch/arm/Kconfig.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com> Cc: Stefano Babic <sbabic@denx.de>
Peng Fan [Mon, 17 Aug 2015 08:11:05 +0000 (16:11 +0800)]
imx: mx6slevk: add SPL support
Add SPL boot support for mx6slevk board.
1. Introduce a configuration file mx6slevk_spl_defconfig.
2. i.MX6SL has same DRAM space with i.MX6SX, need to change SPL DRAM SPACE.
3. Include imx6_spl.h and related SPL macro in mx6slevk.h.
4. select SUPPORT_SPL for TARGET_MX6SLEVK.
5. Add SPL board code to do related initialization.
Peng Fan [Mon, 17 Aug 2015 08:11:04 +0000 (16:11 +0800)]
imx: mx6: ddr: add LPDDR2 support
Add LPDDR2 support:
1. Implement a function mx6_lpddr2_cfg to initialize MMDC for LPDDR2.
2. Introduce a structure mx6_lpddr2_cfg, most entrys are same to
mx6_ddr3_cfg, but still keep it a single one for easy to choose
parameters for LPDDR2.
3. If ddr_type is LPDDR2, use mx6_lpddr2_cfg to init MMDC.
4. Update comments.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com>
Peng Fan [Mon, 17 Aug 2015 08:11:03 +0000 (16:11 +0800)]
imx: mx6: ddr init MMDC according to ddr_type
To i.MX6, DDR3 and LPDDR2 is supported, so rename function mx6_dram_cfg
to mx6_ddr3_cfg and the original mx6_dram_cfg function only is a wrapper.
The new reimplemented function mx6_dram_cfg only invokes mx6_ddr3_cfg
when ddr_type is for DDR3. Later we can use ddr_type to initialize
MMDC for LPDDR2.
Initialize ddr_type for different boards which enable SPL.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Stefan Roese <sr@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Stefan Roese <sr@denx.de>
Peng Fan [Mon, 17 Aug 2015 08:11:00 +0000 (16:11 +0800)]
imx: mx6: ddr add dram io configuration and header file for i.MX6SL
Define two structure mx6sl_iomux_ddr_regs and mx6sl_iomux_grp_regs.
Add a new function mx6sl_dram_iocfg to configure dram io.
Add header file to define macros for register address.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
Peng Fan [Mon, 17 Aug 2015 08:10:59 +0000 (16:10 +0800)]
imx: mx6: ddr correct tRFC and tXS
To Chip density 4Gb, tRFC should be 300ns, see
"Table 61 — Refresh parameters by device density" of JESD79-3E.
tXS(min) is max(5nCK, tRFC(min) + 10ns).
Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
Heiko Schocher [Tue, 11 Aug 2015 06:09:44 +0000 (08:09 +0200)]
arm, imx6: aristainetos board updates
some small updates for the aristainetos boards:
- fix display timings for the aristainetos board
- fix pinmux for the aristainetos board
- fix pinmux for the aristainetos2 board
- fix default environment
Adrian Alonso [Tue, 11 Aug 2015 16:19:50 +0000 (11:19 -0500)]
imx: iomux-v3: add imx7d support for iomuxc
* Add imx7d support for iomux controller
* imx7d has two iomux controllers iomuxc (0x3033000) and iomuxc-lpsr
(0x302C0000) each conroller provides control and mux mode pad
registers but shares iomuxc input select register with iomuxc-lpsr
IOMUX_CONFIG_LPSR flag is used to properly set daisy chain settings
for iomuxc-lpsr pads.
* Since mx7d introduces LPSR IOMUX pins, add new base to IOMUX v3
driver for these LPSR pins.
Signed-off-by: Adrian Alonso <aalonso@freescale.com> Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
Peng Fan [Wed, 12 Aug 2015 09:46:50 +0000 (17:46 +0800)]
imx: clock support enet2 anatop clock support
To i.MX6SX/UL, two ethernet interfaces are supported.
Add ENET2 clock support:
1. Introduce a new input parameter "fec_id", only 0 and 1 are allowed.
To value 1, only i.MX6SX/UL can pass the check.
2. Modify board code who use this api to follow new api prototype.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Heiko Schocher <hs@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefan Roese <sr@denx.de> Cc: Nikolaos Pasaloukos <Nikolaos.Pasaloukos@imgtec.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Stefan Roese <sr@denx.de>
Peng Fan [Thu, 13 Aug 2015 02:55:34 +0000 (10:55 +0800)]
imx-common: consolidate macros and prototypes into sys_proto.h
Move most macro definitions and prototypes into
"arch/arm/include/asm/imx-common/sys_proto.h" to avoid duplicated
function prototypes and marco definitions for different i.MX SoCs.
This patch do not remove the sys_proto.h for different i.MX SoCs,
because we need to modify lots of driver code and others. This patch
remove duplicated macros and prototypes and incude "sys_proto.h"
of imx-common for each sys_proto.h of different i.MX platforms.
Then later we should avoid add stuff in sys_proto.h of each platform,
and modify driver to include common sys_proto.h.
Peng Fan [Fri, 7 Aug 2015 12:35:24 +0000 (20:35 +0800)]
imx: mx6 move TARGET_xx Kconfig option to mx6 specific Kconfig file
Move TARGET_xx Kconfig option based on mx6 to arch/arm/cpu/armv7/mx6/Kconfig.
Add enable "CONFIG_ARCH_MX6" for boards based on mx6.
Then we can choose target boards using "make ARCH=arm menuconfig"
with ARCH_MX6 defined.
If using original way, we have no chance to enable ARCH_MX6 when
"make menuconfig". Even define CONFIG_ARCH_MX6=y in xx_defconfig,
kconfig will complains "arch/../configs/platinum_titanium_defconfig:3:
warning: override: TARGET_PLATINUM_TITANIUM changes choice state"
Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Eric Bénard <eric@eukrea.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Marek Vasut <marex@denx.de> Cc: Christian Gmeiner <christian.gmeiner@gmail.com> Cc: Stefan Roese <sr@denx.de> Cc: Soeren Moch <smoch@web.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Soeren Moch <smoch@web.de> Acked-by: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Chris Smith [Sun, 12 Jul 2015 13:00:11 +0000 (15:00 +0200)]
mxs_ocotp: Shift the HBUS divider correctly
When the original HBUS divider value is retrieved in mxs_ocotp_scale_hclk()
for the purpose or restoring it back later, the value is not shifted by the
HBUS divider offset in that register. This is not a problem, since the shift
is zero on all MXS hardware. Add the shift anyway, for completeness and in
case FSL ever decides to re-use this driver on future designs.
Signed-off-by: Chris Smith <chris@zxdesign.info> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
Damien Riegel [Tue, 30 Jun 2015 21:17:48 +0000 (17:17 -0400)]
ARM: ts4800: add ethernet support
This commit adds ethernet support to the TS4800. Note that the
MAC address is not fused on this board and have to be read from
FEC PALR PAUR registers (this is how the kernel provided by
Technologic Systems does it).
Marek Vasut [Tue, 11 Aug 2015 01:08:07 +0000 (03:08 +0200)]
arm: mxs: Fix mkimage invocation
Remove this ad-hoc mkimage invocation in MXS Makefile and replace
it with the standard mkimage rule instead.
This patch fixes recent build issues introduced by the patch 92a655c mkimage: Set up a file size parameter and keep it updated
These build issues could be triggered by building for example the
MX28EVK and the u-boot.sb image:
$ make mx28evk_defconfig
$ make V=1 u-boot.sb
[...]
make -f ./scripts/Makefile.build obj=arch/arm/cpu/arm926ejs/mxs u-boot.sb
./tools/mkimage -n arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg -T mxsimage u-boot.sb
./tools/mkimage: Can't open (null): Bad address
arch/arm/cpu/arm926ejs/mxs/Makefile:82: recipe for target 'u-boot.sb' failed
make[1]: *** [u-boot.sb] Error 1
Makefile:989: recipe for target 'u-boot.sb' failed
make: *** [u-boot.sb] Error 2
With this patch:
./tools/mkimage -n arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg -T mxsimage -d arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg u-boot.sb
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Juha Lumme <juha.lumme@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
For pages of 2048 bytes the current setting of the ECC Error Correction Level
is only true for an oob size of 64 bytes and wrong for all others.
Instead of hard-coding every possible combination of page size and oob size use
the dynamic calculation of the ECC strength introduced in commit 6121560d7714d6d8e41ce1687a1388a1a8fea4cb.
Cc: Marek Vasut <marex@denx.de> Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de>
Stefan Roese [Wed, 5 Aug 2015 08:50:50 +0000 (10:50 +0200)]
arm: mx6: Remove SPI support from WRU-IV baseboard
This patch removes the SPI support from the WRU-IV baseboard as its
not used at all.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Clemens Gruber <clemens.gruber@pqgruber.com> Cc: Markus Niebel <Markus.Niebel@tq-group.com> Cc: Stefano Babic <sbabic@denx.de> Tested-by: Clemens Gruber <clemens.gruber@pqgruber.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
tools/imximage: set DCD pointer to NULL when its length is 0
When dcd_len is 0 the Write Data command that the set_dcd_rst_v2() routine
generates is empty. This causes HAB to complain that the command is invalid.
To fix this set the DCD pointer in the IVT to NULL in this case. The DCD header
itself is still needed for detect_imximage_version() to determine the image
version.
Boris Brezillon [Mon, 27 Jul 2015 14:21:26 +0000 (16:21 +0200)]
sunxi: increase SYS_MONITOR_LEN
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Masahiro Yamada [Thu, 27 Aug 2015 03:44:29 +0000 (12:44 +0900)]
pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 23 Aug 2015 00:31:42 +0000 (18:31 -0600)]
dm: tpm: Add a 'tpmtest' command
These tests come from Chrome OS code. They are not particularly tidy but can
be useful for checking that the TPM is behaving correctly. Some knowledge of
TPM operation is required to use these.
Simon Glass [Sun, 23 Aug 2015 00:31:33 +0000 (18:31 -0600)]
dm: i2c: Add a command to adjust the offset length
I2C chips can support a register offset, with registers accessible by
sending this offset as the first part of any read or write transaction.
Most I2C chips have a single byte offset, thus the offset length is 1.
This provides access for up 256 registers.
However other offset lengths are supported, including 0.
Add a command to provide access to the offset length from the command
line. This allows the offset length to be read or written.
Simon Glass [Sun, 23 Aug 2015 00:31:31 +0000 (18:31 -0600)]
dm: tpm: Add a uclass for Trusted Platform Modules
Add a new uclass for TPMs which uses almost the same TIS (TPM Interface
Specification) as is currently implemented. Since init() is handled by the
normal driver model probe() method, we don't need to implement that. Also
rename the transfer method to xfer() which is a less clumbsy name.
Once all drivers and users are converted to driver model we can remove the
old code.
Simon Glass [Sun, 23 Aug 2015 00:31:30 +0000 (18:31 -0600)]
tpm: tpm_tis_i2c: Tidy up delays
Use a _US suffix for microseconds and a _MS suffic for milliseconds. Move
all timeouts and delays into one place. Use mdelay() instead of udelay()
where appropriate.
Simon Glass [Sun, 23 Aug 2015 00:31:25 +0000 (18:31 -0600)]
tpm: tpm_tis_i2c: Merge struct tpm_dev into tpm_chip
There are too many structures storing the same sort of information. Move the
fields from struct tpm_dev into struct tpm_chip and remove the former
struct.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
Simon Glass [Sun, 23 Aug 2015 00:31:22 +0000 (18:31 -0600)]
tpm: Move the I2C TPM code into one file
The current Infineon I2C TPM driver is written in two parts, intended to
support use with other I2C devices. However we don't have any users and the
Atmel I2C TPM device does not use this file.
We should simplify this and remove the unused abstration. As a first step,
move the code into one file.
Also the name tpm_private.h suggests that the header file is generic to all
TPMs but it is not. Rename it indicate that it relates only to this driver
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
Marek Vasut [Sun, 2 Aug 2015 23:15:48 +0000 (01:15 +0200)]
dm: core: Add Kconfig for simple bus driver
Add Kconfig entries for the simple-bus driver, both for U-Boot
and for SPL. The simple-bus is enabled by default in U-Boot and
disabled by default in SPL to preserve the original behavior.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
Modified to fit on top of Masahiro's $(SPL) setup: Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 11 Aug 2015 14:33:29 +0000 (08:33 -0600)]
dm: Use dev_get_addr() where possible
This is a convenient way for a driver to get the hardware address of a
device, when regmap or syscon are not being used. Change existing callers
to use it as an example to others.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Yousong Zhou [Sat, 29 Aug 2015 13:26:11 +0000 (21:26 +0800)]
sunxi: mmc: set transfer timeout according to byte_cnt.
Originally a timeout value of 2 seconds was used regardless of the size
of data to be transfered. This prevented slow devices from working
correctly while there was no much gain for faster devices, e.g. it takes
3708ms for a transfer of uImage of size 1899008 bytes.
Signed-off-by: Yousong Zhou <yszhou4tech@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Chen-Yu Tsai [Tue, 25 Aug 2015 02:49:19 +0000 (10:49 +0800)]
sunxi: Enable non-secure access to RTC on sun6i (A31s)
On the A31s the RTC is by default secured. Thus when u-boot
loads the kernel in non-secure world, the RTC is unavailable. The
SoC has a TrustZone Protection Controller, which can be used to
enable non-secure access to the RTC.
On the A31 the TZPC doesn't seem to do anything, i.e. changes to
its register contents do not affect access to the RTC.
Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Hans de Goede [Tue, 25 Aug 2015 12:20:49 +0000 (14:20 +0200)]
sunxi: Add inet98v_rev2 defconfig and dts file
The inet98v_rev2 is a pcb used in generic A13 based tablets. It features
volume buttons, a power barrel, micro-usb otg, headphone connector and
a power button.
The dts file is identical to the one submitted to the upstream kernel.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Fri, 21 Aug 2015 19:49:51 +0000 (21:49 +0200)]
mtd: nand: Make CONFIG_SYS_NAND_U_BOOT_OFFS configurable through Kconfig
Make CONFIG_SYS_NAND_U_BOOT_OFFS configurable through Kconfig, just like
SYS_NAND_BUSWIDTH_16BIT this is only enabled on some SoCs using depends,
to avoid double defining it for SoCs which have not yet moved to Kconfig
for this.
Having this in Kconfig is useful because this is something which may
differ from one board to the other even when using the same SoC.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Acked-by: Scott Wood <scottwood@freescale.com>
Boris Brezillon [Sat, 29 Aug 2015 10:29:38 +0000 (12:29 +0200)]
sunxi_nand_spl: clear status flags in SPL implementation
Some status flags remain set until you explicetly clear the bit
in the status register.
Fix the SPL implementation to avoid false positive.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
[hdegoede@redhat.com: Port from v2015.07 to v2015.10] Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
We only ever use syndrome mode for the partitions which contain the SPL,
as that is required for the BROM to be able to read the SPL.
Instead of using some arbritray limit for deciding whether or not to
use syndrome, be smart and check if u-boot-dtb.bin is directly behind
the SPL, if it is not then it is on its own partition and we should not
use syndrome.
Note the reason why we only use syndrome mode for the SPL is because it
comeswith weaker randomization, introducing a risk for more bit errors,
so we want to avoid it when possible.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Sun, 16 Aug 2015 12:48:22 +0000 (14:48 +0200)]
sunxi_nand_spl: Rename SPL_NAND_SUNXI to NAND_SUNXI
We eventually want to add full nand support, since it makes no sense
to build SPL with nand support and u-boot without, or the other way
around, a single option will suffice.
Renaming the Kconfig option now makes things easier when we add full
nand support in the future.
The "obj-$(CONFIG_NAND_SUNXI) += sunxi_nand_spl.o" is moved to an
"ifdef CONFIG_SPL_BUILD" block in the Makefile.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Sat, 15 Aug 2015 19:51:33 +0000 (21:51 +0200)]
sunxi_nand_spl: Add support for backup boot partitions
The BROM does not care / use bad page markings, instead it deals with
any bad pages in the first erase-block by simply trying to load "boot0"
from the next erase-block.
This commit implements the same strategy for the sunxi spl nand code,
allowing it to boot from the backup boot partition when the main boot
partition is bad (tested by erasing the main boot partition).
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
projects / people / ms / u-boot.git / log
