git.ipfire.org Git - thirdparty/qemu.git/log

]> git.ipfire.org Git - thirdparty/qemu.git/log

projects / thirdparty / qemu.git / log

summary | shortlog | log | commit | commitdiff | tree
first ⋅ prev ⋅ next

commit | commitdiff | tree

Richard Henderson [Thu, 5 Oct 2023 16:41:05 +0000 (09:41 -0700)]

target/sparc: Move FMOVS, FNEGS, FABSS, FSRC*S, FNOT*S to decodetree

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Thu, 5 Oct 2023 16:01:34 +0000 (09:01 -0700)]

target/sparc: Move BMASK to decodetree

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Thu, 5 Oct 2023 15:55:50 +0000 (08:55 -0700)]

target/sparc: Move ADDRALIGN* to decodetree

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Thu, 5 Oct 2023 10:26:54 +0000 (03:26 -0700)]

target/sparc: Move ARRAY* to decodetree

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Thu, 5 Oct 2023 10:12:12 +0000 (03:12 -0700)]

target/sparc: Move EDGE* to decodetree

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Thu, 5 Oct 2023 09:31:25 +0000 (02:31 -0700)]

target/sparc: Merge LDFSR, LDXFSR implementations

Combine the helper to a single set_fsr().
Perform the mask and merge inline.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Thu, 5 Oct 2023 09:12:59 +0000 (02:12 -0700)]

target/sparc: Move LDFSR, STFSR to decodetree

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Thu, 5 Oct 2023 08:56:02 +0000 (01:56 -0700)]

target/sparc: Move asi fp load/store to decodetree

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Thu, 5 Oct 2023 08:38:50 +0000 (01:38 -0700)]

target/sparc: Move simple fp load/store to decodetree

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Thu, 5 Oct 2023 08:37:06 +0000 (01:37 -0700)]

target/sparc: Split out fp ldst functions with asi precomputed

Take the operation size from the MemOp instead of a
separate parameter.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Thu, 5 Oct 2023 07:20:37 +0000 (00:20 -0700)]

target/sparc: Move PREFETCH, PREFETCHA to decodetree

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Thu, 5 Oct 2023 07:09:36 +0000 (00:09 -0700)]

target/sparc: Move CASA, CASXA to decodetree

Remove gen_cas_asi, gen_casx_asi.
Rename gen_cas_asi0 to gen_cas_asi.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Thu, 5 Oct 2023 06:45:21 +0000 (23:45 -0700)]

target/sparc: Move SWAP, SWAPA to decodetree

Remove gen_swap_asi.
Rename gen_swap_asi0 to gen_swap_asi.
Merge gen_swap into gen_swap_asi.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Thu, 5 Oct 2023 06:29:37 +0000 (23:29 -0700)]

target/sparc: Move LDSTUB, LDSTUBA to decodetree

Remove gen_ldstub_asi.
Rename gen_ldstub_asi0 to gen_ldstub_asi.
Merge gen_ldstub into gen_ldstub_asi.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Thu, 5 Oct 2023 06:19:55 +0000 (23:19 -0700)]

target/sparc: Move asi integer load/store to decodetree

Move LDDA, LDSBA, LDSHA, LDSWA, LDUBA, LDUHA, LDUWA, LDXA,
STBA, STDA, STHA, STWA, STXA.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Thu, 5 Oct 2023 02:50:47 +0000 (19:50 -0700)]

target/sparc: Move simple integer load/store to decodetree

Move LDUW, LDUB, LDUH, LDD, LDSW, LDSB, LDSH, LDX,
STW, STB, STH, STD, STX.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Fri, 13 Oct 2023 21:17:17 +0000 (14:17 -0700)]

target/sparc: Use tcg_gen_qemu_{ld,st}_i128 for GET_ASI_DTWINX

Perform one atomic 16-byte operation.
The atomicity is required for the LDTXA instructions.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Thu, 5 Oct 2023 05:44:11 +0000 (22:44 -0700)]

target/sparc: Split out ldst functions with asi pre-computed

As an intermediate step in decodetree conversion, create
new functions passing in DisasASI and not insn.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Thu, 5 Oct 2023 04:59:26 +0000 (21:59 -0700)]

target/sparc: Drop ifdef around get_asi and friends

Mark some of the functions as unused, temporarily.
Fix up some tl vs i64 issues revealed in the process.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Thu, 5 Oct 2023 04:10:47 +0000 (21:10 -0700)]

target/sparc: Split out resolve_asi

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Thu, 5 Oct 2023 02:05:45 +0000 (19:05 -0700)]

target/sparc: Move DONE, RETRY to decodetree

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Thu, 5 Oct 2023 01:52:38 +0000 (18:52 -0700)]

target/sparc: Move FLUSH, SAVE, RESTORE to decodetree

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Thu, 5 Oct 2023 00:51:37 +0000 (17:51 -0700)]

target/sparc: Move JMPL, RETT, RETURN to decodetree

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Wed, 4 Oct 2023 19:43:44 +0000 (12:43 -0700)]

target/sparc: Convert remaining v8 coproc insns to decodetree

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Sat, 21 Oct 2023 04:28:43 +0000 (21:28 -0700)]

target/sparc: Move POPC to decodetree

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Wed, 4 Oct 2023 22:37:54 +0000 (15:37 -0700)]

target/sparc: Move MOVcc, MOVR to decodetree

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Mon, 2 Oct 2023 21:48:10 +0000 (14:48 -0700)]

target/sparc: Move SLL, SRL, SRA to decodetree

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Mon, 2 Oct 2023 21:40:04 +0000 (14:40 -0700)]

target/sparc: Move TADD, TSUB, MULS to decodetree

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Mon, 2 Oct 2023 06:46:47 +0000 (23:46 -0700)]

target/sparc: Move UDIV, SDIV to decodetree

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Mon, 2 Oct 2023 06:34:14 +0000 (23:34 -0700)]

target/sparc: Move UDIVX, SDIVX to decodetree

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Mon, 2 Oct 2023 06:11:50 +0000 (23:11 -0700)]

target/sparc: Move SUBC to decodetree

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Mon, 2 Oct 2023 05:55:04 +0000 (22:55 -0700)]

target/sparc: Move UMUL, SMUL to decodetree

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Mon, 2 Oct 2023 05:46:24 +0000 (22:46 -0700)]

target/sparc: Move MULX to decodetree

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Sat, 21 Oct 2023 02:20:44 +0000 (19:20 -0700)]

target/sparc: Move ADDC to decodetree

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Mon, 2 Oct 2023 04:49:43 +0000 (21:49 -0700)]

target/sparc: Move basic arithmetic to decodetree

Move ADD, AND, OR, XOR, SUB, ANDN, ORN, XORN.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Sun, 22 Oct 2023 21:25:33 +0000 (14:25 -0700)]

target/sparc: Remove cpu_hintp, cpu_htba, cpu_hver, cpu_ssr, cpu_ver

Use direct loads and stores to env instead.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Sun, 22 Oct 2023 21:19:29 +0000 (14:19 -0700)]

target/sparc: Remove cpu_tick_cmpr, cpu_stick_cmpr, cpu_hstick_cmpr

Use direct loads and stores to env instead.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Sun, 22 Oct 2023 21:10:30 +0000 (14:10 -0700)]

target/sparc: Remove cpu_wim

Use direct loads and stores to env instead.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Mon, 2 Oct 2023 20:46:42 +0000 (13:46 -0700)]

target/sparc: Move WRTBR, WRHPR to decodetree

Implement htstate in the obvious way.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Mon, 2 Oct 2023 20:31:20 +0000 (13:31 -0700)]

target/sparc: Move WRWIM, WRPR to decodetree

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Mon, 2 Oct 2023 14:38:42 +0000 (07:38 -0700)]

target/sparc: Move WRPSR, SAVED, RESTORED to decodetree

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Mon, 2 Oct 2023 07:25:46 +0000 (00:25 -0700)]

target/sparc: Move WRASR to decodetree

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Mon, 2 Oct 2023 04:29:10 +0000 (21:29 -0700)]

target/sparc: Move RDTBR, FLUSHW to decodetree

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Mon, 2 Oct 2023 04:21:43 +0000 (21:21 -0700)]

target/sparc: Move RDWIM, RDPR to decodetree

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Mon, 2 Oct 2023 03:34:14 +0000 (20:34 -0700)]

target/sparc: Move RDPSR, RDHPR to decodetree

Implement htstate in the obvious way.

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/847
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Mon, 2 Oct 2023 02:21:38 +0000 (19:21 -0700)]

target/sparc: Move RDASR, STBAR, MEMBAR to decodetree

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Mon, 2 Oct 2023 01:29:42 +0000 (18:29 -0700)]

target/sparc: Move Tcc to decodetree

Use the new delay_exceptionv function in the implementation.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Sun, 1 Oct 2023 23:48:18 +0000 (16:48 -0700)]

target/sparc: Move SETHI to decodetree

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Wed, 4 Oct 2023 20:38:18 +0000 (13:38 -0700)]

target/sparc: Pass DisasCompare to advance_jump_cond

Fold the condition into the branch or movcond when possible.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Wed, 4 Oct 2023 20:23:07 +0000 (13:23 -0700)]

target/sparc: Merge gen_branch_[an] with only caller

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Wed, 4 Oct 2023 20:20:30 +0000 (13:20 -0700)]

target/sparc: Merge gen_fcond with only caller

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Wed, 4 Oct 2023 20:04:14 +0000 (13:04 -0700)]

target/sparc: Merge gen_cond with only caller

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Wed, 4 Oct 2023 20:00:53 +0000 (13:00 -0700)]

target/sparc: Move FBPfcc and FBfcc to decodetree

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Sun, 1 Oct 2023 23:23:14 +0000 (16:23 -0700)]

target/sparc: Move BPr to decodetree

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Sun, 1 Oct 2023 22:57:34 +0000 (15:57 -0700)]

target/sparc: Move BPcc and Bicc to decodetree

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Sun, 1 Oct 2023 22:11:00 +0000 (15:11 -0700)]

target/sparc: Move CALL to decodetree

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Sun, 1 Oct 2023 22:10:31 +0000 (15:10 -0700)]

target/sparc: Define AM_CHECK for sparc32

Define as false, which allows some ifdef removal.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Sun, 1 Oct 2023 21:56:04 +0000 (14:56 -0700)]

target/sparc: Add decodetree infrastructure

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Sun, 22 Oct 2023 23:05:15 +0000 (16:05 -0700)]

target/sparc: Partition cpu features

In the sparc32 binaries, do not advertise features only available
to sparc64, so they cannot be enabled. In the sparc64 binaries,
do not advertise features mandatory in v9, so they cannot be disabled.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Thu, 12 Oct 2023 03:34:14 +0000 (20:34 -0700)]

target/sparc: Remove sparcv7 cpu features

The oldest supported cpu is the microsparc 1; all other cpus
use CPU_DEFAULT_FEATURES. Remove the features that must always
be present for sparcv7: FLOAT, SWAP, FLUSH, FSQRT, FMUL.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Mon, 16 Oct 2023 00:08:53 +0000 (17:08 -0700)]

target/sparc: Use CPU_FEATURE_BIT_* for cpu properties

Use symbols not integer constants for the bit positions.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Mon, 16 Oct 2023 00:02:33 +0000 (17:02 -0700)]

target/sparc: Define features via cpu-feature.h.inc

Manage feature bits automatically.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Tue, 20 Jun 2023 16:38:10 +0000 (18:38 +0200)]

configs: Enable MTTCG for sparc, sparc64

This will be of small comfort to sparc64, because both
sun4u and sun4v board models force max_cpus = 1.
But it does enable actual smp for sparc32 sun4m.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Tue, 20 Jun 2023 16:36:33 +0000 (18:36 +0200)]

target/sparc: Set TCG_GUEST_DEFAULT_MO

Always use TSO, per the Oracle 2015 manual.
This is slightly less restrictive than the TCG_MO_ALL default,
and happens to match the i386 model, which will eliminate a few
extra barriers on that host.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Tue, 17 Oct 2023 02:56:51 +0000 (19:56 -0700)]

target/sparc: Avoid helper_raise_exception in helper_st_asi

Always use cpu_raise_exception_ra with GETPC for unwind.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Mon, 16 Oct 2023 20:23:15 +0000 (13:23 -0700)]

target/sparc: Implement check_align inline

Emit the exception at the end of the translation block,
so that the non-exception case can fall through.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Sun, 15 Oct 2023 23:20:51 +0000 (16:20 -0700)]

target/sparc: Clear may_lookup for npc == DYNAMIC_PC

With pairs of jmp+rett, pc == DYNAMIC_PC_LOOKUP and
npc == DYNAMIC_PC. Make sure that we exit for interrupts.

Cc: qemu-stable@nongnu.org
Fixes: 633c42834c7 ("target/sparc: Introduce DYNAMIC_PC_LOOKUP")
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Stefan Hajnoczi [Mon, 23 Oct 2023 21:45:46 +0000 (14:45 -0700)]

Merge tag 'pull-tcg-20231023' of https://gitlab.com/rth7680/qemu into staging

tcg: Drop unused tcg_temp_free define
tcg: Introduce tcg_use_softmmu
tcg: Optimize past conditional branches
tcg: Use constant zero when expanding with divu2
tcg: Add negsetcondi
tcg: Define MO_TL
tcg: Export tcg_gen_ext_{i32,i64,tl}
target/*: Use tcg_gen_ext_*
tcg/ppc: Enable direct branching tcg_out_goto_tb with TCG_REG_TB
tcg/ppc: Use ADDPCIS for power9
tcg/ppc: Use prefixed instructions for power10
tcg/ppc: Disable TCG_REG_TB for Power9/Power10
tcg/ppc: Enable direct branching tcg_out_goto_tb with TCG_REG_TB
tcg/ppc: Use ADDPCIS for power9
tcg/ppc: Use prefixed instructions for power10
tcg/ppc: Disable TCG_REG_TB for Power9/Power10

# -----BEGIN PGP SIGNATURE-----
#
# iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmU2t18dHHJpY2hhcmQu
# aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV9uXQgAhT1mDy5sg7mfSWuc
# X7i54C3n6Ykyra0HDG47dt4G0gkACEs7tDkllHIxhqTPKCrzpevyZEoyigr2MEOa
# 3GCwxvJORb27Ql2aiM1K8cdlEbzcrx+RZbl4lwqZpZbmMUbz/ZQI4xPEAf2yKdfB
# jTzi+Iu6ziPVqVQrg6fTm1I7YgQI85qcfKxi5lBaXgSfxPXGSlLeDw9Y8QjLHXRx
# nSiGpWiUd5TkqZgLIctShDbK4NEHcvjXUTW4rMWU9l5Cjdf9ZIhxcCxgKTXtOxBi
# 9tUdGOiup2HudOFf+DpQorzWpwRwy3NGpUF7n+WmevQZ1Qh8uNKsveFB0uuqObLg
# zlTI2Q==
# =lgiT
# -----END PGP SIGNATURE-----
# gpg: Signature made Mon 23 Oct 2023 11:11:43 PDT
# gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg:                issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A  05C0 64DF 38E8 AF7E 215F

* tag 'pull-tcg-20231023' of https://gitlab.com/rth7680/qemu: (38 commits)
  target/xtensa: Use tcg_gen_sextract_i32
  target/tricore: Use tcg_gen_*extract_tl
  target/rx: Use tcg_gen_ext_i32
  target/m68k: Use tcg_gen_ext_i32
  target/i386: Use tcg_gen_ext_tl
  target/arm: Use tcg_gen_ext_i64
  tcg: Define MO_TL
  tcg: Export tcg_gen_ext_{i32,i64,tl}
  tcg: add negsetcondi
  target/i386: Use i128 for 128 and 256-bit loads and stores
  tcg: Add tcg_gen_{ld,st}_i128
  tcg: Optimize past conditional branches
  tcg: Use constant zero when expanding with divu2
  tcg: drop unused tcg_temp_free define
  tcg/s390x: Use tcg_use_softmmu
  tcg/riscv: Use tcg_use_softmmu
  tcg/riscv: Do not reserve TCG_GUEST_BASE_REG for guest_base zero
  tcg/ppc: Use tcg_use_softmmu
  tcg/mips: Use tcg_use_softmmu
  tcg/loongarch64: Use tcg_use_softmmu
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>

commit | commitdiff | tree

Stefan Hajnoczi [Mon, 23 Oct 2023 21:45:29 +0000 (14:45 -0700)]

Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu into staging

virtio,pc,pci: features, cleanups

infrastructure for vhost-vdpa shadow work
piix south bridge rework
reconnect for vhost-user-scsi
dummy ACPI QTG DSM for cxl

tests, cleanups, fixes all over the place

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
# -----BEGIN PGP SIGNATURE-----
#
# iQFDBAABCAAtFiEEXQn9CHHI+FuUyooNKB8NuNKNVGkFAmU06PMPHG1zdEByZWRo
# YXQuY29tAAoJECgfDbjSjVRpNIsH/0DlKti86VZLJ6PbNqsnKxoK2gg05TbEhPZU
# pQ+RPDaCHpFBsLC5qsoMJwvaEQFe0e49ZFemw7bXRzBxgmbbNnZ9ArCIPqT+rvQd
# 7UBmyC+kacVyybZatq69aK2BHKFtiIRlT78d9Izgtjmp8V7oyKoz14Esh8wkE+FT
# ypHUa70Addi6alNm6BVkm7bxZxi0Wrmf3THqF8ViYvufzHKl7JR5e17fKWEG0BqV
# 9W7AeHMnzJ7jkTvBGUw7g5EbzFn7hPLTbO4G/VW97k0puS4WRX5aIMkVhUazsRIa
# zDOuXCCskUWuRapiCwY0E4g7cCaT8/JR6JjjBaTgkjJgvo5Y8Eg=
# =ILek
# -----END PGP SIGNATURE-----
# gpg: Signature made Sun 22 Oct 2023 02:18:43 PDT
# gpg:                using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469
# gpg:                issuer "mst@redhat.com"
# gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full]
# gpg:                 aka "Michael S. Tsirkin <mst@redhat.com>" [full]
# Primary key fingerprint: 0270 606B 6F3C DF3D 0B17  0970 C350 3912 AFBE 8E67
#      Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA  8A0D 281F 0DB8 D28D 5469

* tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu: (62 commits)
  intel-iommu: Report interrupt remapping faults, fix return value
  MAINTAINERS: Add include/hw/intc/i8259.h to the PC chip section
  vhost-user: Fix protocol feature bit conflict
  tests/acpi: Update DSDT.cxl with QTG DSM
  hw/cxl: Add QTG _DSM support for ACPI0017 device
  tests/acpi: Allow update of DSDT.cxl
  hw/i386/cxl: ensure maxram is greater than ram size for calculating cxl range
  vhost-user: fix lost reconnect
  vhost-user-scsi: start vhost when guest kicks
  vhost-user-scsi: support reconnect to backend
  vhost: move and rename the conn retry times
  vhost-user-common: send get_inflight_fd once
  hw/i386/pc_piix: Make PIIX4 south bridge usable in PC machine
  hw/isa/piix: Implement multi-process QEMU support also for PIIX4
  hw/isa/piix: Resolve duplicate code regarding PCI interrupt wiring
  hw/isa/piix: Reuse PIIX3's PCI interrupt triggering in PIIX4
  hw/isa/piix: Rename functions to be shared for PCI interrupt triggering
  hw/isa/piix: Reuse PIIX3 base class' realize method in PIIX4
  hw/isa/piix: Share PIIX3's base class with PIIX4
  hw/isa/piix: Harmonize names of reset control memory regions
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>

commit | commitdiff | tree

Stefan Hajnoczi [Mon, 23 Oct 2023 21:45:17 +0000 (14:45 -0700)]

Merge tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu into staging

trivial patches for 2023-10-21

# -----BEGIN PGP SIGNATURE-----
#
# iQFDBAABCAAtFiEEe3O61ovnosKJMUsicBtPaxppPlkFAmUzviQPHG1qdEB0bHMu
# bXNrLnJ1AAoJEHAbT2saaT5ZasYH/2ex+XBdvMGU9wghGXAqPCy6NEwzSQaaPkai
# xuoly0Z3vahOgJK05lXH2bQmGPP1DG8la4fv8owysteIjSncBiq8Nk9+pHylgJJj
# 7eZ6BPZu+xoJRTGrBhQC5F6cCAi2YQlgGwfH+bDB4YJPm2BdYbfMuw7Wm88gVDEh
# nqbU6mtV1wGaDQJtHlpJNSACxWeN6Buq5Jcj27rpeCWAGlqeJBh8qEbPgN8nDnSm
# mBb3DMAWtKAZPjQLnri1MRyyXnfBavBPmeTYHz4nQQHYmeHaGw4Cez5EswnZRlau
# zyMMKwYK9eo7f5mFeTr3+I6XMbiIfuICGhFwLXnNqqlgB79R9w0=
# =/gNQ
# -----END PGP SIGNATURE-----
# gpg: Signature made Sat 21 Oct 2023 05:03:48 PDT
# gpg:                using RSA key 7B73BAD68BE7A2C289314B22701B4F6B1A693E59
# gpg:                issuer "mjt@tls.msk.ru"
# gpg: Good signature from "Michael Tokarev <mjt@tls.msk.ru>" [full]
# gpg:                 aka "Michael Tokarev <mjt@corpit.ru>" [full]
# gpg:                 aka "Michael Tokarev <mjt@debian.org>" [full]
# Primary key fingerprint: 6EE1 95D1 886E 8FFB 810D  4324 457C E0A0 8044 65C5
#      Subkey fingerprint: 7B73 BAD6 8BE7 A2C2 8931  4B22 701B 4F6B 1A69 3E59

* tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu:
  MAINTAINERS: Add the ompic.c file to the or1k-sim section
  MAINTAINERS: Fix typo in openpic_kvm.c entry
  MAINTAINERS: Add unvalued folders in tests/tcg/ to the right sections
  MAINTAINERS: Add PPC common files to PowerPC TCG CPUs
  MAINTAINERS: Add fw_cfg.c to PPC mac99 machine
  MAINTAINERS: Adjust file list for PPC pseries machine
  MAINTAINERS: Adjust file list for PPC e500 machines
  MAINTAINERS: Adjust file list for PPC 4xx CPUs
  MAINTAINERS: Adjust file list for PPC ref405ep machine
  ppc/{bamboo, virtex_ml507}: Remove useless dependency on ppc405.h header
  MAINTAINERS: Fix a couple s390 paths
  MAINTAINERS: Add docs/devel/ebpf_rss.rst to the EBPF section
  MAINTAINERS: Add include/hw/intc/i8259.h to the PC chip section
  MAINTAINERS: Add the nios2 interrupt controller to the nios2 section
  MAINTAINERS: Cover hw/ppc/ppc440_uc.c with Sam460ex board
  hw/ppc/ppc440_uc: Remove dead l2sram_update_mappings()
  hw/rdma/vmw/pvrdma_cmd: Use correct struct in query_port()

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>

commit | commitdiff | tree

Stefan Hajnoczi [Mon, 23 Oct 2023 21:44:20 +0000 (14:44 -0700)]

Merge tag 'hw-misc-20231020' of https://github.com/philmd/qemu into staging

Misc hardware patch queue

- MAINTAINERS updates (Zoltan, Thomas)
- Fix cutils::get_relocated_path on Windows host (Akihiko)
- Housekeeping in Memory APIs (Marc-André)
- SDHCI fix for SDMA transfer (Lu, Jianxian)
- Various QOM/QDev/SysBus cleanups (Philippe)
- Constify QemuInputHandler structure (Philippe)

# -----BEGIN PGP SIGNATURE-----
#
# iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmUydwwACgkQ4+MsLN6t
# wN6ROw//eFpuUdzFXEp3kdZMyKkP898G3L137i5b1p6Aq5SmFoVgeAmP/pAi8FVm
# yAW68BKWXcYEikGLLFcq7UCW7v+dQXAAQdQHgo+1I9QPIytuWps+v9EFiuVY8EDW
# Bd7H3IfGoBHlP5IJwzgpjzR9JEN2H6aEL5mNGXEdIsShNCw7ief4vwWvFjTv/mrS
# bDHg8D6yUitnHAeQv9CMLlhbZXZvZtc/qKWtJjr+w42ZiV9HrmSR3RK07ydl311k
# N8z2rWbLWw2q+BhmeMnCzdSB6eUq76ZZZbMdw5M+3GQVOKW4KdPoBKBnPIDPySRK
# HoULrTAgAh/ZHB6l9kltDzXPTXD4oDSme+DB/aTTqvrXG/KqXFAjgwVwPC7AzONe
# adtimxBXP3EHiLh2PBGBHpCa2+FON7rD23bVbuf5G0emFydU/3sPh+gCpvdzT9oT
# iUifE9WstZg1tPvrRqwf8xoDXVx0f2v+h7V4WOoVWygYbA+1PkRImzsHcqqpOKYS
# YLP857mtDYzL1xhW8gdwn4Zkmj6E6irICHbd4HDh5VQJMy8dQoUMT3DlxUPUOriW
# vitoLJTvk6yHfUODXFcvs34wEgPGGlM5WM9qh2J0tpjUR6st/6tTTxZUkQ8a5QjM
# q6+YZ85ZwtP3Eax16Re5hwcI1VrRyv/YdFQmTuiW1dQPGgQV+/8=
# =KiWh
# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 20 Oct 2023 05:48:12 PDT
# gpg:                using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD  6BB2 E3E3 2C2C DEAD C0DE

* tag 'hw-misc-20231020' of https://github.com/philmd/qemu: (41 commits)
  ui/input: Constify QemuInputHandler structure
  hw/net: Declare link using static DEFINE_PROP_LINK() macro
  hw/dma: Declare link using static DEFINE_PROP_LINK() macro
  hw/scsi/virtio-scsi: Use VIRTIO_SCSI_COMMON() macro
  hw/display/virtio-gpu: Use VIRTIO_DEVICE() macro
  hw/block/vhost-user-blk: Use DEVICE() / VIRTIO_DEVICE() macros
  hw/virtio/virtio-pmem: Replace impossible check by assertion
  hw/s390x/css-bridge: Realize sysbus device before accessing it
  hw/isa: Realize ISA bridge device before accessing it
  hw/arm/virt: Realize ARM_GICV2M sysbus device before accessing it
  hw/acpi: Realize ACPI_GED sysbus device before accessing it
  hw/pci-host/bonito: Do not use SysBus API to map local MMIO region
  hw/misc/allwinner-dramc: Do not use SysBus API to map local MMIO region
  hw/misc/allwinner-dramc: Move sysbus_mmio_map call from init -> realize
  hw/i386/intel_iommu: Do not use SysBus API to map local MMIO region
  hw/i386/amd_iommu: Do not use SysBus API to map local MMIO region
  hw/intc/spapr_xive: Do not use SysBus API to map local MMIO region
  hw/intc/spapr_xive: Move sysbus_init_mmio() calls around
  hw/ppc/pnv: Do not use SysBus API to map local MMIO region
  hw/ppc/pnv_xscom: Do not use SysBus API to map local MMIO region
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>

commit | commitdiff | tree

Richard Henderson [Thu, 19 Oct 2023 18:25:32 +0000 (11:25 -0700)]

target/xtensa: Use tcg_gen_sextract_i32

Reviewed-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Thu, 19 Oct 2023 18:23:19 +0000 (11:23 -0700)]

target/tricore: Use tcg_gen_*extract_tl

The EXTR instructions can use the extract opcodes.

Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Thu, 19 Oct 2023 18:21:40 +0000 (11:21 -0700)]

target/rx: Use tcg_gen_ext_i32

Reviewed-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Thu, 19 Oct 2023 18:20:12 +0000 (11:20 -0700)]

target/m68k: Use tcg_gen_ext_i32

We still need to check OS_{BYTE,WORD,LONG},
because m68k includes floating point in OS_*.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Thu, 19 Oct 2023 18:18:51 +0000 (11:18 -0700)]

target/i386: Use tcg_gen_ext_tl

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Thu, 19 Oct 2023 18:18:08 +0000 (11:18 -0700)]

target/arm: Use tcg_gen_ext_i64

The ext_and_shift_reg helper does this plus a shift.
The non-zero check for shift count is duplicate to
the one done within tcg_gen_shli_i64.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Paolo Bonzini [Sun, 22 Oct 2023 23:34:21 +0000 (16:34 -0700)]

tcg: Define MO_TL

This will also come in handy later for "less than" comparisons.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <03ba02fd-fade-4409-be16-2f81a5690b4c@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Thu, 19 Oct 2023 16:15:22 +0000 (09:15 -0700)]

tcg: Export tcg_gen_ext_{i32,i64,tl}

The two concrete type functions already existed, merely needing
a bit of hardening to invalid inputs.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Paolo Bonzini [Thu, 19 Oct 2023 10:46:43 +0000 (12:46 +0200)]

tcg: add negsetcondi

This can be useful to write a shift bit extraction that does not
depend on TARGET_LONG_BITS.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20231019104648.389942-15-pbonzini@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Thu, 24 Aug 2023 18:08:44 +0000 (11:08 -0700)]

target/i386: Use i128 for 128 and 256-bit loads and stores

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Thu, 24 Aug 2023 17:25:21 +0000 (10:25 -0700)]

tcg: Add tcg_gen_{ld,st}_i128

Do not require the translators to jump through concat and
extract of i64 in order to move values to and from env.

Tested-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Tue, 17 Oct 2023 02:10:42 +0000 (19:10 -0700)]

tcg: Optimize past conditional branches

We already register allocate through extended basic blocks,
optimize through extended basic blocks as well.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Mon, 16 Oct 2023 21:45:12 +0000 (14:45 -0700)]

tcg: Use constant zero when expanding with divu2

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Mike Frysinger [Sun, 15 Oct 2023 01:00:46 +0000 (06:45 +0545)]

tcg: drop unused tcg_temp_free define

Use of the API was removed a while back, but the define wasn't.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20231015010046.16020-1-vapier@gentoo.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Sun, 1 Oct 2023 21:16:32 +0000 (21:16 +0000)]

tcg/s390x: Use tcg_use_softmmu

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Sun, 1 Oct 2023 19:35:44 +0000 (12:35 -0700)]

tcg/riscv: Use tcg_use_softmmu

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Fri, 13 Oct 2023 03:45:36 +0000 (20:45 -0700)]

tcg/riscv: Do not reserve TCG_GUEST_BASE_REG for guest_base zero

Fixes: 92c041c59b ("tcg/riscv: Add the prologue generation and register the JIT")
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Sun, 1 Oct 2023 19:09:52 +0000 (19:09 +0000)]

tcg/ppc: Use tcg_use_softmmu

Fix TCG_GUEST_BASE_REG to use 'TCG_REG_R30' instead of '30'.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Sun, 1 Oct 2023 18:49:03 +0000 (11:49 -0700)]

tcg/mips: Use tcg_use_softmmu

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Sun, 1 Oct 2023 18:05:27 +0000 (18:05 +0000)]

tcg/loongarch64: Use tcg_use_softmmu

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Sun, 1 Oct 2023 15:13:44 +0000 (08:13 -0700)]

tcg/i386: Use tcg_use_softmmu

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Sun, 1 Oct 2023 16:26:53 +0000 (16:26 +0000)]

tcg/aarch64: Use tcg_use_softmmu

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Sun, 1 Oct 2023 17:13:00 +0000 (17:13 +0000)]

tcg/arm: Use tcg_use_softmmu

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Sun, 1 Oct 2023 17:12:32 +0000 (17:12 +0000)]

tcg: Provide guest_base fallback for system mode

Provide a define to allow !tcg_use_softmmu code paths to
compile in system mode, but require elimination.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Sun, 1 Oct 2023 14:53:03 +0000 (07:53 -0700)]

tcg: Introduce tcg_use_softmmu

Begin disconnecting CONFIG_SOFTMMU from !CONFIG_USER_ONLY.
Introduce a variable which can be set at startup to select
one method or another for user-only.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Tue, 15 Aug 2023 17:48:19 +0000 (17:48 +0000)]

tcg/ppc: Disable TCG_REG_TB for Power9/Power10

This appears to slightly improve performance on power9/10.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Tue, 15 Aug 2023 18:17:10 +0000 (18:17 +0000)]

tcg/ppc: Use PLD in tcg_out_goto_tb

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Fri, 4 Aug 2023 18:32:57 +0000 (18:32 +0000)]

tcg/ppc: Use prefixed instructions in tcg_out_dupi_vec

The prefixed instructions have a pc-relative form to use here.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

commit | commitdiff | tree

Richard Henderson [Fri, 4 Aug 2023 18:19:25 +0000 (18:19 +0000)]

tcg/ppc: Use PLD in tcg_out_movi for constant pool

The prefixed instruction has a pc-relative form to use here.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

Mirror of https://git.qemu.org/git/qemu.git