From f2a883a81e50746dbfb163e7ca15a0c822274f9a Mon Sep 17 00:00:00 2001 From: Simon Marchi Date: Tue, 11 May 2021 17:32:28 -0400 Subject: [PATCH] gdb: fix indentation in arm_record_data_proc_misc_ld_str The scopes under this "if" are over-indented, fix that. gdb/ChangeLog: * arm-tdep.c (arm_record_data_proc_misc_ld_str): Fix indentation. Change-Id: I84a551793207ca95d0bc4f122e336555c8179c0e --- gdb/ChangeLog | 5 +++++ gdb/arm-tdep.c | 28 ++++++++++++++-------------- 2 files changed, 19 insertions(+), 14 deletions(-) diff --git a/gdb/ChangeLog b/gdb/ChangeLog index b15b5057b28..7c6ec9622b0 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,3 +1,8 @@ +2021-05-11 Simon Marchi + + * arm-tdep.c (arm_record_data_proc_misc_ld_str): Fix + indentation. + 2021-05-11 Simon Marchi * cli/cli-decode.h (struct cmd_list_element): Fix indentation. diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c index 056973f3492..c473843f240 100644 --- a/gdb/arm-tdep.c +++ b/gdb/arm-tdep.c @@ -10302,20 +10302,20 @@ arm_record_data_proc_misc_ld_str (insn_decode_record *arm_insn_r) /* Handle multiply instructions. */ /* MLA, MUL, SMLAL, SMULL, UMLAL, UMULL. */ if (0 == arm_insn_r->opcode || 1 == arm_insn_r->opcode) - { - /* Handle MLA and MUL. */ - record_buf[0] = bits (arm_insn_r->arm_insn, 16, 19); - record_buf[1] = ARM_PS_REGNUM; - arm_insn_r->reg_rec_count = 2; - } - else if (4 <= arm_insn_r->opcode && 7 >= arm_insn_r->opcode) - { - /* Handle SMLAL, SMULL, UMLAL, UMULL. */ - record_buf[0] = bits (arm_insn_r->arm_insn, 16, 19); - record_buf[1] = bits (arm_insn_r->arm_insn, 12, 15); - record_buf[2] = ARM_PS_REGNUM; - arm_insn_r->reg_rec_count = 3; - } + { + /* Handle MLA and MUL. */ + record_buf[0] = bits (arm_insn_r->arm_insn, 16, 19); + record_buf[1] = ARM_PS_REGNUM; + arm_insn_r->reg_rec_count = 2; + } + else if (4 <= arm_insn_r->opcode && 7 >= arm_insn_r->opcode) + { + /* Handle SMLAL, SMULL, UMLAL, UMULL. */ + record_buf[0] = bits (arm_insn_r->arm_insn, 16, 19); + record_buf[1] = bits (arm_insn_r->arm_insn, 12, 15); + record_buf[2] = ARM_PS_REGNUM; + arm_insn_r->reg_rec_count = 3; + } } else if (9 == arm_insn_r->decode && opcode1 > 0x10) { -- 2.39.2