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ARM: dts: am57xx: sync DT with latest Linux
[people/ms/u-boot.git] / arch / arm / dts / am57xx-idk-common.dtsi
CommitLineData
332dddc6
SP		 1/*
2 * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
a0c0b97c
LV		 9#include "am57xx-industrial-grade.dtsi"
10
332dddc6
SP		 11/ {
12 aliases {
13 rtc0 = &tps659038_rtc;
14 rtc1 = &rtc;
15 };
16
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LV		 17 chosen {
18 stdout-path = &uart3;
19 };
20
332dddc6
SP		 21 vmain: fixedregulator-vmain {
22 compatible = "regulator-fixed";
23 regulator-name = "VMAIN";
24 regulator-min-microvolt = <5000000>;
25 regulator-max-microvolt = <5000000>;
26 regulator-always-on;
27 regulator-boot-on;
28 };
29
30 v3_3d: fixedregulator-v3_3d {
31 compatible = "regulator-fixed";
32 regulator-name = "V3_3D";
33 vin-supply = <&smps9_reg>;
34 regulator-min-microvolt = <3300000>;
35 regulator-max-microvolt = <3300000>;
36 regulator-always-on;
37 regulator-boot-on;
38 };
39
40 vtt_fixed: fixedregulator-vtt {
41 /* TPS51200 */
42 compatible = "regulator-fixed";
43 regulator-name = "vtt_fixed";
44 vin-supply = <&v3_3d>;
45 regulator-min-microvolt = <3300000>;
46 regulator-max-microvolt = <3300000>;
47 regulator-always-on;
48 regulator-boot-on;
49 };
50};
51
52&i2c1 {
53 status = "okay";
54 clock-frequency = <400000>;
55
56 tps659038: tps659038@58 {
57 compatible = "ti,tps659038";
58 reg = <0x58>;
59 interrupts-extended = <&gpio6 16 IRQ_TYPE_LEVEL_HIGH
60 &dra7_pmx_core 0x418>;
61 #interrupt-cells = <2>;
62 interrupt-controller;
63 ti,system-power-controller;
64
65 tps659038_pmic {
66 compatible = "ti,tps659038-pmic";
a0c0b97c
LV		 67
68 smps12-in-supply = <&vmain>;
69 smps3-in-supply = <&vmain>;
70 smps45-in-supply = <&vmain>;
71 smps6-in-supply = <&vmain>;
72 smps7-in-supply = <&vmain>;
73 smps8-in-supply = <&vmain>;
74 smps9-in-supply = <&vmain>;
75 ldo1-in-supply = <&vmain>;
76 ldo2-in-supply = <&vmain>;
77 ldo3-in-supply = <&vmain>;
78 ldo4-in-supply = <&vmain>;
79 ldo9-in-supply = <&vmain>;
80 ldoln-in-supply = <&vmain>;
81 ldousb-in-supply = <&vmain>;
82 ldortc-in-supply = <&vmain>;
83
332dddc6
SP		 84 regulators {
85 smps12_reg: smps12 {
86 /* VDD_MPU */
332dddc6
SP		 87 regulator-name = "smps12";
88 regulator-min-microvolt = <850000>;
89 regulator-max-microvolt = <1250000>;
90 regulator-always-on;
91 regulator-boot-on;
92 };
93
94 smps3_reg: smps3 {
95 /* VDD_DDR EMIF1 EMIF2 */
332dddc6
SP		 96 regulator-name = "smps3";
97 regulator-min-microvolt = <1350000>;
98 regulator-max-microvolt = <1350000>;
99 regulator-always-on;
100 regulator-boot-on;
101 };
102
103 smps45_reg: smps45 {
104 /* VDD_DSPEVE on AM572 */
105 /* VDD_IVA + VDD_DSP on AM571 */
332dddc6
SP		 106 regulator-name = "smps45";
107 regulator-min-microvolt = <850000>;
108 regulator-max-microvolt = <1250000>;
109 regulator-always-on;
110 regulator-boot-on;
111 };
112
113 smps6_reg: smps6 {
114 /* VDD_GPU */
332dddc6
SP		 115 regulator-name = "smps6";
116 regulator-min-microvolt = <850000>;
117 regulator-max-microvolt = <1250000>;
118 regulator-always-on;
119 regulator-boot-on;
120 };
121
122 smps7_reg: smps7 {
123 /* VDD_CORE */
332dddc6
SP		 124 regulator-name = "smps7";
125 regulator-min-microvolt = <850000>;
126 regulator-max-microvolt = <1150000>;
127 regulator-always-on;
128 regulator-boot-on;
129 };
130
131 smps8_reg: smps8 {
132 /* 5728 - VDD_IVAHD */
133 /* 5718 - N.C. test point */
332dddc6
SP		 134 regulator-name = "smps8";
135 };
136
137 smps9_reg: smps9 {
138 /* VDD_3_3D */
332dddc6
SP		 139 regulator-name = "smps9";
140 regulator-min-microvolt = <3300000>;
141 regulator-max-microvolt = <3300000>;
142 regulator-always-on;
143 regulator-boot-on;
144 };
145
146 ldo1_reg: ldo1 {
147 /* VDDSHV8 - VSDMMC */
148 /* NOTE: on rev 1.3a, data supply */
332dddc6
SP		 149 regulator-name = "ldo1";
150 regulator-min-microvolt = <1800000>;
151 regulator-max-microvolt = <3300000>;
152 regulator-boot-on;
153 regulator-always-on;
154 };
155
156 ldo2_reg: ldo2 {
157 /* VDDSH18V */
332dddc6
SP		 158 regulator-name = "ldo2";
159 regulator-min-microvolt = <1800000>;
160 regulator-max-microvolt = <1800000>;
161 regulator-always-on;
162 regulator-boot-on;
163 };
164
165 ldo3_reg: ldo3 {
166 /* R1.3a 572x V1_8PHY_LDO3: USB, SATA */
332dddc6
SP		 167 regulator-name = "ldo3";
168 regulator-min-microvolt = <1800000>;
169 regulator-max-microvolt = <1800000>;
170 regulator-always-on;
171 regulator-boot-on;
172 };
173
174 ldo4_reg: ldo4 {
175 /* R1.3a 572x V1_8PHY_LDO4: PCIE, HDMI*/
332dddc6
SP		 176 regulator-name = "ldo4";
177 regulator-min-microvolt = <1800000>;
178 regulator-max-microvolt = <1800000>;
179 regulator-always-on;
180 regulator-boot-on;
181 };
182
183 /* LDO5-8 unused */
184
185 ldo9_reg: ldo9 {
186 /* VDD_RTC */
332dddc6
SP		 187 regulator-name = "ldo9";
188 regulator-min-microvolt = <840000>;
189 regulator-max-microvolt = <1160000>;
190 regulator-always-on;
191 regulator-boot-on;
192 };
193
194 ldoln_reg: ldoln {
195 /* VDDA_1V8_PLL */
332dddc6
SP		 196 regulator-name = "ldoln";
197 regulator-min-microvolt = <1800000>;
198 regulator-max-microvolt = <1800000>;
199 regulator-always-on;
200 regulator-boot-on;
201 };
202
203 ldousb_reg: ldousb {
204 /* VDDA_3V_USB: VDDA_USBHS33 */
332dddc6
SP		 205 regulator-name = "ldousb";
206 regulator-min-microvolt = <3300000>;
207 regulator-max-microvolt = <3300000>;
208 regulator-always-on;
209 regulator-boot-on;
210 };
211
212 ldortc_reg: ldortc {
213 /* VDDA_RTC */
332dddc6
SP		 214 regulator-name = "ldortc";
215 regulator-min-microvolt = <1800000>;
216 regulator-max-microvolt = <1800000>;
217 regulator-always-on;
218 regulator-boot-on;
219 };
220
221 regen1: regen1 {
222 /* VDD_3V3_ON */
223 regulator-name = "regen1";
224 regulator-boot-on;
225 regulator-always-on;
226 };
227
228 regen2: regen2 {
229 /* Needed for PMIC internal resource */
230 regulator-name = "regen2";
231 regulator-boot-on;
232 regulator-always-on;
233 };
234 };
235 };
236
237 tps659038_rtc: tps659038_rtc {
238 compatible = "ti,palmas-rtc";
239 interrupt-parent = <&tps659038>;
240 interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
241 wakeup-source;
242 };
243
244 tps659038_pwr_button: tps659038_pwr_button {
245 compatible = "ti,palmas-pwrbutton";
246 interrupt-parent = <&tps659038>;
247 interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
248 wakeup-source;
249 ti,palmas-long-press-seconds = <12>;
250 };
251
252 tps659038_gpio: tps659038_gpio {
253 compatible = "ti,palmas-gpio";
254 gpio-controller;
255 #gpio-cells = <2>;
256 };
257 };
258};
259
260&uart3 {
261 status = "okay";
262 interrupts-extended = <&crossbar_mpu GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH
263 &dra7_pmx_core 0x248>;
264};
265
266&rtc {
267 status = "okay";
268 ext-clk-src;
269};
270
271&mac {
272 status = "okay";
273 dual_emac;
274};
275
276&cpsw_emac0 {
277 phy_id = <&davinci_mdio>, <0>;
278 phy-mode = "rgmii";
279 dual_emac_res_vlan = <1>;
280};
281
282&cpsw_emac1 {
283 phy_id = <&davinci_mdio>, <1>;
284 phy-mode = "rgmii";
285 dual_emac_res_vlan = <2>;
286};
287
288&usb2_phy1 {
289 phy-supply = <&ldousb_reg>;
290};
291
292&usb2_phy2 {
293 phy-supply = <&ldousb_reg>;
294};
295
296&usb1 {
297 dr_mode = "host";
298};
299
300&usb2 {
301 dr_mode = "otg";
302};
303
304&mmc2 {
305 status = "okay";
306 vmmc-supply = <&v3_3d>;
307 bus-width = <8>;
308 ti,non-removable;
309 max-frequency = <96000000>;
310};
9af6ce42
V		 311
312&qspi {
313 status = "okay";
314
315 spi-max-frequency = <76800000>;
316 m25p80@0 {
a0c0b97c 317 compatible = "s25fl256s1", "spi-flash", "jedec,spi-nor";
9af6ce42
V		 318 spi-max-frequency = <76800000>;
319 reg = <0>;
320 spi-tx-bus-width = <1>;
321 spi-rx-bus-width = <4>;
322 #address-cells = <1>;
323 #size-cells = <1>;
324
325 /* MTD partition table.
326 * The ROM checks the first four physical blocks
327 * for a valid file to boot and the flash here is
328 * 64KiB block size.
329 */
330 partition@0 {
331 label = "QSPI.SPL";
332 reg = <0x00000000 0x000040000>;
333 };
334 partition@1 {
335 label = "QSPI.u-boot";
336 reg = <0x00040000 0x00100000>;
337 };
338 partition@2 {
339 label = "QSPI.u-boot-spl-os";
340 reg = <0x00140000 0x00080000>;
341 };
342 partition@3 {
343 label = "QSPI.u-boot-env";
344 reg = <0x001c0000 0x00010000>;
345 };
346 partition@4 {
347 label = "QSPI.u-boot-env.backup1";
348 reg = <0x001d0000 0x0010000>;
349 };
350 partition@5 {
351 label = "QSPI.kernel";
352 reg = <0x001e0000 0x0800000>;
353 };
354 partition@6 {
355 label = "QSPI.file-system";
356 reg = <0x009e0000 0x01620000>;
357 };
358 };
359};
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