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e1000: Allow direct access to the E1000 SPI EEPROM device
[people/ms/u-boot.git] / arch / x86 / cpu / start16.S
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2262cfee 1/*
fea25720 2 * U-boot - x86 Startup Code
2262cfee 3 *
dbf7115a
GR
4 * (C) Copyright 2008-2011
5 * Graeme Russ, <graeme.russ@gmail.com>
6 *
7 * (C) Copyright 2002,2003
fa82f871 8 * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
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9 *
10 * See file CREDITS for list of people who contributed to this
11 * project.
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 * MA 02111-1307 USA
27 */
28
c81b26be 29#include <asm/global_data.h>
0c24c9cc 30#include <asm/processor-flags.h>
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31
32#define BOOT_SEG 0xffff0000 /* linear segment of boot code */
33#define a32 .byte 0x67;
34#define o32 .byte 0x66;
35
36.section .start16, "ax"
37.code16
38.globl start16
8bde7f77 39start16:
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40 /* Set the Cold Boot / Hard Reset flag */
41 movl $GD_FLG_COLD_BOOT, %ebx
42
8ffb2e8f
GR
43 /*
44 * First we let the BSP do some early initialization
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45 * this code have to map the flash to its final position
46 */
2262cfee 47 jmp board_init16
88fa0a6e 48.globl board_init16_ret
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49board_init16_ret:
50
2262cfee 51 /* Turn of cache (this might require a 486-class CPU) */
53677ef1 52 movl %cr0, %eax
0c24c9cc 53 orl $(X86_CR0_NW & X86_CR0_CD), %eax
53677ef1 54 movl %eax, %cr0
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55 wbinvd
56
c14a3669 57 /* load the temporary Global Descriptor Table */
797960fd 58o32 cs lidt idt_ptr
53677ef1 59o32 cs lgdt gdt_ptr
2262cfee 60
2262cfee 61 /* Now, we enter protected mode */
53677ef1 62 movl %cr0, %eax
0c24c9cc 63 orl $X86_CR0_PE, %eax
53677ef1 64 movl %eax, %cr0
8bde7f77 65
2262cfee 66 /* Flush the prefetch queue */
53677ef1 67 jmp ff
2262cfee 68ff:
2262cfee 69 /* Finally jump to the 32bit initialization code */
8bde7f77 70 movw $code32start, %ax
8ffb2e8f 71 movw %ax, %bp
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72o32 cs ljmp *(%bp)
73
74 /* 48-bit far pointer */
75code32start:
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76 .long _start /* offset */
77 .word 0x10 /* segment */
2262cfee 78
797960fd
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79idt_ptr:
80 .word 0 /* limit */
81 .long 0 /* base */
82
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83/*
84 * The following Global Descriptor Table is just enough to get us into
85 * 'Flat Protected Mode' - It will be discarded as soon as the final
86 * GDT is setup in a safe location in RAM
87 */
2262cfee 88gdt_ptr:
c14a3669 89 .word 0x20 /* limit (32 bytes = 4 GDT entries) */
53677ef1 90 .long BOOT_SEG + gdt /* base */
2262cfee 91
8bde7f77 92 /* The GDT table ...
2262cfee 93 *
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94 * Selector Type
95 * 0x00 NULL
96 * 0x08 Unused
8bde7f77 97 * 0x10 32bit code
2262cfee 98 * 0x18 32bit data/stack
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99 */
100
101gdt:
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102 .word 0, 0, 0, 0 /* NULL */
103 .word 0, 0, 0, 0 /* unused */
104
105 .word 0xFFFF /* 4Gb - (0x100000*0x1000 = 4Gb) */
106 .word 0 /* base address = 0 */
107 .word 0x9B00 /* code read/exec */
108 .word 0x00CF /* granularity = 4096, 386 (+5th nibble of limit) */
109
110 .word 0xFFFF /* 4Gb - (0x100000*0x1000 = 4Gb) */
111 .word 0x0 /* base address = 0 */
112 .word 0x9300 /* data read/write */
113 .word 0x00CF /* granularity = 4096, 386 (+5th nibble of limit) */