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8e585f02 TL |
1 | /* |
2 | * (C) Copyright 2000-2003 | |
3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
4 | * | |
5 | * Copyright (C) 2004-2007 Freescale Semiconductor, Inc. | |
6 | * TsiChung Liew (Tsi-Chung.Liew@freescale.com) | |
7 | * | |
8 | * See file CREDITS for list of people who contributed to this | |
9 | * project. | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or | |
12 | * modify it under the terms of the GNU General Public License as | |
13 | * published by the Free Software Foundation; either version 2 of | |
14 | * the License, or (at your option) any later version. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, | |
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | * GNU General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License | |
22 | * along with this program; if not, write to the Free Software | |
23 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
24 | * MA 02111-1307 USA | |
25 | */ | |
26 | ||
8e585f02 | 27 | #include <config.h> |
427c8141 TL |
28 | #include <common.h> |
29 | #include <asm/immap.h> | |
8e585f02 TL |
30 | |
31 | DECLARE_GLOBAL_DATA_PTR; | |
32 | ||
33 | int checkboard(void) | |
34 | { | |
35 | puts("Board: "); | |
36 | puts("Freescale FireEngine 5329 EVB\n"); | |
37 | return 0; | |
38 | }; | |
39 | ||
9973e3c6 | 40 | phys_size_t initdram(int board_type) |
8e585f02 TL |
41 | { |
42 | volatile sdram_t *sdram = (volatile sdram_t *)(MMAP_SDRAM); | |
43 | u32 dramsize, i; | |
44 | ||
6d0f6bcf | 45 | dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000; |
8e585f02 TL |
46 | |
47 | for (i = 0x13; i < 0x20; i++) { | |
48 | if (dramsize == (1 << i)) | |
49 | break; | |
50 | } | |
51 | i--; | |
52 | ||
6d0f6bcf JCPV |
53 | sdram->cs0 = (CONFIG_SYS_SDRAM_BASE | i); |
54 | sdram->cfg1 = CONFIG_SYS_SDRAM_CFG1; | |
55 | sdram->cfg2 = CONFIG_SYS_SDRAM_CFG2; | |
8e585f02 TL |
56 | |
57 | /* Issue PALL */ | |
6d0f6bcf | 58 | sdram->ctrl = CONFIG_SYS_SDRAM_CTRL | 2; |
8e585f02 TL |
59 | |
60 | /* Issue LEMR */ | |
6d0f6bcf JCPV |
61 | sdram->mode = CONFIG_SYS_SDRAM_EMOD; |
62 | sdram->mode = (CONFIG_SYS_SDRAM_MODE | 0x04000000); | |
8e585f02 TL |
63 | |
64 | udelay(500); | |
65 | ||
66 | /* Issue PALL */ | |
6d0f6bcf | 67 | sdram->ctrl = (CONFIG_SYS_SDRAM_CTRL | 2); |
8e585f02 TL |
68 | |
69 | /* Perform two refresh cycles */ | |
6d0f6bcf JCPV |
70 | sdram->ctrl = CONFIG_SYS_SDRAM_CTRL | 4; |
71 | sdram->ctrl = CONFIG_SYS_SDRAM_CTRL | 4; | |
8e585f02 | 72 | |
6d0f6bcf | 73 | sdram->mode = CONFIG_SYS_SDRAM_MODE; |
8e585f02 | 74 | |
6d0f6bcf | 75 | sdram->ctrl = (CONFIG_SYS_SDRAM_CTRL & ~0x80000000) | 0x10000c00; |
8e585f02 TL |
76 | |
77 | udelay(100); | |
78 | ||
79 | return dramsize; | |
80 | }; | |
81 | ||
82 | int testdram(void) | |
83 | { | |
84 | /* TODO: XXX XXX XXX */ | |
85 | printf("DRAM test not implemented!\n"); | |
86 | ||
87 | return (0); | |
88 | } |