[people/ms/u-boot.git] / board / ms7720se / lowlevel_init.S

/*
 * (C) Copyright 2007
 * Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#include <asm/macro.h>

	.global	lowlevel_init

	.text
	.align	2

lowlevel_init:

	write16	WTCSR_A, WTCSR_D

	write16	WTCNT_A, WTCNT_D

	write16	FRQCR_A, FRQCR_D

	write16	UCLKCR_A, UCLKCR_D

	write32	CMNCR_A, CMNCR_D

	write32	CMNCR_A, CMNCR_D

	write32	CS0BCR_A, CS0BCR_D

	write32	CS2BCR_A, CS2BCR_D

	write32	CS3BCR_A, CS3BCR_D

	write32	CS4BCR_A, CS4BCR_D

	write32	CS5ABCR_A, CS5ABCR_D

	write32	CS5BBCR_A, CS5BBCR_D

	write32	CS6ABCR_A, CS6ABCR_D

	write32	CS6BBCR_A, CS6BBCR_D

	write32	CS0WCR_A, CS0WCR_D

	write32	CS2WCR_A, CS2WCR_D

	write32	CS3WCR_A, CS3WCR_D

	write32	CS4WCR_A, CS4WCR_D

	write32	CS5AWCR_A, CS5AWCR_D

	write32	CS5BWCR_A, CS5BWCR_D

	write32	CS6AWCR_A, CS6AWCR_D

	write32	CS6BWCR_A, CS6BWCR_D

	write32	SDCR_A, SDCR_D1

	write32	RTCSR_A, RTCSR_D

	write32	RTCNT_A RTCNT_D

	write32	RTCOR_A, RTCOR_D

	write32	SDCR_A, SDCR_D2

	write16	SDMR3_A, SDMR3_D

	write16	PCCR_A, PCCR_D

	write16	PDCR_A, PDCR_D

	write16	PECR_A, PECR_D

	write16	PGCR_A, PGCR_D

	write16	PHCR_A, PHCR_D

	write16	PPCR_A, PPCR_D

	write16	PTCR_A, PTCR_D

	write16	PVCR_A, PVCR_D

	write16	PSELA_A, PSELA_D

	write32	CCR_A, CCR_D

	write8	LED_A, LED_D

	rts
	 nop

	.align 4

FRQCR_A:	.long	0xA415FF80	/* FRQCR Address */
WTCNT_A:	.long	0xA415FF84
WTCSR_A:	.long	0xA415FF86
UCLKCR_A:	.long	0xA40A0008
FRQCR_D:	.long	0x1103		/* I:B:P=8:4:2 */
WTCNT_D:	.long	0x5A00
WTCSR_D:	.long	0xA506
UCLKCR_D:	.long	0xA5C0

#define BSC_BASE	0xA4FD0000
CMNCR_A:	.long	BSC_BASE
CS0BCR_A:	.long	BSC_BASE + 0x04
CS2BCR_A:	.long	BSC_BASE + 0x08
CS3BCR_A:	.long	BSC_BASE + 0x0C
CS4BCR_A:	.long	BSC_BASE + 0x10
CS5ABCR_A:	.long	BSC_BASE + 0x14
CS5BBCR_A:	.long	BSC_BASE + 0x18
CS6ABCR_A:	.long	BSC_BASE + 0x1C
CS6BBCR_A:	.long	BSC_BASE + 0x20
CS0WCR_A:	.long	BSC_BASE + 0x24
CS2WCR_A:	.long	BSC_BASE + 0x28
CS3WCR_A:	.long	BSC_BASE + 0x2C
CS4WCR_A:	.long	BSC_BASE + 0x30
CS5AWCR_A:	.long	BSC_BASE + 0x34
CS5BWCR_A:	.long	BSC_BASE + 0x38
CS6AWCR_A:	.long	BSC_BASE + 0x3C
CS6BWCR_A:	.long	BSC_BASE + 0x40
SDCR_A:		.long	BSC_BASE + 0x44
RTCSR_A:	.long	BSC_BASE + 0x48
RTCNT_A:	.long	BSC_BASE + 0x4C
RTCOR_A:	.long	BSC_BASE + 0x50
SDMR3_A:	.long	BSC_BASE + 0x58C0

CMNCR_D:	.long	0x00000010
CS0BCR_D:	.long	0x36DB0400
CS2BCR_D:	.long	0x36DB0400
CS3BCR_D:	.long	0x36DB4600
CS4BCR_D:	.long	0x36DB0400
CS5ABCR_D:	.long	0x36DB0400
CS5BBCR_D:	.long	0x36DB0200
CS6ABCR_D:	.long	0x36DB0400
CS6BBCR_D:	.long	0x36DB0400
CS0WCR_D:	.long	0x00000B01
CS2WCR_D:	.long	0x00000500
CS3WCR_D:	.long	0x00006D1B
CS4WCR_D:	.long	0x00000500
CS5AWCR_D:	.long	0x00000500
CS5BWCR_D:	.long	0x00000500
CS6AWCR_D:	.long	0x00000500
CS6BWCR_D:	.long	0x00000500
SDCR_D1:	.long	0x00000011
RTCSR_D:	.long	0xA55A0010
RTCNT_D:	.long	0xA55A001F
RTCOR_D:	.long	0xA55A001F
SDMR3_D:	.long	0x0000
SDCR_D2:	.long	0x00000811

#define PFC_BASE	0xA4050100
PCCR_A:		.long	PFC_BASE + 0x04
PDCR_A:		.long	PFC_BASE + 0x06
PECR_A:		.long	PFC_BASE + 0x08
PGCR_A:		.long	PFC_BASE + 0x0C
PHCR_A:		.long	PFC_BASE + 0x0E
PPCR_A:		.long	PFC_BASE + 0x18
PTCR_A:		.long	PFC_BASE + 0x1E
PVCR_A:		.long	PFC_BASE + 0x22
PSELA_A:	.long	PFC_BASE + 0x24

PCCR_D:		.long	0x0000
PDCR_D:		.long	0x0000
PECR_D:		.long	0x0000
PGCR_D:		.long	0x0000
PHCR_D:		.long	0x0000
PPCR_D:		.long	0x00AA
PTCR_D:		.long	0x0280
PVCR_D:		.long	0x0000
PSELA_D:	.long	0x0000

CCR_A:		.long	0xFFFFFFEC
!CCR_D:		.long	0x0000000D
CCR_D:		.long	0x0000000B

LED_A:		.long	0xB6800000
LED_D:		.long	0xFF
Commit	Line	Data
b2b5e2bb YS	1	/*
	2	* (C) Copyright 2007
	3	* Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
	4	*
	5	* This program is free software; you can redistribute it and/or
	6	* modify it under the terms of the GNU General Public License as
	7	* published by the Free Software Foundation; either version 2 of
	8	* the License, or (at your option) any later version.
	9	*
	10	* This program is distributed in the hope that it will be useful,
	11	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	12	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	13	* GNU General Public License for more details.
	14	*
	15	* You should have received a copy of the GNU General Public License
	16	* along with this program; if not, write to the Free Software
	17	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	18	* MA 02111-1307 USA
	19	*/
	20
3e3eec39 NI	21	#include <asm/macro.h>
3e3eec39 NI	22
b2b5e2bb YS	23	.global lowlevel_init
	24
	25	.text
	26	.align 2
	27
	28	lowlevel_init:
	29
3e3eec39 NI	30	write16 WTCSR_A, WTCSR_D
	31
	32	write16 WTCNT_A, WTCNT_D
b2b5e2bb	33
3e3eec39	34	write16 FRQCR_A, FRQCR_D
b2b5e2bb	35
3e3eec39	36	write16 UCLKCR_A, UCLKCR_D
b2b5e2bb	37
3e3eec39	38	write32 CMNCR_A, CMNCR_D
b2b5e2bb	39
3e3eec39	40	write32 CMNCR_A, CMNCR_D
b2b5e2bb	41
3e3eec39	42	write32 CS0BCR_A, CS0BCR_D
b2b5e2bb	43
3e3eec39	44	write32 CS2BCR_A, CS2BCR_D
b2b5e2bb	45
3e3eec39	46	write32 CS3BCR_A, CS3BCR_D
b2b5e2bb	47
3e3eec39	48	write32 CS4BCR_A, CS4BCR_D
b2b5e2bb	49
3e3eec39	50	write32 CS5ABCR_A, CS5ABCR_D
b2b5e2bb	51
3e3eec39	52	write32 CS5BBCR_A, CS5BBCR_D
b2b5e2bb	53
3e3eec39	54	write32 CS6ABCR_A, CS6ABCR_D
b2b5e2bb	55
3e3eec39	56	write32 CS6BBCR_A, CS6BBCR_D
b2b5e2bb	57
3e3eec39	58	write32 CS0WCR_A, CS0WCR_D
b2b5e2bb	59
3e3eec39	60	write32 CS2WCR_A, CS2WCR_D
b2b5e2bb	61
3e3eec39	62	write32 CS3WCR_A, CS3WCR_D
b2b5e2bb	63
3e3eec39	64	write32 CS4WCR_A, CS4WCR_D
b2b5e2bb	65
3e3eec39	66	write32 CS5AWCR_A, CS5AWCR_D
b2b5e2bb	67
3e3eec39	68	write32 CS5BWCR_A, CS5BWCR_D
b2b5e2bb	69
3e3eec39	70	write32 CS6AWCR_A, CS6AWCR_D
b2b5e2bb	71
3e3eec39	72	write32 CS6BWCR_A, CS6BWCR_D
b2b5e2bb	73
3e3eec39	74	write32 SDCR_A, SDCR_D1
b2b5e2bb	75
3e3eec39	76	write32 RTCSR_A, RTCSR_D
b2b5e2bb	77
3e3eec39	78	write32 RTCNT_A RTCNT_D
b2b5e2bb	79
3e3eec39	80	write32 RTCOR_A, RTCOR_D
b2b5e2bb	81
3e3eec39	82	write32 SDCR_A, SDCR_D2
b2b5e2bb	83
3e3eec39	84	write16 SDMR3_A, SDMR3_D
b2b5e2bb	85
3e3eec39	86	write16 PCCR_A, PCCR_D
b2b5e2bb	87
3e3eec39	88	write16 PDCR_A, PDCR_D
b2b5e2bb	89
3e3eec39	90	write16 PECR_A, PECR_D
b2b5e2bb	91
3e3eec39	92	write16 PGCR_A, PGCR_D
b2b5e2bb	93
3e3eec39	94	write16 PHCR_A, PHCR_D
b2b5e2bb	95
3e3eec39	96	write16 PPCR_A, PPCR_D
b2b5e2bb	97
3e3eec39	98	write16 PTCR_A, PTCR_D
b2b5e2bb	99
3e3eec39	100	write16 PVCR_A, PVCR_D
b2b5e2bb	101
3e3eec39	102	write16 PSELA_A, PSELA_D
b2b5e2bb	103
3e3eec39	104	write32 CCR_A, CCR_D
b2b5e2bb	105
3e3eec39	106	write8 LED_A, LED_D
b2b5e2bb YS	107
	108	rts
	109	nop
	110
	111	.align 4
	112
	113	FRQCR_A: .long 0xA415FF80 /* FRQCR Address */
	114	WTCNT_A: .long 0xA415FF84
	115	WTCSR_A: .long 0xA415FF86
	116	UCLKCR_A: .long 0xA40A0008
	117	FRQCR_D: .long 0x1103 /* I:B:P=8:4:2 */
	118	WTCNT_D: .long 0x5A00
	119	WTCSR_D: .long 0xA506
	120	UCLKCR_D: .long 0xA5C0
	121
	122	#define BSC_BASE 0xA4FD0000
	123	CMNCR_A: .long BSC_BASE
	124	CS0BCR_A: .long BSC_BASE + 0x04
	125	CS2BCR_A: .long BSC_BASE + 0x08
	126	CS3BCR_A: .long BSC_BASE + 0x0C
	127	CS4BCR_A: .long BSC_BASE + 0x10
	128	CS5ABCR_A: .long BSC_BASE + 0x14
	129	CS5BBCR_A: .long BSC_BASE + 0x18
	130	CS6ABCR_A: .long BSC_BASE + 0x1C
	131	CS6BBCR_A: .long BSC_BASE + 0x20
	132	CS0WCR_A: .long BSC_BASE + 0x24
	133	CS2WCR_A: .long BSC_BASE + 0x28
	134	CS3WCR_A: .long BSC_BASE + 0x2C
	135	CS4WCR_A: .long BSC_BASE + 0x30
	136	CS5AWCR_A: .long BSC_BASE + 0x34
	137	CS5BWCR_A: .long BSC_BASE + 0x38
	138	CS6AWCR_A: .long BSC_BASE + 0x3C
	139	CS6BWCR_A: .long BSC_BASE + 0x40
	140	SDCR_A: .long BSC_BASE + 0x44
	141	RTCSR_A: .long BSC_BASE + 0x48
	142	RTCNT_A: .long BSC_BASE + 0x4C
	143	RTCOR_A: .long BSC_BASE + 0x50
	144	SDMR3_A: .long BSC_BASE + 0x58C0
	145
	146	CMNCR_D: .long 0x00000010
	147	CS0BCR_D: .long 0x36DB0400
	148	CS2BCR_D: .long 0x36DB0400
	149	CS3BCR_D: .long 0x36DB4600
	150	CS4BCR_D: .long 0x36DB0400
	151	CS5ABCR_D: .long 0x36DB0400
	152	CS5BBCR_D: .long 0x36DB0200
	153	CS6ABCR_D: .long 0x36DB0400
	154	CS6BBCR_D: .long 0x36DB0400
	155	CS0WCR_D: .long 0x00000B01
	156	CS2WCR_D: .long 0x00000500
	157	CS3WCR_D: .long 0x00006D1B
	158	CS4WCR_D: .long 0x00000500
	159	CS5AWCR_D: .long 0x00000500
	160	CS5BWCR_D: .long 0x00000500
	161	CS6AWCR_D: .long 0x00000500
	162	CS6BWCR_D: .long 0x00000500
	163	SDCR_D1: .long 0x00000011
	164	RTCSR_D: .long 0xA55A0010
	165	RTCNT_D: .long 0xA55A001F
	166	RTCOR_D: .long 0xA55A001F
	167	SDMR3_D: .long 0x0000
	168	SDCR_D2: .long 0x00000811
	169
	170	#define PFC_BASE 0xA4050100
171	PCCR_A: .long PFC_BASE + 0x04
172	PDCR_A: .long PFC_BASE + 0x06
173	PECR_A: .long PFC_BASE + 0x08
174	PGCR_A: .long PFC_BASE + 0x0C
175	PHCR_A: .long PFC_BASE + 0x0E
176	PPCR_A: .long PFC_BASE + 0x18
177	PTCR_A: .long PFC_BASE + 0x1E
178	PVCR_A: .long PFC_BASE + 0x22
179	PSELA_A: .long PFC_BASE + 0x24
180
181	PCCR_D: .long 0x0000
182	PDCR_D: .long 0x0000
183	PECR_D: .long 0x0000
184	PGCR_D: .long 0x0000
185	PHCR_D: .long 0x0000
186	PPCR_D: .long 0x00AA
187	PTCR_D: .long 0x0280
188	PVCR_D: .long 0x0000
189	PSELA_D: .long 0x0000
190
191	CCR_A: .long 0xFFFFFFEC
192	!CCR_D: .long 0x0000000D
193	CCR_D: .long 0x0000000B
194
195	LED_A: .long 0xB6800000
196	LED_D: .long 0xFF