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rename CFG_ macros to CONFIG_SYS
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CommitLineData
a4c8d138
SR
1/*
2 * (C) Copyright 2006
3 * Stefan Roese, DENX Software Engineering, sr@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <asm/processor.h>
26
6d0f6bcf
JCPV
27#ifndef CONFIG_SYS_FLASH_READ0
28#define CONFIG_SYS_FLASH_READ0 0x0000 /* 0 is standard */
29#define CONFIG_SYS_FLASH_READ1 0x0001 /* 1 is standard */
30#define CONFIG_SYS_FLASH_READ2 0x0002 /* 2 is standard */
a4c8d138
SR
31#endif
32
6d0f6bcf 33flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
a4c8d138
SR
34
35/*
36 * Functions
37 */
38static int write_word(flash_info_t *info, ulong dest, ulong data);
39static ulong flash_get_size(vu_long *addr, flash_info_t *info);
40
41unsigned long flash_init(void)
42{
43 unsigned long size_b0, size_b1;
44 int i;
45 unsigned long base_b0, base_b1;
46
47 /* Init: no FLASHes known */
6d0f6bcf 48 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
a4c8d138
SR
49 flash_info[i].flash_id = FLASH_UNKNOWN;
50 }
51
52 /* Static FLASH Bank configuration here - FIXME XXX */
53
54 base_b0 = FLASH_BASE0_PRELIM;
55 size_b0 = flash_get_size ((vu_long *) base_b0, &flash_info[0]);
56
57 if (flash_info[0].flash_id == FLASH_UNKNOWN) {
58 printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
59 size_b0, size_b0 << 20);
60 }
61
62 base_b1 = FLASH_BASE1_PRELIM;
63 size_b1 = flash_get_size ((vu_long *) base_b1, &flash_info[1]);
64
65 return (size_b0 + size_b1);
66}
67
68void flash_print_info(flash_info_t *info)
69{
70 int i;
71 int k;
72 int size;
73 int erased;
74 volatile unsigned long *flash;
75
76 if (info->flash_id == FLASH_UNKNOWN) {
77 printf ("missing or unknown FLASH type\n");
78 return;
79 }
80
81 switch (info->flash_id & FLASH_VENDMASK) {
82 case FLASH_MAN_AMD: printf ("AMD "); break;
83 case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
84 case FLASH_MAN_SST: printf ("SST "); break;
96e1d75b 85 case FLASH_MAN_STM: printf ("ST Micro"); break;
a4c8d138 86 case FLASH_MAN_EXCEL: printf ("Excel Semiconductor "); break;
566a494f 87 case FLASH_MAN_MX: printf ("MXIC "); break;
a4c8d138
SR
88 default: printf ("Unknown Vendor "); break;
89 }
90
91 switch (info->flash_id & FLASH_TYPEMASK) {
92 case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
93 break;
94 case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n");
95 break;
96 case FLASH_AM040: printf ("AM29LV040B (4 Mbit, uniform sector size)\n");
97 break;
98 case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
99 break;
100 case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n");
101 break;
102 case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
103 break;
104 case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n");
105 break;
106 case FLASH_AM320T: printf ("AM29LV320T (32 M, top sector)\n");
107 break;
108 case FLASH_AM320B: printf ("AM29LV320B (32 M, bottom sector)\n");
109 break;
110 case FLASH_AMDL322T: printf ("AM29DL322T (32 M, top sector)\n");
111 break;
112 case FLASH_AMDL322B: printf ("AM29DL322B (32 M, bottom sector)\n");
113 break;
114 case FLASH_AMDL323T: printf ("AM29DL323T (32 M, top sector)\n");
115 break;
116 case FLASH_AMDL323B: printf ("AM29DL323B (32 M, bottom sector)\n");
117 break;
118 case FLASH_SST020: printf ("SST39LF/VF020 (2 Mbit, uniform sector size)\n");
119 break;
120 case FLASH_SST040: printf ("SST39LF/VF040 (4 Mbit, uniform sector size)\n");
121 break;
96e1d75b
HS
122 case STM_ID_M29W040B: printf ("ST Micro M29W040B (4 Mbit, uniform sector size)\n");
123 break;
a4c8d138
SR
124 default: printf ("Unknown Chip Type\n");
125 break;
126 }
127
128 printf (" Size: %ld MB in %d Sectors\n",
129 info->size >> 20, info->sector_count);
130
131 printf (" Sector Start Addresses:");
132 for (i=0; i<info->sector_count; ++i) {
6d0f6bcf 133#ifdef CONFIG_SYS_FLASH_EMPTY_INFO
a4c8d138
SR
134 /*
135 * Check if whole sector is erased
136 */
137 if (i != (info->sector_count-1))
138 size = info->start[i+1] - info->start[i];
139 else
140 size = info->start[0] + info->size - info->start[i];
141 erased = 1;
142 flash = (volatile unsigned long *)info->start[i];
2fd9eb50 143 size = size >> 2; /* divide by 4 for longword access */
a4c8d138
SR
144 for (k=0; k<size; k++) {
145 if (*flash++ != 0xffffffff) {
146 erased = 0;
147 break;
148 }
149 }
150
151 if ((i % 5) == 0)
152 printf ("\n ");
153 /* print empty and read-only info */
154 printf (" %08lX%s%s",
155 info->start[i],
156 erased ? " E" : " ",
157 info->protect[i] ? "RO " : " ");
158#else
159 if ((i % 5) == 0)
160 printf ("\n ");
161 printf (" %08lX%s",
162 info->start[i],
163 info->protect[i] ? " (RO)" : " ");
164#endif
165
166 }
167 printf ("\n");
168 return;
169}
170
171/*
172 * The following code cannot be run from FLASH!
173 */
174static ulong flash_get_size(vu_long *addr, flash_info_t *info)
175{
176 short i;
177 short n;
6d0f6bcf 178 volatile CONFIG_SYS_FLASH_WORD_SIZE value;
a4c8d138 179 ulong base = (ulong)addr;
6d0f6bcf 180 volatile CONFIG_SYS_FLASH_WORD_SIZE *addr2 = (volatile CONFIG_SYS_FLASH_WORD_SIZE *)addr;
a4c8d138
SR
181
182 /* Write auto select command: read Manufacturer ID */
6d0f6bcf
JCPV
183 addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00AA00AA;
184 addr2[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00550055;
185 addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00900090;
a4c8d138 186
6d0f6bcf 187 value = addr2[CONFIG_SYS_FLASH_READ0];
a4c8d138
SR
188
189 switch (value) {
6d0f6bcf 190 case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_MANUFACT:
a4c8d138
SR
191 info->flash_id = FLASH_MAN_AMD;
192 break;
6d0f6bcf 193 case (CONFIG_SYS_FLASH_WORD_SIZE)FUJ_MANUFACT:
a4c8d138
SR
194 info->flash_id = FLASH_MAN_FUJ;
195 break;
6d0f6bcf 196 case (CONFIG_SYS_FLASH_WORD_SIZE)SST_MANUFACT:
a4c8d138
SR
197 info->flash_id = FLASH_MAN_SST;
198 break;
6d0f6bcf 199 case (CONFIG_SYS_FLASH_WORD_SIZE)STM_MANUFACT:
96e1d75b
HS
200 info->flash_id = FLASH_MAN_STM;
201 break;
6d0f6bcf 202 case (CONFIG_SYS_FLASH_WORD_SIZE)EXCEL_MANUFACT:
a4c8d138
SR
203 info->flash_id = FLASH_MAN_EXCEL;
204 break;
6d0f6bcf 205 case (CONFIG_SYS_FLASH_WORD_SIZE)MX_MANUFACT:
566a494f
HS
206 info->flash_id = FLASH_MAN_MX;
207 break;
a4c8d138
SR
208 default:
209 info->flash_id = FLASH_UNKNOWN;
210 info->sector_count = 0;
211 info->size = 0;
212 return (0); /* no or unknown flash */
213 }
214
6d0f6bcf 215 value = addr2[CONFIG_SYS_FLASH_READ1]; /* device ID */
a4c8d138
SR
216
217 switch (value) {
6d0f6bcf 218 case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_LV400T:
a4c8d138
SR
219 info->flash_id += FLASH_AM400T;
220 info->sector_count = 11;
221 info->size = 0x00080000;
2fd9eb50 222 break; /* => 0.5 MB */
a4c8d138 223
6d0f6bcf 224 case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_LV400B:
a4c8d138
SR
225 info->flash_id += FLASH_AM400B;
226 info->sector_count = 11;
227 info->size = 0x00080000;
2fd9eb50 228 break; /* => 0.5 MB */
a4c8d138 229
6d0f6bcf 230 case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_LV040B:
2fd9eb50
WD
231 info->flash_id += FLASH_AM040;
232 info->sector_count = 8;
233 info->size = 0x0080000; /* => 0.5 MB */
234 break;
6d0f6bcf 235 case (CONFIG_SYS_FLASH_WORD_SIZE)STM_ID_M29W040B:
96e1d75b
HS
236 info->flash_id += FLASH_AM040;
237 info->sector_count = 8;
238 info->size = 0x0080000; /* => 0,5 MB */
239 break;
a4c8d138 240
6d0f6bcf 241 case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_LV800T:
a4c8d138
SR
242 info->flash_id += FLASH_AM800T;
243 info->sector_count = 19;
244 info->size = 0x00100000;
2fd9eb50 245 break; /* => 1 MB */
a4c8d138 246
6d0f6bcf 247 case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_LV800B:
a4c8d138
SR
248 info->flash_id += FLASH_AM800B;
249 info->sector_count = 19;
250 info->size = 0x00100000;
2fd9eb50 251 break; /* => 1 MB */
a4c8d138 252
6d0f6bcf 253 case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_LV160T:
a4c8d138
SR
254 info->flash_id += FLASH_AM160T;
255 info->sector_count = 35;
256 info->size = 0x00200000;
2fd9eb50 257 break; /* => 2 MB */
a4c8d138 258
6d0f6bcf 259 case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_LV160B:
a4c8d138
SR
260 info->flash_id += FLASH_AM160B;
261 info->sector_count = 35;
262 info->size = 0x00200000;
2fd9eb50 263 break; /* => 2 MB */
a4c8d138 264
6d0f6bcf 265 case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_LV320T:
a4c8d138
SR
266 info->flash_id += FLASH_AM320T;
267 info->sector_count = 71;
2fd9eb50
WD
268 info->size = 0x00400000;
269 break; /* => 4 MB */
a4c8d138 270
6d0f6bcf 271 case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_LV320B:
a4c8d138
SR
272 info->flash_id += FLASH_AM320B;
273 info->sector_count = 71;
2fd9eb50
WD
274 info->size = 0x00400000;
275 break; /* => 4 MB */
a4c8d138 276
6d0f6bcf 277 case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_DL322T:
a4c8d138
SR
278 info->flash_id += FLASH_AMDL322T;
279 info->sector_count = 71;
2fd9eb50
WD
280 info->size = 0x00400000;
281 break; /* => 4 MB */
a4c8d138 282
6d0f6bcf 283 case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_DL322B:
a4c8d138
SR
284 info->flash_id += FLASH_AMDL322B;
285 info->sector_count = 71;
2fd9eb50
WD
286 info->size = 0x00400000;
287 break; /* => 4 MB */
a4c8d138 288
6d0f6bcf 289 case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_DL323T:
a4c8d138
SR
290 info->flash_id += FLASH_AMDL323T;
291 info->sector_count = 71;
2fd9eb50
WD
292 info->size = 0x00400000;
293 break; /* => 4 MB */
a4c8d138 294
6d0f6bcf 295 case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_DL323B:
a4c8d138
SR
296 info->flash_id += FLASH_AMDL323B;
297 info->sector_count = 71;
2fd9eb50
WD
298 info->size = 0x00400000;
299 break; /* => 4 MB */
a4c8d138 300
6d0f6bcf 301 case (CONFIG_SYS_FLASH_WORD_SIZE)SST_ID_xF020:
a4c8d138
SR
302 info->flash_id += FLASH_SST020;
303 info->sector_count = 64;
304 info->size = 0x00040000;
2fd9eb50 305 break; /* => 256 kB */
a4c8d138 306
6d0f6bcf 307 case (CONFIG_SYS_FLASH_WORD_SIZE)SST_ID_xF040:
a4c8d138
SR
308 info->flash_id += FLASH_SST040;
309 info->sector_count = 128;
310 info->size = 0x00080000;
2fd9eb50 311 break; /* => 512 kB */
a4c8d138
SR
312
313 default:
314 info->flash_id = FLASH_UNKNOWN;
315 return (0); /* => no or unknown flash */
316
317 }
318
319 /* set up sector start address table */
320 if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
321 ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM640U)) {
322 for (i = 0; i < info->sector_count; i++)
323 info->start[i] = base + (i * 0x00001000);
324 } else if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040) {
325 for (i = 0; i < info->sector_count; i++)
326 info->start[i] = base + (i * 0x00010000);
327 } else if (((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL322B) ||
328 ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL323B) ||
329 ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320B) ||
330 ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL324B)) {
331 /* set sector offsets for bottom boot block type */
332 for (i=0; i<8; ++i) { /* 8 x 8k boot sectors */
333 info->start[i] = base;
334 base += 8 << 10;
335 }
336 while (i < info->sector_count) { /* 64k regular sectors */
337 info->start[i] = base;
338 base += 64 << 10;
339 ++i;
340 }
341 } else if (((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL322T) ||
342 ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL323T) ||
343 ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320T) ||
344 ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL324T)) {
345 /* set sector offsets for top boot block type */
346 base += info->size;
347 i = info->sector_count;
348 for (n=0; n<8; ++n) { /* 8 x 8k boot sectors */
349 base -= 8 << 10;
350 --i;
351 info->start[i] = base;
352 }
353 while (i > 0) { /* 64k regular sectors */
354 base -= 64 << 10;
355 --i;
356 info->start[i] = base;
357 }
358 } else {
359 if (info->flash_id & FLASH_BTYPE) {
360 /* set sector offsets for bottom boot block type */
361 info->start[0] = base + 0x00000000;
362 info->start[1] = base + 0x00004000;
363 info->start[2] = base + 0x00006000;
364 info->start[3] = base + 0x00008000;
365 for (i = 4; i < info->sector_count; i++) {
366 info->start[i] = base + (i * 0x00010000) - 0x00030000;
367 }
368 } else {
369 /* set sector offsets for top boot block type */
370 i = info->sector_count - 1;
371 info->start[i--] = base + info->size - 0x00004000;
372 info->start[i--] = base + info->size - 0x00006000;
373 info->start[i--] = base + info->size - 0x00008000;
374 for (; i >= 0; i--) {
375 info->start[i] = base + i * 0x00010000;
376 }
377 }
378 }
379
380 /* check for protected sectors */
381 for (i = 0; i < info->sector_count; i++) {
382 /* read sector protection at sector address, (A7 .. A0) = 0x02 */
383 /* D0 = 1 if protected */
6d0f6bcf 384 addr2 = (volatile CONFIG_SYS_FLASH_WORD_SIZE *)(info->start[i]);
a4c8d138
SR
385 if ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_AMD)
386 info->protect[i] = 0;
387 else
6d0f6bcf 388 info->protect[i] = addr2[CONFIG_SYS_FLASH_READ2] & 1;
a4c8d138
SR
389 }
390
391 /*
392 * Prevent writes to uninitialized FLASH.
393 */
394 if (info->flash_id != FLASH_UNKNOWN) {
6d0f6bcf
JCPV
395 addr2 = (CONFIG_SYS_FLASH_WORD_SIZE *)info->start[0];
396 *addr2 = (CONFIG_SYS_FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
a4c8d138
SR
397 }
398
399 return (info->size);
400}
401
402
403int flash_erase(flash_info_t *info, int s_first, int s_last)
404{
6d0f6bcf
JCPV
405 volatile CONFIG_SYS_FLASH_WORD_SIZE *addr = (CONFIG_SYS_FLASH_WORD_SIZE *)(info->start[0]);
406 volatile CONFIG_SYS_FLASH_WORD_SIZE *addr2;
a4c8d138
SR
407 int flag, prot, sect, l_sect;
408 ulong start, now, last;
409
410 if ((s_first < 0) || (s_first > s_last)) {
411 if (info->flash_id == FLASH_UNKNOWN)
412 printf ("- missing\n");
413 else
414 printf ("- no sectors to erase\n");
415 return 1;
416 }
417
418 if (info->flash_id == FLASH_UNKNOWN) {
419 printf ("Can't erase unknown flash type - aborted\n");
420 return 1;
421 }
422
423 prot = 0;
424 for (sect=s_first; sect<=s_last; ++sect)
425 if (info->protect[sect])
426 prot++;
427
428 if (prot)
429 printf ("- Warning: %d protected sectors will not be erased!\n", prot);
430 else
431 printf ("\n");
432
433 l_sect = -1;
434
435 /* Disable interrupts which might cause a timeout here */
436 flag = disable_interrupts();
437
438 /* Start erase on unprotected sectors */
439 for (sect = s_first; sect<=s_last; sect++) {
440 if (info->protect[sect] == 0) { /* not protected */
6d0f6bcf 441 addr2 = (CONFIG_SYS_FLASH_WORD_SIZE *)(info->start[sect]);
a4c8d138 442 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) {
6d0f6bcf
JCPV
443 addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00AA00AA;
444 addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00550055;
445 addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00800080;
446 addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00AA00AA;
447 addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00550055;
448 addr2[0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00300030; /* sector erase */
a4c8d138
SR
449
450 /* re-enable interrupts if necessary */
451 if (flag) {
452 enable_interrupts();
453 flag = 0;
454 }
455
456 /* data polling for D7 */
457 start = get_timer (0);
6d0f6bcf
JCPV
458 while ((addr2[0] & (CONFIG_SYS_FLASH_WORD_SIZE)0x00800080) !=
459 (CONFIG_SYS_FLASH_WORD_SIZE)0x00800080) {
460 if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT)
a4c8d138
SR
461 return (1);
462 }
463 } else {
464 if (sect == s_first) {
6d0f6bcf
JCPV
465 addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00AA00AA;
466 addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00550055;
467 addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00800080;
468 addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00AA00AA;
469 addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00550055;
a4c8d138 470 }
6d0f6bcf 471 addr2[0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00300030; /* sector erase */
a4c8d138
SR
472 }
473 l_sect = sect;
474 }
475 }
476
477 /* re-enable interrupts if necessary */
478 if (flag)
479 enable_interrupts();
480
481 /* wait at least 80us - let's wait 1 ms */
482 udelay (1000);
483
484 /*
485 * We wait for the last triggered sector
486 */
487 if (l_sect < 0)
488 goto DONE;
489
490 start = get_timer (0);
491 last = start;
6d0f6bcf
JCPV
492 addr = (CONFIG_SYS_FLASH_WORD_SIZE *)(info->start[l_sect]);
493 while ((addr[0] & (CONFIG_SYS_FLASH_WORD_SIZE)0x00800080) != (CONFIG_SYS_FLASH_WORD_SIZE)0x00800080) {
494 if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
a4c8d138
SR
495 printf ("Timeout\n");
496 return 1;
497 }
498 /* show that we're waiting */
499 if ((now - last) > 1000) { /* every second */
500 putc ('.');
501 last = now;
502 }
503 }
504
505DONE:
506 /* reset to read mode */
6d0f6bcf
JCPV
507 addr = (CONFIG_SYS_FLASH_WORD_SIZE *)info->start[0];
508 addr[0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
a4c8d138
SR
509
510 printf (" done\n");
511 return 0;
512}
513
514/*
515 * Copy memory to flash, returns:
516 * 0 - OK
517 * 1 - write timeout
518 * 2 - Flash not erased
519 */
520int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
521{
522 ulong cp, wp, data;
523 int i, l, rc;
524
525 wp = (addr & ~3); /* get lower word aligned address */
526
527 /*
528 * handle unaligned start bytes
529 */
530 if ((l = addr - wp) != 0) {
531 data = 0;
532 for (i=0, cp=wp; i<l; ++i, ++cp) {
533 data = (data << 8) | (*(uchar *)cp);
534 }
535 for (; i<4 && cnt>0; ++i) {
536 data = (data << 8) | *src++;
537 --cnt;
538 ++cp;
539 }
540 for (; cnt==0 && i<4; ++i, ++cp) {
541 data = (data << 8) | (*(uchar *)cp);
542 }
543
544 if ((rc = write_word(info, wp, data)) != 0) {
545 return (rc);
546 }
547 wp += 4;
548 }
549
550 /*
551 * handle word aligned part
552 */
553 while (cnt >= 4) {
554 data = 0;
555 for (i=0; i<4; ++i)
556 data = (data << 8) | *src++;
557 if ((rc = write_word(info, wp, data)) != 0)
558 return (rc);
559 wp += 4;
560 cnt -= 4;
561 }
562
563 if (cnt == 0)
564 return (0);
565
566 /*
567 * handle unaligned tail bytes
568 */
569 data = 0;
570 for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
571 data = (data << 8) | *src++;
572 --cnt;
573 }
574 for (; i<4; ++i, ++cp)
575 data = (data << 8) | (*(uchar *)cp);
576
577 return (write_word(info, wp, data));
578}
579
580/*
581 * Write a word to Flash, returns:
582 * 0 - OK
583 * 1 - write timeout
584 * 2 - Flash not erased
585 */
586static int write_word(flash_info_t *info, ulong dest, ulong data)
587{
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JCPV
588 volatile CONFIG_SYS_FLASH_WORD_SIZE *addr2 = (CONFIG_SYS_FLASH_WORD_SIZE *)(info->start[0]);
589 volatile CONFIG_SYS_FLASH_WORD_SIZE *dest2 = (CONFIG_SYS_FLASH_WORD_SIZE *)dest;
590 volatile CONFIG_SYS_FLASH_WORD_SIZE *data2 = (CONFIG_SYS_FLASH_WORD_SIZE *)&data;
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SR
591 ulong start;
592 int flag;
593 int i;
594
595 /* Check if Flash is (sufficiently) erased */
596 if ((*((vu_long *)dest) & data) != data)
597 return (2);
598
599 /* Disable interrupts which might cause a timeout here */
600 flag = disable_interrupts();
601
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JCPV
602 for (i=0; i<4/sizeof(CONFIG_SYS_FLASH_WORD_SIZE); i++) {
603 addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00AA00AA;
604 addr2[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00550055;
605 addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE)0x00A000A0;
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SR
606
607 dest2[i] = data2[i];
608
609 /* re-enable interrupts if necessary */
610 if (flag)
611 enable_interrupts();
612
613 /* data polling for D7 */
614 start = get_timer (0);
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JCPV
615 while ((dest2[i] & (CONFIG_SYS_FLASH_WORD_SIZE)0x00800080) !=
616 (data2[i] & (CONFIG_SYS_FLASH_WORD_SIZE)0x00800080)) {
617 if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT)
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SR
618 return (1);
619 }
620 }
621
622 return (0);
623}