[people/ms/u-boot.git] / board / samsung / universal_c210 / universal.c

/*
 *  Copyright (C) 2010 Samsung Electronics
 *  Minkyu Kang <mk7.kang@samsung.com>
 *  Kyungmin Park <kyungmin.park@samsung.com>
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#include <common.h>
#include <spi.h>
#include <lcd.h>
#include <asm/io.h>
#include <asm/gpio.h>
#include <asm/arch/adc.h>
#include <asm/arch/gpio.h>
#include <asm/arch/mmc.h>
#include <asm/arch/pinmux.h>
#include <asm/arch/watchdog.h>
#include <libtizen.h>
#include <ld9040.h>
#include <power/pmic.h>
#include <usb/s3c_udc.h>
#include <asm/arch/cpu.h>
#include <power/max8998_pmic.h>

DECLARE_GLOBAL_DATA_PTR;

struct exynos4_gpio_part1 *gpio1;
struct exynos4_gpio_part2 *gpio2;
unsigned int board_rev;

u32 get_board_rev(void)
{
	return board_rev;
}

static int get_hwrev(void)
{
	return board_rev & 0xFF;
}

int power_init_board(void)
{
	int ret;

	ret = pmic_init(I2C_5);
	if (ret)
		return ret;

	return 0;
}

int dram_init(void)
{
	gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE) +
		get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE);

	return 0;
}

void dram_init_banksize(void)
{
	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
	gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
}

static unsigned short get_adc_value(int channel)
{
	struct s5p_adc *adc = (struct s5p_adc *)samsung_get_base_adc();
	unsigned short ret = 0;
	unsigned int reg;
	unsigned int loop = 0;

	writel(channel & 0xF, &adc->adcmux);
	writel((1 << 14) | (49 << 6), &adc->adccon);
	writel(1000 & 0xffff, &adc->adcdly);
	writel(readl(&adc->adccon) | (1 << 16), &adc->adccon); /* 12 bit */
	udelay(10);
	writel(readl(&adc->adccon) | (1 << 0), &adc->adccon); /* Enable */
	udelay(10);

	do {
		udelay(1);
		reg = readl(&adc->adccon);
	} while (!(reg & (1 << 15)) && (loop++ < 1000));

	ret = readl(&adc->adcdat0) & 0xFFF;

	return ret;
}

static int adc_power_control(int on)
{
	int ret;
	struct pmic *p = pmic_get("MAX8998_PMIC");
	if (!p)
		return -ENODEV;

	if (pmic_probe(p))
		return -1;

	ret = pmic_set_output(p,
			      MAX8998_REG_ONOFF1,
			      MAX8998_LDO4, !!on);

	return ret;
}

static unsigned int get_hw_revision(void)
{
	int hwrev, mode0, mode1;

	adc_power_control(1);

	mode0 = get_adc_value(1);		/* HWREV_MODE0 */
	mode1 = get_adc_value(2);		/* HWREV_MODE1 */

	/*
	 * XXX Always set the default hwrev as the latest board
	 * ADC = (voltage) / 3.3 * 4096
	 */
	hwrev = 3;

#define IS_RANGE(x, min, max)	((x) > (min) && (x) < (max))
	if (IS_RANGE(mode0, 80, 200) && IS_RANGE(mode1, 80, 200))
		hwrev = 0x0;		/* 0.01V	0.01V */
	if (IS_RANGE(mode0, 750, 1000) && IS_RANGE(mode1, 80, 200))
		hwrev = 0x1;		/* 610mV	0.01V */
	if (IS_RANGE(mode0, 1300, 1700) && IS_RANGE(mode1, 80, 200))
		hwrev = 0x2;		/* 1.16V	0.01V */
	if (IS_RANGE(mode0, 2000, 2400) && IS_RANGE(mode1, 80, 200))
		hwrev = 0x3;		/* 1.79V	0.01V */
#undef IS_RANGE

	debug("mode0: %d, mode1: %d, hwrev 0x%x\n", mode0, mode1, hwrev);

	adc_power_control(0);

	return hwrev;
}

static void check_hw_revision(void)
{
	int hwrev;

	hwrev = get_hw_revision();

	board_rev |= hwrev;
}

#ifdef CONFIG_DISPLAY_BOARDINFO
int checkboard(void)
{
	puts("Board:\tUniversal C210\n");
	return 0;
}
#endif

#ifdef CONFIG_GENERIC_MMC
int board_mmc_init(bd_t *bis)
{
	int err;

	switch (get_hwrev()) {
	case 0:
		/*
		 * Set the low to enable LDO_EN
		 * But when you use the test board for eMMC booting
		 * you should set it HIGH since it removes the inverter
		 */
		/* MASSMEMORY_EN: XMDMDATA_6: GPE3[6] */
		s5p_gpio_direction_output(&gpio1->e3, 6, 0);
		break;
	default:
		/*
		 * Default reset state is High and there's no inverter
		 * But set it as HIGH to ensure
		 */
		/* MASSMEMORY_EN: XMDMADDR_3: GPE1[3] */
		s5p_gpio_direction_output(&gpio1->e1, 3, 1);
		break;
	}

	/*
	 * MMC device init
	 * mmc0	 : eMMC (8-bit buswidth)
	 * mmc2	 : SD card (4-bit buswidth)
	 */
	err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
	if (err)
		debug("SDMMC0 not configured\n");
	else
		err = s5p_mmc_init(0, 8);

	/* T-flash detect */
	s5p_gpio_cfg_pin(&gpio2->x3, 4, 0xf);
	s5p_gpio_set_pull(&gpio2->x3, 4, GPIO_PULL_UP);

	/*
	 * Check the T-flash  detect pin
	 * GPX3[4] T-flash detect pin
	 */
	if (!s5p_gpio_get_value(&gpio2->x3, 4)) {
		err = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE);
		if (err)
			debug("SDMMC2 not configured\n");
		else
			err = s5p_mmc_init(2, 4);
	}

	return err;

}
#endif

#ifdef CONFIG_USB_GADGET
static int s5pc210_phy_control(int on)
{
	int ret = 0;
	struct pmic *p = pmic_get("MAX8998_PMIC");
	if (!p)
		return -ENODEV;

	if (pmic_probe(p))
		return -1;

	if (on) {
		ret |= pmic_set_output(p,
				       MAX8998_REG_BUCK_ACTIVE_DISCHARGE3,
				       MAX8998_SAFEOUT1, LDO_ON);
		ret |= pmic_set_output(p, MAX8998_REG_ONOFF1,
				      MAX8998_LDO3, LDO_ON);
		ret |= pmic_set_output(p, MAX8998_REG_ONOFF2,
				      MAX8998_LDO8, LDO_ON);

	} else {
		ret |= pmic_set_output(p, MAX8998_REG_ONOFF2,
				      MAX8998_LDO8, LDO_OFF);
		ret |= pmic_set_output(p, MAX8998_REG_ONOFF1,
				      MAX8998_LDO3, LDO_OFF);
		ret |= pmic_set_output(p,
				       MAX8998_REG_BUCK_ACTIVE_DISCHARGE3,
				       MAX8998_SAFEOUT1, LDO_OFF);
	}

	if (ret) {
		puts("MAX8998 LDO setting error!\n");
		return -1;
	}

	return 0;
}

struct s3c_plat_otg_data s5pc210_otg_data = {
	.phy_control = s5pc210_phy_control,
	.regs_phy = EXYNOS4_USBPHY_BASE,
	.regs_otg = EXYNOS4_USBOTG_BASE,
	.usb_phy_ctrl = EXYNOS4_USBPHY_CONTROL,
	.usb_flags = PHY0_SLEEP,
};
#endif

int board_early_init_f(void)
{
	wdt_stop();

	return 0;
}

#ifdef CONFIG_SOFT_SPI
static void soft_spi_init(void)
{
	gpio_direction_output(CONFIG_SOFT_SPI_GPIO_SCLK,
		CONFIG_SOFT_SPI_MODE & SPI_CPOL);
	gpio_direction_output(CONFIG_SOFT_SPI_GPIO_MOSI, 1);
	gpio_direction_input(CONFIG_SOFT_SPI_GPIO_MISO);
	gpio_direction_output(CONFIG_SOFT_SPI_GPIO_CS,
		!(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH));
}

void spi_cs_activate(struct spi_slave *slave)
{
	gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS,
		!(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH));
	SPI_SCL(1);
	gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS,
		CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH);
}

void spi_cs_deactivate(struct spi_slave *slave)
{
	gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS,
		!(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH));
}

int  spi_cs_is_valid(unsigned int bus, unsigned int cs)
{
	return bus == 0 && cs == 0;
}

void universal_spi_scl(int bit)
{
	gpio_set_value(CONFIG_SOFT_SPI_GPIO_SCLK, bit);
}

void universal_spi_sda(int bit)
{
	gpio_set_value(CONFIG_SOFT_SPI_GPIO_MOSI, bit);
}

int universal_spi_read(void)
{
	return gpio_get_value(CONFIG_SOFT_SPI_GPIO_MISO);
}
#endif

static void init_pmic_lcd(void)
{
	unsigned char val;
	int ret = 0;

	struct pmic *p = get_pmic();

	if (pmic_probe(p))
		return;

	/* LDO7 1.8V */
	val = 0x02; /* (1800 - 1600) / 100; */
	ret |= pmic_reg_write(p,  MAX8998_REG_LDO7, val);

	/* LDO17 3.0V */
	val = 0xe; /* (3000 - 1600) / 100; */
	ret |= pmic_reg_write(p,  MAX8998_REG_LDO17, val);

	/* Disable unneeded regulators */
	/*
	 * ONOFF1
	 * Buck1 ON, Buck2 OFF, Buck3 ON, Buck4 ON
	 * LDO2 ON, LDO3 OFF, LDO4 OFF, LDO5 ON
	 */
	val = 0xB9;
	ret |= pmic_reg_write(p,  MAX8998_REG_ONOFF1, val);

	/* ONOFF2
	 * LDO6 OFF, LDO7 ON, LDO8 OFF, LDO9 ON,
	 * LDO10 OFF, LDO11 OFF, LDO12 OFF, LDO13 OFF
	 */
	val = 0x50;
	ret |= pmic_reg_write(p,  MAX8998_REG_ONOFF2, val);

	/* ONOFF3
	 * LDO14 OFF, LDO15 OFF, LGO16 OFF, LDO17 OFF
	 * EPWRHOLD OFF, EBATTMON OFF, ELBCNFG2 OFF, ELBCNFG1 OFF
	 */
	val = 0x00;
	ret |= pmic_reg_write(p,  MAX8998_REG_ONOFF3, val);

	if (ret)
		puts("LCD pmic initialisation error!\n");
}

static void lcd_cfg_gpio(void)
{
	unsigned int i, f3_end = 4;

	for (i = 0; i < 8; i++) {
		/* set GPF0,1,2[0:7] for RGB Interface and Data lines (32bit) */
		s5p_gpio_cfg_pin(&gpio1->f0, i, GPIO_FUNC(2));
		s5p_gpio_cfg_pin(&gpio1->f1, i, GPIO_FUNC(2));
		s5p_gpio_cfg_pin(&gpio1->f2, i, GPIO_FUNC(2));
		/* pull-up/down disable */
		s5p_gpio_set_pull(&gpio1->f0, i, GPIO_PULL_NONE);
		s5p_gpio_set_pull(&gpio1->f1, i, GPIO_PULL_NONE);
		s5p_gpio_set_pull(&gpio1->f2, i, GPIO_PULL_NONE);

		/* drive strength to max (24bit) */
		s5p_gpio_set_drv(&gpio1->f0, i, GPIO_DRV_4X);
		s5p_gpio_set_rate(&gpio1->f0, i, GPIO_DRV_SLOW);
		s5p_gpio_set_drv(&gpio1->f1, i, GPIO_DRV_4X);
		s5p_gpio_set_rate(&gpio1->f1, i, GPIO_DRV_SLOW);
		s5p_gpio_set_drv(&gpio1->f2, i, GPIO_DRV_4X);
		s5p_gpio_set_rate(&gpio1->f0, i, GPIO_DRV_SLOW);
	}

	for (i = 0; i < f3_end; i++) {
		/* set GPF3[0:3] for RGB Interface and Data lines (32bit) */
		s5p_gpio_cfg_pin(&gpio1->f3, i, GPIO_FUNC(2));
		/* pull-up/down disable */
		s5p_gpio_set_pull(&gpio1->f3, i, GPIO_PULL_NONE);
		/* drive strength to max (24bit) */
		s5p_gpio_set_drv(&gpio1->f3, i, GPIO_DRV_4X);
		s5p_gpio_set_rate(&gpio1->f3, i, GPIO_DRV_SLOW);
	}

	/* gpio pad configuration for LCD reset. */
	s5p_gpio_cfg_pin(&gpio2->y4, 5, GPIO_OUTPUT);

	spi_init();
}

static void reset_lcd(void)
{
	s5p_gpio_set_value(&gpio2->y4, 5, 1);
	udelay(10000);
	s5p_gpio_set_value(&gpio2->y4, 5, 0);
	udelay(10000);
	s5p_gpio_set_value(&gpio2->y4, 5, 1);
	udelay(100);
}

static void lcd_power_on(void)
{
	struct pmic *p = get_pmic();

	if (pmic_probe(p))
		return;

	pmic_set_output(p, MAX8998_REG_ONOFF3, MAX8998_LDO17, LDO_ON);
	pmic_set_output(p, MAX8998_REG_ONOFF2, MAX8998_LDO7, LDO_ON);
}

vidinfo_t panel_info = {
	.vl_freq	= 60,
	.vl_col		= 480,
	.vl_row		= 800,
	.vl_width	= 480,
	.vl_height	= 800,
	.vl_clkp	= CONFIG_SYS_HIGH,
	.vl_hsp		= CONFIG_SYS_HIGH,
	.vl_vsp		= CONFIG_SYS_HIGH,
	.vl_dp		= CONFIG_SYS_HIGH,

	.vl_bpix	= 5,	/* Bits per pixel */

	/* LD9040 LCD Panel */
	.vl_hspw	= 2,
	.vl_hbpd	= 16,
	.vl_hfpd	= 16,

	.vl_vspw	= 2,
	.vl_vbpd	= 8,
	.vl_vfpd	= 8,
	.vl_cmd_allow_len = 0xf,

	.win_id		= 0,
	.cfg_gpio	= lcd_cfg_gpio,
	.backlight_on	= NULL,
	.lcd_power_on	= lcd_power_on,
	.reset_lcd	= reset_lcd,
	.dual_lcd_enabled = 0,

	.init_delay	= 0,
	.power_on_delay = 10000,
	.reset_delay	= 10000,
	.interface_mode = FIMD_RGB_INTERFACE,
	.mipi_enabled	= 0,
};

void init_panel_info(vidinfo_t *vid)
{
	vid->logo_on	= 1;
	vid->resolution	= HD_RESOLUTION;
	vid->rgb_mode	= MODE_RGB_P;

#ifdef CONFIG_TIZEN
	get_tizen_logo_info(vid);
#endif

	/* for LD9040. */
	vid->pclk_name = 1;	/* MPLL */
	vid->sclk_div = 1;

	vid->cfg_ldo = ld9040_cfg_ldo;
	vid->enable_ldo = ld9040_enable_ldo;

	setenv("lcdinfo", "lcd=ld9040");
}

int board_init(void)
{
	gpio1 = (struct exynos4_gpio_part1 *) EXYNOS4_GPIO_PART1_BASE;
	gpio2 = (struct exynos4_gpio_part2 *) EXYNOS4_GPIO_PART2_BASE;

	gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210;
	gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;

#ifdef CONFIG_SOFT_SPI
	soft_spi_init();
#endif
	check_hw_revision();
	printf("HW Revision:\t0x%x\n", board_rev);

	return 0;
}
Commit	Line	Data
9e40808c MK	1	/*
	2	* Copyright (C) 2010 Samsung Electronics
	3	* Minkyu Kang <mk7.kang@samsung.com>
	4	* Kyungmin Park <kyungmin.park@samsung.com>
	5	*
	6	* See file CREDITS for list of people who contributed to this
	7	* project.
	8	*
	9	* This program is free software; you can redistribute it and/or
	10	* modify it under the terms of the GNU General Public License as
	11	* published by the Free Software Foundation; either version 2 of
	12	* the License, or (at your option) any later version.
	13	*
	14	* This program is distributed in the hope that it will be useful,
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	* GNU General Public License for more details.
	18	*
	19	* You should have received a copy of the GNU General Public License
	20	* along with this program; if not, write to the Free Software
	21	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	22	* MA 02111-1307 USA
	23	*/
	24
	25	#include <common.h>
ff0fedd5	26	#include <spi.h>
d984b9f8	27	#include <lcd.h>
9e40808c	28	#include <asm/io.h>
ff0fedd5	29	#include <asm/gpio.h>
9e40808c MK	30	#include <asm/arch/adc.h>
	31	#include <asm/arch/gpio.h>
	32	#include <asm/arch/mmc.h>
ea7991b8	33	#include <asm/arch/pinmux.h>
11a44798	34	#include <asm/arch/watchdog.h>
d984b9f8 PW	35	#include <libtizen.h>
d984b9f8 PW	36	#include <ld9040.h>
c7336815	37	#include <power/pmic.h>
ddc7e541 ŁM	38	#include <usb/s3c_udc.h>
ddc7e541 ŁM	39	#include <asm/arch/cpu.h>
c7336815	40	#include <power/max8998_pmic.h>
9e40808c MK	41
	42	DECLARE_GLOBAL_DATA_PTR;
	43
393cb361 CK	44	struct exynos4_gpio_part1 *gpio1;
393cb361 CK	45	struct exynos4_gpio_part2 *gpio2;
9e40808c MK	46	unsigned int board_rev;
	47
	48	u32 get_board_rev(void)
	49	{
	50	return board_rev;
	51	}
	52
	53	static int get_hwrev(void)
	54	{
	55	return board_rev & 0xFF;
	56	}
	57
f5a7004c ŁM	58	int power_init_board(void)
	59	{
	60	int ret;
	61
	62	ret = pmic_init(I2C_5);
	63	if (ret)
	64	return ret;
	65
	66	return 0;
	67	}
9e40808c	68
9e40808c MK	69	int dram_init(void)
	70	{
	71	gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE) +
	72	get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE);
	73
	74	return 0;
	75	}
	76
	77	void dram_init_banksize(void)
	78	{
	79	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
	80	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
	81	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
	82	gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
	83	}
	84
	85	static unsigned short get_adc_value(int channel)
	86	{
	87	struct s5p_adc adc = (struct s5p_adc )samsung_get_base_adc();
	88	unsigned short ret = 0;
	89	unsigned int reg;
	90	unsigned int loop = 0;
	91
	92	writel(channel & 0xF, &adc->adcmux);
	93	writel((1 << 14) \| (49 << 6), &adc->adccon);
	94	writel(1000 & 0xffff, &adc->adcdly);
	95	writel(readl(&adc->adccon) \| (1 << 16), &adc->adccon); /* 12 bit */
	96	udelay(10);
	97	writel(readl(&adc->adccon) \| (1 << 0), &adc->adccon); /* Enable */
	98	udelay(10);
	99
	100	do {
	101	udelay(1);
	102	reg = readl(&adc->adccon);
	103	} while (!(reg & (1 << 15)) && (loop++ < 1000));
	104
	105	ret = readl(&adc->adcdat0) & 0xFFF;
	106
	107	return ret;
	108	}
	109
4d86bf08 ŁM	110	static int adc_power_control(int on)
	111	{
	112	int ret;
c7336815 ŁM	113	struct pmic *p = pmic_get("MAX8998_PMIC");
	114	if (!p)
	115	return -ENODEV;
4d86bf08 ŁM	116
	117	if (pmic_probe(p))
	118	return -1;
	119
	120	ret = pmic_set_output(p,
	121	MAX8998_REG_ONOFF1,
	122	MAX8998_LDO4, !!on);
	123
	124	return ret;
	125	}
	126
9e40808c MK	127	static unsigned int get_hw_revision(void)
	128	{
	129	int hwrev, mode0, mode1;
	130
4d86bf08 ŁM	131	adc_power_control(1);
4d86bf08 ŁM	132
9e40808c MK	133	mode0 = get_adc_value(1); /* HWREV_MODE0 */
	134	mode1 = get_adc_value(2); /* HWREV_MODE1 */
	135
	136	/*
	137	* XXX Always set the default hwrev as the latest board
	138	* ADC = (voltage) / 3.3 * 4096
	139	*/
	140	hwrev = 3;
	141
	142	#define IS_RANGE(x, min, max) ((x) > (min) && (x) < (max))
	143	if (IS_RANGE(mode0, 80, 200) && IS_RANGE(mode1, 80, 200))
	144	hwrev = 0x0; /* 0.01V 0.01V */
	145	if (IS_RANGE(mode0, 750, 1000) && IS_RANGE(mode1, 80, 200))
	146	hwrev = 0x1; /* 610mV 0.01V */
	147	if (IS_RANGE(mode0, 1300, 1700) && IS_RANGE(mode1, 80, 200))
	148	hwrev = 0x2; /* 1.16V 0.01V */
	149	if (IS_RANGE(mode0, 2000, 2400) && IS_RANGE(mode1, 80, 200))
	150	hwrev = 0x3; /* 1.79V 0.01V */
	151	#undef IS_RANGE
	152
	153	debug("mode0: %d, mode1: %d, hwrev 0x%x\n", mode0, mode1, hwrev);
	154
4d86bf08 ŁM	155	adc_power_control(0);
4d86bf08 ŁM	156
9e40808c MK	157	return hwrev;
	158	}
	159
	160	static void check_hw_revision(void)
	161	{
	162	int hwrev;
	163
	164	hwrev = get_hw_revision();
	165
	166	board_rev \|= hwrev;
	167	}
	168
	169	#ifdef CONFIG_DISPLAY_BOARDINFO
	170	int checkboard(void)
	171	{
	172	puts("Board:\tUniversal C210\n");
	173	return 0;
	174	}
	175	#endif
	176
	177	#ifdef CONFIG_GENERIC_MMC
	178	int board_mmc_init(bd_t *bis)
	179	{
ea7991b8	180	int err;
9e40808c MK	181
	182	switch (get_hwrev()) {
	183	case 0:
	184	/*
	185	* Set the low to enable LDO_EN
	186	* But when you use the test board for eMMC booting
	187	* you should set it HIGH since it removes the inverter
	188	*/
	189	/* MASSMEMORY_EN: XMDMDATA_6: GPE3[6] */
c8fc4284	190	s5p_gpio_direction_output(&gpio1->e3, 6, 0);
9e40808c MK	191	break;
	192	default:
	193	/*
	194	* Default reset state is High and there's no inverter
	195	* But set it as HIGH to ensure
	196	*/
	197	/* MASSMEMORY_EN: XMDMADDR_3: GPE1[3] */
c8fc4284	198	s5p_gpio_direction_output(&gpio1->e1, 3, 1);
9e40808c MK	199	break;
	200	}
	201
	202	/*
ea7991b8 PW	203	* MMC device init
	204	* mmc0 : eMMC (8-bit buswidth)
	205	* mmc2 : SD card (4-bit buswidth)
9e40808c	206	*/
ea7991b8 PW	207	err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
	208	if (err)
	209	debug("SDMMC0 not configured\n");
	210	else
	211	err = s5p_mmc_init(0, 8);
9e40808c MK	212
9e40808c MK	213	/* T-flash detect */
c8fc4284 ŁM	214	s5p_gpio_cfg_pin(&gpio2->x3, 4, 0xf);
c8fc4284 ŁM	215	s5p_gpio_set_pull(&gpio2->x3, 4, GPIO_PULL_UP);
9e40808c	216
9e40808c MK	217	/*
	218	* Check the T-flash detect pin
	219	* GPX3[4] T-flash detect pin
	220	*/
c8fc4284	221	if (!s5p_gpio_get_value(&gpio2->x3, 4)) {
ea7991b8 PW	222	err = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE);
	223	if (err)
	224	debug("SDMMC2 not configured\n");
	225	else
	226	err = s5p_mmc_init(2, 4);
9e40808c MK	227	}
	228
	229	return err;
	230
	231	}
	232	#endif
ddc7e541 ŁM	233
	234	#ifdef CONFIG_USB_GADGET
	235	static int s5pc210_phy_control(int on)
	236	{
e03492c8	237	int ret = 0;
c7336815 ŁM	238	struct pmic *p = pmic_get("MAX8998_PMIC");
	239	if (!p)
	240	return -ENODEV;
ddc7e541 ŁM	241
	242	if (pmic_probe(p))
	243	return -1;
	244
	245	if (on) {
	246	ret \|= pmic_set_output(p,
	247	MAX8998_REG_BUCK_ACTIVE_DISCHARGE3,
	248	MAX8998_SAFEOUT1, LDO_ON);
	249	ret \|= pmic_set_output(p, MAX8998_REG_ONOFF1,
	250	MAX8998_LDO3, LDO_ON);
	251	ret \|= pmic_set_output(p, MAX8998_REG_ONOFF2,
	252	MAX8998_LDO8, LDO_ON);
	253
	254	} else {
	255	ret \|= pmic_set_output(p, MAX8998_REG_ONOFF2,
	256	MAX8998_LDO8, LDO_OFF);
	257	ret \|= pmic_set_output(p, MAX8998_REG_ONOFF1,
	258	MAX8998_LDO3, LDO_OFF);
	259	ret \|= pmic_set_output(p,
	260	MAX8998_REG_BUCK_ACTIVE_DISCHARGE3,
	261	MAX8998_SAFEOUT1, LDO_OFF);
	262	}
	263
	264	if (ret) {
	265	puts("MAX8998 LDO setting error!\n");
	266	return -1;
	267	}
	268
	269	return 0;
	270	}
	271
	272	struct s3c_plat_otg_data s5pc210_otg_data = {
	273	.phy_control = s5pc210_phy_control,
	274	.regs_phy = EXYNOS4_USBPHY_BASE,
	275	.regs_otg = EXYNOS4_USBOTG_BASE,
	276	.usb_phy_ctrl = EXYNOS4_USBPHY_CONTROL,
	277	.usb_flags = PHY0_SLEEP,
	278	};
	279	#endif
11a44798 PW	280
	281	int board_early_init_f(void)
	282	{
	283	wdt_stop();
	284
	285	return 0;
	286	}
ff0fedd5 PW	287
	288	#ifdef CONFIG_SOFT_SPI
	289	static void soft_spi_init(void)
	290	{
	291	gpio_direction_output(CONFIG_SOFT_SPI_GPIO_SCLK,
	292	CONFIG_SOFT_SPI_MODE & SPI_CPOL);
	293	gpio_direction_output(CONFIG_SOFT_SPI_GPIO_MOSI, 1);
	294	gpio_direction_input(CONFIG_SOFT_SPI_GPIO_MISO);
	295	gpio_direction_output(CONFIG_SOFT_SPI_GPIO_CS,
	296	!(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH));
	297	}
	298
	299	void spi_cs_activate(struct spi_slave *slave)
	300	{
	301	gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS,
	302	!(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH));
	303	SPI_SCL(1);
	304	gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS,
	305	CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH);
	306	}
	307
	308	void spi_cs_deactivate(struct spi_slave *slave)
	309	{
	310	gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS,
	311	!(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH));
	312	}
	313
	314	int spi_cs_is_valid(unsigned int bus, unsigned int cs)
	315	{
	316	return bus == 0 && cs == 0;
	317	}
	318
	319	void universal_spi_scl(int bit)
	320	{
	321	gpio_set_value(CONFIG_SOFT_SPI_GPIO_SCLK, bit);
	322	}
	323
	324	void universal_spi_sda(int bit)
	325	{
	326	gpio_set_value(CONFIG_SOFT_SPI_GPIO_MOSI, bit);
	327	}
	328
	329	int universal_spi_read(void)
	330	{
	331	return gpio_get_value(CONFIG_SOFT_SPI_GPIO_MISO);
	332	}
	333	#endif
	334
d984b9f8 PW	335	static void init_pmic_lcd(void)
	336	{
	337	unsigned char val;
	338	int ret = 0;
	339
	340	struct pmic *p = get_pmic();
	341
	342	if (pmic_probe(p))
	343	return;
	344
	345	/* LDO7 1.8V */
	346	val = 0x02; /* (1800 - 1600) / 100; */
	347	ret \|= pmic_reg_write(p, MAX8998_REG_LDO7, val);
	348
	349	/* LDO17 3.0V */
	350	val = 0xe; /* (3000 - 1600) / 100; */
	351	ret \|= pmic_reg_write(p, MAX8998_REG_LDO17, val);
	352
	353	/* Disable unneeded regulators */
	354	/*
	355	* ONOFF1
	356	* Buck1 ON, Buck2 OFF, Buck3 ON, Buck4 ON
	357	* LDO2 ON, LDO3 OFF, LDO4 OFF, LDO5 ON
	358	*/
	359	val = 0xB9;
	360	ret \|= pmic_reg_write(p, MAX8998_REG_ONOFF1, val);
	361
	362	/* ONOFF2
	363	* LDO6 OFF, LDO7 ON, LDO8 OFF, LDO9 ON,
	364	* LDO10 OFF, LDO11 OFF, LDO12 OFF, LDO13 OFF
	365	*/
	366	val = 0x50;
	367	ret \|= pmic_reg_write(p, MAX8998_REG_ONOFF2, val);
	368
	369	/* ONOFF3
	370	* LDO14 OFF, LDO15 OFF, LGO16 OFF, LDO17 OFF
	371	* EPWRHOLD OFF, EBATTMON OFF, ELBCNFG2 OFF, ELBCNFG1 OFF
	372	*/
	373	val = 0x00;
	374	ret \|= pmic_reg_write(p, MAX8998_REG_ONOFF3, val);
	375
	376	if (ret)
	377	puts("LCD pmic initialisation error!\n");
	378	}
	379
	380	static void lcd_cfg_gpio(void)
	381	{
	382	unsigned int i, f3_end = 4;
	383
	384	for (i = 0; i < 8; i++) {
	385	/* set GPF0,1,2[0:7] for RGB Interface and Data lines (32bit) */
	386	s5p_gpio_cfg_pin(&gpio1->f0, i, GPIO_FUNC(2));
	387	s5p_gpio_cfg_pin(&gpio1->f1, i, GPIO_FUNC(2));
	388	s5p_gpio_cfg_pin(&gpio1->f2, i, GPIO_FUNC(2));
	389	/* pull-up/down disable */
	390	s5p_gpio_set_pull(&gpio1->f0, i, GPIO_PULL_NONE);
	391	s5p_gpio_set_pull(&gpio1->f1, i, GPIO_PULL_NONE);
	392	s5p_gpio_set_pull(&gpio1->f2, i, GPIO_PULL_NONE);
	393
	394	/* drive strength to max (24bit) */
	395	s5p_gpio_set_drv(&gpio1->f0, i, GPIO_DRV_4X);
	396	s5p_gpio_set_rate(&gpio1->f0, i, GPIO_DRV_SLOW);
	397	s5p_gpio_set_drv(&gpio1->f1, i, GPIO_DRV_4X);
	398	s5p_gpio_set_rate(&gpio1->f1, i, GPIO_DRV_SLOW);
399	s5p_gpio_set_drv(&gpio1->f2, i, GPIO_DRV_4X);
400	s5p_gpio_set_rate(&gpio1->f0, i, GPIO_DRV_SLOW);
401	}
402
403	for (i = 0; i < f3_end; i++) {
404	/* set GPF3[0:3] for RGB Interface and Data lines (32bit) */
405	s5p_gpio_cfg_pin(&gpio1->f3, i, GPIO_FUNC(2));
406	/* pull-up/down disable */
407	s5p_gpio_set_pull(&gpio1->f3, i, GPIO_PULL_NONE);
408	/* drive strength to max (24bit) */
409	s5p_gpio_set_drv(&gpio1->f3, i, GPIO_DRV_4X);
410	s5p_gpio_set_rate(&gpio1->f3, i, GPIO_DRV_SLOW);
411	}
412
413	/* gpio pad configuration for LCD reset. */
414	s5p_gpio_cfg_pin(&gpio2->y4, 5, GPIO_OUTPUT);
415
416	spi_init();
417	}
418
419	static void reset_lcd(void)
420	{
421	s5p_gpio_set_value(&gpio2->y4, 5, 1);
422	udelay(10000);
423	s5p_gpio_set_value(&gpio2->y4, 5, 0);
424	udelay(10000);
425	s5p_gpio_set_value(&gpio2->y4, 5, 1);
426	udelay(100);
427	}
428
429	static void lcd_power_on(void)
430	{
431	struct pmic *p = get_pmic();
432
433	if (pmic_probe(p))
434	return;
435
436	pmic_set_output(p, MAX8998_REG_ONOFF3, MAX8998_LDO17, LDO_ON);
437	pmic_set_output(p, MAX8998_REG_ONOFF2, MAX8998_LDO7, LDO_ON);
438	}
439
440	vidinfo_t panel_info = {
441	.vl_freq = 60,
442	.vl_col = 480,
443	.vl_row = 800,
444	.vl_width = 480,
445	.vl_height = 800,
446	.vl_clkp = CONFIG_SYS_HIGH,
447	.vl_hsp = CONFIG_SYS_HIGH,
448	.vl_vsp = CONFIG_SYS_HIGH,
449	.vl_dp = CONFIG_SYS_HIGH,
450
451	.vl_bpix = 5, /* Bits per pixel */
452
453	/* LD9040 LCD Panel */
454	.vl_hspw = 2,
455	.vl_hbpd = 16,
456	.vl_hfpd = 16,
457
458	.vl_vspw = 2,
459	.vl_vbpd = 8,
460	.vl_vfpd = 8,
461	.vl_cmd_allow_len = 0xf,
462
463	.win_id = 0,
464	.cfg_gpio = lcd_cfg_gpio,
465	.backlight_on = NULL,
466	.lcd_power_on = lcd_power_on,
467	.reset_lcd = reset_lcd,
468	.dual_lcd_enabled = 0,
469
470	.init_delay = 0,
471	.power_on_delay = 10000,
472	.reset_delay = 10000,
473	.interface_mode = FIMD_RGB_INTERFACE,
474	.mipi_enabled = 0,
475	};
476
477	void init_panel_info(vidinfo_t *vid)
478	{
479	vid->logo_on = 1;
480	vid->resolution = HD_RESOLUTION;
481	vid->rgb_mode = MODE_RGB_P;
482
483	#ifdef CONFIG_TIZEN
484	get_tizen_logo_info(vid);
485	#endif
486
487	/* for LD9040. */
488	vid->pclk_name = 1; /* MPLL */
489	vid->sclk_div = 1;
490
491	vid->cfg_ldo = ld9040_cfg_ldo;
492	vid->enable_ldo = ld9040_enable_ldo;
493
494	setenv("lcdinfo", "lcd=ld9040");
495	}
496
ff0fedd5 PW	497	int board_init(void)
	498	{
	499	gpio1 = (struct exynos4_gpio_part1 *) EXYNOS4_GPIO_PART1_BASE;
	500	gpio2 = (struct exynos4_gpio_part2 *) EXYNOS4_GPIO_PART2_BASE;
	501
	502	gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210;
	503	gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
	504
ff0fedd5 PW	505	#ifdef CONFIG_SOFT_SPI
	506	soft_spi_init();
	507	#endif
	508	check_hw_revision();
	509	printf("HW Revision:\t0x%x\n", board_rev);
	510
	511	return 0;
	512	}