projects / people / ms / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| e2b159d0 KG |
1 | /* |
| 2 | * Copyright 2008 Freescale Semiconductor, Inc. | |
| 3 | * | |
| 4 | * (C) Copyright 2000 | |
| 5 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
| 6 | * | |
| 7 | * See file CREDITS for list of people who contributed to this | |
| 8 | * project. | |
| 9 | * | |
| 10 | * This program is free software; you can redistribute it and/or | |
| 11 | * modify it under the terms of the GNU General Public License as | |
| 12 | * published by the Free Software Foundation; either version 2 of | |
| 13 | * the License, or (at your option) any later version. | |
| 14 | * | |
| 15 | * This program is distributed in the hope that it will be useful, | |
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 18 | * GNU General Public License for more details. | |
| 19 | * | |
| 20 | * You should have received a copy of the GNU General Public License | |
| 21 | * along with this program; if not, write to the Free Software | |
| 22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
| 23 | * MA 02111-1307 USA | |
| 24 | */ | |
| 25 | ||
| 26 | #include <common.h> | |
| 27 | #include <asm/fsl_law.h> | |
| 28 | #include <asm/mmu.h> | |
| 29 | ||
| 30 | /* | |
| 31 | * LAW(Local Access Window) configuration: | |
| 32 | * | |
| 33 | * 0x0000_0000 0x0fff_ffff DDR 256M | |
| 34 | * 0x8000_0000 0x9fff_ffff PCI1 MEM 512M | |
| fdc7eb90 | 35 | * 0xa000_0000 0xbfff_ffff PCIe MEM 512M |
| e2b159d0 | 36 | * 0xe000_0000 0xe000_ffff CCSR 1M |
| fdc7eb90 PG |
37 | * 0xe200_0000 0xe27f_ffff PCI1 IO 8M |
| 38 | * 0xe280_0000 0xe2ff_ffff PCIe IO 8M | |
| 3fd673cf | 39 | * 0xec00_0000 0xefff_ffff FLASH (2nd bank) 64M |
| e2b159d0 KG |
40 | * 0xf000_0000 0xf7ff_ffff SDRAM 128M |
| 41 | * 0xf8b0_0000 0xf80f_ffff EEPROM 1M | |
| e2b159d0 KG |
42 | * 0xff80_0000 0xffff_ffff FLASH (boot bank) 8M |
| 43 | * | |
| f0aec4ea PG |
44 | * If swapped CS0/CS6 via JP12+SW2.8: |
| 45 | * 0xef80_0000 0xefff_ffff FLASH (2nd bank) 8M | |
| 46 | * 0xfc00_0000 0xffff_ffff FLASH (boot bank) 64M | |
| 47 | * | |
| e2b159d0 | 48 | * Notes: |
| 53677ef1 | 49 | * CCSRBAR and L2-as-SRAM don't need a configured Local Access Window. |
| e2b159d0 KG |
50 | * If flash is 8M at default position (last 8M), no LAW needed. |
| 51 | */ | |
| 52 | ||
| 53 | struct law_entry law_table[] = { | |
| f0aec4ea PG |
54 | #ifdef CONFIG_SYS_ALT_BOOT |
| 55 | SET_LAW(CONFIG_SYS_ALT_FLASH, LAW_SIZE_8M, LAW_TRGT_IF_LBC), | |
| 56 | #else | |
| 3fd673cf | 57 | SET_LAW(CONFIG_SYS_ALT_FLASH, LAW_SIZE_64M, LAW_TRGT_IF_LBC), |
| f0aec4ea | 58 | #endif |
| e2b159d0 | 59 | #ifndef CONFIG_SPD_EEPROM |
| 6d0f6bcf | 60 | SET_LAW(CONFIG_SYS_DDR_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_DDR), |
| fdc7eb90 | 61 | #endif |
| 7e44f2b7 | 62 | #ifdef CONFIG_SYS_LBC_SDRAM_BASE |
| e2b159d0 | 63 | /* LBC window - maps 256M 0xf0000000 -> 0xffffffff */ |
| 6d0f6bcf | 64 | SET_LAW(CONFIG_SYS_LBC_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC), |
| 7e44f2b7 PG |
65 | #else |
| 66 | /* LBC window - maps 128M 0xf8000000 -> 0xffffffff */ | |
| 67 | SET_LAW(CONFIG_SYS_EPLD_BASE, LAW_SIZE_128M, LAW_TRGT_IF_LBC), | |
| 68 | #endif | |
| e2b159d0 KG |
69 | }; |
| 70 | ||
| 71 | int num_law_entries = ARRAY_SIZE(law_table); |