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1/*
2 * (C) Copyright 2004
3 * Robert Whaley, Applied Data Systems, Inc. rwhaley@applieddata.net
4 *
5 * (C) Copyright 2002
6 * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
7 *
8 * (C) Copyright 2002
9 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
10 * Marius Groeger <mgroeger@sysgo.de>
11 *
12 * See file CREDITS for list of people who contributed to this
13 * project.
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 * MA 02111-1307 USA
29 */
30
31#include <common.h>
32#include <asm/arch/hardware.h>
c7e61334 33#include <netdev.h>
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34
35DECLARE_GLOBAL_DATA_PTR;
36
37/* ------------------------------------------------------------------------- */
38
39/*
40 * Miscelaneous platform dependent initialisations
41 */
42extern struct serial_device serial_ffuart_device;
43extern struct serial_device serial_btuart_device;
44extern struct serial_device serial_stuart_device;
45
46struct serial_device *default_serial_console (void)
47{
48 return &serial_ffuart_device;
49}
50
51int board_init (void)
52{
53 /* memory and cpu-speed are setup before relocation */
54 /* so we do _nothing_ here */
55
56 /* arch number of vpac270 */
57 gd->bd->bi_arch_number = MACH_TYPE_VPAC270;
58
59 /* adress of boot parameters */
60 gd->bd->bi_boot_params = 0xa0000100;
61
62 return 0;
63}
64
65int dram_init (void)
66{
67 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
68 gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
69
70 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
71 gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
72
73 return 0;
74}
75
76int usb_board_init(void)
77{
78 UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
79 ~(UHCHR_SSEP0 | UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE);
80
81 UHCHR |= UHCHR_FSBIR;
82
83 while (UHCHR & UHCHR_FSBIR);
84
85 UHCHR &= ~UHCHR_SSE;
86 UHCHIE = (UHCHIE_UPRIE | UHCHIE_RWIE);
87
88 /* Clear any OTG Pin Hold */
89 if (PSSR & PSSR_OTGPH)
90 PSSR |= PSSR_OTGPH;
91
92 UHCRHDA &= ~(0x200);
93 UHCRHDA |= 0x100;
94
95 /* Set port power control mask bits, only 3 ports. */
96 UHCRHDB |= (0x7<<17);
97
98 /* enable port 2 */
99 UP2OCR |= UP2OCR_HXOE | UP2OCR_HXS | UP2OCR_DMPDE | UP2OCR_DPPDE;
100
101 return 0;
102}
103
104void usb_board_init_fail(void)
105{
106 return;
107}
108
109void usb_board_stop(void)
110{
111 UHCHR |= UHCHR_FHR;
112 udelay(11);
113 UHCHR &= ~UHCHR_FHR;
114
115 UHCCOMS |= 1;
116 udelay(10);
117
118 CKEN &= ~CKEN10_USBHOST;
119
120 return;
121}
122
123#ifdef CONFIG_DRIVER_DM9000
124int board_eth_init(bd_t *bis)
125{
126 return dm9000_initialize(bis);
127}
128#endif