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ccf0fdd0 PT |
1 | /* |
2 | * Copyright 2008 Extreme Engineering Solutions, Inc. | |
3 | * Copyright 2007-2008 Freescale Semiconductor, Inc. | |
4 | * | |
1a459660 | 5 | * SPDX-License-Identifier: GPL-2.0+ |
ccf0fdd0 PT |
6 | */ |
7 | ||
8 | #include <common.h> | |
9 | #include <pci.h> | |
c8514622 | 10 | #include <asm/fsl_pci.h> |
5d27e02c | 11 | #include <asm/fsl_serdes.h> |
1bb61b69 | 12 | #include <asm/io.h> |
9660c5de | 13 | #include <linux/compiler.h> |
ccf0fdd0 PT |
14 | #include <libfdt.h> |
15 | #include <fdt_support.h> | |
16 | ||
ccf0fdd0 | 17 | |
78bbc5ce PT |
18 | #ifdef CONFIG_PCI1 |
19 | static struct pci_controller pci1_hose; | |
20 | #endif | |
ccf0fdd0 PT |
21 | |
22 | void pci_init_board(void) | |
23 | { | |
9660c5de | 24 | int first_free_busno = 0; |
9660c5de | 25 | |
66357095 KG |
26 | #ifdef CONFIG_PCI1 |
27 | int pcie_ep; | |
28 | struct fsl_pci_info pci_info; | |
ccf0fdd0 | 29 | volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); |
9660c5de | 30 | u32 devdisr = in_be32(&gur->devdisr); |
1bb61b69 PT |
31 | uint pci_spd_norm = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1_SPD; |
32 | uint pci_32 = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1_PCI32; | |
33 | uint pci_arb = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1_ARB; | |
34 | uint pcix = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1; | |
78bbc5ce PT |
35 | uint freq = CONFIG_SYS_CLK_FREQ / 1000 / 1000; |
36 | ||
78bbc5ce | 37 | if (!(devdisr & MPC85xx_DEVDISR_PCI1)) { |
66357095 KG |
38 | SET_STD_PCI_INFO(pci_info, 1); |
39 | set_next_law(pci_info.mem_phys, | |
40 | law_size_bits(pci_info.mem_size), pci_info.law); | |
41 | set_next_law(pci_info.io_phys, | |
42 | law_size_bits(pci_info.io_size), pci_info.law); | |
43 | ||
44 | pcie_ep = fsl_setup_hose(&pci1_hose, pci_info.regs); | |
8ca78f2c | 45 | printf("PCI1: %d bit %s, %s %d MHz, %s, %s\n", |
78bbc5ce PT |
46 | pci_32 ? 32 : 64, |
47 | pcix ? "PCIX" : "PCI", | |
1bb61b69 | 48 | pci_spd_norm ? ">=" : "<=", |
78bbc5ce | 49 | pcix ? freq * 2 : freq, |
9660c5de | 50 | pcie_ep ? "agent" : "host", |
78bbc5ce | 51 | pci_arb ? "arbiter" : "external-arbiter"); |
ccf0fdd0 | 52 | |
66357095 | 53 | first_free_busno = fsl_pci_init_port(&pci_info, |
9660c5de | 54 | &pci1_hose, first_free_busno); |
78bbc5ce | 55 | } else { |
8ca78f2c | 56 | printf("PCI1: disabled\n"); |
78bbc5ce PT |
57 | } |
58 | #elif defined CONFIG_MPC8548 | |
66357095 | 59 | volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); |
78bbc5ce | 60 | /* PCI1 not present on MPC8572 */ |
1bb61b69 | 61 | setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI1); |
78bbc5ce | 62 | #endif |
ccf0fdd0 | 63 | |
66357095 | 64 | fsl_pcie_init_board(first_free_busno); |
ccf0fdd0 PT |
65 | } |
66 | ||
67 | #if defined(CONFIG_OF_BOARD_SETUP) | |
ccf0fdd0 PT |
68 | void ft_board_pci_setup(void *blob, bd_t *bd) |
69 | { | |
6525d51f | 70 | FT_FSL_PCI_SETUP; |
ccf0fdd0 PT |
71 | } |
72 | #endif /* CONFIG_OF_BOARD_SETUP */ |