[people/ms/u-boot.git] / board / xm250 / flash.c

/*
 * (C) Copyright 2001
 * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
 *
 * (C) Copyright 2001-2004
 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#include <common.h>
#include <linux/byteorder/swab.h>


flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];	/* info for FLASH chips    */

/* Board support for 1 or 2 flash devices */
#define FLASH_PORT_WIDTH32
#undef FLASH_PORT_WIDTH16

#ifdef FLASH_PORT_WIDTH16
#define FLASH_PORT_WIDTH		ushort
#define FLASH_PORT_WIDTHV		vu_short
#define SWAP(x)               __swab16(x)
#else
#define FLASH_PORT_WIDTH		ulong
#define FLASH_PORT_WIDTHV		vu_long
#define SWAP(x)               __swab32(x)
#endif

/* Intel-compatible flash ID */
#define INTEL_COMPAT  0x00890089
#define INTEL_ALT     0x00B000B0

/* Intel-compatible flash commands */
#define INTEL_PROGRAM 0x00100010
#define INTEL_ERASE   0x00200020
#define INTEL_CLEAR   0x00500050
#define INTEL_LOCKBIT 0x00600060
#define INTEL_PROTECT 0x00010001
#define INTEL_STATUS  0x00700070
#define INTEL_READID  0x00900090
#define INTEL_CONFIRM 0x00D000D0
#define INTEL_RESET   0xFFFFFFFF

/* Intel-compatible flash status bits */
#define INTEL_FINISHED 0x00800080
#define INTEL_OK       0x00800080

#define FPW	   FLASH_PORT_WIDTH
#define FPWV   FLASH_PORT_WIDTHV

#define mb() __asm__ __volatile__ ("" : : : "memory")

/*-----------------------------------------------------------------------
 * Functions
 */
static ulong flash_get_size (FPW *addr, flash_info_t *info);
static int write_data (flash_info_t *info, ulong dest, FPW data);
static void flash_get_offsets (ulong base, flash_info_t *info);
void inline spin_wheel (void);

/*-----------------------------------------------------------------------
 */

unsigned long flash_init (void)
{
	int i;
	ulong size = 0;

	for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
		switch (i) {
		case 0:
			flash_get_size ((FPW *) PHYS_FLASH_1, &flash_info[i]);
			flash_get_offsets (PHYS_FLASH_1, &flash_info[i]);
			break;
		case 1:
			flash_get_size ((FPW *) PHYS_FLASH_2, &flash_info[i]);
			flash_get_offsets (PHYS_FLASH_2, &flash_info[i]);
			break;
		default:
			panic ("configured to many flash banks!\n");
			break;
		}
		size += flash_info[i].size;
	}

	/* Protect monitor and environment sectors
	 */
	flash_protect ( FLAG_PROTECT_SET,
			CONFIG_SYS_FLASH_BASE,
			CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1,
			&flash_info[0] );

	flash_protect ( FLAG_PROTECT_SET,
			CONFIG_ENV_ADDR,
			CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0] );

	return size;
}

/*-----------------------------------------------------------------------
 */
static void flash_get_offsets (ulong base, flash_info_t *info)
{
	int i;

	if (info->flash_id == FLASH_UNKNOWN) {
		return;
	}

	if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
		for (i = 0; i < info->sector_count; i++) {
			info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE);
			info->protect[i] = 0;
		}
	}
}

/*-----------------------------------------------------------------------
 */
void flash_print_info (flash_info_t *info)
{
	int i;

	if (info->flash_id == FLASH_UNKNOWN) {
		printf ("missing or unknown FLASH type\n");
		return;
	}

	switch (info->flash_id & FLASH_VENDMASK) {
	case FLASH_MAN_INTEL:
		printf ("INTEL ");
		break;
	default:
		printf ("Unknown Vendor ");
		break;
	}

	switch (info->flash_id & FLASH_TYPEMASK) {
	case FLASH_28F128J3A:
		printf ("28F128J3A\n");
		break;

	case FLASH_28F640J3A:
		printf ("28F640J3A\n");
		break;
	default:
		printf ("Unknown Chip Type\n");
		break;
	}

	printf ("  Size: %ld MB in %d Sectors\n",
			info->size >> 20, info->sector_count);

	printf ("  Sector Start Addresses:");
	for (i = 0; i < info->sector_count; ++i) {
		if ((i % 5) == 0)
			printf ("\n   ");
		printf (" %08lX%s",
			info->start[i],
			info->protect[i] ? " (RO)" : "     ");
	}
	printf ("\n");
	return;
}

/*
 * The following code cannot be run from FLASH!
 */
static ulong flash_get_size (FPW *addr, flash_info_t *info)
{
	volatile FPW value;

	/* Write auto select command: read Manufacturer ID */
	addr[0x5555] = (FPW) 0x00AA00AA;
	addr[0x2AAA] = (FPW) 0x00550055;
	addr[0x5555] = (FPW) 0x00900090;

	mb ();
	value = addr[0];

	switch (value) {

	case (FPW) INTEL_MANUFACT:
		info->flash_id = FLASH_MAN_INTEL;
		break;

	default:
		info->flash_id = FLASH_UNKNOWN;
		info->sector_count = 0;
		info->size = 0;
		addr[0] = (FPW) 0x00FF00FF;	/* restore read mode */
		return (0);			/* no or unknown flash  */
	}

	mb ();
	value = addr[1];			/* device ID        */

	switch (value) {

	case (FPW) INTEL_ID_28F128J3A:
		info->flash_id += FLASH_28F128J3A;
		info->sector_count = 128;
		info->size = 0x02000000;
		break;				/* => 32 MB     */

	case (FPW) INTEL_ID_28F640J3A:
		info->flash_id += FLASH_28F640J3A;
		info->sector_count = 64;
		info->size = 0x01000000;
		break;				/* => 16 MB     */

	default:
		info->flash_id = FLASH_UNKNOWN;
		break;
	}

	if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) {
		printf ("** ERROR: sector count %d > max (%d) **\n",
			info->sector_count, CONFIG_SYS_MAX_FLASH_SECT);
		info->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
	}

	addr[0] = (FPW) 0x00FF00FF;		/* restore read mode */

	return (info->size);
}


/*-----------------------------------------------------------------------
 */

int flash_erase (flash_info_t *info, int s_first, int s_last)
{
	int flag, prot, sect;
	ulong type, start, last;
	int rcode = 0;

	if ((s_first < 0) || (s_first > s_last)) {
		if (info->flash_id == FLASH_UNKNOWN) {
			printf ("- missing\n");
		} else {
			printf ("- no sectors to erase\n");
		}
		return 1;
	}

	type = (info->flash_id & FLASH_VENDMASK);
	if ((type != FLASH_MAN_INTEL)) {
		printf ("Can't erase unknown flash type %08lx - aborted\n",
			info->flash_id);
		return 1;
	}

	prot = 0;
	for (sect = s_first; sect <= s_last; ++sect) {
		if (info->protect[sect]) {
			prot++;
		}
	}

	if (prot) {
		printf ("- Warning: %d protected sectors will not be erased!\n",
			prot);
	} else {
		printf ("\n");
	}

	start = get_timer (0);
	last = start;

	/* Disable interrupts which might cause a timeout here */
	flag = disable_interrupts ();

	/* Start erase on unprotected sectors */
	for (sect = s_first; sect <= s_last; sect++) {
		if (info->protect[sect] == 0) {	/* not protected */
			FPWV *addr = (FPWV *) (info->start[sect]);
			FPW status;

			printf ("Erasing sector %2d ... ", sect);

			/* arm simple, non interrupt dependent timer */
			reset_timer_masked ();

			*addr = (FPW) 0x00500050;	/* clear status register */
			*addr = (FPW) 0x00200020;	/* erase setup */
			*addr = (FPW) 0x00D000D0;	/* erase confirm */

			while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
				if (get_timer_masked () > CONFIG_SYS_FLASH_ERASE_TOUT) {
					printf ("Timeout\n");
					*addr = (FPW) 0x00B000B0;	/* suspend erase     */
					*addr = (FPW) 0x00FF00FF;	/* reset to read mode */
					rcode = 1;
					break;
				}
			}

			*addr = 0x00500050;	/* clear status register cmd.   */
			*addr = 0x00FF00FF;	/* resest to read mode          */

			printf (" done\n");
		}
	}
	return rcode;
}

/*-----------------------------------------------------------------------
 * Copy memory to flash, returns:
 * 0 - OK
 * 1 - write timeout
 * 2 - Flash not erased
 * 4 - Flash not identified
 */

int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
{
	ulong cp, wp;
	FPW data;
	int count, i, l, rc, port_width;

	if (info->flash_id == FLASH_UNKNOWN) {
		return 4;
	}
/* get lower word aligned address */
#ifdef FLASH_PORT_WIDTH16
	wp = (addr & ~1);
	port_width = 2;
#else
	wp = (addr & ~3);
	port_width = 4;
#endif

	/*
	 * handle unaligned start bytes
	 */
	if ((l = addr - wp) != 0) {
		data = 0;
		for (i = 0, cp = wp; i < l; ++i, ++cp) {
			data = (data << 8) | (*(uchar *) cp);
		}
		for (; i < port_width && cnt > 0; ++i) {
			data = (data << 8) | *src++;
			--cnt;
			++cp;
		}
		for (; cnt == 0 && i < port_width; ++i, ++cp) {
			data = (data << 8) | (*(uchar *) cp);
		}

		if ((rc = write_data (info, wp, SWAP (data))) != 0) {
			return (rc);
		}
		wp += port_width;
	}

	/*
	 * handle word aligned part
	 */
	count = 0;
	while (cnt >= port_width) {
		data = 0;
		for (i = 0; i < port_width; ++i) {
			data = (data << 8) | *src++;
		}
		if ((rc = write_data (info, wp, SWAP (data))) != 0) {
			return (rc);
		}
		wp += port_width;
		cnt -= port_width;
		if (count++ > 0x800) {
			spin_wheel ();
			count = 0;
		}
	}

	if (cnt == 0) {
		return (0);
	}

	/*
	 * handle unaligned tail bytes
	 */
	data = 0;
	for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
		data = (data << 8) | *src++;
		--cnt;
	}
	for (; i < port_width; ++i, ++cp) {
		data = (data << 8) | (*(uchar *) cp);
	}

	return (write_data (info, wp, SWAP (data)));
}

/*-----------------------------------------------------------------------
 * Write a word or halfword to Flash, returns:
 * 0 - OK
 * 1 - write timeout
 * 2 - Flash not erased
 */
static int write_data (flash_info_t *info, ulong dest, FPW data)
{
	FPWV *addr = (FPWV *) dest;
	ulong status;
	int flag;

	/* Check if Flash is (sufficiently) erased */
	if ((*addr & data) != data) {
		printf ("not erased at %08lx (%lx)\n", (ulong) addr, *addr);
		return (2);
	}
	/* Disable interrupts which might cause a timeout here */
	flag = disable_interrupts ();

	*addr = (FPW) 0x00400040;	/* write setup */
	*addr = data;

	/* arm simple, non interrupt dependent timer */
	reset_timer_masked ();

	/* wait while polling the status register */
	while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
		if (get_timer_masked () > CONFIG_SYS_FLASH_WRITE_TOUT) {
			*addr = (FPW) 0x00FF00FF;	/* restore read mode */
			return (1);
		}
	}

	*addr = (FPW) 0x00FF00FF;	/* restore read mode */

	return (0);
}

void inline spin_wheel (void)
{
	static int p = 0;
	static char w[] = "\\/-";

	printf ("\010%c", w[p]);
	(++p == 3) ? (p = 0) : 0;
}

/*-----------------------------------------------------------------------
 * Set/Clear sector's lock bit, returns:
 * 0 - OK
 * 1 - Error (timeout, voltage problems, etc.)
 */
int flash_real_protect(flash_info_t *info, long sector, int prot)
{
	int i;
	int rc = 0;
	vu_long *addr = (vu_long *)(info->start[sector]);
	int flag = disable_interrupts();

	*addr = INTEL_CLEAR;	/* Clear status register */
	if (prot) {			/* Set sector lock bit */
		*addr = INTEL_LOCKBIT;	/* Sector lock bit */
		*addr = INTEL_PROTECT;	/* set */
	}
	else {				/* Clear sector lock bit */
		*addr = INTEL_LOCKBIT;	/* All sectors lock bits */
		*addr = INTEL_CONFIRM;	/* clear */
	}

	reset_timer_masked ();

	while ((*addr & INTEL_FINISHED) != INTEL_FINISHED) {
		if (get_timer_masked () > CONFIG_SYS_FLASH_UNLOCK_TOUT) {
			printf("Flash lock bit operation timed out\n");
			rc = 1;
			break;
		}
	}

	if (*addr != INTEL_OK) {
		printf("Flash lock bit operation failed at %08X, CSR=%08X\n",
		       (uint)addr, (uint)*addr);
		rc = 1;
	}

	if (!rc)
		info->protect[sector] = prot;

	/*
	 * Clear lock bit command clears all sectors lock bits, so
	 * we have to restore lock bits of protected sectors.
	 */
	if (!prot)
	{
		for (i = 0; i < info->sector_count; i++)
		{
			if (info->protect[i])
			{
				reset_timer_masked ();
				addr = (vu_long *)(info->start[i]);
				*addr = INTEL_LOCKBIT;	/* Sector lock bit */
				*addr = INTEL_PROTECT;	/* set */
				while ((*addr & INTEL_FINISHED) != INTEL_FINISHED)
				{
					if (get_timer_masked () > CONFIG_SYS_FLASH_UNLOCK_TOUT)
					{
						printf("Flash lock bit operation timed out\n");
						rc = 1;
						break;
					}
				}
			}
		}
	}

	if (flag)
		enable_interrupts();

	*addr = INTEL_RESET;		/* Reset to read array mode */

	return rc;
}
Commit	Line	Data
efa329cb WD	1	/*
	2	* (C) Copyright 2001
	3	* Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
	4	*
	5	* (C) Copyright 2001-2004
	6	* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
	7	*
	8	* See file CREDITS for list of people who contributed to this
	9	* project.
	10	*
	11	* This program is free software; you can redistribute it and/or
	12	* modify it under the terms of the GNU General Public License as
	13	* published by the Free Software Foundation; either version 2 of
	14	* the License, or (at your option) any later version.
	15	*
	16	* This program is distributed in the hope that it will be useful,
	17	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	18	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	19	* GNU General Public License for more details.
	20	*
	21	* You should have received a copy of the GNU General Public License
	22	* along with this program; if not, write to the Free Software
	23	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	24	* MA 02111-1307 USA
	25	*/
	26
	27	#include <common.h>
	28	#include <linux/byteorder/swab.h>
	29
	30
6d0f6bcf	31	flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
efa329cb WD	32
	33	/* Board support for 1 or 2 flash devices */
	34	#define FLASH_PORT_WIDTH32
	35	#undef FLASH_PORT_WIDTH16
	36
	37	#ifdef FLASH_PORT_WIDTH16
	38	#define FLASH_PORT_WIDTH ushort
	39	#define FLASH_PORT_WIDTHV vu_short
	40	#define SWAP(x) __swab16(x)
	41	#else
	42	#define FLASH_PORT_WIDTH ulong
	43	#define FLASH_PORT_WIDTHV vu_long
	44	#define SWAP(x) __swab32(x)
	45	#endif
	46
	47	/* Intel-compatible flash ID */
	48	#define INTEL_COMPAT 0x00890089
	49	#define INTEL_ALT 0x00B000B0
	50
	51	/* Intel-compatible flash commands */
	52	#define INTEL_PROGRAM 0x00100010
	53	#define INTEL_ERASE 0x00200020
	54	#define INTEL_CLEAR 0x00500050
	55	#define INTEL_LOCKBIT 0x00600060
	56	#define INTEL_PROTECT 0x00010001
	57	#define INTEL_STATUS 0x00700070
	58	#define INTEL_READID 0x00900090
	59	#define INTEL_CONFIRM 0x00D000D0
	60	#define INTEL_RESET 0xFFFFFFFF
	61
	62	/* Intel-compatible flash status bits */
	63	#define INTEL_FINISHED 0x00800080
	64	#define INTEL_OK 0x00800080
	65
	66	#define FPW FLASH_PORT_WIDTH
	67	#define FPWV FLASH_PORT_WIDTHV
	68
	69	#define mb() __asm__ __volatile__ ("" : : : "memory")
	70
	71	/*-----------------------------------------------------------------------
	72	* Functions
	73	*/
	74	static ulong flash_get_size (FPW addr, flash_info_t info);
	75	static int write_data (flash_info_t *info, ulong dest, FPW data);
	76	static void flash_get_offsets (ulong base, flash_info_t *info);
	77	void inline spin_wheel (void);
	78
	79	/*-----------------------------------------------------------------------
	80	*/
	81
	82	unsigned long flash_init (void)
	83	{
	84	int i;
	85	ulong size = 0;
	86
6d0f6bcf	87	for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
efa329cb WD	88	switch (i) {
	89	case 0:
	90	flash_get_size ((FPW *) PHYS_FLASH_1, &flash_info[i]);
	91	flash_get_offsets (PHYS_FLASH_1, &flash_info[i]);
	92	break;
	93	case 1:
	94	flash_get_size ((FPW *) PHYS_FLASH_2, &flash_info[i]);
	95	flash_get_offsets (PHYS_FLASH_2, &flash_info[i]);
	96	break;
	97	default:
	98	panic ("configured to many flash banks!\n");
	99	break;
	100	}
	101	size += flash_info[i].size;
	102	}
	103
	104	/* Protect monitor and environment sectors
	105	*/
	106	flash_protect ( FLAG_PROTECT_SET,
6d0f6bcf JCPV	107	CONFIG_SYS_FLASH_BASE,
6d0f6bcf JCPV	108	CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1,
efa329cb WD	109	&flash_info[0] );
	110
	111	flash_protect ( FLAG_PROTECT_SET,
0e8d1586 JCPV	112	CONFIG_ENV_ADDR,
0e8d1586 JCPV	113	CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0] );
efa329cb WD	114
	115	return size;
	116	}
	117
	118	/*-----------------------------------------------------------------------
	119	*/
	120	static void flash_get_offsets (ulong base, flash_info_t *info)
	121	{
	122	int i;
	123
	124	if (info->flash_id == FLASH_UNKNOWN) {
	125	return;
	126	}
	127
	128	if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
	129	for (i = 0; i < info->sector_count; i++) {
	130	info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE);
	131	info->protect[i] = 0;
	132	}
	133	}
	134	}
	135
	136	/*-----------------------------------------------------------------------
	137	*/
	138	void flash_print_info (flash_info_t *info)
	139	{
	140	int i;
	141
	142	if (info->flash_id == FLASH_UNKNOWN) {
	143	printf ("missing or unknown FLASH type\n");
	144	return;
	145	}
	146
	147	switch (info->flash_id & FLASH_VENDMASK) {
	148	case FLASH_MAN_INTEL:
	149	printf ("INTEL ");
	150	break;
	151	default:
	152	printf ("Unknown Vendor ");
	153	break;
	154	}
	155
	156	switch (info->flash_id & FLASH_TYPEMASK) {
	157	case FLASH_28F128J3A:
	158	printf ("28F128J3A\n");
	159	break;
	160
	161	case FLASH_28F640J3A:
	162	printf ("28F640J3A\n");
	163	break;
	164	default:
	165	printf ("Unknown Chip Type\n");
	166	break;
	167	}
	168
	169	printf (" Size: %ld MB in %d Sectors\n",
	170	info->size >> 20, info->sector_count);
	171
	172	printf (" Sector Start Addresses:");
	173	for (i = 0; i < info->sector_count; ++i) {
	174	if ((i % 5) == 0)
	175	printf ("\n ");
	176	printf (" %08lX%s",
	177	info->start[i],
178	info->protect[i] ? " (RO)" : " ");
179	}
180	printf ("\n");
181	return;
182	}
183
184	/*
185	* The following code cannot be run from FLASH!
186	*/
187	static ulong flash_get_size (FPW addr, flash_info_t info)
188	{
189	volatile FPW value;
190
191	/* Write auto select command: read Manufacturer ID */
192	addr[0x5555] = (FPW) 0x00AA00AA;
193	addr[0x2AAA] = (FPW) 0x00550055;
194	addr[0x5555] = (FPW) 0x00900090;
195
196	mb ();
197	value = addr[0];
198
199	switch (value) {
200
201	case (FPW) INTEL_MANUFACT:
202	info->flash_id = FLASH_MAN_INTEL;
203	break;
204
205	default:
206	info->flash_id = FLASH_UNKNOWN;
207	info->sector_count = 0;
208	info->size = 0;
209	addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
210	return (0); /* no or unknown flash */
211	}
212
213	mb ();
214	value = addr[1]; /* device ID */
215
216	switch (value) {
217
218	case (FPW) INTEL_ID_28F128J3A:
219	info->flash_id += FLASH_28F128J3A;
220	info->sector_count = 128;
221	info->size = 0x02000000;
222	break; /* => 32 MB */
223
224	case (FPW) INTEL_ID_28F640J3A:
225	info->flash_id += FLASH_28F640J3A;
226	info->sector_count = 64;
227	info->size = 0x01000000;
228	break; /* => 16 MB */
229
230	default:
231	info->flash_id = FLASH_UNKNOWN;
232	break;
233	}
234
6d0f6bcf	235	if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) {
efa329cb	236	printf (" ERROR: sector count %d > max (%d) \n",
6d0f6bcf JCPV	237	info->sector_count, CONFIG_SYS_MAX_FLASH_SECT);
6d0f6bcf JCPV	238	info->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
efa329cb WD	239	}
	240
	241	addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
	242
	243	return (info->size);
	244	}
	245
	246
	247	/*-----------------------------------------------------------------------
	248	*/
	249
	250	int flash_erase (flash_info_t *info, int s_first, int s_last)
	251	{
	252	int flag, prot, sect;
	253	ulong type, start, last;
	254	int rcode = 0;
	255
	256	if ((s_first < 0) \|\| (s_first > s_last)) {
	257	if (info->flash_id == FLASH_UNKNOWN) {
	258	printf ("- missing\n");
	259	} else {
	260	printf ("- no sectors to erase\n");
	261	}
	262	return 1;
	263	}
	264
	265	type = (info->flash_id & FLASH_VENDMASK);
	266	if ((type != FLASH_MAN_INTEL)) {
	267	printf ("Can't erase unknown flash type %08lx - aborted\n",
	268	info->flash_id);
	269	return 1;
	270	}
	271
	272	prot = 0;
	273	for (sect = s_first; sect <= s_last; ++sect) {
	274	if (info->protect[sect]) {
	275	prot++;
	276	}
	277	}
	278
	279	if (prot) {
	280	printf ("- Warning: %d protected sectors will not be erased!\n",
	281	prot);
	282	} else {
	283	printf ("\n");
	284	}
	285
	286	start = get_timer (0);
	287	last = start;
	288
	289	/* Disable interrupts which might cause a timeout here */
	290	flag = disable_interrupts ();
	291
	292	/* Start erase on unprotected sectors */
	293	for (sect = s_first; sect <= s_last; sect++) {
	294	if (info->protect[sect] == 0) { /* not protected */
	295	FPWV addr = (FPWV ) (info->start[sect]);
	296	FPW status;
	297
	298	printf ("Erasing sector %2d ... ", sect);
	299
	300	/* arm simple, non interrupt dependent timer */
	301	reset_timer_masked ();
	302
303	addr = (FPW) 0x00500050; / clear status register */
304	addr = (FPW) 0x00200020; / erase setup */
305	addr = (FPW) 0x00D000D0; / erase confirm */
306
307	while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
6d0f6bcf	308	if (get_timer_masked () > CONFIG_SYS_FLASH_ERASE_TOUT) {
efa329cb WD	309	printf ("Timeout\n");
	310	addr = (FPW) 0x00B000B0; / suspend erase */
	311	addr = (FPW) 0x00FF00FF; / reset to read mode */
	312	rcode = 1;
	313	break;
	314	}
	315	}
	316
	317	addr = 0x00500050; / clear status register cmd. */
	318	addr = 0x00FF00FF; / resest to read mode */
	319
	320	printf (" done\n");
	321	}
	322	}
	323	return rcode;
	324	}
	325
	326	/*-----------------------------------------------------------------------
	327	* Copy memory to flash, returns:
	328	* 0 - OK
	329	* 1 - write timeout
	330	* 2 - Flash not erased
	331	* 4 - Flash not identified
	332	*/
	333
	334	int write_buff (flash_info_t info, uchar src, ulong addr, ulong cnt)
	335	{
	336	ulong cp, wp;
	337	FPW data;
	338	int count, i, l, rc, port_width;
	339
	340	if (info->flash_id == FLASH_UNKNOWN) {
	341	return 4;
	342	}
	343	/* get lower word aligned address */
	344	#ifdef FLASH_PORT_WIDTH16
	345	wp = (addr & ~1);
	346	port_width = 2;
	347	#else
	348	wp = (addr & ~3);
	349	port_width = 4;
	350	#endif
	351
	352	/*
	353	* handle unaligned start bytes
	354	*/
	355	if ((l = addr - wp) != 0) {
	356	data = 0;
	357	for (i = 0, cp = wp; i < l; ++i, ++cp) {
	358	data = (data << 8) \| ((uchar ) cp);
	359	}
	360	for (; i < port_width && cnt > 0; ++i) {
	361	data = (data << 8) \| *src++;
	362	--cnt;
	363	++cp;
	364	}
	365	for (; cnt == 0 && i < port_width; ++i, ++cp) {
	366	data = (data << 8) \| ((uchar ) cp);
	367	}
	368
	369	if ((rc = write_data (info, wp, SWAP (data))) != 0) {
	370	return (rc);
	371	}
	372	wp += port_width;
373	}
374
375	/*
376	* handle word aligned part
377	*/
378	count = 0;
379	while (cnt >= port_width) {
380	data = 0;
381	for (i = 0; i < port_width; ++i) {
382	data = (data << 8) \| *src++;
383	}
384	if ((rc = write_data (info, wp, SWAP (data))) != 0) {
385	return (rc);
386	}
387	wp += port_width;
388	cnt -= port_width;
389	if (count++ > 0x800) {
390	spin_wheel ();
391	count = 0;
392	}
393	}
394
395	if (cnt == 0) {
396	return (0);
397	}
398
399	/*
400	* handle unaligned tail bytes
401	*/
402	data = 0;
403	for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
404	data = (data << 8) \| *src++;
405	--cnt;
406	}
407	for (; i < port_width; ++i, ++cp) {
408	data = (data << 8) \| ((uchar ) cp);
409	}
410
411	return (write_data (info, wp, SWAP (data)));
412	}
413
414	/*-----------------------------------------------------------------------
415	* Write a word or halfword to Flash, returns:
416	* 0 - OK
417	* 1 - write timeout
418	* 2 - Flash not erased
419	*/
420	static int write_data (flash_info_t *info, ulong dest, FPW data)
421	{
422	FPWV addr = (FPWV ) dest;
423	ulong status;
424	int flag;
425
426	/* Check if Flash is (sufficiently) erased */
427	if ((*addr & data) != data) {
428	printf ("not erased at %08lx (%lx)\n", (ulong) addr, *addr);
429	return (2);
430	}
431	/* Disable interrupts which might cause a timeout here */
432	flag = disable_interrupts ();
433
434	addr = (FPW) 0x00400040; / write setup */
435	*addr = data;
436
437	/* arm simple, non interrupt dependent timer */
438	reset_timer_masked ();
439
440	/* wait while polling the status register */
441	while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
6d0f6bcf	442	if (get_timer_masked () > CONFIG_SYS_FLASH_WRITE_TOUT) {
efa329cb WD	443	addr = (FPW) 0x00FF00FF; / restore read mode */
	444	return (1);
	445	}
	446	}
	447
	448	addr = (FPW) 0x00FF00FF; / restore read mode */
	449
	450	return (0);
	451	}
	452
	453	void inline spin_wheel (void)
	454	{
	455	static int p = 0;
	456	static char w[] = "\\/-";
	457
	458	printf ("\010%c", w[p]);
	459	(++p == 3) ? (p = 0) : 0;
	460	}
	461
	462	/*-----------------------------------------------------------------------
	463	* Set/Clear sector's lock bit, returns:
	464	* 0 - OK
	465	* 1 - Error (timeout, voltage problems, etc.)
	466	*/
	467	int flash_real_protect(flash_info_t *info, long sector, int prot)
	468	{
	469	int i;
	470	int rc = 0;
	471	vu_long addr = (vu_long )(info->start[sector]);
	472	int flag = disable_interrupts();
	473
	474	addr = INTEL_CLEAR; / Clear status register */
	475	if (prot) { /* Set sector lock bit */
	476	addr = INTEL_LOCKBIT; / Sector lock bit */
	477	addr = INTEL_PROTECT; / set */
	478	}
	479	else { /* Clear sector lock bit */
	480	addr = INTEL_LOCKBIT; / All sectors lock bits */
	481	addr = INTEL_CONFIRM; / clear */
	482	}
	483
	484	reset_timer_masked ();
	485
	486	while ((*addr & INTEL_FINISHED) != INTEL_FINISHED) {
6d0f6bcf	487	if (get_timer_masked () > CONFIG_SYS_FLASH_UNLOCK_TOUT) {
efa329cb WD	488	printf("Flash lock bit operation timed out\n");
	489	rc = 1;
	490	break;
	491	}
	492	}
	493
	494	if (*addr != INTEL_OK) {
	495	printf("Flash lock bit operation failed at %08X, CSR=%08X\n",
	496	(uint)addr, (uint)*addr);
	497	rc = 1;
	498	}
	499
	500	if (!rc)
	501	info->protect[sector] = prot;
	502
	503	/*
	504	* Clear lock bit command clears all sectors lock bits, so
	505	* we have to restore lock bits of protected sectors.
	506	*/
	507	if (!prot)
	508	{
	509	for (i = 0; i < info->sector_count; i++)
	510	{
	511	if (info->protect[i])
	512	{
	513	reset_timer_masked ();
	514	addr = (vu_long *)(info->start[i]);
	515	addr = INTEL_LOCKBIT; / Sector lock bit */
	516	addr = INTEL_PROTECT; / set */
	517	while ((*addr & INTEL_FINISHED) != INTEL_FINISHED)
	518	{
6d0f6bcf	519	if (get_timer_masked () > CONFIG_SYS_FLASH_UNLOCK_TOUT)
efa329cb WD	520	{
	521	printf("Flash lock bit operation timed out\n");
	522	rc = 1;
	523	break;
	524	}
	525	}
	526	}
	527	}
	528	}
	529
	530	if (flag)
	531	enable_interrupts();
	532
	533	addr = INTEL_RESET; / Reset to read array mode */
	534
	535	return rc;
	536	}