[people/ms/u-boot.git] / doc / device-tree-bindings / spi / spi-cadence.txt

Cadence QSPI controller device tree bindings
--------------------------------------------

Required properties:
- compatible		: should be "cadence,qspi".
- reg			: 1.Physical base address and size of SPI registers map.
			  2. Physical base address & size of NOR Flash.
- clocks		: Clock phandles (see clock bindings for details).
- cdns,fifo-depth	: Size of the data FIFO in words.
- cdns,fifo-width	: Bus width of the data FIFO in bytes.
- cdns,trigger-address	: 32-bit indirect AHB trigger address.
- cdns,is-decoded-cs	: Flag to indicate whether decoder is used or not.
- status		: enable in requried dts.

connected flash properties
--------------------------

- spi-max-frequency	: Max supported spi frequency.
- page-size		: Flash page size.
- block-size		: Flash memory block size.
- cdns,tshsl-ns		: Added delay in master reference clocks (ref_clk) for
			  the length that the master mode chip select outputs
			  are de-asserted between transactions.
- cdns,tsd2d-ns		: Delay in master reference clocks (ref_clk) between one
			  chip select being de-activated and the activation of
			  another.
- cdns,tchsh-ns		: Delay in master reference clocks between last bit of
			  current transaction and de-asserting the device chip
			  select (n_ss_out).
- cdns,tslch-ns		: Delay in master reference clocks between setting
			  n_ss_out low and first bit transfer
Commit	Line	Data
8097cba8 VM	1	Cadence QSPI controller device tree bindings
	2	--------------------------------------------
	3
	4	Required properties:
	5	- compatible : should be "cadence,qspi".
	6	- reg : 1.Physical base address and size of SPI registers map.
	7	2. Physical base address & size of NOR Flash.
	8	- clocks : Clock phandles (see clock bindings for details).
c58f3006 JR	9	- cdns,fifo-depth : Size of the data FIFO in words.
	10	- cdns,fifo-width : Bus width of the data FIFO in bytes.
	11	- cdns,trigger-address : 32-bit indirect AHB trigger address.
	12	- cdns,is-decoded-cs : Flag to indicate whether decoder is used or not.
8097cba8 VM	13	- status : enable in requried dts.
	14
	15	connected flash properties
	16	--------------------------
	17
	18	- spi-max-frequency : Max supported spi frequency.
	19	- page-size : Flash page size.
	20	- block-size : Flash memory block size.
c58f3006	21	- cdns,tshsl-ns : Added delay in master reference clocks (ref_clk) for
8097cba8 VM	22	the length that the master mode chip select outputs
8097cba8 VM	23	are de-asserted between transactions.
c58f3006	24	- cdns,tsd2d-ns : Delay in master reference clocks (ref_clk) between one
8097cba8 VM	25	chip select being de-activated and the activation of
8097cba8 VM	26	another.
c58f3006	27	- cdns,tchsh-ns : Delay in master reference clocks between last bit of
8097cba8 VM	28	current transaction and de-asserting the device chip
8097cba8 VM	29	select (n_ss_out).
c58f3006	30	- cdns,tslch-ns : Delay in master reference clocks between setting
8097cba8	31	n_ss_out low and first bit transfer