]> git.ipfire.org Git - people/ms/u-boot.git/blame - drivers/block/sym53c8xx.c
rename CFG_ macros to CONFIG_SYS
[people/ms/u-boot.git] / drivers / block / sym53c8xx.c
CommitLineData
1df49e27
WD
1/*
2 * (C) Copyright 2001
3 * Denis Peter, MPL AG Switzerland, d.peter@mpl.ch.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 * partly derived from
23 * linux/drivers/scsi/sym53c8xx.c
24 *
25 */
26
27/*
28 * SCSI support based on the chip sym53C810.
29 *
30 * 09-19-2001 Andreas Heppel, Sysgo RTS GmbH <aheppel@sysgo.de>
31 * The local version of this driver for the BAB750 board does not
32 * use interrupts but polls the chip instead (see the call of
33 * 'handle_scsi_int()' in 'scsi_issue()'.
34 */
35
36#include <common.h>
37
1df49e27 38#include <command.h>
1df49e27
WD
39#include <pci.h>
40#include <asm/processor.h>
41#include <sym53c8xx.h>
42#include <scsi.h>
43
44#undef SYM53C8XX_DEBUG
45
46#ifdef SYM53C8XX_DEBUG
47#define PRINTF(fmt,args...) printf (fmt ,##args)
48#else
49#define PRINTF(fmt,args...)
50#endif
51
cb51c0bf 52#if defined(CONFIG_CMD_SCSI) && defined(CONFIG_SCSI_SYM53C8XX)
1df49e27
WD
53
54#undef SCSI_SINGLE_STEP
55/*
56 * Single Step is only used for debug purposes
57 */
58#ifdef SCSI_SINGLE_STEP
59static unsigned long start_script_select;
60static unsigned long start_script_msgout;
61static unsigned long start_script_msgin;
62static unsigned long start_script_msg_ext;
63static unsigned long start_script_cmd;
64static unsigned long start_script_data_in;
65static unsigned long start_script_data_out;
66static unsigned long start_script_status;
67static unsigned long start_script_complete;
68static unsigned long start_script_error;
69static unsigned long start_script_reselection;
70static unsigned int len_script_select;
71static unsigned int len_script_msgout;
72static unsigned int len_script_msgin;
73static unsigned int len_script_msg_ext;
74static unsigned int len_script_cmd;
75static unsigned int len_script_data_in;
76static unsigned int len_script_data_out;
77static unsigned int len_script_status;
78static unsigned int len_script_complete;
79static unsigned int len_script_error;
80static unsigned int len_script_reselection;
81#endif
82
83
53677ef1 84static unsigned short scsi_int_mask; /* shadow register for SCSI related interrupts */
1df49e27 85static unsigned char script_int_mask; /* shadow register for SCRIPT related interrupts */
53677ef1
WD
86static unsigned long script_select[8]; /* script for selection */
87static unsigned long script_msgout[8]; /* script for message out phase (NOT USED) */
88static unsigned long script_msgin[14]; /* script for message in phase */
1df49e27
WD
89static unsigned long script_msg_ext[32]; /* script for message in phase when more than 1 byte message */
90static unsigned long script_cmd[18]; /* script for command phase */
91static unsigned long script_data_in[8]; /* script for data in phase */
92static unsigned long script_data_out[8]; /* script for data out phase */
93static unsigned long script_status[6]; /* script for status phase */
94static unsigned long script_complete[10]; /* script for complete */
95static unsigned long script_reselection[4]; /* script for reselection (NOT USED) */
96static unsigned long script_error[2]; /* script for error handling */
97
98static unsigned long int_stat[3]; /* interrupt status */
99static unsigned long scsi_mem_addr; /* base memory address =SCSI_MEM_ADDRESS; */
100
101#define bus_to_phys(a) pci_mem_to_phys(busdevfunc, (unsigned long) (a))
102#define phys_to_bus(a) pci_phys_to_mem(busdevfunc, (unsigned long) (a))
103
104#define SCSI_MAX_RETRY 3 /* number of retries in scsi_issue() */
105
106#define SCSI_MAX_RETRY_NOT_READY 10 /* number of retries when device is not ready */
107#define SCSI_NOT_READY_TIME_OUT 500 /* timeout per retry when not ready */
108
109/*********************************************************************************
110 * forward declerations
111 */
112
113void scsi_chip_init(void);
114void handle_scsi_int(void);
115
116
117/********************************************************************************
118 * reports SCSI errors to the user
119 */
53677ef1 120void scsi_print_error (ccb * pccb)
1df49e27
WD
121{
122 int i;
53677ef1
WD
123
124 printf ("SCSI Error: Target %d LUN %d Command %02X\n", pccb->target,
125 pccb->lun, pccb->cmd[0]);
126 printf (" CCB: ");
127 for (i = 0; i < pccb->cmdlen; i++)
128 printf ("%02X ", pccb->cmd[i]);
129 printf ("(len=%d)\n", pccb->cmdlen);
130 printf (" Cntrl: ");
131 switch (pccb->contr_stat) {
132 case SIR_COMPLETE:
133 printf ("Complete (no Error)\n");
134 break;
135 case SIR_SEL_ATN_NO_MSG_OUT:
136 printf ("Selected with ATN no MSG out phase\n");
137 break;
138 case SIR_CMD_OUT_ILL_PH:
139 printf ("Command out illegal phase\n");
140 break;
141 case SIR_MSG_RECEIVED:
142 printf ("MSG received Error\n");
143 break;
144 case SIR_DATA_IN_ERR:
145 printf ("Data in Error\n");
146 break;
147 case SIR_DATA_OUT_ERR:
148 printf ("Data out Error\n");
149 break;
150 case SIR_SCRIPT_ERROR:
151 printf ("Script Error\n");
152 break;
153 case SIR_MSG_OUT_NO_CMD:
154 printf ("MSG out no Command phase\n");
155 break;
156 case SIR_MSG_OVER7:
157 printf ("MSG in over 7 bytes\n");
158 break;
159 case INT_ON_FY:
160 printf ("Interrupt on fly\n");
161 break;
162 case SCSI_SEL_TIME_OUT:
163 printf ("SCSI Selection Timeout\n");
164 break;
165 case SCSI_HNS_TIME_OUT:
166 printf ("SCSI Handshake Timeout\n");
167 break;
168 case SCSI_MA_TIME_OUT:
169 printf ("SCSI Phase Error\n");
170 break;
171 case SCSI_UNEXP_DIS:
172 printf ("SCSI unexpected disconnect\n");
173 break;
174 default:
175 printf ("unknown status %lx\n", pccb->contr_stat);
176 break;
1df49e27 177 }
53677ef1
WD
178 printf (" Sense: SK %x (", pccb->sense_buf[2] & 0x0f);
179 switch (pccb->sense_buf[2] & 0xf) {
180 case SENSE_NO_SENSE:
181 printf ("No Sense)");
182 break;
183 case SENSE_RECOVERED_ERROR:
184 printf ("Recovered Error)");
185 break;
186 case SENSE_NOT_READY:
187 printf ("Not Ready)");
188 break;
189 case SENSE_MEDIUM_ERROR:
190 printf ("Medium Error)");
191 break;
192 case SENSE_HARDWARE_ERROR:
193 printf ("Hardware Error)");
194 break;
195 case SENSE_ILLEGAL_REQUEST:
196 printf ("Illegal request)");
197 break;
198 case SENSE_UNIT_ATTENTION:
199 printf ("Unit Attention)");
200 break;
201 case SENSE_DATA_PROTECT:
202 printf ("Data Protect)");
203 break;
204 case SENSE_BLANK_CHECK:
205 printf ("Blank check)");
206 break;
207 case SENSE_VENDOR_SPECIFIC:
208 printf ("Vendor specific)");
209 break;
210 case SENSE_COPY_ABORTED:
211 printf ("Copy aborted)");
212 break;
213 case SENSE_ABORTED_COMMAND:
214 printf ("Aborted Command)");
215 break;
216 case SENSE_VOLUME_OVERFLOW:
217 printf ("Volume overflow)");
218 break;
219 case SENSE_MISCOMPARE:
220 printf ("Misscompare\n");
221 break;
222 default:
223 printf ("Illegal Sensecode\n");
224 break;
1df49e27 225 }
53677ef1
WD
226 printf (" ASC %x ASCQ %x\n", pccb->sense_buf[12],
227 pccb->sense_buf[13]);
228 printf (" Status: ");
229 switch (pccb->status) {
230 case S_GOOD:
231 printf ("Good\n");
232 break;
233 case S_CHECK_COND:
234 printf ("Check condition\n");
235 break;
236 case S_COND_MET:
237 printf ("Condition Met\n");
238 break;
239 case S_BUSY:
240 printf ("Busy\n");
241 break;
242 case S_INT:
243 printf ("Intermediate\n");
244 break;
245 case S_INT_COND_MET:
246 printf ("Intermediate condition met\n");
247 break;
248 case S_CONFLICT:
249 printf ("Reservation conflict\n");
250 break;
251 case S_TERMINATED:
252 printf ("Command terminated\n");
253 break;
254 case S_QUEUE_FULL:
255 printf ("Task set full\n");
256 break;
257 default:
258 printf ("unknown: %02X\n", pccb->status);
259 break;
1df49e27
WD
260 }
261
262}
263
264
1df49e27
WD
265/******************************************************************************
266 * sets-up the SCSI controller
267 * the base memory address is retrived via the pci_read_config_dword
268 */
269void scsi_low_level_init(int busdevfunc)
270{
271 unsigned int cmd;
272 unsigned int addr;
273 unsigned char vec;
274
275 pci_read_config_byte(busdevfunc, PCI_INTERRUPT_LINE, &vec);
276 pci_read_config_dword(busdevfunc, PCI_BASE_ADDRESS_1, &addr);
277
278 addr = bus_to_phys(addr & ~0xf);
279
280 /*
281 * Enable bus mastering in case this has not been done, yet.
282 */
283 pci_read_config_dword(busdevfunc, PCI_COMMAND, &cmd);
284 cmd |= PCI_COMMAND_MASTER;
285 pci_write_config_dword(busdevfunc, PCI_COMMAND, cmd);
286
287 scsi_mem_addr = addr;
288
289 scsi_chip_init();
290 scsi_bus_reset();
291}
292
293
294/************************************************************************************
295 * Low level Part of SCSI Driver
296 */
297
298/*
299 * big-endian -> little endian conversion for the script
300 */
301unsigned long swap_script(unsigned long val)
302{
303 unsigned long tmp;
304 tmp = ((val>>24)&0xff) | ((val>>8)&0xff00) | ((val<<8)&0xff0000) | ((val<<24)&0xff000000);
305 return tmp;
306}
307
308
309void scsi_write_byte(ulong offset,unsigned char val)
310{
311 out8(scsi_mem_addr+offset,val);
312}
313
314
315unsigned char scsi_read_byte(ulong offset)
316{
317 return(in8(scsi_mem_addr+offset));
318}
319
320
321/********************************************************************************
322 * interrupt handler
323 */
324void handle_scsi_int(void)
325{
326 unsigned char stat,stat1,stat2;
327 unsigned short sstat;
328 int i;
329#ifdef SCSI_SINGLE_STEP
330 unsigned long tt;
331#endif
332 stat=scsi_read_byte(ISTAT);
333 if((stat & DIP)==DIP) { /* DMA Interrupt pending */
334 stat1=scsi_read_byte(DSTAT);
335#ifdef SCSI_SINGLE_STEP
53677ef1 336 if((stat1 & SSI)==SSI) {
1df49e27
WD
337 tt=in32r(scsi_mem_addr+DSP);
338 if(((tt)>=start_script_select) && ((tt)<start_script_select+len_script_select)) {
339 printf("select %d\n",(tt-start_script_select)>>2);
340 goto end_single;
341 }
342 if(((tt)>=start_script_msgout) && ((tt)<start_script_msgout+len_script_msgout)) {
343 printf("msgout %d\n",(tt-start_script_msgout)>>2);
344 goto end_single;
345 }
346 if(((tt)>=start_script_msgin) && ((tt)<start_script_msgin+len_script_msgin)) {
347 printf("msgin %d\n",(tt-start_script_msgin)>>2);
348 goto end_single;
349 }
350 if(((tt)>=start_script_msg_ext) && ((tt)<start_script_msg_ext+len_script_msg_ext)) {
351 printf("msgin_ext %d\n",(tt-start_script_msg_ext)>>2);
352 goto end_single;
353 }
354 if(((tt)>=start_script_cmd) && ((tt)<start_script_cmd+len_script_cmd)) {
355 printf("cmd %d\n",(tt-start_script_cmd)>>2);
356 goto end_single;
357 }
358 if(((tt)>=start_script_data_in) && ((tt)<start_script_data_in+len_script_data_in)) {
359 printf("data_in %d\n",(tt-start_script_data_in)>>2);
360 goto end_single;
361 }
362 if(((tt)>=start_script_data_out) && ((tt)<start_script_data_out+len_script_data_out)) {
363 printf("data_out %d\n",(tt-start_script_data_out)>>2);
364 goto end_single;
365 }
366 if(((tt)>=start_script_status) && ((tt)<start_script_status+len_script_status)) {
367 printf("status %d\n",(tt-start_script_status)>>2);
368 goto end_single;
369 }
370 if(((tt)>=start_script_complete) && ((tt)<start_script_complete+len_script_complete)) {
371 printf("complete %d\n",(tt-start_script_complete)>>2);
372 goto end_single;
373 }
374 if(((tt)>=start_script_error) && ((tt)<start_script_error+len_script_error)) {
375 printf("error %d\n",(tt-start_script_error)>>2);
376 goto end_single;
377 }
378 if(((tt)>=start_script_reselection) && ((tt)<start_script_reselection+len_script_reselection)) {
379 printf("reselection %d\n",(tt-start_script_reselection)>>2);
380 goto end_single;
381 }
382 printf("sc: %lx\n",tt);
383end_single:
384 stat2=scsi_read_byte(DCNTL);
385 stat2|=STD;
386 scsi_write_byte(DCNTL,stat2);
387 }
388#endif
389 if((stat1 & SIR)==SIR) /* script interrupt */
390 {
391 int_stat[0]=in32(scsi_mem_addr+DSPS);
392 }
393 if((stat1 & DFE)==0) { /* fifo not epmty */
394 scsi_write_byte(CTEST3,CLF); /* Clear DMA FIFO */
395 stat2=scsi_read_byte(STEST3);
396 scsi_write_byte(STEST3,(stat2 | CSF)); /* Clear SCSI FIFO */
397 }
398 }
399 if((stat & SIP)==SIP) { /* scsi interrupt */
400 sstat = (unsigned short)scsi_read_byte(SIST+1);
401 sstat <<=8;
402 sstat |= (unsigned short)scsi_read_byte(SIST);
403 for(i=0;i<3;i++) {
404 if(int_stat[i]==0)
405 break; /* found an empty int status */
406 }
407 int_stat[i]=SCSI_INT_STATE | sstat;
408 stat1=scsi_read_byte(DSTAT);
409 if((stat1 & DFE)==0) { /* fifo not epmty */
410 scsi_write_byte(CTEST3,CLF); /* Clear DMA FIFO */
411 stat2=scsi_read_byte(STEST3);
412 scsi_write_byte(STEST3,(stat2 | CSF)); /* Clear SCSI FIFO */
413 }
414 }
415 if((stat & INTF)==INTF) { /* interrupt on Fly */
416 scsi_write_byte(ISTAT,stat); /* clear it */
417 for(i=0;i<3;i++) {
418 if(int_stat[i]==0)
419 break; /* found an empty int status */
420 }
421 int_stat[i]=INT_ON_FY;
422 }
423}
424
425void scsi_bus_reset(void)
426{
427 unsigned char t;
428 int i;
6d0f6bcf 429 int end = CONFIG_SYS_SCSI_SPIN_UP_TIME*1000;
1df49e27
WD
430
431 t=scsi_read_byte(SCNTL1);
432 scsi_write_byte(SCNTL1,(t | CRST));
433 udelay(50);
434 scsi_write_byte(SCNTL1,t);
435
436 puts("waiting for devices to spin up");
437 for(i=0;i<end;i++) {
438 udelay(1000); /* give the devices time to spin up */
439 if (i % 1000 == 0)
440 putc('.');
441 }
442 putc('\n');
443 scsi_chip_init(); /* reinit the chip ...*/
444
445}
446
447void scsi_int_enable(void)
448{
449 scsi_write_byte(SIEN,(unsigned char)scsi_int_mask);
450 scsi_write_byte(SIEN+1,(unsigned char)(scsi_int_mask>>8));
451 scsi_write_byte(DIEN,script_int_mask);
452}
453
454void scsi_write_dsp(unsigned long start)
455{
456 unsigned long val;
457#ifdef SCSI_SINGLE_STEP
458 unsigned char t;
459#endif
460 val = start;
461 out32r(scsi_mem_addr + DSP,start);
462#ifdef SCSI_SINGLE_STEP
463 t=scsi_read_byte(DCNTL);
464 t|=STD;
465 scsi_write_byte(DCNTL,t);
466#endif
467}
468
469/* only used for debug purposes */
470void scsi_print_script(void)
471{
472 printf("script_select @ 0x%08lX\n",(unsigned long)&script_select[0]);
473 printf("script_msgout @ 0x%08lX\n",(unsigned long)&script_msgout[0]);
474 printf("script_msgin @ 0x%08lX\n",(unsigned long)&script_msgin[0]);
475 printf("script_msgext @ 0x%08lX\n",(unsigned long)&script_msg_ext[0]);
476 printf("script_cmd @ 0x%08lX\n",(unsigned long)&script_cmd[0]);
477 printf("script_data_in @ 0x%08lX\n",(unsigned long)&script_data_in[0]);
478 printf("script_data_out @ 0x%08lX\n",(unsigned long)&script_data_out[0]);
479 printf("script_status @ 0x%08lX\n",(unsigned long)&script_status[0]);
480 printf("script_complete @ 0x%08lX\n",(unsigned long)&script_complete[0]);
481 printf("script_error @ 0x%08lX\n",(unsigned long)&script_error[0]);
482}
483
484
1df49e27
WD
485void scsi_set_script(ccb *pccb)
486{
487 int busdevfunc = pccb->priv;
488 int i;
489 i=0;
490 script_select[i++]=swap_script(SCR_REG_REG(GPREG, SCR_AND, 0xfe));
491 script_select[i++]=0; /* LED ON */
492 script_select[i++]=swap_script(SCR_CLR(SCR_TRG)); /* select initiator mode */
493 script_select[i++]=0;
494 /* script_select[i++]=swap_script(SCR_SEL_ABS_ATN | pccb->target << 16); */
495 script_select[i++]=swap_script(SCR_SEL_ABS | pccb->target << 16);
496 script_select[i++]=swap_script(phys_to_bus(&script_cmd[4])); /* error handling */
497 script_select[i++]=swap_script(SCR_JUMP); /* next section */
498 /* script_select[i++]=swap_script((unsigned long)&script_msgout[0]); */ /* message out */
499 script_select[i++]=swap_script(phys_to_bus(&script_cmd[0])); /* command out */
500
501#ifdef SCSI_SINGLE_STEP
502 start_script_select=(unsigned long)&script_select[0];
503 len_script_select=i*4;
504#endif
505
506 i=0;
507 script_msgout[i++]=swap_script(SCR_INT ^ IFFALSE (WHEN (SCR_MSG_OUT)));
508 script_msgout[i++]=SIR_SEL_ATN_NO_MSG_OUT;
509 script_msgout[i++]=swap_script( SCR_MOVE_ABS(1) ^ SCR_MSG_OUT);
510 script_msgout[i++]=swap_script(phys_to_bus(&pccb->msgout[0]));
511 script_msgout[i++]=swap_script(SCR_JUMP ^ IFTRUE (WHEN (SCR_COMMAND))); /* if Command phase */
512 script_msgout[i++]=swap_script(phys_to_bus(&script_cmd[0])); /* switch to command */
513 script_msgout[i++]=swap_script(SCR_INT); /* interrupt if not */
514 script_msgout[i++]=SIR_MSG_OUT_NO_CMD;
515
516#ifdef SCSI_SINGLE_STEP
517 start_script_msgout=(unsigned long)&script_msgout[0];
518 len_script_msgout=i*4;
519#endif
520 i=0;
521 script_cmd[i++]=swap_script(SCR_MOVE_ABS(pccb->cmdlen) ^ SCR_COMMAND);
522 script_cmd[i++]=swap_script(phys_to_bus(&pccb->cmd[0]));
523 script_cmd[i++]=swap_script(SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_IN))); /* message in ? */
524 script_cmd[i++]=swap_script(phys_to_bus(&script_msgin[0]));
525 script_cmd[i++]=swap_script(SCR_JUMP ^ IFTRUE (IF (SCR_DATA_OUT))); /* data out ? */
526 script_cmd[i++]=swap_script(phys_to_bus(&script_data_out[0]));
527 script_cmd[i++]=swap_script(SCR_JUMP ^ IFTRUE (IF (SCR_DATA_IN))); /* data in ? */
528 script_cmd[i++]=swap_script(phys_to_bus(&script_data_in[0]));
529 script_cmd[i++]=swap_script(SCR_JUMP ^ IFTRUE (IF (SCR_STATUS))); /* status ? */
530 script_cmd[i++]=swap_script(phys_to_bus(&script_status[0]));
531 script_cmd[i++]=swap_script(SCR_JUMP ^ IFTRUE (IF (SCR_COMMAND))); /* command ? */
532 script_cmd[i++]=swap_script(phys_to_bus(&script_cmd[0]));
533 script_cmd[i++]=swap_script(SCR_JUMP ^ IFTRUE (IF (SCR_MSG_OUT))); /* message out ? */
534 script_cmd[i++]=swap_script(phys_to_bus(&script_msgout[0]));
535 script_cmd[i++]=swap_script(SCR_JUMP ^ IFTRUE (IF (SCR_MSG_IN))); /* just for error handling message in ? */
536 script_cmd[i++]=swap_script(phys_to_bus(&script_msgin[0]));
537 script_cmd[i++]=swap_script(SCR_INT); /* interrupt if not */
538 script_cmd[i++]=SIR_CMD_OUT_ILL_PH;
539#ifdef SCSI_SINGLE_STEP
540 start_script_cmd=(unsigned long)&script_cmd[0];
541 len_script_cmd=i*4;
542#endif
543 i=0;
544 script_data_out[i++]=swap_script(SCR_MOVE_ABS(pccb->datalen)^ SCR_DATA_OUT); /* move */
545 script_data_out[i++]=swap_script(phys_to_bus(pccb->pdata)); /* pointer to buffer */
546 script_data_out[i++]=swap_script(SCR_JUMP ^ IFTRUE (WHEN (SCR_STATUS)));
547 script_data_out[i++]=swap_script(phys_to_bus(&script_status[0]));
548 script_data_out[i++]=swap_script(SCR_INT);
549 script_data_out[i++]=SIR_DATA_OUT_ERR;
550
551#ifdef SCSI_SINGLE_STEP
552 start_script_data_out=(unsigned long)&script_data_out[0];
553 len_script_data_out=i*4;
554#endif
555 i=0;
556 script_data_in[i++]=swap_script(SCR_MOVE_ABS(pccb->datalen)^ SCR_DATA_IN); /* move */
557 script_data_in[i++]=swap_script(phys_to_bus(pccb->pdata)); /* pointer to buffer */
558 script_data_in[i++]=swap_script(SCR_JUMP ^ IFTRUE (WHEN (SCR_STATUS)));
559 script_data_in[i++]=swap_script(phys_to_bus(&script_status[0]));
560 script_data_in[i++]=swap_script(SCR_INT);
561 script_data_in[i++]=SIR_DATA_IN_ERR;
562#ifdef SCSI_SINGLE_STEP
563 start_script_data_in=(unsigned long)&script_data_in[0];
564 len_script_data_in=i*4;
565#endif
566 i=0;
567 script_msgin[i++]=swap_script(SCR_MOVE_ABS (1) ^ SCR_MSG_IN);
568 script_msgin[i++]=swap_script(phys_to_bus(&pccb->msgin[0]));
569 script_msgin[i++]=swap_script(SCR_JUMP ^ IFTRUE (DATA (M_COMPLETE)));
570 script_msgin[i++]=swap_script(phys_to_bus(&script_complete[0]));
571 script_msgin[i++]=swap_script(SCR_JUMP ^ IFTRUE (DATA (M_DISCONNECT)));
572 script_msgin[i++]=swap_script(phys_to_bus(&script_complete[0]));
573 script_msgin[i++]=swap_script(SCR_JUMP ^ IFTRUE (DATA (M_SAVE_DP)));
574 script_msgin[i++]=swap_script(phys_to_bus(&script_complete[0]));
575 script_msgin[i++]=swap_script(SCR_JUMP ^ IFTRUE (DATA (M_RESTORE_DP)));
576 script_msgin[i++]=swap_script(phys_to_bus(&script_complete[0]));
577 script_msgin[i++]=swap_script(SCR_JUMP ^ IFTRUE (DATA (M_EXTENDED)));
578 script_msgin[i++]=swap_script(phys_to_bus(&script_msg_ext[0]));
579 script_msgin[i++]=swap_script(SCR_INT);
580 script_msgin[i++]=SIR_MSG_RECEIVED;
581#ifdef SCSI_SINGLE_STEP
582 start_script_msgin=(unsigned long)&script_msgin[0];
583 len_script_msgin=i*4;
584#endif
585 i=0;
586 script_msg_ext[i++]=swap_script(SCR_CLR (SCR_ACK)); /* clear ACK */
587 script_msg_ext[i++]=0;
588 script_msg_ext[i++]=swap_script(SCR_MOVE_ABS (1) ^ SCR_MSG_IN); /* assuming this is the msg length */
589 script_msg_ext[i++]=swap_script(phys_to_bus(&pccb->msgin[1]));
590 script_msg_ext[i++]=swap_script(SCR_JUMP ^ IFFALSE (IF (SCR_MSG_IN)));
591 script_msg_ext[i++]=swap_script(phys_to_bus(&script_complete[0])); /* no more bytes */
592 script_msg_ext[i++]=swap_script(SCR_MOVE_ABS (1) ^ SCR_MSG_IN); /* next */
593 script_msg_ext[i++]=swap_script(phys_to_bus(&pccb->msgin[2]));
594 script_msg_ext[i++]=swap_script(SCR_JUMP ^ IFFALSE (IF (SCR_MSG_IN)));
595 script_msg_ext[i++]=swap_script(phys_to_bus(&script_complete[0])); /* no more bytes */
596 script_msg_ext[i++]=swap_script(SCR_MOVE_ABS (1) ^ SCR_MSG_IN); /* next */
597 script_msg_ext[i++]=swap_script(phys_to_bus(&pccb->msgin[3]));
598 script_msg_ext[i++]=swap_script(SCR_JUMP ^ IFFALSE (IF (SCR_MSG_IN)));
599 script_msg_ext[i++]=swap_script(phys_to_bus(&script_complete[0])); /* no more bytes */
600 script_msg_ext[i++]=swap_script(SCR_MOVE_ABS (1) ^ SCR_MSG_IN); /* next */
601 script_msg_ext[i++]=swap_script(phys_to_bus(&pccb->msgin[4]));
602 script_msg_ext[i++]=swap_script(SCR_JUMP ^ IFFALSE (IF (SCR_MSG_IN)));
603 script_msg_ext[i++]=swap_script(phys_to_bus(&script_complete[0])); /* no more bytes */
604 script_msg_ext[i++]=swap_script(SCR_MOVE_ABS (1) ^ SCR_MSG_IN); /* next */
605 script_msg_ext[i++]=swap_script(phys_to_bus(&pccb->msgin[5]));
606 script_msg_ext[i++]=swap_script(SCR_JUMP ^ IFFALSE (IF (SCR_MSG_IN)));
607 script_msg_ext[i++]=swap_script(phys_to_bus(&script_complete[0])); /* no more bytes */
608 script_msg_ext[i++]=swap_script(SCR_MOVE_ABS (1) ^ SCR_MSG_IN); /* next */
609 script_msg_ext[i++]=swap_script(phys_to_bus(&pccb->msgin[6]));
610 script_msg_ext[i++]=swap_script(SCR_JUMP ^ IFFALSE (IF (SCR_MSG_IN)));
611 script_msg_ext[i++]=swap_script(phys_to_bus(&script_complete[0])); /* no more bytes */
612 script_msg_ext[i++]=swap_script(SCR_MOVE_ABS (1) ^ SCR_MSG_IN); /* next */
613 script_msg_ext[i++]=swap_script(phys_to_bus(&pccb->msgin[7]));
614 script_msg_ext[i++]=swap_script(SCR_JUMP ^ IFFALSE (IF (SCR_MSG_IN)));
615 script_msg_ext[i++]=swap_script(phys_to_bus(&script_complete[0])); /* no more bytes */
616 script_msg_ext[i++]=swap_script(SCR_INT);
617 script_msg_ext[i++]=SIR_MSG_OVER7;
618#ifdef SCSI_SINGLE_STEP
619 start_script_msg_ext=(unsigned long)&script_msg_ext[0];
620 len_script_msg_ext=i*4;
621#endif
622 i=0;
623 script_status[i++]=swap_script(SCR_MOVE_ABS (1) ^ SCR_STATUS);
624 script_status[i++]=swap_script(phys_to_bus(&pccb->status));
625 script_status[i++]=swap_script(SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_IN)));
626 script_status[i++]=swap_script(phys_to_bus(&script_msgin[0]));
627 script_status[i++]=swap_script(SCR_INT);
628 script_status[i++]=SIR_STATUS_ILL_PH;
629#ifdef SCSI_SINGLE_STEP
630 start_script_status=(unsigned long)&script_status[0];
631 len_script_status=i*4;
632#endif
633 i=0;
634 script_complete[i++]=swap_script(SCR_REG_REG (SCNTL2, SCR_AND, 0x7f));
635 script_complete[i++]=0;
636 script_complete[i++]=swap_script(SCR_CLR (SCR_ACK|SCR_ATN));
637 script_complete[i++]=0;
638 script_complete[i++]=swap_script(SCR_WAIT_DISC);
639 script_complete[i++]=0;
640 script_complete[i++]=swap_script(SCR_REG_REG(GPREG, SCR_OR, 0x01));
641 script_complete[i++]=0; /* LED OFF */
642 script_complete[i++]=swap_script(SCR_INT);
643 script_complete[i++]=SIR_COMPLETE;
644#ifdef SCSI_SINGLE_STEP
645 start_script_complete=(unsigned long)&script_complete[0];
646 len_script_complete=i*4;
647#endif
648 i=0;
649 script_error[i++]=swap_script(SCR_INT); /* interrupt if error */
650 script_error[i++]=SIR_SCRIPT_ERROR;
651#ifdef SCSI_SINGLE_STEP
652 start_script_error=(unsigned long)&script_error[0];
653 len_script_error=i*4;
654#endif
655 i=0;
656 script_reselection[i++]=swap_script(SCR_CLR (SCR_TRG)); /* target status */
657 script_reselection[i++]=0;
658 script_reselection[i++]=swap_script(SCR_WAIT_RESEL);
659 script_reselection[i++]=swap_script(phys_to_bus(&script_select[0])); /* len = 4 */
660#ifdef SCSI_SINGLE_STEP
661 start_script_reselection=(unsigned long)&script_reselection[0];
662 len_script_reselection=i*4;
663#endif
664}
665
666
1df49e27
WD
667void scsi_issue(ccb *pccb)
668{
669 int busdevfunc = pccb->priv;
670 int i;
671 unsigned short sstat;
53677ef1 672 int retrycnt; /* retry counter */
1df49e27
WD
673 for(i=0;i<3;i++)
674 int_stat[i]=0; /* delete all int status */
675 /* struct pccb must be set-up correctly */
676 retrycnt=0;
677 PRINTF("ID %d issue cmd %02X\n",pccb->target,pccb->cmd[0]);
678 pccb->trans_bytes=0; /* no bytes transfered yet */
679 scsi_set_script(pccb); /* fill in SCRIPT */
680 scsi_int_mask=STO | UDC | MA; /* | CMP; / * Interrupts which are enabled */
681 script_int_mask=0xff; /* enable all Ints */
682 scsi_int_enable();
683 scsi_write_dsp(phys_to_bus(&script_select[0])); /* start script */
684 /* now we have to wait for IRQs */
685retry:
686 /*
687 * This version of the driver is _not_ interrupt driven,
688 * but polls the chip's interrupt registers (ISTAT, DSTAT).
689 */
690 while(int_stat[0]==0)
691 handle_scsi_int();
692
693 if(int_stat[0]==SIR_COMPLETE) {
694 if(pccb->msgin[0]==M_DISCONNECT) {
695 PRINTF("Wait for reselection\n");
696 for(i=0;i<3;i++)
697 int_stat[i]=0; /* delete all int status */
698 scsi_write_dsp(phys_to_bus(&script_reselection[0])); /* start reselection script */
699 goto retry;
700 }
701 pccb->contr_stat=SIR_COMPLETE;
702 return;
703 }
704 if((int_stat[0] & SCSI_INT_STATE)==SCSI_INT_STATE) { /* scsi interrupt */
705 sstat=(unsigned short)int_stat[0];
706 if((sstat & STO)==STO) { /* selection timeout */
707 pccb->contr_stat=SCSI_SEL_TIME_OUT;
708 scsi_write_byte(GPREG,0x01);
709 PRINTF("ID: %X Selection Timeout\n",pccb->target);
710 return;
711 }
712 if((sstat & UDC)==UDC) { /* unexpected disconnect */
713 pccb->contr_stat=SCSI_UNEXP_DIS;
714 scsi_write_byte(GPREG,0x01);
715 PRINTF("ID: %X Unexpected Disconnect\n",pccb->target);
716 return;
717 }
718 if((sstat & RSL)==RSL) { /* reselection */
719 pccb->contr_stat=SCSI_UNEXP_DIS;
720 scsi_write_byte(GPREG,0x01);
721 PRINTF("ID: %X Unexpected Disconnect\n",pccb->target);
722 return;
723 }
724 if(((sstat & MA)==MA)||((sstat & HTH)==HTH)) { /* phase missmatch */
725 if(retrycnt<SCSI_MAX_RETRY) {
726 pccb->trans_bytes=pccb->datalen -
727 ((unsigned long)scsi_read_byte(DBC) |
728 ((unsigned long)scsi_read_byte(DBC+1)<<8) |
729 ((unsigned long)scsi_read_byte(DBC+2)<<16));
730 for(i=0;i<3;i++)
731 int_stat[i]=0; /* delete all int status */
732 retrycnt++;
733 PRINTF("ID: %X Phase Missmatch Retry %d Phase %02X transfered %lx\n",
734 pccb->target,retrycnt,scsi_read_byte(SBCL),pccb->trans_bytes);
735 scsi_write_dsp(phys_to_bus(&script_cmd[4])); /* start retry script */
736 goto retry;
737 }
738 if((sstat & MA)==MA)
739 pccb->contr_stat=SCSI_MA_TIME_OUT;
740 else
741 pccb->contr_stat=SCSI_HNS_TIME_OUT;
742 PRINTF("Phase Missmatch stat %lx\n",pccb->contr_stat);
743 return;
744 } /* no phase int */
745/* if((sstat & CMP)==CMP) {
746 pccb->contr_stat=SIR_COMPLETE;
747 return;
748 }
749*/
750 PRINTF("SCSI INT %lX\n",int_stat[0]);
751 pccb->contr_stat=int_stat[0];
752 return;
753 } /* end scsi int */
754 PRINTF("SCRIPT INT %lX phase %02X\n",int_stat[0],scsi_read_byte(SBCL));
755 pccb->contr_stat=int_stat[0];
756 return;
757}
758
759int scsi_exec(ccb *pccb)
760{
761 unsigned char tmpcmd[16],tmpstat;
762 int i,retrycnt,t;
763 unsigned long transbytes,datalen;
764 unsigned char *tmpptr;
765 retrycnt=0;
766retry:
767 scsi_issue(pccb);
768 if(pccb->contr_stat!=SIR_COMPLETE)
769 return FALSE;
770 if(pccb->status==S_GOOD)
771 return TRUE;
772 if(pccb->status==S_CHECK_COND) { /* check condition */
773 for(i=0;i<16;i++)
774 tmpcmd[i]=pccb->cmd[i];
775 pccb->cmd[0]=SCSI_REQ_SENSE;
776 pccb->cmd[1]=pccb->lun<<5;
777 pccb->cmd[2]=0;
778 pccb->cmd[3]=0;
779 pccb->cmd[4]=14;
780 pccb->cmd[5]=0;
781 pccb->cmdlen=6;
782 pccb->msgout[0]=SCSI_IDENTIFY;
783 transbytes=pccb->trans_bytes;
784 tmpptr=pccb->pdata;
d0ff51ba 785 pccb->pdata = &pccb->sense_buf[0];
1df49e27
WD
786 datalen=pccb->datalen;
787 pccb->datalen=14;
788 tmpstat=pccb->status;
789 scsi_issue(pccb);
790 for(i=0;i<16;i++)
791 pccb->cmd[i]=tmpcmd[i];
792 pccb->trans_bytes=transbytes;
793 pccb->pdata=tmpptr;
794 pccb->datalen=datalen;
795 pccb->status=tmpstat;
796 PRINTF("Request_sense sense key %x ASC %x ASCQ %x\n",pccb->sense_buf[2]&0x0f,
797 pccb->sense_buf[12],pccb->sense_buf[13]);
798 switch(pccb->sense_buf[2]&0xf) {
799 case SENSE_NO_SENSE:
800 case SENSE_RECOVERED_ERROR:
801 /* seems to be ok */
802 return TRUE;
803 break;
804 case SENSE_NOT_READY:
805 if((pccb->sense_buf[12]!=0x04)||(pccb->sense_buf[13]!=0x01)) {
806 /* if device is not in process of becoming ready */
807 return FALSE;
808 break;
809 } /* else fall through */
810 case SENSE_UNIT_ATTENTION:
811 if(retrycnt<SCSI_MAX_RETRY_NOT_READY) {
812 PRINTF("Target %d not ready, retry %d\n",pccb->target,retrycnt);
813 for(t=0;t<SCSI_NOT_READY_TIME_OUT;t++)
814 udelay(1000); /* 1sec wait */
815 retrycnt++;
816 goto retry;
817 }
818 PRINTF("Target %d not ready, %d retried\n",pccb->target,retrycnt);
819 return FALSE;
820 default:
821 return FALSE;
822 }
823 }
824 PRINTF("Status = %X\n",pccb->status);
825 return FALSE;
826}
827
828
1df49e27
WD
829void scsi_chip_init(void)
830{
831 /* first we issue a soft reset */
832 scsi_write_byte(ISTAT,SRST);
833 udelay(1000);
834 scsi_write_byte(ISTAT,0);
835 /* setup chip */
836 scsi_write_byte(SCNTL0,0xC0); /* full arbitration no start, no message, parity disabled, master */
837 scsi_write_byte(SCNTL1,0x00);
838 scsi_write_byte(SCNTL2,0x00);
6d0f6bcf 839#ifndef CONFIG_SYS_SCSI_SYM53C8XX_CCF /* config value for none 40 mhz clocks */
1df49e27
WD
840 scsi_write_byte(SCNTL3,0x13); /* synchronous clock 40/4=10MHz, asynchronous 40MHz */
841#else
6d0f6bcf 842 scsi_write_byte(SCNTL3,CONFIG_SYS_SCSI_SYM53C8XX_CCF); /* config value for none 40 mhz clocks */
1df49e27
WD
843#endif
844 scsi_write_byte(SCID,0x47); /* ID=7, enable reselection */
845 scsi_write_byte(SXFER,0x00); /* synchronous transfer period 10MHz, asynchronous */
846 scsi_write_byte(SDID,0x00); /* targed SCSI ID = 0 */
847 scsi_int_mask=0x0000; /* no Interrupt is enabled */
848 script_int_mask=0x00;
849 scsi_int_enable();
850 scsi_write_byte(GPREG,0x01); /* GPIO0 is LED (off) */
851 scsi_write_byte(GPCNTL,0x0E); /* GPIO0 is Output */
852 scsi_write_byte(STIME0,0x08); /* handshake timer disabled, selection timeout 512msec */
853 scsi_write_byte(RESPID,0x80); /* repond only to the own ID (reselection) */
854 scsi_write_byte(STEST1,0x00); /* not isolated, SCLK is used */
855 scsi_write_byte(STEST2,0x00); /* no Lowlevel Mode? */
856 scsi_write_byte(STEST3,0x80); /* enable tolerANT */
857 scsi_write_byte(CTEST3,0x04); /* clear FIFO */
858 scsi_write_byte(CTEST4,0x00);
859 scsi_write_byte(CTEST5,0x00);
860#ifdef SCSI_SINGLE_STEP
861/* scsi_write_byte(DCNTL,IRQM | SSM); */
862 scsi_write_byte(DCNTL,IRQD | SSM);
863 scsi_write_byte(DMODE,MAN);
864#else
865/* scsi_write_byte(DCNTL,IRQM); */
866 scsi_write_byte(DCNTL,IRQD);
867 scsi_write_byte(DMODE,0x00);
868#endif
869}
cb51c0bf 870#endif